rtl8821ce/hal/btc/halbtc8192e2ant.c

   1 /* ************************************************************
   2  * Description:
   3  *
   4  * This file is for RTL8192E Co-exist mechanism
   5  *
   6  * History
   7  * 2012/11/15 Cosa first check in.
   8  *
   9  * ************************************************************ */
  10
  11 /* ************************************************************
  12  * include files
  13  * ************************************************************ */
  14 #include "mp_precomp.h"
  15
  16
  17 #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
  18
  19 #if (RTL8192E_SUPPORT == 1)
  20 /* ************************************************************
  21  * Global variables, these are static variables
  22  * ************************************************************ */
  23 static u8        *trace_buf = &gl_btc_trace_buf[0];
  24 static struct  coex_dm_8192e_2ant               glcoex_dm_8192e_2ant;
  25 static struct  coex_dm_8192e_2ant       *coex_dm = &glcoex_dm_8192e_2ant;
  26 static struct  coex_sta_8192e_2ant              glcoex_sta_8192e_2ant;
  27 static struct  coex_sta_8192e_2ant      *coex_sta = &glcoex_sta_8192e_2ant;
  28
  29 const char *const glbt_info_src_8192e_2ant[] = {
  30         "BT Info[wifi fw]",
  31         "BT Info[bt rsp]",
  32         "BT Info[bt auto report]",
  33 };
  34 /* ************************************************************
  35  * BtCoex Version Format:
  36  * 1. date :                    glcoex_ver_date_XXXXX_1ant
  37  * 2. WifiCoexVersion : glcoex_ver_XXXX_1ant
  38  * 3. BtCoexVersion :   glcoex_ver_btdesired_XXXXX_1ant
  39  * 4. others :                  glcoex_ver_XXXXXX_XXXXX_1ant
  40  *
  41  * Variable should be indicated IC and Antenna numbers !!!
  42  * Please strictly follow this order and naming style !!!
  43  *
  44  * ************************************************************ */
  45 u32     glcoex_ver_date_8192e_2ant = 20161024;
  46 u32     glcoex_ver_8192e_2ant = 0x45;
  47 u32     glcoex_ver_btdesired_8192e_2ant = 0x03;
  48 /*1.BT FW update BLE channel map with high priority*/
  49 /* ************************************************************
  50  * local function proto type if needed
  51  * ************************************************************
  52  * ************************************************************
  53  * local function start with halbtc8192e2ant_
  54  * ************************************************************ */
  55 u8 halbtc8192e2ant_bt_rssi_state(u8 level_num, u8 rssi_thresh, u8 rssi_thresh1)
  56 {
  57         s32                     bt_rssi = 0;
  58         u8                      bt_rssi_state = coex_sta->pre_bt_rssi_state;
  59
  60         bt_rssi = coex_sta->bt_rssi;
  61
  62         if (level_num == 2) {
  63                 if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
  64                     (coex_sta->pre_bt_rssi_state ==
  65                      BTC_RSSI_STATE_STAY_LOW)) {
  66                         if (bt_rssi >= (rssi_thresh +
  67                                         BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
  68                                 bt_rssi_state = BTC_RSSI_STATE_HIGH;
  69                         else
  70                                 bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
  71                 } else {
  72                         if (bt_rssi < rssi_thresh)
  73                                 bt_rssi_state = BTC_RSSI_STATE_LOW;
  74                         else
  75                                 bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
  76                 }
  77         } else if (level_num == 3) {
  78                 if (rssi_thresh > rssi_thresh1) {
  79                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  80                                     "[BTCoex], BT Rssi thresh error!!\n");
  81                         BTC_TRACE(trace_buf);
  82                         return coex_sta->pre_bt_rssi_state;
  83                 }
  84
  85                 if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
  86                     (coex_sta->pre_bt_rssi_state ==
  87                      BTC_RSSI_STATE_STAY_LOW)) {
  88                         if (bt_rssi >= (rssi_thresh +
  89                                         BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
  90                                 bt_rssi_state = BTC_RSSI_STATE_MEDIUM;
  91                         else
  92                                 bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
  93                 } else if ((coex_sta->pre_bt_rssi_state ==
  94                             BTC_RSSI_STATE_MEDIUM) ||
  95                            (coex_sta->pre_bt_rssi_state ==
  96                             BTC_RSSI_STATE_STAY_MEDIUM)) {
  97                         if (bt_rssi >= (rssi_thresh1 +
  98                                         BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
  99                                 bt_rssi_state = BTC_RSSI_STATE_HIGH;
 100                         else if (bt_rssi < rssi_thresh)
 101                                 bt_rssi_state = BTC_RSSI_STATE_LOW;
 102                         else
 103                                 bt_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
 104                 } else {
 105                         if (bt_rssi < rssi_thresh1)
 106                                 bt_rssi_state = BTC_RSSI_STATE_MEDIUM;
 107                         else
 108                                 bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
 109                 }
 110         }
 111
 112         coex_sta->pre_bt_rssi_state = bt_rssi_state;
 113
 114         return bt_rssi_state;
 115 }
 116
 117 u8 halbtc8192e2ant_wifi_rssi_state(IN struct btc_coexist *btcoexist,
 118            IN u8 index, IN u8 level_num, IN u8 rssi_thresh, IN u8 rssi_thresh1)
 119 {
 120         s32                     wifi_rssi = 0;
 121         u8                      wifi_rssi_state = coex_sta->pre_wifi_rssi_state[index];
 122
 123         btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi);
 124
 125         if (level_num == 2) {
 126                 if ((coex_sta->pre_wifi_rssi_state[index] == BTC_RSSI_STATE_LOW)
 127                     ||
 128                     (coex_sta->pre_wifi_rssi_state[index] ==
 129                      BTC_RSSI_STATE_STAY_LOW)) {
 130                         if (wifi_rssi >= (rssi_thresh +
 131                                           BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
 132                                 wifi_rssi_state = BTC_RSSI_STATE_HIGH;
 133                         else
 134                                 wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW;
 135                 } else {
 136                         if (wifi_rssi < rssi_thresh)
 137                                 wifi_rssi_state = BTC_RSSI_STATE_LOW;
 138                         else
 139                                 wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
 140                 }
 141         } else if (level_num == 3) {
 142                 if (rssi_thresh > rssi_thresh1) {
 143                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 144                                     "[BTCoex], wifi RSSI thresh error!!\n");
 145                         BTC_TRACE(trace_buf);
 146                         return coex_sta->pre_wifi_rssi_state[index];
 147                 }
 148
 149                 if ((coex_sta->pre_wifi_rssi_state[index] == BTC_RSSI_STATE_LOW)
 150                     ||
 151                     (coex_sta->pre_wifi_rssi_state[index] ==
 152                      BTC_RSSI_STATE_STAY_LOW)) {
 153                         if (wifi_rssi >= (rssi_thresh +
 154                                           BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
 155                                 wifi_rssi_state = BTC_RSSI_STATE_MEDIUM;
 156                         else
 157                                 wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW;
 158                 } else if ((coex_sta->pre_wifi_rssi_state[index] ==
 159                             BTC_RSSI_STATE_MEDIUM) ||
 160                            (coex_sta->pre_wifi_rssi_state[index] ==
 161                             BTC_RSSI_STATE_STAY_MEDIUM)) {
 162                         if (wifi_rssi >= (rssi_thresh1 +
 163                                           BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
 164                                 wifi_rssi_state = BTC_RSSI_STATE_HIGH;
 165                         else if (wifi_rssi < rssi_thresh)
 166                                 wifi_rssi_state = BTC_RSSI_STATE_LOW;
 167                         else
 168                                 wifi_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
 169                 } else {
 170                         if (wifi_rssi < rssi_thresh1)
 171                                 wifi_rssi_state = BTC_RSSI_STATE_MEDIUM;
 172                         else
 173                                 wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
 174                 }
 175         }
 176
 177         coex_sta->pre_wifi_rssi_state[index] = wifi_rssi_state;
 178
 179         return wifi_rssi_state;
 180 }
 181
 182 void halbtc8192e2ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
 183 {
 184         static u32      bt_disable_cnt = 0;
 185         boolean                 bt_active = true, bt_disabled = false;
 186
 187         /* This function check if bt is disabled */
 188
 189         if (coex_sta->high_priority_tx == 0 &&
 190             coex_sta->high_priority_rx == 0 &&
 191             coex_sta->low_priority_tx == 0 &&
 192             coex_sta->low_priority_rx == 0)
 193                 bt_active = false;
 194         if (coex_sta->high_priority_tx == 0xffff &&
 195             coex_sta->high_priority_rx == 0xffff &&
 196             coex_sta->low_priority_tx == 0xffff &&
 197             coex_sta->low_priority_rx == 0xffff)
 198                 bt_active = false;
 199         if (bt_active) {
 200                 bt_disable_cnt = 0;
 201                 bt_disabled = false;
 202                 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
 203                                    &bt_disabled);
 204                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 205                             "[BTCoex], BT is enabled !!\n");
 206                 BTC_TRACE(trace_buf);
 207         } else {
 208                 bt_disable_cnt++;
 209                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 210                             "[BTCoex], bt all counters=0, %d times!!\n",
 211                             bt_disable_cnt);
 212                 BTC_TRACE(trace_buf);
 213                 if (bt_disable_cnt >= 2) {
 214                         bt_disabled = true;
 215                         btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
 216                                            &bt_disabled);
 217                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 218                                     "[BTCoex], BT is disabled !!\n");
 219                         BTC_TRACE(trace_buf);
 220                 }
 221         }
 222         if (coex_sta->bt_disabled != bt_disabled) {
 223                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 224                             "[BTCoex], BT is from %s to %s!!\n",
 225                             (coex_sta->bt_disabled ? "disabled" : "enabled"),
 226                             (bt_disabled ? "disabled" : "enabled"));
 227                 BTC_TRACE(trace_buf);
 228                 coex_sta->bt_disabled = bt_disabled;
 229                 /* if (!bt_disabled) {
 230                 } else {
 231                 } */
 232         }
 233 }
 234
 235 u32 halbtc8192e2ant_decide_ra_mask(IN struct btc_coexist *btcoexist,
 236                                    IN u8 ss_type, IN u32 ra_mask_type)
 237 {
 238         u32     dis_ra_mask = 0x0;
 239
 240         switch (ra_mask_type) {
 241         case 0: /* normal mode */
 242                 if (ss_type == 2)
 243                         dis_ra_mask = 0x0;                      /* enable 2ss */
 244                 else
 245                         dis_ra_mask = 0xfff00000;               /* disable 2ss */
 246                 break;
 247         case 1: /* disable cck 1/2 */
 248                 if (ss_type == 2)
 249                         dis_ra_mask = 0x00000003;               /* enable 2ss */
 250                 else
 251                         dis_ra_mask = 0xfff00003;               /* disable 2ss */
 252                 break;
 253         case 2: /* disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 */
 254                 if (ss_type == 2)
 255                         dis_ra_mask = 0x0001f1f7;               /* enable 2ss */
 256                 else
 257                         dis_ra_mask = 0xfff1f1f7;               /* disable 2ss */
 258                 break;
 259         default:
 260                 break;
 261         }
 262
 263         return dis_ra_mask;
 264 }
 265
 266 void halbtc8192e2ant_update_ra_mask(IN struct btc_coexist *btcoexist,
 267                                     IN boolean force_exec, IN u32 dis_rate_mask)
 268 {
 269         coex_dm->cur_ra_mask = dis_rate_mask;
 270
 271         if (force_exec || (coex_dm->pre_ra_mask != coex_dm->cur_ra_mask))
 272                 btcoexist->btc_set(btcoexist, BTC_SET_ACT_UPDATE_RAMASK,
 273                                    &coex_dm->cur_ra_mask);
 274         coex_dm->pre_ra_mask = coex_dm->cur_ra_mask;
 275 }
 276
 277 void halbtc8192e2ant_auto_rate_fallback_retry(IN struct btc_coexist *btcoexist,
 278                 IN boolean force_exec, IN u8 type)
 279 {
 280         boolean wifi_under_b_mode = false;
 281
 282         coex_dm->cur_arfr_type = type;
 283
 284         if (force_exec || (coex_dm->pre_arfr_type != coex_dm->cur_arfr_type)) {
 285                 switch (coex_dm->cur_arfr_type) {
 286                 case 0: /* normal mode */
 287                         btcoexist->btc_write_4byte(btcoexist, 0x430,
 288                                                    coex_dm->backup_arfr_cnt1);
 289                         btcoexist->btc_write_4byte(btcoexist, 0x434,
 290                                                    coex_dm->backup_arfr_cnt2);
 291                         break;
 292                 case 1:
 293                         btcoexist->btc_get(btcoexist,
 294                                            BTC_GET_BL_WIFI_UNDER_B_MODE,
 295                                            &wifi_under_b_mode);
 296                         if (wifi_under_b_mode) {
 297                                 btcoexist->btc_write_4byte(btcoexist,
 298                                                            0x430, 0x0);
 299                                 btcoexist->btc_write_4byte(btcoexist,
 300                                                            0x434, 0x01010101);
 301                         } else {
 302                                 btcoexist->btc_write_4byte(btcoexist,
 303                                                            0x430, 0x0);
 304                                 btcoexist->btc_write_4byte(btcoexist,
 305                                                            0x434, 0x04030201);
 306                         }
 307                         break;
 308                 default:
 309                         break;
 310                 }
 311         }
 312
 313         coex_dm->pre_arfr_type = coex_dm->cur_arfr_type;
 314 }
 315
 316 void halbtc8192e2ant_retry_limit(IN struct btc_coexist *btcoexist,
 317                                  IN boolean force_exec, IN u8 type)
 318 {
 319         coex_dm->cur_retry_limit_type = type;
 320
 321         if (force_exec ||
 322             (coex_dm->pre_retry_limit_type !=
 323              coex_dm->cur_retry_limit_type)) {
 324                 switch (coex_dm->cur_retry_limit_type) {
 325                 case 0: /* normal mode */
 326                         btcoexist->btc_write_2byte(btcoexist, 0x42a,
 327                                                    coex_dm->backup_retry_limit);
 328                         break;
 329                 case 1: /* retry limit=8 */
 330                         btcoexist->btc_write_2byte(btcoexist, 0x42a,
 331                                                    0x0808);
 332                         break;
 333                 default:
 334                         break;
 335                 }
 336         }
 337
 338         coex_dm->pre_retry_limit_type = coex_dm->cur_retry_limit_type;
 339 }
 340
 341 void halbtc8192e2ant_ampdu_max_time(IN struct btc_coexist *btcoexist,
 342                                     IN boolean force_exec, IN u8 type)
 343 {
 344         coex_dm->cur_ampdu_time_type = type;
 345
 346         if (force_exec ||
 347             (coex_dm->pre_ampdu_time_type != coex_dm->cur_ampdu_time_type)) {
 348                 switch (coex_dm->cur_ampdu_time_type) {
 349                 case 0: /* normal mode */
 350                         btcoexist->btc_write_1byte(btcoexist, 0x456,
 351                                            coex_dm->backup_ampdu_max_time);
 352                         break;
 353                 case 1: /* AMPDU timw = 0x38 * 32us */
 354                         btcoexist->btc_write_1byte(btcoexist, 0x456,
 355                                                    0x38);
 356                         break;
 357                 default:
 358                         break;
 359                 }
 360         }
 361
 362         coex_dm->pre_ampdu_time_type = coex_dm->cur_ampdu_time_type;
 363 }
 364
 365 void halbtc8192e2ant_limited_tx(IN struct btc_coexist *btcoexist,
 366                 IN boolean force_exec, IN u8 ra_mask_type, IN u8 arfr_type,
 367                                 IN u8 retry_limit_type, IN u8 ampdu_time_type)
 368 {
 369         u32     dis_ra_mask = 0x0;
 370
 371         coex_dm->cur_ra_mask_type = ra_mask_type;
 372         dis_ra_mask = halbtc8192e2ant_decide_ra_mask(btcoexist,
 373                         coex_dm->cur_ss_type, ra_mask_type);
 374         halbtc8192e2ant_update_ra_mask(btcoexist, force_exec, dis_ra_mask);
 375
 376         halbtc8192e2ant_auto_rate_fallback_retry(btcoexist, force_exec,
 377                         arfr_type);
 378         halbtc8192e2ant_retry_limit(btcoexist, force_exec, retry_limit_type);
 379         halbtc8192e2ant_ampdu_max_time(btcoexist, force_exec, ampdu_time_type);
 380 }
 381
 382 void halbtc8192e2ant_limited_rx(IN struct btc_coexist *btcoexist,
 383                         IN boolean force_exec, IN boolean rej_ap_agg_pkt,
 384                         IN boolean bt_ctrl_agg_buf_size, IN u8 agg_buf_size)
 385 {
 386         boolean reject_rx_agg = rej_ap_agg_pkt;
 387         boolean bt_ctrl_rx_agg_size = bt_ctrl_agg_buf_size;
 388         u8      rx_agg_size = agg_buf_size;
 389
 390         /* ============================================ */
 391         /*      Rx Aggregation related setting */
 392         /* ============================================ */
 393         btcoexist->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT,
 394                            &reject_rx_agg);
 395         /* decide BT control aggregation buf size or not */
 396         btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE,
 397                            &bt_ctrl_rx_agg_size);
 398         /* aggregation buf size, only work when BT control Rx aggregation size. */
 399         btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size);
 400         /* real update aggregation setting */
 401         btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
 402
 403
 404 }
 405
 406 void halbtc8192e2ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
 407 {
 408         u32                     reg_hp_txrx, reg_lp_txrx, u32tmp;
 409         u32                     reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0;
 410
 411         reg_hp_txrx = 0x770;
 412         reg_lp_txrx = 0x774;
 413
 414         u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_txrx);
 415         reg_hp_tx = u32tmp & MASKLWORD;
 416         reg_hp_rx = (u32tmp & MASKHWORD) >> 16;
 417
 418         u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_txrx);
 419         reg_lp_tx = u32tmp & MASKLWORD;
 420         reg_lp_rx = (u32tmp & MASKHWORD) >> 16;
 421
 422         coex_sta->high_priority_tx = reg_hp_tx;
 423         coex_sta->high_priority_rx = reg_hp_rx;
 424         coex_sta->low_priority_tx = reg_lp_tx;
 425         coex_sta->low_priority_rx = reg_lp_rx;
 426
 427         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 428                 "[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n",
 429                     reg_hp_txrx, reg_hp_tx, reg_hp_tx, reg_hp_rx, reg_hp_rx);
 430         BTC_TRACE(trace_buf);
 431         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 432                 "[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n",
 433                     reg_lp_txrx, reg_lp_tx, reg_lp_tx, reg_lp_rx, reg_lp_rx);
 434         BTC_TRACE(trace_buf);
 435
 436         /* reset counter */
 437         btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc);
 438 }
 439
 440
 441 void halbtc8192e2ant_monitor_wifi_ctr(IN struct btc_coexist *btcoexist)
 442 {
 443 #if 1
 444
 445         coex_sta->crc_ok_cck =
 446                 btcoexist->btc_phydm_query_PHY_counter(
 447                         btcoexist,
 448                         PHYDM_INFO_CRC32_OK_CCK);
 449         coex_sta->crc_ok_11g =
 450                 btcoexist->btc_phydm_query_PHY_counter(
 451                         btcoexist,
 452                         PHYDM_INFO_CRC32_OK_LEGACY);
 453         coex_sta->crc_ok_11n =
 454                 btcoexist->btc_phydm_query_PHY_counter(
 455                         btcoexist,
 456                         PHYDM_INFO_CRC32_OK_HT);
 457         coex_sta->crc_ok_11n_vht =
 458                 btcoexist->btc_phydm_query_PHY_counter(
 459                         btcoexist,
 460                         PHYDM_INFO_CRC32_OK_VHT);
 461
 462         coex_sta->crc_err_cck =
 463                 btcoexist->btc_phydm_query_PHY_counter(
 464                         btcoexist,
 465                         PHYDM_INFO_CRC32_ERROR_CCK);
 466         coex_sta->crc_err_11g =
 467                 btcoexist->btc_phydm_query_PHY_counter(
 468                         btcoexist,
 469                         PHYDM_INFO_CRC32_ERROR_LEGACY);
 470         coex_sta->crc_err_11n =
 471                 btcoexist->btc_phydm_query_PHY_counter(
 472                         btcoexist,
 473                         PHYDM_INFO_CRC32_ERROR_HT);
 474         coex_sta->crc_err_11n_vht =
 475                 btcoexist->btc_phydm_query_PHY_counter(
 476                         btcoexist,
 477                         PHYDM_INFO_CRC32_ERROR_VHT);
 478 #endif
 479 }
 480
 481
 482
 483 void halbtc8192e2ant_query_bt_info(IN struct btc_coexist *btcoexist)
 484 {
 485         u8                      h2c_parameter[1] = {0};
 486
 487         coex_sta->c2h_bt_info_req_sent = true;
 488
 489         h2c_parameter[0] |= BIT(0);     /* trigger */
 490
 491         btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter);
 492
 493         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 494                     "[BTCoex],Query BT info!!!! H2C 0x61 = 0x1\n");
 495         BTC_TRACE(trace_buf);
 496 }
 497
 498 boolean halbtc8192e2ant_is_wifi_status_changed(IN struct btc_coexist *btcoexist)
 499 {
 500         static boolean  pre_wifi_busy = false, pre_under_4way = false,
 501                         pre_bt_hs_on = false;
 502         boolean wifi_busy = false, under_4way = false, bt_hs_on = false;
 503         boolean wifi_connected = false;
 504         u8      wifi_rssi_state = BTC_RSSI_STATE_HIGH;
 505
 506
 507         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
 508                            &wifi_connected);
 509         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 510         btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
 511         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
 512                            &under_4way);
 513
 514         if (wifi_connected) {
 515                 if (wifi_busy != pre_wifi_busy) {
 516                         pre_wifi_busy = wifi_busy;
 517                         return true;
 518                 }
 519                 if (under_4way != pre_under_4way) {
 520                         pre_under_4way = under_4way;
 521                         return true;
 522                 }
 523                 if (bt_hs_on != pre_bt_hs_on) {
 524                         pre_bt_hs_on = bt_hs_on;
 525                         return true;
 526                 }
 527
 528                 wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0,
 529                                   2, 34, 0);
 530
 531                 if ((BTC_RSSI_STATE_HIGH == wifi_rssi_state) ||
 532                     (BTC_RSSI_STATE_LOW == wifi_rssi_state))
 533                         return true;
 534         }
 535
 536         return false;
 537 }
 538
 539 void halbtc8192e2ant_update_bt_link_info(IN struct btc_coexist *btcoexist)
 540 {
 541         struct  btc_bt_link_info        *bt_link_info = &btcoexist->bt_link_info;
 542         boolean                         bt_hs_on = false;
 543
 544         btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
 545
 546         bt_link_info->bt_link_exist = coex_sta->bt_link_exist;
 547         bt_link_info->sco_exist = coex_sta->sco_exist;
 548         bt_link_info->a2dp_exist = coex_sta->a2dp_exist;
 549         bt_link_info->pan_exist = coex_sta->pan_exist;
 550         bt_link_info->hid_exist = coex_sta->hid_exist;
 551
 552         /* work around for HS mode. */
 553         if (bt_hs_on) {
 554                 bt_link_info->pan_exist = true;
 555                 bt_link_info->bt_link_exist = true;
 556         }
 557
 558         /* check if Sco only */
 559         if (bt_link_info->sco_exist &&
 560             !bt_link_info->a2dp_exist &&
 561             !bt_link_info->pan_exist &&
 562             !bt_link_info->hid_exist)
 563                 bt_link_info->sco_only = true;
 564         else
 565                 bt_link_info->sco_only = false;
 566
 567         /* check if A2dp only */
 568         if (!bt_link_info->sco_exist &&
 569             bt_link_info->a2dp_exist &&
 570             !bt_link_info->pan_exist &&
 571             !bt_link_info->hid_exist)
 572                 bt_link_info->a2dp_only = true;
 573         else
 574                 bt_link_info->a2dp_only = false;
 575
 576         /* check if Pan only */
 577         if (!bt_link_info->sco_exist &&
 578             !bt_link_info->a2dp_exist &&
 579             bt_link_info->pan_exist &&
 580             !bt_link_info->hid_exist)
 581                 bt_link_info->pan_only = true;
 582         else
 583                 bt_link_info->pan_only = false;
 584
 585         /* check if Hid only */
 586         if (!bt_link_info->sco_exist &&
 587             !bt_link_info->a2dp_exist &&
 588             !bt_link_info->pan_exist &&
 589             bt_link_info->hid_exist)
 590                 bt_link_info->hid_only = true;
 591         else
 592                 bt_link_info->hid_only = false;
 593 }
 594
 595 u8 halbtc8192e2ant_action_algorithm(IN struct btc_coexist *btcoexist)
 596 {
 597         struct  btc_bt_link_info        *bt_link_info = &btcoexist->bt_link_info;
 598         struct  btc_stack_info  *stack_info = &btcoexist->stack_info;
 599         boolean                         bt_hs_on = false;
 600         u8                              algorithm = BT_8192E_2ANT_COEX_ALGO_UNDEFINED;
 601         u8                              num_of_diff_profile = 0;
 602
 603         btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
 604
 605         if (!bt_link_info->bt_link_exist) {
 606                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 607                             "[BTCoex], No BT link exists!!!\n");
 608                 BTC_TRACE(trace_buf);
 609                 return algorithm;
 610         }
 611
 612         if (bt_link_info->sco_exist)
 613                 num_of_diff_profile++;
 614         if (bt_link_info->hid_exist)
 615                 num_of_diff_profile++;
 616         if (bt_link_info->pan_exist)
 617                 num_of_diff_profile++;
 618         if (bt_link_info->a2dp_exist)
 619                 num_of_diff_profile++;
 620
 621         if (num_of_diff_profile == 1) {
 622                 if (bt_link_info->sco_exist) {
 623                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 624                                     "[BTCoex], SCO only\n");
 625                         BTC_TRACE(trace_buf);
 626                         algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
 627                 } else {
 628                         if (bt_link_info->hid_exist) {
 629                                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 630                                             "[BTCoex], HID only\n");
 631                                 BTC_TRACE(trace_buf);
 632                                 algorithm = BT_8192E_2ANT_COEX_ALGO_HID;
 633                         } else if (bt_link_info->a2dp_exist) {
 634                                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 635                                             "[BTCoex], A2DP only\n");
 636                                 BTC_TRACE(trace_buf);
 637                                 algorithm = BT_8192E_2ANT_COEX_ALGO_A2DP;
 638                         } else if (bt_link_info->pan_exist) {
 639                                 if (bt_hs_on) {
 640                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 641                                                     "[BTCoex], PAN(HS) only\n");
 642                                         BTC_TRACE(trace_buf);
 643                                         algorithm =
 644                                                 BT_8192E_2ANT_COEX_ALGO_PANHS;
 645                                 } else {
 646                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 647                                                 "[BTCoex], PAN(EDR) only\n");
 648                                         BTC_TRACE(trace_buf);
 649                                         algorithm =
 650                                                 BT_8192E_2ANT_COEX_ALGO_PANEDR;
 651                                 }
 652                         }
 653                 }
 654         } else if (num_of_diff_profile == 2) {
 655                 if (bt_link_info->sco_exist) {
 656                         if (bt_link_info->hid_exist) {
 657                                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 658                                             "[BTCoex], SCO + HID\n");
 659                                 BTC_TRACE(trace_buf);
 660                                 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
 661                         } else if (bt_link_info->a2dp_exist) {
 662                                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 663                                             "[BTCoex], SCO + A2DP ==> SCO\n");
 664                                 BTC_TRACE(trace_buf);
 665                                 algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
 666                         } else if (bt_link_info->pan_exist) {
 667                                 if (bt_hs_on) {
 668                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 669                                                 "[BTCoex], SCO + PAN(HS)\n");
 670                                         BTC_TRACE(trace_buf);
 671                                         algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
 672                                 } else {
 673                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 674                                                 "[BTCoex], SCO + PAN(EDR)\n");
 675                                         BTC_TRACE(trace_buf);
 676                                         algorithm =
 677                                                 BT_8192E_2ANT_COEX_ALGO_SCO_PAN;
 678                                 }
 679                         }
 680                 } else {
 681                         if (bt_link_info->hid_exist &&
 682                             bt_link_info->a2dp_exist) {
 683                                 if (stack_info->num_of_hid >= 2) {
 684                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 685                                                     "[BTCoex], HID*2 + A2DP\n");
 686                                         BTC_TRACE(trace_buf);
 687                                         algorithm =
 688                                                 BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
 689                                 } else {
 690                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 691                                                     "[BTCoex], HID + A2DP\n");
 692                                         BTC_TRACE(trace_buf);
 693                                         algorithm =
 694                                                 BT_8192E_2ANT_COEX_ALGO_HID_A2DP;
 695                                 }
 696                         } else if (bt_link_info->hid_exist &&
 697                                    bt_link_info->pan_exist) {
 698                                 if (bt_hs_on) {
 699                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 700                                                 "[BTCoex], HID + PAN(HS)\n");
 701                                         BTC_TRACE(trace_buf);
 702                                         algorithm = BT_8192E_2ANT_COEX_ALGO_HID;
 703                                 } else {
 704                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 705                                                 "[BTCoex], HID + PAN(EDR)\n");
 706                                         BTC_TRACE(trace_buf);
 707                                         algorithm =
 708                                                 BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
 709                                 }
 710                         } else if (bt_link_info->pan_exist &&
 711                                    bt_link_info->a2dp_exist) {
 712                                 if (bt_hs_on) {
 713                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 714                                                 "[BTCoex], A2DP + PAN(HS)\n");
 715                                         BTC_TRACE(trace_buf);
 716                                         algorithm =
 717                                                 BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS;
 718                                 } else {
 719                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 720                                                 "[BTCoex], A2DP + PAN(EDR)\n");
 721                                         BTC_TRACE(trace_buf);
 722                                         algorithm =
 723                                                 BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP;
 724                                 }
 725                         }
 726                 }
 727         } else if (num_of_diff_profile == 3) {
 728                 if (bt_link_info->sco_exist) {
 729                         if (bt_link_info->hid_exist &&
 730                             bt_link_info->a2dp_exist) {
 731                                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 732                                         "[BTCoex], SCO + HID + A2DP ==> HID\n");
 733                                 BTC_TRACE(trace_buf);
 734                                 algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
 735                         } else if (bt_link_info->hid_exist &&
 736                                    bt_link_info->pan_exist) {
 737                                 if (bt_hs_on) {
 738                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 739                                                 "[BTCoex], SCO + HID + PAN(HS)\n");
 740                                         BTC_TRACE(trace_buf);
 741                                         algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
 742                                 } else {
 743                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 744                                                 "[BTCoex], SCO + HID + PAN(EDR)\n");
 745                                         BTC_TRACE(trace_buf);
 746                                         algorithm =
 747                                                 BT_8192E_2ANT_COEX_ALGO_SCO_PAN;
 748                                 }
 749                         } else if (bt_link_info->pan_exist &&
 750                                    bt_link_info->a2dp_exist) {
 751                                 if (bt_hs_on) {
 752                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 753                                                 "[BTCoex], SCO + A2DP + PAN(HS)\n");
 754                                         BTC_TRACE(trace_buf);
 755                                         algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
 756                                 } else {
 757                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 758                                                 "[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n");
 759                                         BTC_TRACE(trace_buf);
 760                                         algorithm =
 761                                                 BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
 762                                 }
 763                         }
 764                 } else {
 765                         if (bt_link_info->hid_exist &&
 766                             bt_link_info->pan_exist &&
 767                             bt_link_info->a2dp_exist) {
 768                                 if (bt_hs_on) {
 769                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 770                                                 "[BTCoex], HID + A2DP + PAN(HS)\n");
 771                                         BTC_TRACE(trace_buf);
 772                                         algorithm =
 773                                                 BT_8192E_2ANT_COEX_ALGO_HID_A2DP;
 774                                 } else {
 775                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 776                                                 "[BTCoex], HID + A2DP + PAN(EDR)\n");
 777                                         BTC_TRACE(trace_buf);
 778                                         algorithm =
 779                                                 BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
 780                                 }
 781                         }
 782                 }
 783         } else if (num_of_diff_profile >= 3) {
 784                 if (bt_link_info->sco_exist) {
 785                         if (bt_link_info->hid_exist &&
 786                             bt_link_info->pan_exist &&
 787                             bt_link_info->a2dp_exist) {
 788                                 if (bt_hs_on) {
 789                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 790                                                 "[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n");
 791                                         BTC_TRACE(trace_buf);
 792                                 } else {
 793                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 794                                                 "[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n");
 795                                         BTC_TRACE(trace_buf);
 796                                         algorithm =
 797                                                 BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
 798                                 }
 799                         }
 800                 }
 801         }
 802
 803         return algorithm;
 804 }
 805
 806 void halbtc8192e2ant_set_fw_dac_swing_level(IN struct btc_coexist *btcoexist,
 807                 IN u8 dac_swing_lvl)
 808 {
 809         u8                      h2c_parameter[1] = {0};
 810
 811         /* There are several type of dacswing */
 812         /* 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 */
 813         h2c_parameter[0] = dac_swing_lvl;
 814
 815         btcoexist->btc_fill_h2c(btcoexist, 0x64, 1, h2c_parameter);
 816 }
 817
 818 void halbtc8192e2ant_set_fw_dec_bt_pwr(IN struct btc_coexist *btcoexist,
 819                                        IN u8 dec_bt_pwr_lvl)
 820 {
 821         u8                      h2c_parameter[1] = {0};
 822
 823         h2c_parameter[0] = dec_bt_pwr_lvl;
 824
 825         btcoexist->btc_fill_h2c(btcoexist, 0x62, 1, h2c_parameter);
 826 }
 827
 828 void halbtc8192e2ant_dec_bt_pwr(IN struct btc_coexist *btcoexist,
 829                                 IN boolean force_exec, IN u8 dec_bt_pwr_lvl)
 830 {
 831         coex_dm->cur_bt_dec_pwr_lvl = dec_bt_pwr_lvl;
 832
 833         if (!force_exec) {
 834 #if 0   /* work around, avoid h2c command fail. */
 835                 if (coex_dm->pre_bt_dec_pwr_lvl == coex_dm->cur_bt_dec_pwr_lvl)
 836                         return;
 837 #endif
 838         }
 839         halbtc8192e2ant_set_fw_dec_bt_pwr(btcoexist,
 840                                           coex_dm->cur_bt_dec_pwr_lvl);
 841
 842         coex_dm->pre_bt_dec_pwr_lvl = coex_dm->cur_bt_dec_pwr_lvl;
 843 }
 844
 845 void halbtc8192e2ant_set_bt_auto_report(IN struct btc_coexist *btcoexist,
 846                                         IN boolean enable_auto_report)
 847 {
 848         u8                      h2c_parameter[1] = {0};
 849
 850         h2c_parameter[0] = 0;
 851
 852         if (enable_auto_report)
 853                 h2c_parameter[0] |= BIT(0);
 854
 855         btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter);
 856 }
 857
 858 void halbtc8192e2ant_bt_auto_report(IN struct btc_coexist *btcoexist,
 859                     IN boolean force_exec, IN boolean enable_auto_report)
 860 {
 861         coex_dm->cur_bt_auto_report = enable_auto_report;
 862
 863         if (!force_exec) {
 864                 if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report)
 865                         return;
 866         }
 867         halbtc8192e2ant_set_bt_auto_report(btcoexist,
 868                                            coex_dm->cur_bt_auto_report);
 869
 870         coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report;
 871 }
 872
 873 void halbtc8192e2ant_fw_dac_swing_lvl(IN struct btc_coexist *btcoexist,
 874                               IN boolean force_exec, IN u8 fw_dac_swing_lvl)
 875 {
 876         coex_dm->cur_fw_dac_swing_lvl = fw_dac_swing_lvl;
 877
 878         if (!force_exec) {
 879                 if (coex_dm->pre_fw_dac_swing_lvl ==
 880                     coex_dm->cur_fw_dac_swing_lvl)
 881                         return;
 882         }
 883
 884         halbtc8192e2ant_set_fw_dac_swing_level(btcoexist,
 885                                                coex_dm->cur_fw_dac_swing_lvl);
 886
 887         coex_dm->pre_fw_dac_swing_lvl = coex_dm->cur_fw_dac_swing_lvl;
 888 }
 889
 890 void halbtc8192e2ant_set_sw_rf_rx_lpf_corner(IN struct btc_coexist *btcoexist,
 891                 IN boolean rx_rf_shrink_on)
 892 {
 893         if (rx_rf_shrink_on) {
 894                 /* Shrink RF Rx LPF corner */
 895                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 896                             "[BTCoex], Shrink RF Rx LPF corner!!\n");
 897                 BTC_TRACE(trace_buf);
 898                 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e, 0xfffff,
 899                                           0xffffc);
 900         } else {
 901                 /* Resume RF Rx LPF corner */
 902                 /* After initialized, we can use coex_dm->bt_rf_0x1e_backup */
 903                 if (btcoexist->initilized) {
 904                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 905                                     "[BTCoex], Resume RF Rx LPF corner!!\n");
 906                         BTC_TRACE(trace_buf);
 907                         btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e,
 908                                           0xfffff, coex_dm->bt_rf_0x1e_backup);
 909                 }
 910         }
 911 }
 912
 913 void halbtc8192e2ant_rf_shrink(IN struct btc_coexist *btcoexist,
 914                        IN boolean force_exec, IN boolean rx_rf_shrink_on)
 915 {
 916         coex_dm->cur_rf_rx_lpf_shrink = rx_rf_shrink_on;
 917
 918         if (!force_exec) {
 919                 if (coex_dm->pre_rf_rx_lpf_shrink ==
 920                     coex_dm->cur_rf_rx_lpf_shrink)
 921                         return;
 922         }
 923         halbtc8192e2ant_set_sw_rf_rx_lpf_corner(btcoexist,
 924                                                 coex_dm->cur_rf_rx_lpf_shrink);
 925
 926         coex_dm->pre_rf_rx_lpf_shrink = coex_dm->cur_rf_rx_lpf_shrink;
 927 }
 928
 929 void halbtc8192e2ant_set_sw_penalty_tx_rate_adaptive(IN struct btc_coexist
 930                 *btcoexist, IN boolean low_penalty_ra)
 931 {
 932         u8                      h2c_parameter[6] = {0};
 933
 934         h2c_parameter[0] = 0x6; /* op_code, 0x6= Retry_Penalty */
 935
 936         if (low_penalty_ra) {
 937                 h2c_parameter[1] |= BIT(0);
 938                 h2c_parameter[2] =
 939                         0x00;  /* normal rate except MCS7/6/5, OFDM54/48/36 */
 940                 h2c_parameter[3] = 0xf7;  /* MCS7 or OFDM54 */
 941                 h2c_parameter[4] = 0xf8;  /* MCS6 or OFDM48 */
 942                 h2c_parameter[5] = 0xf9;        /* MCS5 or OFDM36        */
 943         }
 944
 945         btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, h2c_parameter);
 946 }
 947
 948 void halbtc8192e2ant_low_penalty_ra(IN struct btc_coexist *btcoexist,
 949                             IN boolean force_exec, IN boolean low_penalty_ra)
 950 {
 951         coex_dm->cur_low_penalty_ra = low_penalty_ra;
 952
 953         if (!force_exec) {
 954                 if (coex_dm->pre_low_penalty_ra == coex_dm->cur_low_penalty_ra)
 955                         return;
 956         }
 957         halbtc8192e2ant_set_sw_penalty_tx_rate_adaptive(btcoexist,
 958                         coex_dm->cur_low_penalty_ra);
 959
 960         coex_dm->pre_low_penalty_ra = coex_dm->cur_low_penalty_ra;
 961 }
 962
 963 void halbtc8192e2ant_set_dac_swing_reg(IN struct btc_coexist *btcoexist,
 964                                        IN u32 level)
 965 {
 966         u8      val = (u8)level;
 967
 968         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 969                     "[BTCoex], Write SwDacSwing = 0x%x\n", level);
 970         BTC_TRACE(trace_buf);
 971         btcoexist->btc_write_1byte_bitmask(btcoexist, 0x883, 0x3e, val);
 972 }
 973
 974 void halbtc8192e2ant_set_sw_full_time_dac_swing(IN struct btc_coexist
 975                 *btcoexist, IN boolean sw_dac_swing_on, IN u32 sw_dac_swing_lvl)
 976 {
 977         if (sw_dac_swing_on)
 978                 halbtc8192e2ant_set_dac_swing_reg(btcoexist, sw_dac_swing_lvl);
 979         else
 980                 halbtc8192e2ant_set_dac_swing_reg(btcoexist, 0x18);
 981 }
 982
 983
 984 void halbtc8192e2ant_dac_swing(IN struct btc_coexist *btcoexist,
 985         IN boolean force_exec, IN boolean dac_swing_on, IN u32 dac_swing_lvl)
 986 {
 987         coex_dm->cur_dac_swing_on = dac_swing_on;
 988         coex_dm->cur_dac_swing_lvl = dac_swing_lvl;
 989
 990         if (!force_exec) {
 991                 if ((coex_dm->pre_dac_swing_on == coex_dm->cur_dac_swing_on) &&
 992                     (coex_dm->pre_dac_swing_lvl ==
 993                      coex_dm->cur_dac_swing_lvl))
 994                         return;
 995         }
 996         delay_ms(30);
 997         halbtc8192e2ant_set_sw_full_time_dac_swing(btcoexist, dac_swing_on,
 998                         dac_swing_lvl);
 999
1000         coex_dm->pre_dac_swing_on = coex_dm->cur_dac_swing_on;
1001         coex_dm->pre_dac_swing_lvl = coex_dm->cur_dac_swing_lvl;
1002 }
1003
1004 void halbtc8192e2ant_set_adc_back_off(IN struct btc_coexist *btcoexist,
1005                                       IN boolean adc_back_off)
1006 {
1007         if (adc_back_off) {
1008                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1009                             "[BTCoex], BB BackOff Level On!\n");
1010                 BTC_TRACE(trace_buf);
1011                 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xc05, 0x30, 0x3);
1012         } else {
1013                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1014                             "[BTCoex], BB BackOff Level Off!\n");
1015                 BTC_TRACE(trace_buf);
1016                 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xc05, 0x30, 0x1);
1017         }
1018 }
1019
1020 void halbtc8192e2ant_adc_back_off(IN struct btc_coexist *btcoexist,
1021                           IN boolean force_exec, IN boolean adc_back_off)
1022 {
1023         coex_dm->cur_adc_back_off = adc_back_off;
1024
1025         if (!force_exec) {
1026                 if (coex_dm->pre_adc_back_off == coex_dm->cur_adc_back_off)
1027                         return;
1028         }
1029         halbtc8192e2ant_set_adc_back_off(btcoexist, coex_dm->cur_adc_back_off);
1030
1031         coex_dm->pre_adc_back_off = coex_dm->cur_adc_back_off;
1032 }
1033
1034 void halbtc8192e2ant_set_agc_table(IN struct btc_coexist *btcoexist,
1035                                    IN boolean agc_table_en)
1036 {
1037         /* =================BB AGC Gain Table */
1038         if (agc_table_en) {
1039                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1040                             "[BTCoex], BB Agc Table On!\n");
1041                 BTC_TRACE(trace_buf);
1042                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x0a1A0001);
1043                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x091B0001);
1044                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x081C0001);
1045                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x071D0001);
1046                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x061E0001);
1047                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x051F0001);
1048         } else {
1049                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1050                             "[BTCoex], BB Agc Table Off!\n");
1051                 BTC_TRACE(trace_buf);
1052                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xaa1A0001);
1053                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa91B0001);
1054                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa81C0001);
1055                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa71D0001);
1056                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa61E0001);
1057                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa51F0001);
1058         }
1059 }
1060
1061 void halbtc8192e2ant_agc_table(IN struct btc_coexist *btcoexist,
1062                                IN boolean force_exec, IN boolean agc_table_en)
1063 {
1064         coex_dm->cur_agc_table_en = agc_table_en;
1065
1066         if (!force_exec) {
1067                 if (coex_dm->pre_agc_table_en == coex_dm->cur_agc_table_en)
1068                         return;
1069         }
1070         halbtc8192e2ant_set_agc_table(btcoexist, agc_table_en);
1071
1072         coex_dm->pre_agc_table_en = coex_dm->cur_agc_table_en;
1073 }
1074
1075 void halbtc8192e2ant_set_coex_table(IN struct btc_coexist *btcoexist,
1076             IN u32 val0x6c0, IN u32 val0x6c4, IN u32 val0x6c8, IN u8 val0x6cc)
1077 {
1078         btcoexist->btc_write_4byte(btcoexist, 0x6c0, val0x6c0);
1079
1080         btcoexist->btc_write_4byte(btcoexist, 0x6c4, val0x6c4);
1081
1082         btcoexist->btc_write_4byte(btcoexist, 0x6c8, val0x6c8);
1083
1084         btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc);
1085 }
1086
1087 void halbtc8192e2ant_coex_table(IN struct btc_coexist *btcoexist,
1088                         IN boolean force_exec, IN u32 val0x6c0, IN u32 val0x6c4,
1089                                 IN u32 val0x6c8, IN u8 val0x6cc)
1090 {
1091         coex_dm->cur_val0x6c0 = val0x6c0;
1092         coex_dm->cur_val0x6c4 = val0x6c4;
1093         coex_dm->cur_val0x6c8 = val0x6c8;
1094         coex_dm->cur_val0x6cc = val0x6cc;
1095
1096         if (!force_exec) {
1097                 if ((coex_dm->pre_val0x6c0 == coex_dm->cur_val0x6c0) &&
1098                     (coex_dm->pre_val0x6c4 == coex_dm->cur_val0x6c4) &&
1099                     (coex_dm->pre_val0x6c8 == coex_dm->cur_val0x6c8) &&
1100                     (coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc))
1101                         return;
1102         }
1103         halbtc8192e2ant_set_coex_table(btcoexist, val0x6c0, val0x6c4, val0x6c8,
1104                                        val0x6cc);
1105
1106         coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0;
1107         coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4;
1108         coex_dm->pre_val0x6c8 = coex_dm->cur_val0x6c8;
1109         coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc;
1110 }
1111
1112 void halbtc8192e2ant_coex_table_with_type(IN struct btc_coexist *btcoexist,
1113                 IN boolean force_exec, IN u8 type)
1114 {
1115         switch (type) {
1116         case 0:
1117                 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x55555555,
1118                                            0x5a5a5a5a, 0xffffff, 0x3);
1119                 break;
1120         case 1:
1121                 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x5a5a5a5a,
1122                                            0x5a5a5a5a, 0xffffff, 0x3);
1123                 break;
1124         case 2:
1125                 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x55dd55dd,
1126                                            0x5ada5ada, 0xffffff, 0x3);
1127                 break;
1128         case 3:
1129                 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x5fdf5fdf,
1130                                            0x5fdb5fdb, 0xffffff, 0x3);
1131                 break;
1132         case 4:
1133                 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0xdfffdfff,
1134                                            0x5ffb5ffb, 0xffffff, 0x3);
1135                 break;
1136         case 5:
1137                 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x5ddd5ddd,
1138                                            0x5fdb5fdb, 0xffffff, 0x3);
1139                 break;
1140         case 6:
1141                 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x5fff5fff,
1142                                            0x5a5a5a5a, 0xffffff, 0x3);
1143                 break;
1144         case 7:
1145                 if (coex_sta->scan_ap_num <= NOISY_AP_NUM_THRESH_8192E)
1146                         halbtc8192e2ant_coex_table(btcoexist, force_exec,  0xffffffff, 0xfafafafa, 0xffffff, 0x3);
1147                 else
1148                         halbtc8192e2ant_coex_table(btcoexist, force_exec, 0xffffffff, 0x5a5a5a5a, 0xffffff, 0x3);
1149                 break;
1150         case 8:
1151                 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x5f5f5f5f, 0x5a5a5a5a, 0xffffff, 0x3);
1152                 break;
1153         case 9:
1154                 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x55555555, 0xfafafafa, 0xffffff, 0x3);
1155                 break;
1156         case 10:
1157                 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x55555555, 0xaaaaaaaa, 0xffffff, 0x3);
1158                 break;
1159         case 11:
1160                 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x55555555, 0xfafafafa, 0xffffff, 0x3);
1161                 break;
1162         default:
1163                 break;
1164         }
1165 }
1166
1167 void halbtc8192e2ant_set_fw_ignore_wlan_act(IN struct btc_coexist *btcoexist,
1168                 IN boolean enable)
1169 {
1170         u8                      h2c_parameter[1] = {0};
1171
1172         if (enable)
1173                 h2c_parameter[0] |= BIT(0);             /* function enable */
1174
1175         btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter);
1176 }
1177
1178 void halbtc8192e2ant_ignore_wlan_act(IN struct btc_coexist *btcoexist,
1179                                      IN boolean force_exec, IN boolean enable)
1180 {
1181         coex_dm->cur_ignore_wlan_act = enable;
1182
1183         if (!force_exec) {
1184                 if (coex_dm->pre_ignore_wlan_act ==
1185                     coex_dm->cur_ignore_wlan_act)
1186                         return;
1187         }
1188         halbtc8192e2ant_set_fw_ignore_wlan_act(btcoexist, enable);
1189
1190         coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act;
1191 }
1192
1193 void halbtc8192e2ant_set_lps_rpwm(IN struct btc_coexist *btcoexist,
1194                                   IN u8 lps_val, IN u8 rpwm_val)
1195 {
1196         u8      lps = lps_val;
1197         u8      rpwm = rpwm_val;
1198
1199         btcoexist->btc_set(btcoexist, BTC_SET_U1_LPS_VAL, &lps);
1200         btcoexist->btc_set(btcoexist, BTC_SET_U1_RPWM_VAL, &rpwm);
1201 }
1202
1203 void halbtc8192e2ant_lps_rpwm(IN struct btc_coexist *btcoexist,
1204                       IN boolean force_exec, IN u8 lps_val, IN u8 rpwm_val)
1205 {
1206         coex_dm->cur_lps = lps_val;
1207         coex_dm->cur_rpwm = rpwm_val;
1208
1209         if (!force_exec) {
1210                 if ((coex_dm->pre_lps == coex_dm->cur_lps) &&
1211                     (coex_dm->pre_rpwm == coex_dm->cur_rpwm))
1212                         return;
1213         }
1214         halbtc8192e2ant_set_lps_rpwm(btcoexist, lps_val, rpwm_val);
1215
1216         coex_dm->pre_lps = coex_dm->cur_lps;
1217         coex_dm->pre_rpwm = coex_dm->cur_rpwm;
1218 }
1219
1220 void halbtc8192e2ant_ps_tdma_check_for_power_save_state(
1221         IN struct btc_coexist *btcoexist, IN boolean new_ps_state)
1222 {
1223         u8      lps_mode = 0x0;
1224         u8      h2c_parameter[5] = {0x8, 0, 0, 0, 0};
1225
1226         btcoexist->btc_get(btcoexist, BTC_GET_U1_LPS_MODE, &lps_mode);
1227
1228         if (lps_mode) { /* already under LPS state */
1229                 if (new_ps_state) {
1230                         /* keep state under LPS, do nothing. */
1231                 } else {
1232                         /* will leave LPS state, turn off psTdma first */
1233                         /*halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);*/
1234                         btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter);
1235
1236                 }
1237         } else {                                        /* NO PS state */
1238                 if (new_ps_state) {
1239                         /* will enter LPS state, turn off psTdma first */
1240                         /*halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);*/
1241                         btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter);
1242                 } else {
1243                         /* keep state under NO PS state, do nothing. */
1244                 }
1245         }
1246 }
1247
1248
1249 void halbtc8192e2ant_power_save_state(IN struct btc_coexist *btcoexist,
1250                       IN u8 ps_type,  IN u8 lps_val,  IN u8 rpwm_val)
1251 {
1252         boolean         low_pwr_disable = false;
1253         boolean         bApEnable = false;
1254
1255         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable);
1256         if (bApEnable) {
1257                 ps_type = BTC_PS_WIFI_NATIVE;
1258                 lps_val = 0x0;
1259                 rpwm_val = 0x0;
1260         }
1261         /*for 8192e, NO 32k*/
1262         low_pwr_disable = true;
1263         switch (ps_type) {
1264         case BTC_PS_WIFI_NATIVE:
1265                 coex_sta->force_lps_on = false;
1266                 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &low_pwr_disable);
1267                 btcoexist->btc_set(btcoexist, BTC_SET_ACT_NORMAL_LPS, NULL);
1268                 break;
1269         case BTC_PS_LPS_ON:
1270                 coex_sta->force_lps_on = true;
1271                 halbtc8192e2ant_ps_tdma_check_for_power_save_state(btcoexist, true);
1272                 halbtc8192e2ant_lps_rpwm(btcoexist, NORMAL_EXEC, lps_val, rpwm_val);
1273                 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &low_pwr_disable);
1274                 /* power save must executed before psTdma. */
1275                 btcoexist->btc_set(btcoexist, BTC_SET_ACT_ENTER_LPS, NULL);
1276                 break;
1277         case BTC_PS_LPS_OFF:
1278                 coex_sta->force_lps_on = false;
1279                 halbtc8192e2ant_ps_tdma_check_for_power_save_state(btcoexist, false);
1280                 btcoexist->btc_set(btcoexist, BTC_SET_ACT_LEAVE_LPS, NULL);
1281                 break;
1282         default:
1283                 break;
1284         }
1285 }
1286
1287 void halbtc8192e2ant_set_fw_pstdma(IN struct btc_coexist *btcoexist,
1288            IN u8 byte1, IN u8 byte2, IN u8 byte3, IN u8 byte4, IN u8 byte5)
1289 {
1290         u8                      h2c_parameter[5] = {0};
1291         u8                      real_byte1 = byte1, real_byte5 = byte5;
1292         boolean         ap_enable = false;
1293
1294         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE,
1295                            &ap_enable);
1296
1297         if (ap_enable) {
1298                 if (byte1 & BIT(4) && !(byte1 & BIT(5))) {
1299                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1300                                     "[BTCoex], FW for 1Ant AP mode\n");
1301                         real_byte1 &= ~BIT(4);
1302                         real_byte1 |= BIT(5);
1303
1304                         real_byte5 |= BIT(5);
1305                         real_byte5 &= ~BIT(6);
1306                 }
1307         } else if ((byte1 & BIT(4)) && (!(byte1 & BIT(5))))
1308                 halbtc8192e2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50, 0x4);
1309         else
1310                 halbtc8192e2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
1311
1312
1313         h2c_parameter[0] = byte1;
1314         h2c_parameter[1] = byte2;
1315         h2c_parameter[2] = byte3;
1316         h2c_parameter[3] = byte4;
1317         h2c_parameter[4] = byte5;
1318
1319         coex_dm->ps_tdma_para[0] = byte1;
1320         coex_dm->ps_tdma_para[1] = byte2;
1321         coex_dm->ps_tdma_para[2] = byte3;
1322         coex_dm->ps_tdma_para[3] = byte4;
1323         coex_dm->ps_tdma_para[4] = byte5;
1324
1325         btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter);
1326 }
1327
1328 void halbtc8192e2ant_sw_mechanism1(IN struct btc_coexist *btcoexist,
1329                            IN boolean shrink_rx_lpf, IN boolean low_penalty_ra,
1330                            IN boolean limited_dig, IN boolean bt_lna_constrain)
1331 {
1332         /*
1333         u32     wifi_bw;
1334
1335         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
1336
1337         if(BTC_WIFI_BW_HT40 != wifi_bw)
1338         {
1339                 if (shrink_rx_lpf)
1340                         shrink_rx_lpf = false;
1341         }
1342         */
1343
1344         halbtc8192e2ant_rf_shrink(btcoexist, NORMAL_EXEC, shrink_rx_lpf);
1345         /* halbtc8192e2ant_low_penalty_ra(btcoexist, NORMAL_EXEC, low_penalty_ra); */
1346 }
1347
1348 void halbtc8192e2ant_sw_mechanism2(IN struct btc_coexist *btcoexist,
1349                            IN boolean agc_table_shift, IN boolean adc_back_off,
1350                            IN boolean sw_dac_swing, IN u32 dac_swing_lvl)
1351 {
1352         halbtc8192e2ant_agc_table(btcoexist, NORMAL_EXEC, agc_table_shift);
1353         /* halbtc8192e2ant_adc_back_off(btcoexist, NORMAL_EXEC, adc_back_off); */
1354         halbtc8192e2ant_dac_swing(btcoexist, NORMAL_EXEC, sw_dac_swing,
1355                                   dac_swing_lvl);
1356 }
1357
1358 void halbtc8192e2ant_set_ant_path(IN struct btc_coexist *btcoexist,
1359           IN u8 ant_pos_type, IN boolean init_hwcfg, IN boolean wifi_off)
1360 {
1361         u32                     u32tmp = 0;
1362
1363         if (init_hwcfg) {
1364                 btcoexist->btc_write_1byte(btcoexist, 0x944, 0x24);
1365                 btcoexist->btc_write_4byte(btcoexist, 0x930, 0x700700);
1366                 if (btcoexist->chip_interface == BTC_INTF_USB)
1367                         btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30430004);
1368                 else
1369                         btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30030004);
1370
1371                 /* 0x4c[27][24]='00', Set Antenna to BB */
1372                 u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c);
1373                 u32tmp &= ~BIT(24);
1374                 u32tmp &= ~BIT(27);
1375                 btcoexist->btc_write_4byte(btcoexist, 0x4c, u32tmp);
1376         } else if (wifi_off) {
1377                 if (btcoexist->chip_interface == BTC_INTF_USB)
1378                         btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30430004);
1379                 else
1380                         btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30030004);
1381
1382                 /* 0x4c[27][24]='11', Set Antenna to BT, 0x64[8:7]=0, 0x64[2]=1 */
1383                 u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c);
1384                 u32tmp |= BIT(24);
1385                 u32tmp |= BIT(27);
1386                 btcoexist->btc_write_4byte(btcoexist, 0x4c, u32tmp);
1387         }
1388
1389         /* ext switch setting */
1390         switch (ant_pos_type) {
1391         case BTC_ANT_PATH_WIFI:
1392                 btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x4);
1393                 break;
1394         case BTC_ANT_PATH_BT:
1395                 btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x20);
1396                 break;
1397         default:
1398         case BTC_ANT_PATH_PTA:
1399                 btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x4);
1400                 break;
1401         }
1402 }
1403
1404 void halbtc8192e2ant_set_switch_ss_type(IN struct btc_coexist *btcoexist,
1405                                         IN u8 ss_type)
1406 {
1407         u8      mimo_ps = BTC_MIMO_PS_DYNAMIC;
1408         u32     dis_ra_mask = 0x0;
1409
1410         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1411                     "[BTCoex], REAL set SS Type = %d\n", ss_type);
1412         BTC_TRACE(trace_buf);
1413
1414         dis_ra_mask = halbtc8192e2ant_decide_ra_mask(btcoexist, ss_type,
1415                         coex_dm->cur_ra_mask_type);
1416         halbtc8192e2ant_update_ra_mask(btcoexist, FORCE_EXEC, dis_ra_mask);
1417
1418         if (ss_type == 1) {
1419                 /*halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1);*/
1420                 /* switch ofdm path */
1421                 btcoexist->btc_write_1byte(btcoexist, 0xc04, 0x11);
1422                 btcoexist->btc_write_1byte(btcoexist, 0xd04, 0x1);
1423                 btcoexist->btc_write_4byte(btcoexist, 0x90c, 0x81111111);
1424                 /* switch cck patch */
1425                 /* btcoexist->btc_write_1byte_bitmask(btcoexist, 0xe77, 0x4, 0x1); */
1426                 /* btcoexist->btc_write_1byte(btcoexist, 0xa07, 0x81); */
1427                 mimo_ps = BTC_MIMO_PS_STATIC;
1428         } else if (ss_type == 2) {
1429                 /*halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0);*/
1430                 btcoexist->btc_write_1byte(btcoexist, 0xc04, 0x33);
1431                 btcoexist->btc_write_1byte(btcoexist, 0xd04, 0x3);
1432                 btcoexist->btc_write_4byte(btcoexist, 0x90c, 0x81121313);
1433                 /* remove, if 0xe77[2]=0x0 then CCK will fail, advised by Jenyu */
1434                 /* btcoexist->btc_write_1byte_bitmask(btcoexist, 0xe77, 0x4, 0x0); */
1435                 /* btcoexist->btc_write_1byte(btcoexist, 0xa07, 0x41); */
1436                 mimo_ps = BTC_MIMO_PS_DYNAMIC;
1437         }
1438
1439         btcoexist->btc_set(btcoexist, BTC_SET_ACT_SEND_MIMO_PS,
1440                            &mimo_ps);   /* set rx 1ss or 2ss */
1441 }
1442
1443 void halbtc8192e2ant_switch_ss_type(IN struct btc_coexist *btcoexist,
1444                                     IN boolean force_exec, IN u8 new_ss_type)
1445 {
1446         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1447                     "[BTCoex], %s Switch SS Type = %d\n",
1448                     (force_exec ? "force to" : ""), new_ss_type);
1449         BTC_TRACE(trace_buf);
1450         coex_dm->cur_ss_type = new_ss_type;
1451
1452         if (!force_exec) {
1453                 if (coex_dm->pre_ss_type == coex_dm->cur_ss_type)
1454                         return;
1455         }
1456         halbtc8192e2ant_set_switch_ss_type(btcoexist, coex_dm->cur_ss_type);
1457
1458         coex_dm->pre_ss_type = coex_dm->cur_ss_type;
1459 }
1460
1461 void halbtc8192e2ant_ps_tdma(IN struct btc_coexist *btcoexist,
1462                      IN boolean force_exec, IN boolean turn_on, IN u8 type)
1463 {
1464         s8              wifi_duration_adjust = 0x0;
1465
1466         coex_dm->cur_ps_tdma_on = turn_on;
1467         coex_dm->cur_ps_tdma = type;
1468
1469         if (!force_exec) {
1470                 if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) &&
1471                     (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma))
1472                         return;
1473         }
1474
1475         if (coex_sta->scan_ap_num  >= 40)
1476                 wifi_duration_adjust = -15;
1477         else if (coex_sta->scan_ap_num  >= 20)
1478                 wifi_duration_adjust = -10;
1479
1480
1481         if (turn_on) {
1482                 switch (type) {
1483                 case 1:
1484                 default:        /*d1,wb*/
1485                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x3c, 0x03, 0x11, 0x10);
1486                         break;
1487                 case 2:
1488                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x32, 0x03, 0x11, 0x10);
1489                         break;
1490                 case 3:
1491                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x28, 0x03, 0x11, 0x10);
1492                         break;
1493                 case 4:
1494                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x1e, 0x03, 0x11, 0x10);
1495                         break;
1496                 case 5:         /*d1,pb,TXpause*/
1497                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x63, 0x3c, 0x03, 0x90, 0x10);
1498                         break;
1499                 case 6:
1500                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x63, 0x32, 0x03, 0x90, 0x10);
1501                         break;
1502                 case 7:
1503                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x63, 0x28, 0x03, 0x90, 0x10);
1504                         break;
1505                 case 8:
1506                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x63, 0x1e, 0x03, 0x90, 0x10);
1507                         break;
1508                 case 9:         /*d1,bb*/
1509                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x3c, 0x03, 0x31, 0x10);
1510                         break;
1511                 case 10:
1512                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x32, 0x03, 0x31, 0x10);
1513                         break;
1514                 case 11:
1515                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x28, 0x03, 0x31, 0x10);
1516                         break;
1517                 case 12:
1518                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x1e, 0x03, 0x31, 0x10);
1519                         break;
1520                 case 13:                /*d1,bb,TXpause*/
1521                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x3c, 0x03, 0x30, 0x10);
1522                         break;
1523                 case 14:
1524                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x32, 0x03, 0x30, 0x10);
1525                         break;
1526                 case 15:
1527                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x28, 0x03, 0x30, 0x10);
1528                         break;
1529                 case 16:
1530                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x1e, 0x03, 0x30, 0x10);
1531                         break;
1532                 case 17:
1533                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x61, 0x20, 0x03, 0x10, 0x10);
1534                         break;
1535                 case 18:
1536                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x5, 0x5, 0xe1, 0x90);
1537                         break;
1538                 case 19:
1539                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x25, 0x25, 0xe1, 0x90);
1540                         break;
1541                 case 20:
1542                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x25, 0x25, 0x60, 0x90);
1543                         break;
1544                 case 21:
1545                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x61, 0x15, 0x03, 0x11, 0x11);
1546                         break;
1547                 case 22:        /* d1,wb */
1548                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x14, 0x03, 0x11, 0x14);
1549                         break;
1550                 case 23:        /* d1,pb,TXpause */
1551                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x63, 0x14, 0x03, 0x90, 0x14);
1552                         break;
1553                 case 24:        /* d1,bb */
1554                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x14, 0x03, 0x31, 0x14);
1555                         break;
1556                 case 25:        /* d1,bb,TXpause */
1557                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x14, 0x03, 0x30, 0x14);
1558                         break;
1559                 case 26:        /*d1,wp,noTXpause*/
1560                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe1, 0x3c, 0x03, 0x11, 0x10);
1561                         break;
1562                 case 27:        /*11,pp,noTXpause*/
1563                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x61, 0x3c, 0x03, 0x11, 0x11);
1564                         break;
1565                 case 28:        /*11,pp,noTXpause*/
1566                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x61, 0x50, 0x03, 0x11, 0x11);
1567                         break;
1568                 case 29:
1569                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x61, 0x15, 0x03, 0x11, 0x11);
1570                         break;
1571                 case 30:
1572                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x14, 0x03, 0x10, 0x14);
1573                         break;
1574                 case 31: /*d3,bb,TXpause*/
1575                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x14, 0x03, 0x30, 0x94);
1576                         break;
1577                 case 32:
1578                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x61, 0x35, 0x03, 0x11, 0x11);
1579                         break;
1580                 case 71:
1581                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90);
1582                         break;
1583                 /* following cases is for wifi rssi low // bad antenna isolation, started from 81 */
1584                 case 80:
1585                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x51, 0x3c, 0x3, 0x10, 0x50);
1586                         break;
1587                 case 81:
1588                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x51, 0x3a + wifi_duration_adjust, 0x3, 0x10, 0x50);
1589                         break;
1590                 case 82:
1591                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x51, 0x30 + wifi_duration_adjust, 0x03, 0x10, 0x50);
1592                         break;
1593                 case 83:
1594                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x51, 0x21, 0x03, 0x10, 0x50);
1595                         break;
1596                 case 84:
1597                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x51, 0x15, 0x3, 0x10, 0x50);
1598                         break;
1599                 case 85:
1600                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x51, 0x3a, 0x03, 0x10, 0x50);
1601                         break;
1602                 case 86:
1603                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x51, 0x21, 0x03, 0x10, 0x50);
1604                         break;
1605                 case 87:
1606                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x51, 0x14, 0x03, 0x10, 0x54);
1607                         break;
1608                 case 88:
1609                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x53, 0x14, 0x03, 0x10, 0x54);
1610                         break;
1611                 }
1612         } else {
1613                 /* disable PS tdma */
1614                 switch (type) {
1615                 default:
1616                 case 0:  /* ANT2PTA, 0x778=1 */
1617                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x8, 0x0, 0x0, 0x0, 0x0);
1618                         halbtc8192e2ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, false, false);
1619                         break;
1620                 case 1:  /* ANT2BT, 0x778=3 */
1621                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x0, 0x0, 0x0, 0x8, 0x0);
1622                         delay_ms(5);
1623                         halbtc8192e2ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, false, false);
1624                         break;
1625                 }
1626         }
1627
1628         /* update pre state */
1629         coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on;
1630         coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma;
1631 }
1632
1633
1634 void halbtc8192e2ant_coex_all_off(IN struct btc_coexist *btcoexist)
1635 {
1636         /* fw all off */
1637         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
1638         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
1639         halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1640
1641         /* sw all off */
1642         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
1643         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1644
1645         /* hw all off */
1646         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
1647 }
1648
1649 void halbtc8192e2ant_init_coex_dm(IN struct btc_coexist *btcoexist)
1650 {
1651         coex_sta->cnt_setup_link = 0;
1652
1653         /* force to reset coex mechanism */
1654         halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0);
1655         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 6);
1656         halbtc8192e2ant_dec_bt_pwr(btcoexist, FORCE_EXEC, 0);
1657
1658         halbtc8192e2ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
1659         halbtc8192e2ant_switch_ss_type(btcoexist, FORCE_EXEC, 2);
1660
1661         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
1662         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1663 }
1664
1665 void halbtc8192e2ant_action_bt_inquiry(IN struct btc_coexist *btcoexist)
1666 {
1667         struct  btc_bt_link_info        *bt_link_info = &btcoexist->bt_link_info;
1668
1669         if (coex_sta->wifi_is_high_pri_task && (!bt_link_info->a2dp_exist)) {
1670                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 11);
1671                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32);
1672         } else {
1673                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
1674                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 29);
1675         }
1676
1677         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
1678         halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1679
1680         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
1681         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1682 }
1683
1684 boolean halbtc8192e2ant_is_common_action(IN struct btc_coexist *btcoexist)
1685 {
1686         struct  btc_bt_link_info        *bt_link_info = &btcoexist->bt_link_info;
1687         boolean                 common = false, wifi_connected = false, wifi_busy = false;
1688         boolean                 bt_hs_on = false, low_pwr_disable = false;
1689
1690         btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
1691         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
1692                            &wifi_connected);
1693         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
1694
1695         if (bt_link_info->sco_exist || bt_link_info->hid_exist)
1696                 halbtc8192e2ant_limited_tx(btcoexist, NORMAL_EXEC, 1, 0, 0, 0);
1697         else
1698                 halbtc8192e2ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
1699
1700         if (!wifi_connected) {
1701
1702                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1703                             "[BTCoex], Wifi non-connected idle!!\n");
1704                 BTC_TRACE(trace_buf);
1705
1706                 if ((coex_dm->bt_status == BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE) ||
1707                     (coex_dm->bt_status == BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE)) {
1708                         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
1709                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
1710                 } else {
1711                         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
1712                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
1713                 }
1714                 halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
1715                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1716
1717                 halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
1718                 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1719                 common = true;
1720         } else {
1721                 if (coex_dm->bt_status == BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE) {
1722                         if (wifi_busy) {
1723                                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Wifi busy + BT non connected-idle!!\n");
1724                                 BTC_TRACE(trace_buf);
1725
1726                                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 9);
1727                                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 26);
1728                                 halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
1729                                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1730                                 halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
1731                                 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1732                                 common = true;
1733                         } else {
1734                                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Wifi connected-idle + BT non connected-idle!!\n");
1735                                 BTC_TRACE(trace_buf);
1736                                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
1737                                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
1738                                 halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
1739                                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1740                                 halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
1741                                 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1742                                 common = true;
1743                         }
1744                 } else if (coex_dm->bt_status == BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE) {
1745
1746                         if (bt_hs_on)
1747                                 return false;
1748
1749                         if (wifi_busy) {
1750                                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Wifi busy + BT connected-idle!!\n");
1751                                 BTC_TRACE(trace_buf);
1752                                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 10);
1753                                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 27);
1754                                 halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
1755                                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1756                                 halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
1757                                 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1758                                 common = true;
1759                         } else {
1760                                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Wifi connected-idle + BT connected-idle!!\n");
1761                                 BTC_TRACE(trace_buf);
1762                                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
1763                                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
1764                                 halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
1765                                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1766                                 halbtc8192e2ant_sw_mechanism1(btcoexist, true, false, false, false);
1767                                 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1768                                 common = true;
1769                         }
1770                 } else {
1771
1772                         if (wifi_busy) {
1773                                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1774                                         "[BTCoex], Wifi Connected-Busy + BT Busy!!\n");
1775                                 BTC_TRACE(trace_buf);
1776                                 common = false;
1777                         } else {
1778                                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1779                                         "[BTCoex], Wifi Connected-Idle + BT Busy!!\n");
1780                                 BTC_TRACE(trace_buf);
1781                                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
1782                                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 21);
1783                                 halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
1784                                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1785                                 halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
1786                                 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1787                                 common = true;
1788                         }
1789                 }
1790         }
1791         return common;
1792 }
1793
1794
1795 void halbtc8192e2ant_tdma_duration_adjust(IN struct btc_coexist *btcoexist,
1796                 IN boolean sco_hid, IN boolean tx_pause, IN u8 max_interval)
1797 {
1798         static s32              up, dn, m, n, wait_count;
1799         s32                     result;   /* 0: no change, +1: increase WiFi duration, -1: decrease WiFi duration */
1800         u8                      retry_count = 0;
1801
1802
1803         if (!coex_dm->auto_tdma_adjust) {
1804                 coex_dm->auto_tdma_adjust = true;
1805                 {
1806                         if (sco_hid) {
1807                                 if (tx_pause) {
1808                                         if (max_interval == 1) {
1809                                                 halbtc8192e2ant_ps_tdma(
1810                                                         btcoexist, NORMAL_EXEC,
1811                                                         true, 13);
1812                                                 coex_dm->ps_tdma_du_adj_type =
1813                                                         13;
1814                                         } else if (max_interval == 2) {
1815                                                 halbtc8192e2ant_ps_tdma(
1816                                                         btcoexist, NORMAL_EXEC,
1817                                                         true, 14);
1818                                                 coex_dm->ps_tdma_du_adj_type =
1819                                                         14;
1820                                         } else if (max_interval == 3) {
1821                                                 halbtc8192e2ant_ps_tdma(
1822                                                         btcoexist, NORMAL_EXEC,
1823                                                         true, 15);
1824                                                 coex_dm->ps_tdma_du_adj_type =
1825                                                         15;
1826                                         } else {
1827                                                 halbtc8192e2ant_ps_tdma(
1828                                                         btcoexist, NORMAL_EXEC,
1829                                                         true, 15);
1830                                                 coex_dm->ps_tdma_du_adj_type =
1831                                                         15;
1832                                         }
1833                                 } else {
1834                                         if (max_interval == 1) {
1835                                                 halbtc8192e2ant_ps_tdma(
1836                                                         btcoexist, NORMAL_EXEC,
1837                                                         true, 9);
1838                                                 coex_dm->ps_tdma_du_adj_type =
1839                                                         9;
1840                                         } else if (max_interval == 2) {
1841                                                 halbtc8192e2ant_ps_tdma(
1842                                                         btcoexist, NORMAL_EXEC,
1843                                                         true, 10);
1844                                                 coex_dm->ps_tdma_du_adj_type =
1845                                                         10;
1846                                         } else if (max_interval == 3) {
1847                                                 halbtc8192e2ant_ps_tdma(
1848                                                         btcoexist, NORMAL_EXEC,
1849                                                         true, 11);
1850                                                 coex_dm->ps_tdma_du_adj_type =
1851                                                         11;
1852                                         } else {
1853                                                 halbtc8192e2ant_ps_tdma(
1854                                                         btcoexist, NORMAL_EXEC,
1855                                                         true, 11);
1856                                                 coex_dm->ps_tdma_du_adj_type =
1857                                                         11;
1858                                         }
1859                                 }
1860                         } else {
1861                                 if (tx_pause) {
1862                                         if (max_interval == 1) {
1863                                                 halbtc8192e2ant_ps_tdma(
1864                                                         btcoexist, NORMAL_EXEC,
1865                                                         true, 5);
1866                                                 coex_dm->ps_tdma_du_adj_type =
1867                                                         5;
1868                                         } else if (max_interval == 2) {
1869                                                 halbtc8192e2ant_ps_tdma(
1870                                                         btcoexist, NORMAL_EXEC,
1871                                                         true, 6);
1872                                                 coex_dm->ps_tdma_du_adj_type =
1873                                                         6;
1874                                         } else if (max_interval == 3) {
1875                                                 halbtc8192e2ant_ps_tdma(
1876                                                         btcoexist, NORMAL_EXEC,
1877                                                         true, 7);
1878                                                 coex_dm->ps_tdma_du_adj_type =
1879                                                         7;
1880                                         } else {
1881                                                 halbtc8192e2ant_ps_tdma(
1882                                                         btcoexist, NORMAL_EXEC,
1883                                                         true, 7);
1884                                                 coex_dm->ps_tdma_du_adj_type =
1885                                                         7;
1886                                         }
1887                                 } else {
1888                                         if (max_interval == 1) {
1889                                                 halbtc8192e2ant_ps_tdma(
1890                                                         btcoexist, NORMAL_EXEC,
1891                                                         true, 1);
1892                                                 coex_dm->ps_tdma_du_adj_type =
1893                                                         1;
1894                                         } else if (max_interval == 2) {
1895                                                 halbtc8192e2ant_ps_tdma(
1896                                                         btcoexist, NORMAL_EXEC,
1897                                                         true, 2);
1898                                                 coex_dm->ps_tdma_du_adj_type =
1899                                                         2;
1900                                         } else if (max_interval == 3) {
1901                                                 halbtc8192e2ant_ps_tdma(
1902                                                         btcoexist, NORMAL_EXEC,
1903                                                         true, 3);
1904                                                 coex_dm->ps_tdma_du_adj_type =
1905                                                         3;
1906                                         } else {
1907                                                 halbtc8192e2ant_ps_tdma(
1908                                                         btcoexist, NORMAL_EXEC,
1909                                                         true, 3);
1910                                                 coex_dm->ps_tdma_du_adj_type =
1911                                                         3;
1912                                         }
1913                                 }
1914                         }
1915                 }
1916                 /* ============ */
1917                 up = 0;
1918                 dn = 0;
1919                 m = 1;
1920                 n = 3;
1921                 result = 0;
1922                 wait_count = 0;
1923         } else {
1924                 /* acquire the BT TRx retry count from BT_Info byte2 */
1925                 retry_count = coex_sta->bt_retry_cnt;
1926                 result = 0;
1927                 wait_count++;
1928
1929                 if (retry_count ==
1930                     0) { /* no retry in the last 2-second duration */
1931                         up++;
1932                         dn--;
1933
1934                         if (dn <= 0)
1935                                 dn = 0;
1936
1937                         if (up >= n) {  /* if retry count during continuous n*2 seconds is 0, enlarge WiFi duration */
1938                                 wait_count = 0;
1939                                 n = 3;
1940                                 up = 0;
1941                                 dn = 0;
1942                                 result = 1;
1943                         }
1944                 } else if (retry_count <=
1945                            3) { /* <=3 retry in the last 2-second duration */
1946                         up--;
1947                         dn++;
1948
1949                         if (up <= 0)
1950                                 up = 0;
1951
1952                         if (dn == 2) {  /* if continuous 2 retry count(every 2 seconds) >0 and < 3, reduce WiFi duration */
1953                                 if (wait_count <= 2)
1954                                         m++; /* to avoid loop between the two levels */
1955                                 else
1956                                         m = 1;
1957
1958                                 if (m >= 20)  /* maximum of m = 20 ' will recheck if need to adjust wifi duration in maximum time interval 120 seconds */
1959                                         m = 20;
1960
1961                                 n = 3 * m;
1962                                 up = 0;
1963                                 dn = 0;
1964                                 wait_count = 0;
1965                                 result = -1;
1966                         }
1967                 } else { /* retry count > 3, once retry count > 3, to reduce WiFi duration */
1968                         if (wait_count == 1)
1969                                 m++; /* to avoid loop between the two levels */
1970                         else
1971                                 m = 1;
1972
1973                         if (m >= 20)  /* maximum of m = 20 ' will recheck if need to adjust wifi duration in maximum time interval 120 seconds */
1974                                 m = 20;
1975
1976                         n = 3 * m;
1977                         up = 0;
1978                         dn = 0;
1979                         wait_count = 0;
1980                         result = -1;
1981                 }
1982
1983                 if (max_interval == 1) {
1984                         if (tx_pause) {
1985                                 if (coex_dm->cur_ps_tdma == 1) {
1986                                         halbtc8192e2ant_ps_tdma(btcoexist,
1987                                                         NORMAL_EXEC, true, 5);
1988                                         coex_dm->ps_tdma_du_adj_type = 5;
1989                                 } else if (coex_dm->cur_ps_tdma == 2) {
1990                                         halbtc8192e2ant_ps_tdma(btcoexist,
1991                                                         NORMAL_EXEC, true, 6);
1992                                         coex_dm->ps_tdma_du_adj_type = 6;
1993                                 } else if (coex_dm->cur_ps_tdma == 3) {
1994                                         halbtc8192e2ant_ps_tdma(btcoexist,
1995                                                         NORMAL_EXEC, true, 7);
1996                                         coex_dm->ps_tdma_du_adj_type = 7;
1997                                 } else if (coex_dm->cur_ps_tdma == 4) {
1998                                         halbtc8192e2ant_ps_tdma(btcoexist,
1999                                                         NORMAL_EXEC, true, 8);
2000                                         coex_dm->ps_tdma_du_adj_type = 8;
2001                                 }
2002                                 if (coex_dm->cur_ps_tdma == 9) {
2003                                         halbtc8192e2ant_ps_tdma(btcoexist,
2004                                                         NORMAL_EXEC, true, 13);
2005                                         coex_dm->ps_tdma_du_adj_type = 13;
2006                                 } else if (coex_dm->cur_ps_tdma == 10) {
2007                                         halbtc8192e2ant_ps_tdma(btcoexist,
2008                                                         NORMAL_EXEC, true, 14);
2009                                         coex_dm->ps_tdma_du_adj_type = 14;
2010                                 } else if (coex_dm->cur_ps_tdma == 11) {
2011                                         halbtc8192e2ant_ps_tdma(btcoexist,
2012                                                         NORMAL_EXEC, true, 15);
2013                                         coex_dm->ps_tdma_du_adj_type = 15;
2014                                 } else if (coex_dm->cur_ps_tdma == 12) {
2015                                         halbtc8192e2ant_ps_tdma(btcoexist,
2016                                                         NORMAL_EXEC, true, 16);
2017                                         coex_dm->ps_tdma_du_adj_type = 16;
2018                                 }
2019
2020                                 if (result == -1) {
2021                                         if (coex_dm->cur_ps_tdma == 5) {
2022                                                 halbtc8192e2ant_ps_tdma(
2023                                                         btcoexist, NORMAL_EXEC,
2024                                                         true, 6);
2025                                                 coex_dm->ps_tdma_du_adj_type =
2026                                                         6;
2027                                         } else if (coex_dm->cur_ps_tdma == 6) {
2028                                                 halbtc8192e2ant_ps_tdma(
2029                                                         btcoexist, NORMAL_EXEC,
2030                                                         true, 7);
2031                                                 coex_dm->ps_tdma_du_adj_type =
2032                                                         7;
2033                                         } else if (coex_dm->cur_ps_tdma == 7) {
2034                                                 halbtc8192e2ant_ps_tdma(
2035                                                         btcoexist, NORMAL_EXEC,
2036                                                         true, 8);
2037                                                 coex_dm->ps_tdma_du_adj_type =
2038                                                         8;
2039                                         } else if (coex_dm->cur_ps_tdma == 13) {
2040                                                 halbtc8192e2ant_ps_tdma(
2041                                                         btcoexist, NORMAL_EXEC,
2042                                                         true, 14);
2043                                                 coex_dm->ps_tdma_du_adj_type =
2044                                                         14;
2045                                         } else if (coex_dm->cur_ps_tdma == 14) {
2046                                                 halbtc8192e2ant_ps_tdma(
2047                                                         btcoexist, NORMAL_EXEC,
2048                                                         true, 15);
2049                                                 coex_dm->ps_tdma_du_adj_type =
2050                                                         15;
2051                                         } else if (coex_dm->cur_ps_tdma == 15) {
2052                                                 halbtc8192e2ant_ps_tdma(
2053                                                         btcoexist, NORMAL_EXEC,
2054                                                         true, 16);
2055                                                 coex_dm->ps_tdma_du_adj_type =
2056                                                         16;
2057                                         }
2058                                 } else if (result == 1) {
2059                                         if (coex_dm->cur_ps_tdma == 8) {
2060                                                 halbtc8192e2ant_ps_tdma(
2061                                                         btcoexist, NORMAL_EXEC,
2062                                                         true, 7);
2063                                                 coex_dm->ps_tdma_du_adj_type =
2064                                                         7;
2065                                         } else if (coex_dm->cur_ps_tdma == 7) {
2066                                                 halbtc8192e2ant_ps_tdma(
2067                                                         btcoexist, NORMAL_EXEC,
2068                                                         true, 6);
2069                                                 coex_dm->ps_tdma_du_adj_type =
2070                                                         6;
2071                                         } else if (coex_dm->cur_ps_tdma == 6) {
2072                                                 halbtc8192e2ant_ps_tdma(
2073                                                         btcoexist, NORMAL_EXEC,
2074                                                         true, 5);
2075                                                 coex_dm->ps_tdma_du_adj_type =
2076                                                         5;
2077                                         } else if (coex_dm->cur_ps_tdma == 16) {
2078                                                 halbtc8192e2ant_ps_tdma(
2079                                                         btcoexist, NORMAL_EXEC,
2080                                                         true, 15);
2081                                                 coex_dm->ps_tdma_du_adj_type =
2082                                                         15;
2083                                         } else if (coex_dm->cur_ps_tdma == 15) {
2084                                                 halbtc8192e2ant_ps_tdma(
2085                                                         btcoexist, NORMAL_EXEC,
2086                                                         true, 14);
2087                                                 coex_dm->ps_tdma_du_adj_type =
2088                                                         14;
2089                                         } else if (coex_dm->cur_ps_tdma == 14) {
2090                                                 halbtc8192e2ant_ps_tdma(
2091                                                         btcoexist, NORMAL_EXEC,
2092                                                         true, 13);
2093                                                 coex_dm->ps_tdma_du_adj_type =
2094                                                         13;
2095                                         }
2096                                 }
2097                         } else {
2098                                 if (coex_dm->cur_ps_tdma == 5) {
2099                                         halbtc8192e2ant_ps_tdma(btcoexist,
2100                                                         NORMAL_EXEC, true, 1);
2101                                         coex_dm->ps_tdma_du_adj_type = 1;
2102                                 } else if (coex_dm->cur_ps_tdma == 6) {
2103                                         halbtc8192e2ant_ps_tdma(btcoexist,
2104                                                         NORMAL_EXEC, true, 2);
2105                                         coex_dm->ps_tdma_du_adj_type = 2;
2106                                 } else if (coex_dm->cur_ps_tdma == 7) {
2107                                         halbtc8192e2ant_ps_tdma(btcoexist,
2108                                                         NORMAL_EXEC, true, 3);
2109                                         coex_dm->ps_tdma_du_adj_type = 3;
2110                                 } else if (coex_dm->cur_ps_tdma == 8) {
2111                                         halbtc8192e2ant_ps_tdma(btcoexist,
2112                                                         NORMAL_EXEC, true, 4);
2113                                         coex_dm->ps_tdma_du_adj_type = 4;
2114                                 }
2115                                 if (coex_dm->cur_ps_tdma == 13) {
2116                                         halbtc8192e2ant_ps_tdma(btcoexist,
2117                                                         NORMAL_EXEC, true, 9);
2118                                         coex_dm->ps_tdma_du_adj_type = 9;
2119                                 } else if (coex_dm->cur_ps_tdma == 14) {
2120                                         halbtc8192e2ant_ps_tdma(btcoexist,
2121                                                         NORMAL_EXEC, true, 10);
2122                                         coex_dm->ps_tdma_du_adj_type = 10;
2123                                 } else if (coex_dm->cur_ps_tdma == 15) {
2124                                         halbtc8192e2ant_ps_tdma(btcoexist,
2125                                                         NORMAL_EXEC, true, 11);
2126                                         coex_dm->ps_tdma_du_adj_type = 11;
2127                                 } else if (coex_dm->cur_ps_tdma == 16) {
2128                                         halbtc8192e2ant_ps_tdma(btcoexist,
2129                                                         NORMAL_EXEC, true, 12);
2130                                         coex_dm->ps_tdma_du_adj_type = 12;
2131                                 }
2132
2133                                 if (result == -1) {
2134                                         if (coex_dm->cur_ps_tdma == 1) {
2135                                                 halbtc8192e2ant_ps_tdma(
2136                                                         btcoexist, NORMAL_EXEC,
2137                                                         true, 2);
2138                                                 coex_dm->ps_tdma_du_adj_type =
2139                                                         2;
2140                                         } else if (coex_dm->cur_ps_tdma == 2) {
2141                                                 halbtc8192e2ant_ps_tdma(
2142                                                         btcoexist, NORMAL_EXEC,
2143                                                         true, 3);
2144                                                 coex_dm->ps_tdma_du_adj_type =
2145                                                         3;
2146                                         } else if (coex_dm->cur_ps_tdma == 3) {
2147                                                 halbtc8192e2ant_ps_tdma(
2148                                                         btcoexist, NORMAL_EXEC,
2149                                                         true, 4);
2150                                                 coex_dm->ps_tdma_du_adj_type =
2151                                                         4;
2152                                         } else if (coex_dm->cur_ps_tdma == 9) {
2153                                                 halbtc8192e2ant_ps_tdma(
2154                                                         btcoexist, NORMAL_EXEC,
2155                                                         true, 10);
2156                                                 coex_dm->ps_tdma_du_adj_type =
2157                                                         10;
2158                                         } else if (coex_dm->cur_ps_tdma == 10) {
2159                                                 halbtc8192e2ant_ps_tdma(
2160                                                         btcoexist, NORMAL_EXEC,
2161                                                         true, 11);
2162                                                 coex_dm->ps_tdma_du_adj_type =
2163                                                         11;
2164                                         } else if (coex_dm->cur_ps_tdma == 11) {
2165                                                 halbtc8192e2ant_ps_tdma(
2166                                                         btcoexist, NORMAL_EXEC,
2167                                                         true, 12);
2168                                                 coex_dm->ps_tdma_du_adj_type =
2169                                                         12;
2170                                         }
2171                                 } else if (result == 1) {
2172                                         if (coex_dm->cur_ps_tdma == 4) {
2173                                                 halbtc8192e2ant_ps_tdma(
2174                                                         btcoexist, NORMAL_EXEC,
2175                                                         true, 3);
2176                                                 coex_dm->ps_tdma_du_adj_type =
2177                                                         3;
2178                                         } else if (coex_dm->cur_ps_tdma == 3) {
2179                                                 halbtc8192e2ant_ps_tdma(
2180                                                         btcoexist, NORMAL_EXEC,
2181                                                         true, 2);
2182                                                 coex_dm->ps_tdma_du_adj_type =
2183                                                         2;
2184                                         } else if (coex_dm->cur_ps_tdma == 2) {
2185                                                 halbtc8192e2ant_ps_tdma(
2186                                                         btcoexist, NORMAL_EXEC,
2187                                                         true, 1);
2188                                                 coex_dm->ps_tdma_du_adj_type =
2189                                                         1;
2190                                         } else if (coex_dm->cur_ps_tdma == 1) {
2191                                                 halbtc8192e2ant_ps_tdma(
2192                                                         btcoexist, NORMAL_EXEC,
2193                                                         true, 71);
2194                                                 coex_dm->ps_tdma_du_adj_type =
2195                                                         71;
2196                                         } else if (coex_dm->cur_ps_tdma == 12) {
2197                                                 halbtc8192e2ant_ps_tdma(
2198                                                         btcoexist, NORMAL_EXEC,
2199                                                         true, 11);
2200                                                 coex_dm->ps_tdma_du_adj_type =
2201                                                         11;
2202                                         } else if (coex_dm->cur_ps_tdma == 11) {
2203                                                 halbtc8192e2ant_ps_tdma(
2204                                                         btcoexist, NORMAL_EXEC,
2205                                                         true, 10);
2206                                                 coex_dm->ps_tdma_du_adj_type =
2207                                                         10;
2208                                         } else if (coex_dm->cur_ps_tdma == 10) {
2209                                                 halbtc8192e2ant_ps_tdma(
2210                                                         btcoexist, NORMAL_EXEC,
2211                                                         true, 9);
2212                                                 coex_dm->ps_tdma_du_adj_type =
2213                                                         9;
2214                                         }
2215                                 }
2216                         }
2217                 } else if (max_interval == 2) {
2218                         if (tx_pause) {
2219                                 if (coex_dm->cur_ps_tdma == 1) {
2220                                         halbtc8192e2ant_ps_tdma(btcoexist,
2221                                                         NORMAL_EXEC, true, 6);
2222                                         coex_dm->ps_tdma_du_adj_type = 6;
2223                                 } else if (coex_dm->cur_ps_tdma == 2) {
2224                                         halbtc8192e2ant_ps_tdma(btcoexist,
2225                                                         NORMAL_EXEC, true, 6);
2226                                         coex_dm->ps_tdma_du_adj_type = 6;
2227                                 } else if (coex_dm->cur_ps_tdma == 3) {
2228                                         halbtc8192e2ant_ps_tdma(btcoexist,
2229                                                         NORMAL_EXEC, true, 7);
2230                                         coex_dm->ps_tdma_du_adj_type = 7;
2231                                 } else if (coex_dm->cur_ps_tdma == 4) {
2232                                         halbtc8192e2ant_ps_tdma(btcoexist,
2233                                                         NORMAL_EXEC, true, 8);
2234                                         coex_dm->ps_tdma_du_adj_type = 8;
2235                                 }
2236                                 if (coex_dm->cur_ps_tdma == 9) {
2237                                         halbtc8192e2ant_ps_tdma(btcoexist,
2238                                                         NORMAL_EXEC, true, 14);
2239                                         coex_dm->ps_tdma_du_adj_type = 14;
2240                                 } else if (coex_dm->cur_ps_tdma == 10) {
2241                                         halbtc8192e2ant_ps_tdma(btcoexist,
2242                                                         NORMAL_EXEC, true, 14);
2243                                         coex_dm->ps_tdma_du_adj_type = 14;
2244                                 } else if (coex_dm->cur_ps_tdma == 11) {
2245                                         halbtc8192e2ant_ps_tdma(btcoexist,
2246                                                         NORMAL_EXEC, true, 15);
2247                                         coex_dm->ps_tdma_du_adj_type = 15;
2248                                 } else if (coex_dm->cur_ps_tdma == 12) {
2249                                         halbtc8192e2ant_ps_tdma(btcoexist,
2250                                                         NORMAL_EXEC, true, 16);
2251                                         coex_dm->ps_tdma_du_adj_type = 16;
2252                                 }
2253                                 if (result == -1) {
2254                                         if (coex_dm->cur_ps_tdma == 5) {
2255                                                 halbtc8192e2ant_ps_tdma(
2256                                                         btcoexist, NORMAL_EXEC,
2257                                                         true, 6);
2258                                                 coex_dm->ps_tdma_du_adj_type =
2259                                                         6;
2260                                         } else if (coex_dm->cur_ps_tdma == 6) {
2261                                                 halbtc8192e2ant_ps_tdma(
2262                                                         btcoexist, NORMAL_EXEC,
2263                                                         true, 7);
2264                                                 coex_dm->ps_tdma_du_adj_type =
2265                                                         7;
2266                                         } else if (coex_dm->cur_ps_tdma == 7) {
2267                                                 halbtc8192e2ant_ps_tdma(
2268                                                         btcoexist, NORMAL_EXEC,
2269                                                         true, 8);
2270                                                 coex_dm->ps_tdma_du_adj_type =
2271                                                         8;
2272                                         } else if (coex_dm->cur_ps_tdma == 13) {
2273                                                 halbtc8192e2ant_ps_tdma(
2274                                                         btcoexist, NORMAL_EXEC,
2275                                                         true, 14);
2276                                                 coex_dm->ps_tdma_du_adj_type =
2277                                                         14;
2278                                         } else if (coex_dm->cur_ps_tdma == 14) {
2279                                                 halbtc8192e2ant_ps_tdma(
2280                                                         btcoexist, NORMAL_EXEC,
2281                                                         true, 15);
2282                                                 coex_dm->ps_tdma_du_adj_type =
2283                                                         15;
2284                                         } else if (coex_dm->cur_ps_tdma == 15) {
2285                                                 halbtc8192e2ant_ps_tdma(
2286                                                         btcoexist, NORMAL_EXEC,
2287                                                         true, 16);
2288                                                 coex_dm->ps_tdma_du_adj_type =
2289                                                         16;
2290                                         }
2291                                 } else if (result == 1) {
2292                                         if (coex_dm->cur_ps_tdma == 8) {
2293                                                 halbtc8192e2ant_ps_tdma(
2294                                                         btcoexist, NORMAL_EXEC,
2295                                                         true, 7);
2296                                                 coex_dm->ps_tdma_du_adj_type =
2297                                                         7;
2298                                         } else if (coex_dm->cur_ps_tdma == 7) {
2299                                                 halbtc8192e2ant_ps_tdma(
2300                                                         btcoexist, NORMAL_EXEC,
2301                                                         true, 6);
2302                                                 coex_dm->ps_tdma_du_adj_type =
2303                                                         6;
2304                                         } else if (coex_dm->cur_ps_tdma == 6) {
2305                                                 halbtc8192e2ant_ps_tdma(
2306                                                         btcoexist, NORMAL_EXEC,
2307                                                         true, 6);
2308                                                 coex_dm->ps_tdma_du_adj_type =
2309                                                         6;
2310                                         } else if (coex_dm->cur_ps_tdma == 16) {
2311                                                 halbtc8192e2ant_ps_tdma(
2312                                                         btcoexist, NORMAL_EXEC,
2313                                                         true, 15);
2314                                                 coex_dm->ps_tdma_du_adj_type =
2315                                                         15;
2316                                         } else if (coex_dm->cur_ps_tdma == 15) {
2317                                                 halbtc8192e2ant_ps_tdma(
2318                                                         btcoexist, NORMAL_EXEC,
2319                                                         true, 14);
2320                                                 coex_dm->ps_tdma_du_adj_type =
2321                                                         14;
2322                                         } else if (coex_dm->cur_ps_tdma == 14) {
2323                                                 halbtc8192e2ant_ps_tdma(
2324                                                         btcoexist, NORMAL_EXEC,
2325                                                         true, 14);
2326                                                 coex_dm->ps_tdma_du_adj_type =
2327                                                         14;
2328                                         }
2329                                 }
2330                         } else {
2331                                 if (coex_dm->cur_ps_tdma == 5) {
2332                                         halbtc8192e2ant_ps_tdma(btcoexist,
2333                                                         NORMAL_EXEC, true, 2);
2334                                         coex_dm->ps_tdma_du_adj_type = 2;
2335                                 } else if (coex_dm->cur_ps_tdma == 6) {
2336                                         halbtc8192e2ant_ps_tdma(btcoexist,
2337                                                         NORMAL_EXEC, true, 2);
2338                                         coex_dm->ps_tdma_du_adj_type = 2;
2339                                 } else if (coex_dm->cur_ps_tdma == 7) {
2340                                         halbtc8192e2ant_ps_tdma(btcoexist,
2341                                                         NORMAL_EXEC, true, 3);
2342                                         coex_dm->ps_tdma_du_adj_type = 3;
2343                                 } else if (coex_dm->cur_ps_tdma == 8) {
2344                                         halbtc8192e2ant_ps_tdma(btcoexist,
2345                                                         NORMAL_EXEC, true, 4);
2346                                         coex_dm->ps_tdma_du_adj_type = 4;
2347                                 }
2348                                 if (coex_dm->cur_ps_tdma == 13) {
2349                                         halbtc8192e2ant_ps_tdma(btcoexist,
2350                                                         NORMAL_EXEC, true, 10);
2351                                         coex_dm->ps_tdma_du_adj_type = 10;
2352                                 } else if (coex_dm->cur_ps_tdma == 14) {
2353                                         halbtc8192e2ant_ps_tdma(btcoexist,
2354                                                         NORMAL_EXEC, true, 10);
2355                                         coex_dm->ps_tdma_du_adj_type = 10;
2356                                 } else if (coex_dm->cur_ps_tdma == 15) {
2357                                         halbtc8192e2ant_ps_tdma(btcoexist,
2358                                                         NORMAL_EXEC, true, 11);
2359                                         coex_dm->ps_tdma_du_adj_type = 11;
2360                                 } else if (coex_dm->cur_ps_tdma == 16) {
2361                                         halbtc8192e2ant_ps_tdma(btcoexist,
2362                                                         NORMAL_EXEC, true, 12);
2363                                         coex_dm->ps_tdma_du_adj_type = 12;
2364                                 }
2365                                 if (result == -1) {
2366                                         if (coex_dm->cur_ps_tdma == 1) {
2367                                                 halbtc8192e2ant_ps_tdma(
2368                                                         btcoexist, NORMAL_EXEC,
2369                                                         true, 2);
2370                                                 coex_dm->ps_tdma_du_adj_type =
2371                                                         2;
2372                                         } else if (coex_dm->cur_ps_tdma == 2) {
2373                                                 halbtc8192e2ant_ps_tdma(
2374                                                         btcoexist, NORMAL_EXEC,
2375                                                         true, 3);
2376                                                 coex_dm->ps_tdma_du_adj_type =
2377                                                         3;
2378                                         } else if (coex_dm->cur_ps_tdma == 3) {
2379                                                 halbtc8192e2ant_ps_tdma(
2380                                                         btcoexist, NORMAL_EXEC,
2381                                                         true, 4);
2382                                                 coex_dm->ps_tdma_du_adj_type =
2383                                                         4;
2384                                         } else if (coex_dm->cur_ps_tdma == 9) {
2385                                                 halbtc8192e2ant_ps_tdma(
2386                                                         btcoexist, NORMAL_EXEC,
2387                                                         true, 10);
2388                                                 coex_dm->ps_tdma_du_adj_type =
2389                                                         10;
2390                                         } else if (coex_dm->cur_ps_tdma == 10) {
2391                                                 halbtc8192e2ant_ps_tdma(
2392                                                         btcoexist, NORMAL_EXEC,
2393                                                         true, 11);
2394                                                 coex_dm->ps_tdma_du_adj_type =
2395                                                         11;
2396                                         } else if (coex_dm->cur_ps_tdma == 11) {
2397                                                 halbtc8192e2ant_ps_tdma(
2398                                                         btcoexist, NORMAL_EXEC,
2399                                                         true, 12);
2400                                                 coex_dm->ps_tdma_du_adj_type =
2401                                                         12;
2402                                         }
2403                                 } else if (result == 1) {
2404                                         if (coex_dm->cur_ps_tdma == 4) {
2405                                                 halbtc8192e2ant_ps_tdma(
2406                                                         btcoexist, NORMAL_EXEC,
2407                                                         true, 3);
2408                                                 coex_dm->ps_tdma_du_adj_type =
2409                                                         3;
2410                                         } else if (coex_dm->cur_ps_tdma == 3) {
2411                                                 halbtc8192e2ant_ps_tdma(
2412                                                         btcoexist, NORMAL_EXEC,
2413                                                         true, 2);
2414                                                 coex_dm->ps_tdma_du_adj_type =
2415                                                         2;
2416                                         } else if (coex_dm->cur_ps_tdma == 2) {
2417                                                 halbtc8192e2ant_ps_tdma(
2418                                                         btcoexist, NORMAL_EXEC,
2419                                                         true, 2);
2420                                                 coex_dm->ps_tdma_du_adj_type =
2421                                                         2;
2422                                         } else if (coex_dm->cur_ps_tdma == 12) {
2423                                                 halbtc8192e2ant_ps_tdma(
2424                                                         btcoexist, NORMAL_EXEC,
2425                                                         true, 11);
2426                                                 coex_dm->ps_tdma_du_adj_type =
2427                                                         11;
2428                                         } else if (coex_dm->cur_ps_tdma == 11) {
2429                                                 halbtc8192e2ant_ps_tdma(
2430                                                         btcoexist, NORMAL_EXEC,
2431                                                         true, 10);
2432                                                 coex_dm->ps_tdma_du_adj_type =
2433                                                         10;
2434                                         } else if (coex_dm->cur_ps_tdma == 10) {
2435                                                 halbtc8192e2ant_ps_tdma(
2436                                                         btcoexist, NORMAL_EXEC,
2437                                                         true, 10);
2438                                                 coex_dm->ps_tdma_du_adj_type =
2439                                                         10;
2440                                         }
2441                                 }
2442                         }
2443                 } else if (max_interval == 3) {
2444                         if (tx_pause) {
2445                                 if (coex_dm->cur_ps_tdma == 1) {
2446                                         halbtc8192e2ant_ps_tdma(btcoexist,
2447                                                         NORMAL_EXEC, true, 7);
2448                                         coex_dm->ps_tdma_du_adj_type = 7;
2449                                 } else if (coex_dm->cur_ps_tdma == 2) {
2450                                         halbtc8192e2ant_ps_tdma(btcoexist,
2451                                                         NORMAL_EXEC, true, 7);
2452                                         coex_dm->ps_tdma_du_adj_type = 7;
2453                                 } else if (coex_dm->cur_ps_tdma == 3) {
2454                                         halbtc8192e2ant_ps_tdma(btcoexist,
2455                                                         NORMAL_EXEC, true, 7);
2456                                         coex_dm->ps_tdma_du_adj_type = 7;
2457                                 } else if (coex_dm->cur_ps_tdma == 4) {
2458                                         halbtc8192e2ant_ps_tdma(btcoexist,
2459                                                         NORMAL_EXEC, true, 8);
2460                                         coex_dm->ps_tdma_du_adj_type = 8;
2461                                 }
2462                                 if (coex_dm->cur_ps_tdma == 9) {
2463                                         halbtc8192e2ant_ps_tdma(btcoexist,
2464                                                         NORMAL_EXEC, true, 15);
2465                                         coex_dm->ps_tdma_du_adj_type = 15;
2466                                 } else if (coex_dm->cur_ps_tdma == 10) {
2467                                         halbtc8192e2ant_ps_tdma(btcoexist,
2468                                                         NORMAL_EXEC, true, 15);
2469                                         coex_dm->ps_tdma_du_adj_type = 15;
2470                                 } else if (coex_dm->cur_ps_tdma == 11) {
2471                                         halbtc8192e2ant_ps_tdma(btcoexist,
2472                                                         NORMAL_EXEC, true, 15);
2473                                         coex_dm->ps_tdma_du_adj_type = 15;
2474                                 } else if (coex_dm->cur_ps_tdma == 12) {
2475                                         halbtc8192e2ant_ps_tdma(btcoexist,
2476                                                         NORMAL_EXEC, true, 16);
2477                                         coex_dm->ps_tdma_du_adj_type = 16;
2478                                 }
2479                                 if (result == -1) {
2480                                         if (coex_dm->cur_ps_tdma == 5) {
2481                                                 halbtc8192e2ant_ps_tdma(
2482                                                         btcoexist, NORMAL_EXEC,
2483                                                         true, 7);
2484                                                 coex_dm->ps_tdma_du_adj_type =
2485                                                         7;
2486                                         } else if (coex_dm->cur_ps_tdma == 6) {
2487                                                 halbtc8192e2ant_ps_tdma(
2488                                                         btcoexist, NORMAL_EXEC,
2489                                                         true, 7);
2490                                                 coex_dm->ps_tdma_du_adj_type =
2491                                                         7;
2492                                         } else if (coex_dm->cur_ps_tdma == 7) {
2493                                                 halbtc8192e2ant_ps_tdma(
2494                                                         btcoexist, NORMAL_EXEC,
2495                                                         true, 8);
2496                                                 coex_dm->ps_tdma_du_adj_type =
2497                                                         8;
2498                                         } else if (coex_dm->cur_ps_tdma == 13) {
2499                                                 halbtc8192e2ant_ps_tdma(
2500                                                         btcoexist, NORMAL_EXEC,
2501                                                         true, 15);
2502                                                 coex_dm->ps_tdma_du_adj_type =
2503                                                         15;
2504                                         } else if (coex_dm->cur_ps_tdma == 14) {
2505                                                 halbtc8192e2ant_ps_tdma(
2506                                                         btcoexist, NORMAL_EXEC,
2507                                                         true, 15);
2508                                                 coex_dm->ps_tdma_du_adj_type =
2509                                                         15;
2510                                         } else if (coex_dm->cur_ps_tdma == 15) {
2511                                                 halbtc8192e2ant_ps_tdma(
2512                                                         btcoexist, NORMAL_EXEC,
2513                                                         true, 16);
2514                                                 coex_dm->ps_tdma_du_adj_type =
2515                                                         16;
2516                                         }
2517                                 } else if (result == 1) {
2518                                         if (coex_dm->cur_ps_tdma == 8) {
2519                                                 halbtc8192e2ant_ps_tdma(
2520                                                         btcoexist, NORMAL_EXEC,
2521                                                         true, 7);
2522                                                 coex_dm->ps_tdma_du_adj_type =
2523                                                         7;
2524                                         } else if (coex_dm->cur_ps_tdma == 7) {
2525                                                 halbtc8192e2ant_ps_tdma(
2526                                                         btcoexist, NORMAL_EXEC,
2527                                                         true, 7);
2528                                                 coex_dm->ps_tdma_du_adj_type =
2529                                                         7;
2530                                         } else if (coex_dm->cur_ps_tdma == 6) {
2531                                                 halbtc8192e2ant_ps_tdma(
2532                                                         btcoexist, NORMAL_EXEC,
2533                                                         true, 7);
2534                                                 coex_dm->ps_tdma_du_adj_type =
2535                                                         7;
2536                                         } else if (coex_dm->cur_ps_tdma == 16) {
2537                                                 halbtc8192e2ant_ps_tdma(
2538                                                         btcoexist, NORMAL_EXEC,
2539                                                         true, 15);
2540                                                 coex_dm->ps_tdma_du_adj_type =
2541                                                         15;
2542                                         } else if (coex_dm->cur_ps_tdma == 15) {
2543                                                 halbtc8192e2ant_ps_tdma(
2544                                                         btcoexist, NORMAL_EXEC,
2545                                                         true, 15);
2546                                                 coex_dm->ps_tdma_du_adj_type =
2547                                                         15;
2548                                         } else if (coex_dm->cur_ps_tdma == 14) {
2549                                                 halbtc8192e2ant_ps_tdma(
2550                                                         btcoexist, NORMAL_EXEC,
2551                                                         true, 15);
2552                                                 coex_dm->ps_tdma_du_adj_type =
2553                                                         15;
2554                                         }
2555                                 }
2556                         } else {
2557                                 if (coex_dm->cur_ps_tdma == 5) {
2558                                         halbtc8192e2ant_ps_tdma(btcoexist,
2559                                                         NORMAL_EXEC, true, 3);
2560                                         coex_dm->ps_tdma_du_adj_type = 3;
2561                                 } else if (coex_dm->cur_ps_tdma == 6) {
2562                                         halbtc8192e2ant_ps_tdma(btcoexist,
2563                                                         NORMAL_EXEC, true, 3);
2564                                         coex_dm->ps_tdma_du_adj_type = 3;
2565                                 } else if (coex_dm->cur_ps_tdma == 7) {
2566                                         halbtc8192e2ant_ps_tdma(btcoexist,
2567                                                         NORMAL_EXEC, true, 3);
2568                                         coex_dm->ps_tdma_du_adj_type = 3;
2569                                 } else if (coex_dm->cur_ps_tdma == 8) {
2570                                         halbtc8192e2ant_ps_tdma(btcoexist,
2571                                                         NORMAL_EXEC, true, 4);
2572                                         coex_dm->ps_tdma_du_adj_type = 4;
2573                                 }
2574                                 if (coex_dm->cur_ps_tdma == 13) {
2575                                         halbtc8192e2ant_ps_tdma(btcoexist,
2576                                                         NORMAL_EXEC, true, 11);
2577                                         coex_dm->ps_tdma_du_adj_type = 11;
2578                                 } else if (coex_dm->cur_ps_tdma == 14) {
2579                                         halbtc8192e2ant_ps_tdma(btcoexist,
2580                                                         NORMAL_EXEC, true, 11);
2581                                         coex_dm->ps_tdma_du_adj_type = 11;
2582                                 } else if (coex_dm->cur_ps_tdma == 15) {
2583                                         halbtc8192e2ant_ps_tdma(btcoexist,
2584                                                         NORMAL_EXEC, true, 11);
2585                                         coex_dm->ps_tdma_du_adj_type = 11;
2586                                 } else if (coex_dm->cur_ps_tdma == 16) {
2587                                         halbtc8192e2ant_ps_tdma(btcoexist,
2588                                                         NORMAL_EXEC, true, 12);
2589                                         coex_dm->ps_tdma_du_adj_type = 12;
2590                                 }
2591                                 if (result == -1) {
2592                                         if (coex_dm->cur_ps_tdma == 1) {
2593                                                 halbtc8192e2ant_ps_tdma(
2594                                                         btcoexist, NORMAL_EXEC,
2595                                                         true, 3);
2596                                                 coex_dm->ps_tdma_du_adj_type =
2597                                                         3;
2598                                         } else if (coex_dm->cur_ps_tdma == 2) {
2599                                                 halbtc8192e2ant_ps_tdma(
2600                                                         btcoexist, NORMAL_EXEC,
2601                                                         true, 3);
2602                                                 coex_dm->ps_tdma_du_adj_type =
2603                                                         3;
2604                                         } else if (coex_dm->cur_ps_tdma == 3) {
2605                                                 halbtc8192e2ant_ps_tdma(
2606                                                         btcoexist, NORMAL_EXEC,
2607                                                         true, 4);
2608                                                 coex_dm->ps_tdma_du_adj_type =
2609                                                         4;
2610                                         } else if (coex_dm->cur_ps_tdma == 9) {
2611                                                 halbtc8192e2ant_ps_tdma(
2612                                                         btcoexist, NORMAL_EXEC,
2613                                                         true, 11);
2614                                                 coex_dm->ps_tdma_du_adj_type =
2615                                                         11;
2616                                         } else if (coex_dm->cur_ps_tdma == 10) {
2617                                                 halbtc8192e2ant_ps_tdma(
2618                                                         btcoexist, NORMAL_EXEC,
2619                                                         true, 11);
2620                                                 coex_dm->ps_tdma_du_adj_type =
2621                                                         11;
2622                                         } else if (coex_dm->cur_ps_tdma == 11) {
2623                                                 halbtc8192e2ant_ps_tdma(
2624                                                         btcoexist, NORMAL_EXEC,
2625                                                         true, 12);
2626                                                 coex_dm->ps_tdma_du_adj_type =
2627                                                         12;
2628                                         }
2629                                 } else if (result == 1) {
2630                                         if (coex_dm->cur_ps_tdma == 4) {
2631                                                 halbtc8192e2ant_ps_tdma(
2632                                                         btcoexist, NORMAL_EXEC,
2633                                                         true, 3);
2634                                                 coex_dm->ps_tdma_du_adj_type =
2635                                                         3;
2636                                         } else if (coex_dm->cur_ps_tdma == 3) {
2637                                                 halbtc8192e2ant_ps_tdma(
2638                                                         btcoexist, NORMAL_EXEC,
2639                                                         true, 3);
2640                                                 coex_dm->ps_tdma_du_adj_type =
2641                                                         3;
2642                                         } else if (coex_dm->cur_ps_tdma == 2) {
2643                                                 halbtc8192e2ant_ps_tdma(
2644                                                         btcoexist, NORMAL_EXEC,
2645                                                         true, 3);
2646                                                 coex_dm->ps_tdma_du_adj_type =
2647                                                         3;
2648                                         } else if (coex_dm->cur_ps_tdma == 12) {
2649                                                 halbtc8192e2ant_ps_tdma(
2650                                                         btcoexist, NORMAL_EXEC,
2651                                                         true, 11);
2652                                                 coex_dm->ps_tdma_du_adj_type =
2653                                                         11;
2654                                         } else if (coex_dm->cur_ps_tdma == 11) {
2655                                                 halbtc8192e2ant_ps_tdma(
2656                                                         btcoexist, NORMAL_EXEC,
2657                                                         true, 11);
2658                                                 coex_dm->ps_tdma_du_adj_type =
2659                                                         11;
2660                                         } else if (coex_dm->cur_ps_tdma == 10) {
2661                                                 halbtc8192e2ant_ps_tdma(
2662                                                         btcoexist, NORMAL_EXEC,
2663                                                         true, 11);
2664                                                 coex_dm->ps_tdma_du_adj_type =
2665                                                         11;
2666                                         }
2667                                 }
2668                         }
2669                 }
2670         }
2671
2672         /* if current PsTdma not match with the recorded one (when scan, dhcp...), */
2673         /* then we have to adjust it back to the previous record one. */
2674         if (coex_dm->cur_ps_tdma != coex_dm->ps_tdma_du_adj_type) {
2675                 boolean scan = false, link = false, roam = false;
2676
2677                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2678                         "[BTCoex], PsTdma type dismatch!!!, cur_ps_tdma=%d, recordPsTdma=%d\n",
2679                             coex_dm->cur_ps_tdma, coex_dm->ps_tdma_du_adj_type);
2680                 BTC_TRACE(trace_buf);
2681
2682                 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
2683                 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
2684                 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
2685
2686                 if (!scan && !link && !roam)
2687                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
2688                                                 coex_dm->ps_tdma_du_adj_type);
2689                 else {
2690                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2691                                 "[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n");
2692                         BTC_TRACE(trace_buf);
2693                 }
2694         }
2695 }
2696
2697 /* ******************
2698  * pstdma for wifi rssi low
2699  * ****************** */
2700 void halbtc8192e2ant_tdma_duration_adjust_for_wifi_rssi_low(
2701         IN struct btc_coexist *btcoexist/* , */ /* IN u8 wifi_status */)
2702 {
2703         static s32              up, dn, m, n, wait_count;
2704         s32                     result;   /* 0: no change, +1: increase WiFi duration, -1: decrease WiFi duration */
2705         u8                      retry_count = 0, bt_info_ext;
2706
2707         coex_dm->auto_tdma_adjust = false;
2708
2709         retry_count = coex_sta->bt_retry_cnt;
2710         bt_info_ext = coex_sta->bt_info_ext;
2711
2712         if (!coex_dm->auto_tdma_adjust_low_rssi) {
2713                 coex_dm->auto_tdma_adjust_low_rssi = true;
2714                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 81);
2715                 coex_dm->ps_tdma_du_adj_type = 81;
2716                 /* ============ */
2717                 up = 0;
2718                 dn = 0;
2719                 m = 1;
2720                 n = 3;
2721                 result = 0;
2722                 wait_count = 0;
2723         } else {
2724                 /* acquire the BT TRx retry count from BT_Info byte2
2725                 *               retry_count = coex_sta->bt_retry_cnt;
2726                 *               bt_info_ext = coex_sta->bt_info_ext; */
2727                 result = 0;
2728                 wait_count++;
2729
2730                 if ((coex_sta->low_priority_tx) > 1050 ||
2731                     (coex_sta->low_priority_rx) > 1250)
2732                         retry_count++;
2733
2734                 if (retry_count ==
2735                     0) { /* no retry in the last 2-second duration */
2736                         up++;
2737                         dn--;
2738
2739                         if (dn <= 0)
2740                                 dn = 0;
2741
2742                         if (up >= n) {  /* if retry count during continuous n*2 seconds is 0, enlarge WiFi duration */
2743                                 wait_count = 0;
2744                                 n = 3;
2745                                 up = 0;
2746                                 dn = 0;
2747                                 result = 1;
2748                         }
2749                 } else if (retry_count <=
2750                            3) { /* <=3 retry in the last 2-second duration */
2751                         up--;
2752                         dn++;
2753
2754                         if (up <= 0)
2755                                 up = 0;
2756
2757                         if (dn == 2) {  /* if continuous 2 retry count(every 2 seconds) >0 and < 3, reduce WiFi duration */
2758                                 if (wait_count <= 2)
2759                                         m++; /* to avoid loop between the two levels */
2760                                 else
2761                                         m = 1;
2762
2763                                 if (m >= 20)  /* maximum of m = 20 ' will recheck if need to adjust wifi duration in maximum time interval 120 seconds */
2764                                         m = 20;
2765
2766                                 n = 3 * m;
2767                                 up = 0;
2768                                 dn = 0;
2769                                 wait_count = 0;
2770                                 result = -1;
2771                         }
2772                 } else { /* retry count > 3, once retry count > 3, to reduce WiFi duration */
2773                         if (wait_count == 1)
2774                                 m++; /* to avoid loop between the two levels */
2775                         else
2776                                 m = 1;
2777
2778                         if (m >= 20)  /* maximum of m = 20 ' will recheck if need to adjust wifi duration in maximum time interval 120 seconds */
2779                                 m = 20;
2780
2781                         n = 3 * m;
2782                         up = 0;
2783                         dn = 0;
2784                         wait_count = 0;
2785                         result = -1;
2786                 }
2787
2788                 if (result == -1) {
2789                         if (coex_dm->cur_ps_tdma == 80) {
2790                                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2791                                                         true, 81);
2792                                 coex_dm->ps_tdma_du_adj_type = 81;
2793                         } else if (coex_dm->cur_ps_tdma == 81) {
2794                                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2795                                                         true, 82);
2796                                 coex_dm->ps_tdma_du_adj_type = 82;
2797                         } else if (coex_dm->cur_ps_tdma == 82) {
2798                                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2799                                                         true, 83);
2800                                 coex_dm->ps_tdma_du_adj_type = 83;
2801                         } else if (coex_dm->cur_ps_tdma == 83) {
2802                                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2803                                                         true, 84);
2804                                 coex_dm->ps_tdma_du_adj_type = 84;
2805                         }
2806                 } else if (result == 1) {
2807                         if (coex_dm->cur_ps_tdma == 84) {
2808                                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2809                                                         true, 83);
2810                                 coex_dm->ps_tdma_du_adj_type = 83;
2811                         } else if (coex_dm->cur_ps_tdma == 83) {
2812                                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2813                                                         true, 82);
2814                                 coex_dm->ps_tdma_du_adj_type = 82;
2815                         } else if (coex_dm->cur_ps_tdma == 82) {
2816                                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2817                                                         true, 81);
2818                                 coex_dm->ps_tdma_du_adj_type = 81;
2819                         } else if ((coex_dm->cur_ps_tdma == 81) &&
2820                                    (coex_sta->scan_ap_num <= 5)) {
2821                                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2822                                                         true, 81);
2823                                 coex_dm->ps_tdma_du_adj_type = 81;
2824                         }
2825                 }
2826
2827                 if (coex_dm->cur_ps_tdma != 80 &&
2828                     coex_dm->cur_ps_tdma != 81 &&
2829                     coex_dm->cur_ps_tdma != 82 &&
2830                     coex_dm->cur_ps_tdma != 83 &&
2831                     coex_dm->cur_ps_tdma != 84) {
2832                         /* recover to previous adjust type */
2833                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
2834                                                 coex_dm->ps_tdma_du_adj_type);
2835                 }
2836         }
2837 }
2838
2839
2840 void halbtc8192e2ant_get_bt_rssi_threshold(IN struct btc_coexist *btcoexist,
2841                 IN u8 *pThres0, IN u8 *pThres1)
2842 {
2843         u8 ant_type;
2844
2845         struct  btc_board_info  *board_info = &btcoexist->board_info;
2846
2847         ant_type = board_info->ant_type;
2848
2849         switch (ant_type) {
2850         case BTC_ANT_TYPE_0:
2851                 *pThres0 = 100;
2852                 *pThres1 = 100;
2853                 break;
2854         case BTC_ANT_TYPE_1:
2855                 *pThres0 = 34;
2856                 *pThres1 = 42;
2857                 break;
2858         case BTC_ANT_TYPE_2:
2859                 *pThres0 = 34;
2860                 *pThres1 = 42;
2861                 break;
2862         case BTC_ANT_TYPE_3:
2863                 *pThres0 = 34;
2864                 *pThres1 = 42;
2865                 break;
2866         case BTC_ANT_TYPE_4:
2867                 *pThres0 = 34;
2868                 *pThres1 = 42;
2869                 break;
2870         default:
2871                 break;
2872         }
2873 }
2874
2875 void halbtc8192e2ant_action_bt_relink(IN struct btc_coexist *btcoexist)
2876 {
2877         if (coex_sta->wifi_is_high_pri_task) {
2878                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
2879                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
2880         } else {
2881                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
2882                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
2883         }
2884         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2885         halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2886         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
2887         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
2888 }
2889
2890
2891 /* SCO only or SCO+PAN(HS) */
2892 void halbtc8192e2ant_action_sco(IN struct btc_coexist *btcoexist)
2893 {
2894         u8      wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
2895         u32     wifi_bw;
2896         u8      bt_thresh0 = 0, bt_thresh1 = 0;
2897
2898         halbtc8192e2ant_get_bt_rssi_threshold(btcoexist, &bt_thresh0,
2899                                               &bt_thresh1);
2900         bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, bt_thresh0,
2901                         bt_thresh1);
2902
2903         wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 34,
2904                           0);
2905
2906         if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state)))
2907                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
2908         else
2909                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
2910
2911
2912         if (BTC_RSSI_HIGH(wifi_rssi_state) &&   (!BTC_RSSI_LOW(bt_rssi_state)))
2913                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
2914         else
2915                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
2916
2917
2918         halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2919         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2920         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2921
2922         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
2923         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
2924 }
2925
2926 void halbtc8192e2ant_action_sco_pan(IN struct btc_coexist *btcoexist)
2927 {
2928         u8      wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
2929         u32     wifi_bw;
2930         u8              bt_thresh0 = 0, bt_thresh1 = 0;
2931
2932
2933         halbtc8192e2ant_get_bt_rssi_threshold(btcoexist, &bt_thresh0,
2934                                               &bt_thresh1);
2935         bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, bt_thresh0,
2936                         bt_thresh1);
2937
2938         wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 34,
2939                           0);
2940
2941         if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state)))
2942                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
2943         else
2944                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
2945
2946
2947
2948         if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state)))
2949                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
2950         else
2951                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 86);
2952
2953         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2954         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2955
2956         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
2957         if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state)) &&
2958             (coex_sta->scan_ap_num < NOISY_AP_NUM_THRESH_8192E))
2959                 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false,
2960                                               0x18);
2961         else if (BTC_RSSI_HIGH(wifi_rssi_state) &&
2962                  (!BTC_RSSI_LOW(bt_rssi_state)) &&
2963                  (coex_sta->scan_ap_num > NOISY_AP_NUM_THRESH_8192E))
2964                 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false,
2965                                               0x18);
2966         else
2967                 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false,
2968                                               0x18);
2969 }
2970
2971
2972 void halbtc8192e2ant_action_hid(IN struct btc_coexist *btcoexist)
2973 {
2974         u8      wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
2975         u32     wifi_bw;
2976         u8      anttype = 0;
2977
2978         btcoexist->btc_get(btcoexist, BTC_GET_U1_ANT_TYPE, &anttype);
2979
2980         wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 34, 0);
2981         bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42);
2982
2983         if (anttype == 0) {
2984                 /*ANTTYPE = 0   2ant with SPDT*/
2985                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 28);
2986                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
2987         } else if (anttype == 1) {
2988                 /*2ant with coupler and bad ant. isolation, 3ant with bad ant. isolation*/
2989                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 28);
2990                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
2991         } else if (anttype == 2) {
2992                 /*ANTTYPE = 2, 2ant with coupler and normal/good ant. isolation, 3ant with normal ant. isolation*/
2993                 if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state))) {
2994                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
2995                         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
2996                 } else {
2997                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
2998                         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
2999                 }
3000         } else if (anttype == 3) {
3001                 /*ANTTYPE = 3,  3ant with good ant. isolation*/
3002                 if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state))) {
3003                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
3004                         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
3005                 } else {
3006                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
3007                         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
3008                 }
3009         }
3010
3011         halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
3012
3013         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3014         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3015
3016         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
3017         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
3018 }
3019
3020 /* A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */
3021 void halbtc8192e2ant_action_a2dp(IN struct btc_coexist *btcoexist)
3022 {
3023         u8              wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
3024         u32             wifi_bw;
3025         boolean         long_dist = false;
3026         u8      anttype = 0;
3027
3028         btcoexist->btc_get(btcoexist, BTC_GET_U1_ANT_TYPE, &anttype);
3029
3030         wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 34, 0);
3031         bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42);
3032
3033         if (anttype == 0) {
3034                 /*ANTTYPE = 0   2ant with SPDT*/
3035                 if ((coex_sta->scan_ap_num > 40) && (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state)))) {
3036                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 30);
3037                         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
3038                 } else {
3039                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 88);
3040                         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
3041                 }
3042         } else if (anttype == 1) {
3043                 /*2ant with coupler and bad ant. isolation, 3ant with bad ant. isolation*/
3044                 if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state))) {
3045                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 25);
3046                         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
3047                 } else {
3048                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 88);
3049                         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
3050                 }
3051         } else if (anttype == 2) {
3052                 /*ANTTYPE = 2, 2ant with coupler and normal/good ant. isolation, 3ant with normal ant. isolation*/
3053                 if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state))) {
3054                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 22);
3055                         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5);
3056                 } else {
3057                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 88);
3058                         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
3059                 }
3060         } else if (anttype == 3) {
3061                 /*ANTTYPE = 3,  3ant with good ant. isolation*/
3062                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
3063                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
3064         }
3065         halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
3066         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3067         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3068         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
3069         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
3070 }
3071
3072 void halbtc8192e2ant_action_a2dp_pan_hs(IN struct btc_coexist *btcoexist)
3073 {
3074         u8              wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
3075         u32             wifi_bw;
3076
3077         wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15,
3078                           0);
3079         bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42);
3080
3081         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3082
3083         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3084         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
3085
3086         if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
3087             (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
3088                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, true, 2);
3089                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
3090         } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
3091                    (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
3092                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, false,
3093                                                      2);
3094                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
3095         } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
3096                    (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3097                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, false,
3098                                                      2);
3099                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
3100         }
3101
3102         /* sw mechanism */
3103         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3104         if (BTC_WIFI_BW_HT40 == wifi_bw) {
3105                 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3106                     (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3107                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
3108                                                       false, false);
3109                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3110                                                       true, 0x6);
3111                 } else {
3112                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
3113                                                       false, false);
3114                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3115                                                       true, 0x6);
3116                 }
3117         } else {
3118                 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3119                     (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3120                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
3121                                                       false, false);
3122                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3123                                                       true, 0x6);
3124                 } else {
3125                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
3126                                                       false, false);
3127                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3128                                                       true, 0x6);
3129                 }
3130         }
3131 }
3132
3133 void halbtc8192e2ant_action_pan_edr(IN struct btc_coexist *btcoexist)
3134 {
3135         u8              wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
3136         u32             wifi_bw;
3137         u8              bt_thresh0 = 0, bt_thresh1 = 0;
3138
3139         halbtc8192e2ant_get_bt_rssi_threshold(btcoexist, &bt_thresh0,
3140                                               &bt_thresh1);
3141         bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, bt_thresh0,
3142                         bt_thresh1);
3143         /*      wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 34, 0); */
3144         wifi_rssi_state = BTC_RSSI_STATE_LOW;
3145
3146         if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state)))
3147                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
3148         else
3149                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
3150
3151         if (BTC_RSSI_HIGH(wifi_rssi_state) &&   (!BTC_RSSI_LOW(bt_rssi_state)))
3152                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1);
3153         else
3154                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 85);
3155
3156         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3157         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3158
3159         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
3160         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
3161 }
3162
3163 /* PAN(HS) only */
3164 void halbtc8192e2ant_action_pan_hs(IN struct btc_coexist *btcoexist)
3165 {
3166         u8              wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
3167         u32             wifi_bw;
3168
3169         wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15,
3170                           0);
3171         bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42);
3172
3173         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3174
3175         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3176
3177         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
3178
3179         if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
3180             (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW))
3181                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
3182         else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
3183                  (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM))
3184                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
3185         else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
3186                  (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH))
3187                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
3188         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
3189
3190         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3191         if (BTC_WIFI_BW_HT40 == wifi_bw) {
3192                 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3193                     (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3194                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
3195                                                       false, false);
3196                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3197                                                       false, 0x18);
3198                 } else {
3199                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
3200                                                       false, false);
3201                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3202                                                       false, 0x18);
3203                 }
3204         } else {
3205                 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3206                     (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3207                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
3208                                                       false, false);
3209                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3210                                                       false, 0x18);
3211                 } else {
3212                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
3213                                                       false, false);
3214                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3215                                                       false, 0x18);
3216                 }
3217         }
3218 }
3219
3220 /* PAN(EDR)+A2DP */
3221 void halbtc8192e2ant_action_pan_edr_a2dp(IN struct btc_coexist *btcoexist)
3222 {
3223         u8              wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
3224         u32             wifi_bw;
3225         u8              bt_thresh0 = 0, bt_thresh1 = 0;
3226
3227         halbtc8192e2ant_get_bt_rssi_threshold(btcoexist, &bt_thresh0,
3228                                               &bt_thresh1);
3229         bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, bt_thresh0,
3230                         bt_thresh1);
3231         /*      wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 34, 0); */
3232         wifi_rssi_state = BTC_RSSI_STATE_LOW;
3233
3234         if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state)))
3235                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
3236         else
3237                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
3238
3239         if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state)))
3240                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 4);
3241         else
3242                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 86);
3243
3244         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3245         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3246
3247         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
3248         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
3249
3250 }
3251
3252 void halbtc8192e2ant_action_pan_edr_hid(IN struct btc_coexist *btcoexist)
3253 {
3254         u8              wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
3255         u32             wifi_bw;
3256         u8              bt_thresh0 = 0, bt_thresh1 = 0;
3257
3258         halbtc8192e2ant_get_bt_rssi_threshold(btcoexist, &bt_thresh0,
3259                                               &bt_thresh1);
3260         bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, bt_thresh0,
3261                         bt_thresh1);
3262
3263         wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 34,
3264                           0);
3265
3266         if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state)))
3267                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
3268         else
3269                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
3270
3271         if (BTC_RSSI_HIGH(wifi_rssi_state) &&   (!BTC_RSSI_LOW(bt_rssi_state)))
3272                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
3273         else
3274                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 86);
3275
3276         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3277         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3278
3279         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
3280         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
3281 }
3282
3283 /* HID+A2DP+PAN(EDR) */
3284 void halbtc8192e2ant_action_hid_a2dp_pan_edr(IN struct btc_coexist *btcoexist)
3285 {
3286         u8              wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
3287         u32             wifi_bw;
3288         u8              bt_thresh0 = 0, bt_thresh1 = 0;
3289
3290         halbtc8192e2ant_get_bt_rssi_threshold(btcoexist, &bt_thresh0,
3291                                               &bt_thresh1);
3292         bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, bt_thresh0,
3293                         bt_thresh1);
3294         wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 34,
3295                           0);
3296
3297         if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state)))
3298                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
3299         else
3300                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
3301
3302         if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state)))
3303                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 4);
3304         else
3305                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 86);
3306
3307         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3308         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3309
3310         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
3311         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
3312 }
3313
3314 void halbtc8192e2ant_action_hid_a2dp(IN struct btc_coexist *btcoexist)
3315 {
3316         u8              wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
3317         u32             wifi_bw;
3318         u8              bt_thresh0 = 0, bt_thresh1 = 0, anttype = 0;
3319
3320         btcoexist->btc_get(btcoexist, BTC_GET_U1_ANT_TYPE, &anttype);
3321
3322         wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 34, 0);
3323         bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42);
3324
3325         if (anttype == 0) {
3326                 /*2ant with SPDT*/
3327                 if ((coex_sta->scan_ap_num > 40) && (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state)))) {
3328                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 31);
3329                         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 11);
3330                 } else {
3331                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 88);
3332                         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
3333                 }
3334         } else if (anttype == 1) {
3335                 /*2ant with coupler and bad ant. isolation, 3ant with bad ant. isolation*/
3336                 if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state))) {
3337                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 25);
3338                         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
3339                 } else {
3340                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 87);
3341                         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
3342                 }
3343         } else if (anttype == 2) {
3344                 /*ANTTYPE = 2, 2ant with coupler and normal/good ant. isolation, 3ant with normal ant. isolation*/
3345                 if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state))) {
3346                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 25);
3347                         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
3348                 } else {
3349                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 87);
3350                         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
3351                 }
3352         } else if (anttype == 3) {
3353                 /*ANTTYPE = 3,  3ant with good ant. isolation*/
3354                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
3355                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
3356         }
3357
3358         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3359         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3360
3361         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
3362         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
3363 }
3364
3365 void halbtc8192e2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
3366 {
3367         u8                              algorithm = 0;
3368
3369         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3370                     "[BTCoex], RunCoexistMechanism()===>\n");
3371         BTC_TRACE(trace_buf);
3372
3373         if (btcoexist->manual_control) {
3374                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3375                         "[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n");
3376                 BTC_TRACE(trace_buf);
3377                 return;
3378         }
3379
3380         if (coex_sta->under_ips) {
3381                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3382                             "[BTCoex], wifi is under IPS !!!\n");
3383                 BTC_TRACE(trace_buf);
3384                 return;
3385         }
3386
3387         algorithm = halbtc8192e2ant_action_algorithm(btcoexist);
3388         if (coex_sta->c2h_bt_inquiry_page &&
3389             (BT_8192E_2ANT_COEX_ALGO_PANHS != algorithm)) {
3390                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3391                             "[BTCoex], BT is under inquiry/page scan !!\n");
3392                 BTC_TRACE(trace_buf);
3393                 halbtc8192e2ant_action_bt_inquiry(btcoexist);
3394                 return;
3395         }
3396
3397         if (coex_sta->is_setup_link) {
3398                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3399                             "[BTCoex], BT is re-link !!!\n");
3400                 halbtc8192e2ant_action_bt_relink(btcoexist);
3401                 return;
3402         }
3403
3404
3405         coex_dm->cur_algorithm = algorithm;
3406         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Algorithm = %d\n",
3407                     coex_dm->cur_algorithm);
3408         BTC_TRACE(trace_buf);
3409
3410         if (halbtc8192e2ant_is_common_action(btcoexist)) {
3411                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3412                             "[BTCoex], Action 2-Ant common.\n");
3413                 BTC_TRACE(trace_buf);
3414                 coex_dm->auto_tdma_adjust = false;
3415                 coex_dm->auto_tdma_adjust_low_rssi = false;
3416
3417         } else {
3418                 if (coex_dm->cur_algorithm != coex_dm->pre_algorithm) {
3419                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3420                                 "[BTCoex], pre_algorithm=%d, cur_algorithm=%d\n",
3421                                 coex_dm->pre_algorithm, coex_dm->cur_algorithm);
3422                         BTC_TRACE(trace_buf);
3423                         coex_dm->auto_tdma_adjust = false;
3424                         coex_dm->auto_tdma_adjust_low_rssi = false;
3425
3426                 }
3427                 switch (coex_dm->cur_algorithm) {
3428                 case BT_8192E_2ANT_COEX_ALGO_SCO:
3429                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3430                                 "[BTCoex], Action 2-Ant, algorithm = SCO.\n");
3431                         BTC_TRACE(trace_buf);
3432                         halbtc8192e2ant_action_sco(btcoexist);
3433                         break;
3434                 case BT_8192E_2ANT_COEX_ALGO_SCO_PAN:
3435                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3436                                 "[BTCoex], Action 2-Ant, algorithm = SCO+PAN(EDR).\n");
3437                         BTC_TRACE(trace_buf);
3438                         halbtc8192e2ant_action_sco_pan(btcoexist);
3439                         break;
3440                 case BT_8192E_2ANT_COEX_ALGO_HID:
3441                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3442                                 "[BTCoex], Action 2-Ant, algorithm = HID.\n");
3443                         BTC_TRACE(trace_buf);
3444                         halbtc8192e2ant_action_hid(btcoexist);
3445                         break;
3446                 case BT_8192E_2ANT_COEX_ALGO_A2DP:
3447                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3448                                 "[BTCoex], Action 2-Ant, algorithm = A2DP.\n");
3449                         BTC_TRACE(trace_buf);
3450                         halbtc8192e2ant_action_a2dp(btcoexist);
3451                         break;
3452                 case BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS:
3453                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3454                                 "[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n");
3455                         BTC_TRACE(trace_buf);
3456                         halbtc8192e2ant_action_a2dp_pan_hs(btcoexist);
3457                         break;
3458                 case BT_8192E_2ANT_COEX_ALGO_PANEDR:
3459                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3460                                 "[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n");
3461                         BTC_TRACE(trace_buf);
3462                         halbtc8192e2ant_action_pan_edr(btcoexist);
3463                         break;
3464                 case BT_8192E_2ANT_COEX_ALGO_PANHS:
3465                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3466                                 "[BTCoex], Action 2-Ant, algorithm = HS mode.\n");
3467                         BTC_TRACE(trace_buf);
3468                         halbtc8192e2ant_action_pan_hs(btcoexist);
3469                         break;
3470                 case BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP:
3471                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3472                                 "[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n");
3473                         BTC_TRACE(trace_buf);
3474                         halbtc8192e2ant_action_pan_edr_a2dp(btcoexist);
3475                         break;
3476                 case BT_8192E_2ANT_COEX_ALGO_PANEDR_HID:
3477                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3478                                 "[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n");
3479                         BTC_TRACE(trace_buf);
3480                         halbtc8192e2ant_action_pan_edr_hid(btcoexist);
3481                         break;
3482                 case BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR:
3483                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3484                                 "[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n");
3485                         BTC_TRACE(trace_buf);
3486                         halbtc8192e2ant_action_hid_a2dp_pan_edr(
3487                                 btcoexist);
3488                         break;
3489                 case BT_8192E_2ANT_COEX_ALGO_HID_A2DP:
3490                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3491                                 "[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n");
3492                         BTC_TRACE(trace_buf);
3493                         halbtc8192e2ant_action_hid_a2dp(btcoexist);
3494                         break;
3495                 default:
3496                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3497                                 "[BTCoex], Action 2-Ant, algorithm = unknown!!\n");
3498                         BTC_TRACE(trace_buf);
3499                         halbtc8192e2ant_coex_all_off(btcoexist);
3500                         break;
3501                 }
3502                 coex_dm->pre_algorithm = coex_dm->cur_algorithm;
3503         }
3504 }
3505
3506 void halbtc8192e2ant_init_hw_config(IN struct btc_coexist *btcoexist,
3507                                     IN boolean back_up)
3508 {
3509         u16     u16tmp = 0;
3510         u8      u8tmp = 0;
3511
3512         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3513                     "[BTCoex], 2Ant Init HW Config!!\n");
3514         BTC_TRACE(trace_buf);
3515
3516         if (back_up) {
3517                 /* backup rf 0x1e value */
3518                 coex_dm->bt_rf_0x1e_backup =
3519                         btcoexist->btc_get_rf_reg(btcoexist, BTC_RF_A, 0x1e,
3520                                                   0xfffff);
3521
3522                 coex_dm->backup_arfr_cnt1 = btcoexist->btc_read_4byte(btcoexist,
3523                                             0x430);
3524                 coex_dm->backup_arfr_cnt2 = btcoexist->btc_read_4byte(btcoexist,
3525                                             0x434);
3526                 coex_dm->backup_retry_limit = btcoexist->btc_read_2byte(
3527                                                       btcoexist, 0x42a);
3528                 coex_dm->backup_ampdu_max_time = btcoexist->btc_read_1byte(
3529                                 btcoexist, 0x456);
3530         }
3531
3532         /* antenna sw ctrl to bt */
3533         halbtc8192e2ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, true, false);
3534
3535         halbtc8192e2ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
3536
3537         /* antenna switch control parameter */
3538         /*      btcoexist->btc_write_4byte(btcoexist, 0x858, 0x55555555); */
3539
3540         /* coex parameters */
3541         btcoexist->btc_write_1byte(btcoexist, 0x778, 0x3);
3542         /* 0x790[5:0]=0x5 */
3543         u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x790);
3544         u8tmp &= 0xc0;
3545         u8tmp |= 0x5;
3546         btcoexist->btc_write_1byte(btcoexist, 0x790, u8tmp);
3547
3548         /* enable counter statistics */
3549         btcoexist->btc_write_1byte(btcoexist, 0x76e, 0x4);
3550
3551         /* enable PTA */
3552         btcoexist->btc_write_1byte(btcoexist, 0x40, 0x20);
3553         /* enable mailbox interface */
3554         u16tmp = btcoexist->btc_read_2byte(btcoexist, 0x40);
3555         u16tmp |= BIT(9);
3556         btcoexist->btc_write_2byte(btcoexist, 0x40, u16tmp);
3557
3558         /* enable PTA I2C mailbox */
3559         u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x101);
3560         u8tmp |= BIT(4);
3561         btcoexist->btc_write_1byte(btcoexist, 0x101, u8tmp);
3562
3563         /* enable bt clock when wifi is disabled. */
3564         u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x93);
3565         u8tmp |= BIT(0);
3566         btcoexist->btc_write_1byte(btcoexist, 0x93, u8tmp);
3567         /* enable bt clock when suspend. */
3568         u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x7);
3569         u8tmp |= BIT(0);
3570         btcoexist->btc_write_1byte(btcoexist, 0x7, u8tmp);
3571
3572         /* Give bt_coex_supported_version the default value */
3573         coex_sta->bt_coex_supported_version = 0;
3574 }
3575
3576 /* ************************************************************
3577  * work around function start with wa_halbtc8192e2ant_
3578  * ************************************************************
3579  * ************************************************************
3580  * extern function start with ex_halbtc8192e2ant_
3581  * ************************************************************ */
3582 void ex_halbtc8192e2ant_power_on_setting(IN struct btc_coexist *btcoexist)
3583 {
3584 }
3585
3586 void ex_halbtc8192e2ant_init_hw_config(IN struct btc_coexist *btcoexist,
3587                                        IN boolean wifi_only)
3588 {
3589         halbtc8192e2ant_init_hw_config(btcoexist, true);
3590 }
3591
3592 void ex_halbtc8192e2ant_init_coex_dm(IN struct btc_coexist *btcoexist)
3593 {
3594         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3595                     "[BTCoex], Coex Mechanism Init!!\n");
3596         BTC_TRACE(trace_buf);
3597
3598         halbtc8192e2ant_init_coex_dm(btcoexist);
3599 }
3600
3601 void ex_halbtc8192e2ant_display_coex_info(IN struct btc_coexist *btcoexist)
3602 {
3603         struct  btc_board_info          *board_info = &btcoexist->board_info;
3604         struct  btc_stack_info          *stack_info = &btcoexist->stack_info;
3605         u8                              *cli_buf = btcoexist->cli_buf;
3606         u8                              u8tmp[4], i, bt_info_ext, ps_tdma_case = 0;
3607         u16                             u16tmp[4];
3608         u32                             u32tmp[4];
3609         u32                             fa_ofdm, fa_cck, cca_ofdm, cca_cck;
3610         u32                             fw_ver = 0, bt_patch_ver = 0, bt_coex_ver = 0;
3611         u32                             phyver = 0;
3612
3613         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3614                    "\r\n ============[BT Coexist info]============");
3615         CL_PRINTF(cli_buf);
3616
3617         if (btcoexist->manual_control) {
3618                 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3619                         "\r\n ============[Under Manual Control]============");
3620                 CL_PRINTF(cli_buf);
3621                 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3622                            "\r\n ==========================================");
3623                 CL_PRINTF(cli_buf);
3624         }
3625
3626         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ",
3627                    "Ant PG number/ Ant mechanism:",
3628                    board_info->pg_ant_num, board_info->btdm_ant_num);
3629         CL_PRINTF(cli_buf);
3630
3631         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "Antenna type:",
3632                    board_info->ant_type);
3633         CL_PRINTF(cli_buf);
3634
3635         btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver);
3636         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
3637         phyver = btcoexist->btc_get_bt_phydm_version(btcoexist);
3638         bt_coex_ver = ((coex_sta->bt_coex_supported_version & 0xff00) >> 8);
3639
3640         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3641                    "\r\n %-35s = %d_%02x/ 0x%02x/ 0x%02x (%s)",
3642                    "CoexVer WL/  BT_Desired/ BT_Report",
3643                    glcoex_ver_date_8192e_2ant, glcoex_ver_8192e_2ant,
3644                    glcoex_ver_btdesired_8192e_2ant, bt_coex_ver,
3645                    (bt_coex_ver == 0xff ? "Unknown" : (bt_coex_ver >=
3646                                    glcoex_ver_btdesired_8192e_2ant ? "Match" :
3647                                    "Mis-Match")));
3648         CL_PRINTF(cli_buf);
3649
3650
3651         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3652                    "\r\n %-35s = 0x%x/ 0x%x/ v%d",
3653                    "W_FW/ B_FW/ Phy", fw_ver, bt_patch_ver, phyver);
3654         CL_PRINTF(cli_buf);
3655
3656         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ",
3657                    "Wifi channel informed to BT",
3658                    coex_dm->wifi_chnl_info[0], coex_dm->wifi_chnl_info[1],
3659                    coex_dm->wifi_chnl_info[2]);
3660         CL_PRINTF(cli_buf);
3661
3662         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/", "WifibHiPri",
3663                 (coex_sta->wifi_is_high_pri_task ? "Yes" : "No"));
3664         CL_PRINTF(cli_buf);
3665
3666 #if 0
3667                 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/", "test patch version",
3668                         "20161003_v3");
3669                 CL_PRINTF(cli_buf);
3670 #endif
3671
3672         /* wifi status */
3673         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
3674                    "============[Wifi Status]============");
3675         CL_PRINTF(cli_buf);
3676         btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_WIFI_STATUS);
3677
3678         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
3679                    "============[BT Status]============");
3680         CL_PRINTF(cli_buf);
3681
3682         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ",
3683                    "BT [status/ rssi/ retryCnt]",
3684                    ((coex_sta->bt_disabled) ? ("disabled") :    ((
3685                    coex_sta->c2h_bt_inquiry_page) ? ("inquiry/page scan")
3686                            : ((BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
3687                                coex_dm->bt_status) ? "non-connected idle" :
3688                 ((BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE == coex_dm->bt_status)
3689                                        ? "connected-idle" : "busy")))),
3690                    coex_sta->bt_rssi, coex_sta->bt_retry_cnt);
3691         CL_PRINTF(cli_buf);
3692
3693         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d",
3694                    "SCO/HID/PAN/A2DP",
3695                    stack_info->sco_exist, stack_info->hid_exist,
3696                    stack_info->pan_exist, stack_info->a2dp_exist);
3697         CL_PRINTF(cli_buf);
3698         btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_BT_LINK_INFO);
3699
3700         bt_info_ext = coex_sta->bt_info_ext;
3701         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s",
3702                    "BT Info A2DP rate",
3703                    (bt_info_ext & BIT(0)) ? "Basic rate" : "EDR rate");
3704         CL_PRINTF(cli_buf);
3705
3706         for (i = 0; i < BT_INFO_SRC_8192E_2ANT_MAX; i++) {
3707                 if (coex_sta->bt_info_c2h_cnt[i]) {
3708                         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3709                                 "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)",
3710                                    glbt_info_src_8192e_2ant[i],
3711                                    coex_sta->bt_info_c2h[i][0],
3712                                    coex_sta->bt_info_c2h[i][1],
3713                                    coex_sta->bt_info_c2h[i][2],
3714                                    coex_sta->bt_info_c2h[i][3],
3715                                    coex_sta->bt_info_c2h[i][4],
3716                                    coex_sta->bt_info_c2h[i][5],
3717                                    coex_sta->bt_info_c2h[i][6],
3718                                    coex_sta->bt_info_c2h_cnt[i]);
3719                         CL_PRINTF(cli_buf);
3720                 }
3721         }
3722
3723         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "SS Type",
3724                    coex_dm->cur_ss_type);
3725         CL_PRINTF(cli_buf);
3726
3727         /* Sw mechanism  */
3728         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
3729                    "============[Sw mechanism]============");
3730         CL_PRINTF(cli_buf);
3731         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ",
3732                    "SM1[ShRf/ LpRA/ LimDig]",
3733                    coex_dm->cur_rf_rx_lpf_shrink, coex_dm->cur_low_penalty_ra,
3734                    coex_dm->limited_dig);
3735         CL_PRINTF(cli_buf);
3736         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ",
3737                    "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]",
3738                    coex_dm->cur_agc_table_en, coex_dm->cur_adc_back_off,
3739                    coex_dm->cur_dac_swing_on, coex_dm->cur_dac_swing_lvl);
3740         CL_PRINTF(cli_buf);
3741
3742         /* Fw mechanism          */
3743         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
3744                    "============[Fw mechanism]============");
3745         CL_PRINTF(cli_buf);
3746
3747         ps_tdma_case = coex_dm->cur_ps_tdma;
3748         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3749                    "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (auto:%d)",
3750                    "PS TDMA",
3751                    coex_dm->ps_tdma_para[0], coex_dm->ps_tdma_para[1],
3752                    coex_dm->ps_tdma_para[2], coex_dm->ps_tdma_para[3],
3753                    coex_dm->ps_tdma_para[4], ps_tdma_case,
3754                    coex_dm->auto_tdma_adjust);
3755         CL_PRINTF(cli_buf);
3756
3757         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ",
3758                    "DecBtPwr/ IgnWlanAct",
3759                    coex_dm->cur_bt_dec_pwr_lvl, coex_dm->cur_ignore_wlan_act);
3760         CL_PRINTF(cli_buf);
3761
3762         /* Hw setting            */
3763         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
3764                    "============[Hw setting]============");
3765         CL_PRINTF(cli_buf);
3766
3767         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x",
3768                    "RF-A, 0x1e initVal",
3769                    coex_dm->bt_rf_0x1e_backup);
3770         CL_PRINTF(cli_buf);
3771
3772         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x",
3773                    "backup ARFR1/ARFR2/RL/AMaxTime",
3774                    coex_dm->backup_arfr_cnt1, coex_dm->backup_arfr_cnt2,
3775                    coex_dm->backup_retry_limit,
3776                    coex_dm->backup_ampdu_max_time);
3777         CL_PRINTF(cli_buf);
3778
3779         u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x430);
3780         u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x434);
3781         u16tmp[0] = btcoexist->btc_read_2byte(btcoexist, 0x42a);
3782         u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x456);
3783         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x",
3784                    "0x430/0x434/0x42a/0x456",
3785                    u32tmp[0], u32tmp[1], u16tmp[0], u8tmp[0]);
3786         CL_PRINTF(cli_buf);
3787
3788         u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc04);
3789         u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0xd04);
3790         u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x90c);
3791         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
3792                    "0xc04/ 0xd04/ 0x90c",
3793                    u32tmp[0], u32tmp[1], u32tmp[2]);
3794         CL_PRINTF(cli_buf);
3795
3796         u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x778);
3797         u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x880);
3798         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x778/0x880[29:25]",
3799                 u8tmp[0], (u32tmp[0] & 0x3e000000) >> 25);
3800         CL_PRINTF(cli_buf);
3801
3802         u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x92c);
3803         u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x930);
3804         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
3805                    "0x92c/ 0x930",
3806                    (u8tmp[0]), u32tmp[0]);
3807         CL_PRINTF(cli_buf);
3808
3809         u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x40);
3810         u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x4f);
3811         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
3812                    "0x40/ 0x4f",
3813                    u8tmp[0], u8tmp[1]);
3814         CL_PRINTF(cli_buf);
3815
3816         u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x550);
3817         u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x522);
3818         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
3819                    "0x550(bcn ctrl)/0x522",
3820                    u32tmp[0], u8tmp[0]);
3821         CL_PRINTF(cli_buf);
3822
3823         u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc50);
3824         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)",
3825                    u32tmp[0]);
3826         CL_PRINTF(cli_buf);
3827
3828         fa_ofdm = btcoexist->btc_phydm_query_PHY_counter(btcoexist,
3829                         PHYDM_INFO_FA_OFDM);
3830         fa_cck = btcoexist->btc_phydm_query_PHY_counter(btcoexist,
3831                         PHYDM_INFO_FA_CCK);
3832         cca_ofdm = btcoexist->btc_phydm_query_PHY_counter(btcoexist,
3833                         PHYDM_INFO_CCA_OFDM);
3834         cca_cck = btcoexist->btc_phydm_query_PHY_counter(btcoexist,
3835                         PHYDM_INFO_CCA_CCK);
3836
3837         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3838                    "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
3839                    "CCK-CCA/CCK-FA/OFDM-CCA/OFDM-FA",
3840                    cca_cck, fa_cck, cca_ofdm, fa_ofdm);
3841         CL_PRINTF(cli_buf);
3842
3843         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d",
3844                    "CRC_OK CCK/11g/11n/11n-agg",
3845                    coex_sta->crc_ok_cck, coex_sta->crc_ok_11g,
3846                    coex_sta->crc_ok_11n, coex_sta->crc_ok_11n_vht);
3847         CL_PRINTF(cli_buf);
3848
3849         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d",
3850                    "CRC_Err CCK/11g/11n/11n-agg",
3851                    coex_sta->crc_err_cck, coex_sta->crc_err_11g,
3852                    coex_sta->crc_err_11n, coex_sta->crc_err_11n_vht);
3853         CL_PRINTF(cli_buf);
3854
3855         u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6c0);
3856         u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x6c4);
3857         u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x6c8);
3858         u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x6cc);
3859         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3860                    "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
3861                    "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)",
3862                    u32tmp[0], u32tmp[1], u32tmp[2], u8tmp[0]);
3863         CL_PRINTF(cli_buf);
3864
3865         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
3866                    "0x770(hp rx[31:16]/tx[15:0])",
3867                    coex_sta->high_priority_rx, coex_sta->high_priority_tx);
3868         CL_PRINTF(cli_buf);
3869         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
3870                    "0x774(lp rx[31:16]/tx[15:0])",
3871                    coex_sta->low_priority_rx, coex_sta->low_priority_tx);
3872         CL_PRINTF(cli_buf);
3873 #if (BT_AUTO_REPORT_ONLY_8192E_2ANT == 1)
3874         halbtc8192e2ant_monitor_bt_ctr(btcoexist);
3875 #endif
3876         btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS);
3877 }
3878
3879
3880 void ex_halbtc8192e2ant_ips_notify(IN struct btc_coexist *btcoexist, IN u8 type)
3881 {
3882         if (BTC_IPS_ENTER == type) {
3883                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3884                             "[BTCoex], IPS ENTER notify\n");
3885                 BTC_TRACE(trace_buf);
3886                 coex_sta->under_ips = true;
3887                 halbtc8192e2ant_coex_all_off(btcoexist);
3888                 halbtc8192e2ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, false, true);
3889                 halbtc8192e2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true);
3890         } else if (BTC_IPS_LEAVE == type) {
3891                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3892                             "[BTCoex], IPS LEAVE notify\n");
3893                 BTC_TRACE(trace_buf);
3894                 coex_sta->under_ips = false;
3895                 halbtc8192e2ant_init_hw_config(btcoexist, false);
3896                 halbtc8192e2ant_init_coex_dm(btcoexist);
3897         }
3898 }
3899
3900 void ex_halbtc8192e2ant_lps_notify(IN struct btc_coexist *btcoexist, IN u8 type)
3901 {
3902         if (BTC_LPS_ENABLE == type) {
3903                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3904                             "[BTCoex], LPS ENABLE notify\n");
3905                 BTC_TRACE(trace_buf);
3906                 coex_sta->under_lps = true;
3907
3908         } else if (BTC_LPS_DISABLE == type) {
3909                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3910                             "[BTCoex], LPS DISABLE notify\n");
3911                 BTC_TRACE(trace_buf);
3912                 coex_sta->under_lps = false;
3913         }
3914 }
3915
3916 void ex_halbtc8192e2ant_scan_notify(IN struct btc_coexist *btcoexist,
3917                                     IN u8 type)
3918 {
3919         if (BTC_SCAN_START == type) {
3920                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3921                             "[BTCoex], SCAN START notify\n");
3922                 BTC_TRACE(trace_buf);
3923         } else if (BTC_SCAN_FINISH == type) {
3924                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3925                             "[BTCoex], SCAN FINISH notify\n");
3926                 BTC_TRACE(trace_buf);
3927                 btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
3928                                    &coex_sta->scan_ap_num);
3929
3930         }
3931 }
3932
3933 void ex_halbtc8192e2ant_connect_notify(IN struct btc_coexist *btcoexist,
3934                                        IN u8 type)
3935 {
3936         if (BTC_ASSOCIATE_START == type) {
3937                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3938                             "[BTCoex], CONNECT START notify\n");
3939                 BTC_TRACE(trace_buf);
3940                 coex_sta->wifi_is_high_pri_task = true;
3941                 coex_sta->cnt_wifi_high_pri = 2;
3942                 halbtc8192e2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, false);
3943                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32);
3944                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 11);
3945                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
3946         } else if (BTC_ASSOCIATE_FINISH == type) {
3947                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3948                             "[BTCoex], CONNECT FINISH notify\n");
3949                 BTC_TRACE(trace_buf);
3950                 coex_sta->wifi_is_high_pri_task = false;
3951                 halbtc8192e2ant_run_coexist_mechanism(btcoexist);
3952         }
3953 }
3954
3955 void ex_halbtc8192e2ant_media_status_notify(IN struct btc_coexist *btcoexist,
3956                 IN u8 type)
3957 {
3958         u8                      h2c_parameter[3] = {0};
3959         u32                     wifi_bw;
3960         u8                      wifi_central_chnl;
3961
3962         if (btcoexist->manual_control ||
3963             btcoexist->stop_coex_dm ||
3964             coex_sta->bt_disabled)
3965                 return;
3966
3967         if (BTC_MEDIA_CONNECT == type) {
3968                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3969                             "[BTCoex], MEDIA connect notify\n");
3970                 BTC_TRACE(trace_buf);
3971         } else {
3972                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3973                             "[BTCoex], MEDIA disconnect notify\n");
3974                 BTC_TRACE(trace_buf);
3975         }
3976
3977         /* only 2.4G we need to inform bt the chnl mask */
3978         btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL,
3979                            &wifi_central_chnl);
3980         if ((BTC_MEDIA_CONNECT == type) &&
3981             (wifi_central_chnl <= 14)) {
3982                 h2c_parameter[0] = 0x1;
3983                 h2c_parameter[1] = wifi_central_chnl;
3984                 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3985                 if (BTC_WIFI_BW_HT40 == wifi_bw)
3986                         h2c_parameter[2] = 0x30;
3987                 else
3988                         h2c_parameter[2] = 0x20;
3989         }
3990
3991         coex_dm->wifi_chnl_info[0] = h2c_parameter[0];
3992         coex_dm->wifi_chnl_info[1] = h2c_parameter[1];
3993         coex_dm->wifi_chnl_info[2] = h2c_parameter[2];
3994
3995         btcoexist->btc_fill_h2c(btcoexist, 0x66, 3, h2c_parameter);
3996 }
3997
3998 void ex_halbtc8192e2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
3999                 IN u8 type)
4000 {
4001         if (type == BTC_PACKET_DHCP) {
4002                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4003                             "[BTCoex], DHCP Packet notify\n");
4004                 BTC_TRACE(trace_buf);
4005         }
4006 }
4007
4008 void ex_halbtc8192e2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
4009                                        IN u8 *tmp_buf, IN u8 length)
4010 {
4011         u8                      bt_info = 0;
4012         u8                      i, rsp_source = 0;
4013         boolean                 bt_busy = false, limited_dig = false;
4014         boolean                 wifi_connected = false;
4015         static u8               bt_info_for_wifi_fw_count = 0;
4016
4017         coex_sta->c2h_bt_info_req_sent = false;
4018
4019         rsp_source = tmp_buf[0] & 0xf;
4020         if (rsp_source >= BT_INFO_SRC_8192E_2ANT_MAX)
4021                 rsp_source = BT_INFO_SRC_8192E_2ANT_WIFI_FW;
4022         coex_sta->bt_info_c2h_cnt[rsp_source]++;
4023
4024         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4025                     "[BTCoex], Bt info[%d], length=%d, hex data=[", rsp_source,
4026                     length);
4027         BTC_TRACE(trace_buf);
4028
4029         /*avoid mailbox issue*/
4030         if (rsp_source == BT_INFO_SRC_8192E_2ANT_WIFI_FW) {
4031                 bt_info_for_wifi_fw_count++;
4032                 if (bt_info_for_wifi_fw_count < 5)
4033                         return;
4034         } else
4035                 bt_info_for_wifi_fw_count = 0;
4036
4037         for (i = 0; i < length; i++) {
4038                 coex_sta->bt_info_c2h[rsp_source][i] = tmp_buf[i];
4039                 if (i == 1)
4040                         bt_info = tmp_buf[i];
4041                 if (i == length - 1) {
4042                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x]\n",
4043                                     tmp_buf[i]);
4044                         BTC_TRACE(trace_buf);
4045                 } else {
4046                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x, ",
4047                                     tmp_buf[i]);
4048                         BTC_TRACE(trace_buf);
4049                 }
4050         }
4051
4052         if (BT_INFO_SRC_8192E_2ANT_WIFI_FW != rsp_source) {
4053                 coex_sta->bt_retry_cnt =        /* [3:0] */
4054                         coex_sta->bt_info_c2h[rsp_source][2] & 0xf;
4055
4056                 coex_sta->bt_rssi =
4057                         coex_sta->bt_info_c2h[rsp_source][3] * 2 + 10;
4058
4059                 coex_sta->bt_info_ext =
4060                         coex_sta->bt_info_c2h[rsp_source][4];
4061
4062                 /* Here we need to resend some wifi info to BT */
4063                 /* because bt is reset and loss of the info. */
4064                 if ((coex_sta->bt_info_ext & BIT(1))) {
4065                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4066                                 "[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n");
4067                         BTC_TRACE(trace_buf);
4068                         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
4069                                            &wifi_connected);
4070                         if (wifi_connected)
4071                                 ex_halbtc8192e2ant_media_status_notify(
4072                                         btcoexist, BTC_MEDIA_CONNECT);
4073                         else
4074                                 ex_halbtc8192e2ant_media_status_notify(
4075                                         btcoexist, BTC_MEDIA_DISCONNECT);
4076                 }
4077
4078                 if (coex_sta->bt_info_ext & BIT(2)) {
4079                         coex_sta->cnt_setup_link++;
4080                         coex_sta->is_setup_link = true;
4081
4082                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4083                                     "[BTCoex], Re-Link start in BT info!!\n");
4084                         BTC_TRACE(trace_buf);
4085                 } else
4086                         coex_sta->is_setup_link = false;
4087
4088                 if ((coex_sta->bt_info_ext & BIT(3))) {
4089                         if (!btcoexist->manual_control &&
4090                             !btcoexist->stop_coex_dm) {
4091                                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4092                                         "[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n");
4093                                 BTC_TRACE(trace_buf);
4094                                 halbtc8192e2ant_ignore_wlan_act(btcoexist,
4095                                                         FORCE_EXEC, false);
4096                         }
4097                 } else {
4098                         /* BT already NOT ignore Wlan active, do nothing here. */
4099                 }
4100
4101 #if (BT_AUTO_REPORT_ONLY_8192E_2ANT == 0)
4102                 if ((coex_sta->bt_info_ext & BIT(4))) {
4103                         /* BT auto report already enabled, do nothing */
4104                 } else
4105                         halbtc8192e2ant_bt_auto_report(btcoexist, FORCE_EXEC,
4106                                                        true);
4107 #endif
4108         }
4109
4110         /* check BIT2 first ==> check if bt is under inquiry or page scan */
4111         if (bt_info & BT_INFO_8192E_2ANT_B_INQ_PAGE)
4112                 coex_sta->c2h_bt_inquiry_page = true;
4113         else
4114                 coex_sta->c2h_bt_inquiry_page = false;
4115
4116         /* set link exist status */
4117         if (!(bt_info & BT_INFO_8192E_2ANT_B_CONNECTION)) {
4118                 coex_sta->bt_link_exist = false;
4119                 coex_sta->pan_exist = false;
4120                 coex_sta->a2dp_exist = false;
4121                 coex_sta->hid_exist = false;
4122                 coex_sta->sco_exist = false;
4123         } else {        /* connection exists */
4124                 coex_sta->bt_link_exist = true;
4125                 if (bt_info & BT_INFO_8192E_2ANT_B_FTP)
4126                         coex_sta->pan_exist = true;
4127                 else
4128                         coex_sta->pan_exist = false;
4129                 if (bt_info & BT_INFO_8192E_2ANT_B_A2DP)
4130                         coex_sta->a2dp_exist = true;
4131                 else
4132                         coex_sta->a2dp_exist = false;
4133                 if (bt_info & BT_INFO_8192E_2ANT_B_HID)
4134                         coex_sta->hid_exist = true;
4135                 else
4136                         coex_sta->hid_exist = false;
4137                 if (bt_info & BT_INFO_8192E_2ANT_B_SCO_ESCO)
4138                         coex_sta->sco_exist = true;
4139                 else
4140                         coex_sta->sco_exist = false;
4141         }
4142
4143         halbtc8192e2ant_update_bt_link_info(btcoexist);
4144
4145         if (!(bt_info & BT_INFO_8192E_2ANT_B_CONNECTION)) {
4146                 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE;
4147                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4148                         "[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n");
4149                 BTC_TRACE(trace_buf);
4150         } else if (bt_info ==
4151                 BT_INFO_8192E_2ANT_B_CONNECTION) {      /* connection exists but no busy */
4152                 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE;
4153                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4154                             "[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n");
4155                 BTC_TRACE(trace_buf);
4156         } else if ((bt_info & BT_INFO_8192E_2ANT_B_SCO_ESCO) ||
4157                    (bt_info & BT_INFO_8192E_2ANT_B_SCO_BUSY)) {
4158                 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_SCO_BUSY;
4159                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4160                             "[BTCoex], BtInfoNotify(), BT SCO busy!!!\n");
4161                 BTC_TRACE(trace_buf);
4162         } else if (bt_info & BT_INFO_8192E_2ANT_B_ACL_BUSY) {
4163                 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_ACL_BUSY;
4164                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4165                             "[BTCoex], BtInfoNotify(), BT ACL busy!!!\n");
4166                 BTC_TRACE(trace_buf);
4167         } else {
4168                 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_MAX;
4169                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4170                         "[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n");
4171                 BTC_TRACE(trace_buf);
4172         }
4173
4174         if ((BT_8192E_2ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) ||
4175             (BT_8192E_2ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
4176             (BT_8192E_2ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status)) {
4177                 bt_busy = true;
4178                 limited_dig = true;
4179         } else {
4180                 bt_busy = false;
4181                 limited_dig = false;
4182         }
4183
4184         btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy);
4185
4186         coex_dm->limited_dig = limited_dig;
4187         btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_LIMITED_DIG, &limited_dig);
4188
4189         halbtc8192e2ant_run_coexist_mechanism(btcoexist);
4190 }
4191
4192 void ex_halbtc8192e2ant_halt_notify(IN struct btc_coexist *btcoexist)
4193 {
4194         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Halt notify\n");
4195         BTC_TRACE(trace_buf);
4196
4197         halbtc8192e2ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, false, true);
4198         halbtc8192e2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true);
4199         ex_halbtc8192e2ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT);
4200 }
4201
4202 void ex_halbtc8192e2ant_periodical(IN struct btc_coexist *btcoexist)
4203 {
4204         boolean                 wifi_connected = false;
4205         static u8                       count = 0;
4206         static boolean          pre_wifi_connected = false;
4207
4208         if ((coex_sta->bt_coex_supported_version == 0) ||
4209             (coex_sta->bt_coex_supported_version == 0xffff))
4210                 coex_sta->bt_coex_supported_version =
4211                         btcoexist->btc_get_bt_coex_supported_version(btcoexist);
4212
4213
4214 /*If wifi is connecting, the update of wifi channel mask may fail caused by wifi FW*/
4215         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, &wifi_connected);
4216
4217         if (pre_wifi_connected != wifi_connected)
4218                 count = 0;
4219
4220         if  (count < 10)
4221                 count++;
4222
4223         if (count == 2) {
4224                 if (wifi_connected)
4225                         ex_halbtc8192e2ant_media_status_notify(btcoexist, BTC_MEDIA_CONNECT);
4226                 else
4227                         ex_halbtc8192e2ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT);
4228         }
4229
4230         pre_wifi_connected = wifi_connected;
4231 /*If wifi is connecting, the update of wifi channel mask may fail caused by wifi FW*/
4232
4233
4234 #if (BT_AUTO_REPORT_ONLY_8192E_2ANT == 0)
4235         halbtc8192e2ant_query_bt_info(btcoexist);
4236         halbtc8192e2ant_monitor_bt_ctr(btcoexist);
4237         halbtc8192e2ant_monitor_wifi_ctr(btcoexist);
4238         halbtc8192e2ant_monitor_bt_enable_disable(btcoexist);
4239 #else
4240         halbtc8192e2ant_monitor_wifi_ctr(btcoexist);
4241
4242         if (halbtc8192e2ant_is_wifi_status_changed(btcoexist) ||
4243             coex_dm->auto_tdma_adjust)
4244                 halbtc8192e2ant_run_coexist_mechanism(btcoexist);
4245 #endif
4246 }
4247
4248 #endif
4249
4250 #endif  /* #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) */