rtl8821ce/hal/phydm/halrf/halrf_powertracking_ap.h

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2007 - 2017 Realtek Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12  * more details.
  13  *
  14  *****************************************************************************/
  15
  16 #ifndef __HALRF_POWERTRACKING_H__
  17 #define __HALRF_POWERTRACKING_H__
  18
  19 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
  20         #ifdef RTK_AC_SUPPORT
  21                 #define ODM_IC_11AC_SERIES_SUPPORT              1
  22         #else
  23                 #define ODM_IC_11AC_SERIES_SUPPORT              0
  24         #endif
  25 #else
  26         #define ODM_IC_11AC_SERIES_SUPPORT              1
  27 #endif
  28
  29 #define         DPK_DELTA_MAPPING_NUM   13
  30 #define         index_mapping_HP_NUM    15
  31 #define         DELTA_SWINGIDX_SIZE     30
  32 #define         DELTA_SWINTSSI_SIZE     61
  33 #define         BAND_NUM                                3
  34 #define         MAX_RF_PATH     4
  35 #define         TXSCALE_TABLE_SIZE              37
  36 #define         CCK_TABLE_SIZE_8723D            41
  37 /* JJ ADD 20161014 */
  38 #define         CCK_TABLE_SIZE_8710B            41
  39
  40 #define IQK_MAC_REG_NUM         4
  41 #define IQK_ADDA_REG_NUM                16
  42 #define IQK_BB_REG_NUM_MAX      10
  43
  44 #define IQK_BB_REG_NUM          9
  45
  46 #define AVG_THERMAL_NUM         8
  47 #define AVG_THERMAL_NUM_DPK             8
  48 #define THERMAL_DPK_AVG_NUM             4
  49
  50 #define iqk_matrix_reg_num      8
  51 /* #define IQK_MATRIX_SETTINGS_NUM      1+24+21 */
  52 #define IQK_MATRIX_SETTINGS_NUM (14+24+21) /* Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G */
  53
  54 #if !defined(_OUTSRC_COEXIST)
  55         #define OFDM_TABLE_SIZE_92D     43
  56         #define OFDM_TABLE_SIZE 37
  57         #define CCK_TABLE_SIZE          33
  58         #define CCK_TABLE_SIZE_88F      21
  59         #define CCK_TABLE_SIZE_8192F    41
  60
  61
  62
  63         /* #define      OFDM_TABLE_SIZE_92E     54 */
  64         /* #define      CCK_TABLE_SIZE_92E      54 */
  65         extern  u32 ofdm_swing_table[OFDM_TABLE_SIZE_92D];
  66         extern  u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8];
  67         extern  u8 cck_swing_table_ch14[CCK_TABLE_SIZE][8];
  68
  69
  70         extern  u32 ofdm_swing_table_new[OFDM_TABLE_SIZE_92D];
  71         extern  u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8];
  72         extern  u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8];
  73         extern  u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16];
  74         extern  u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16];
  75         extern  u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16];
  76         extern  u32 cck_swing_table_ch1_ch14_8192f[CCK_TABLE_SIZE_8192F];
  77
  78 #endif
  79
  80 #define ODM_OFDM_TABLE_SIZE     37
  81 #define ODM_CCK_TABLE_SIZE              33
  82 /* <20140613, YuChen> In case fail to read TxPowerTrack.txt, we use the table of 88E as the default table. */
  83 extern u8 delta_swing_table_idx_2ga_p_default[DELTA_SWINGIDX_SIZE];
  84 extern u8 delta_swing_table_idx_2ga_n_default[DELTA_SWINGIDX_SIZE];
  85
  86 static u8 delta_swing_table_idx_2ga_p_8188e[] = {0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4,  4,  4,  4,  4,  4,  5,  5,  7,  7,  8,  8,  8,  9,  9,  9,  9,  9};
  87 static u8 delta_swing_table_idx_2ga_n_8188e[] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5,  6,  6,  7,  7,  7,  7,  8,  8,  9,  9, 10, 10, 10, 11, 11, 11, 11};
  88
  89 /* extern       u32 ofdm_swing_table_92e[OFDM_TABLE_SIZE_92E];
  90  * extern       u8 cck_swing_table_ch1_ch13_92e[CCK_TABLE_SIZE_92E][8];
  91  * extern       u8 cck_swing_table_ch14_92e[CCK_TABLE_SIZE_92E][8]; */
  92
  93 #ifdef CONFIG_WLAN_HAL_8192EE
  94         #define OFDM_TABLE_SIZE_92E     54
  95         #define CCK_TABLE_SIZE_92E      54
  96         extern  u32 ofdm_swing_table_92e[OFDM_TABLE_SIZE_92E];
  97         extern  u8 cck_swing_table_ch1_ch13_92e[CCK_TABLE_SIZE_92E][8];
  98         extern  u8 cck_swing_table_ch14_92e[CCK_TABLE_SIZE_92E][8];
  99 #endif
 100
 101 #define OFDM_TABLE_SIZE_8812    43
 102 #define AVG_THERMAL_NUM_8812    4
 103
 104 #if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 ||\
 105         RTL8821C_SUPPORT == 1 || RTL8198F_SUPPORT == 1)
 106         extern u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE];
 107         #elif(ODM_IC_11AC_SERIES_SUPPORT)
 108         extern unsigned int ofdm_swing_table_8812[OFDM_TABLE_SIZE_8812];
 109 #endif
 110
 111 extern u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D];
 112 /* JJ ADD 20161014 */
 113 extern u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B];
 114
 115 #define dm_check_txpowertracking        odm_txpowertracking_check
 116
 117 struct iqk_matrix_regs_setting {
 118         boolean is_iqk_done;
 119         s32             value[1][iqk_matrix_reg_num];
 120 };
 121
 122 struct dm_rf_calibration_struct {
 123         /* for tx power tracking */
 124
 125         u32     rega24; /* for TempCCK */
 126         s32     rege94;
 127         s32     rege9c;
 128         s32     regeb4;
 129         s32     regebc;
 130
 131         /* u8 is_txpowertracking; */
 132         u8      tx_powercount;
 133         boolean is_txpowertracking_init;
 134         boolean is_txpowertracking;
 135         u8      txpowertrack_control; /* for mp mode, turn off txpwrtracking as default */
 136         u8      tm_trigger;
 137         u8      internal_pa_5g[2];      /* pathA / pathB */
 138
 139         u8      thermal_meter[2];    /* thermal_meter, index 0 for RFIC0, and 1 for RFIC1 */
 140         u8      thermal_value;
 141         u8      thermal_value_lck;
 142         u8      thermal_value_iqk;
 143         s8      thermal_value_delta; /* delta of thermal_value and efuse thermal */
 144
 145         u8      thermal_value_avg[AVG_THERMAL_NUM];
 146         u8      thermal_value_avg_index;
 147         u8      thermal_value_rx_gain;
 148         u8      thermal_value_crystal;
 149         u8      thermal_value_dpk_store;
 150         u8      thermal_value_dpk_track;
 151         boolean txpowertracking_in_progress;
 152
 153
 154         boolean is_reloadtxpowerindex;
 155         u8      is_rf_pi_enable;
 156         u32     txpowertracking_callback_cnt; /* cosa add for debug */
 157
 158         u8      is_cck_in_ch14;
 159         u8      CCK_index;
 160         u8      OFDM_index[MAX_RF_PATH];
 161         s8      power_index_offset;
 162         s8      delta_power_index;
 163         s8      delta_power_index_last;
 164         boolean is_tx_power_changed;
 165
 166         struct iqk_matrix_regs_setting iqk_matrix_reg_setting[IQK_MATRIX_SETTINGS_NUM];
 167         u8      delta_lck;
 168         u8  delta_swing_table_idx_2g_cck_a_p[DELTA_SWINGIDX_SIZE];
 169         u8  delta_swing_table_idx_2g_cck_a_n[DELTA_SWINGIDX_SIZE];
 170         u8  delta_swing_table_idx_2g_cck_b_p[DELTA_SWINGIDX_SIZE];
 171         u8  delta_swing_table_idx_2g_cck_b_n[DELTA_SWINGIDX_SIZE];
 172         u8  delta_swing_table_idx_2g_cck_c_p[DELTA_SWINGIDX_SIZE];
 173         u8  delta_swing_table_idx_2g_cck_c_n[DELTA_SWINGIDX_SIZE];
 174         u8  delta_swing_table_idx_2g_cck_d_p[DELTA_SWINGIDX_SIZE];
 175         u8  delta_swing_table_idx_2g_cck_d_n[DELTA_SWINGIDX_SIZE];
 176         u8  delta_swing_table_idx_2ga_p[DELTA_SWINGIDX_SIZE];
 177         u8  delta_swing_table_idx_2ga_n[DELTA_SWINGIDX_SIZE];
 178         u8  delta_swing_table_idx_2gb_p[DELTA_SWINGIDX_SIZE];
 179         u8  delta_swing_table_idx_2gb_n[DELTA_SWINGIDX_SIZE];
 180         u8  delta_swing_table_idx_2gc_p[DELTA_SWINGIDX_SIZE];
 181         u8  delta_swing_table_idx_2gc_n[DELTA_SWINGIDX_SIZE];
 182         u8  delta_swing_table_idx_2gd_p[DELTA_SWINGIDX_SIZE];
 183         u8  delta_swing_table_idx_2gd_n[DELTA_SWINGIDX_SIZE];
 184         u8  delta_swing_table_idx_5ga_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
 185         u8  delta_swing_table_idx_5ga_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
 186         u8  delta_swing_table_idx_5gb_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
 187         u8  delta_swing_table_idx_5gb_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
 188         u8  delta_swing_table_idx_5gc_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
 189         u8  delta_swing_table_idx_5gc_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
 190         u8  delta_swing_table_idx_5gd_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
 191         u8  delta_swing_table_idx_5gd_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
 192         u8  delta_swing_tssi_table_2g_cck_a[DELTA_SWINTSSI_SIZE];
 193         u8  delta_swing_tssi_table_2g_cck_b[DELTA_SWINTSSI_SIZE];
 194         u8  delta_swing_tssi_table_2g_cck_c[DELTA_SWINTSSI_SIZE];
 195         u8  delta_swing_tssi_table_2g_cck_d[DELTA_SWINTSSI_SIZE];
 196         u8  delta_swing_tssi_table_2ga[DELTA_SWINTSSI_SIZE];
 197         u8  delta_swing_tssi_table_2gb[DELTA_SWINTSSI_SIZE];
 198         u8  delta_swing_tssi_table_2gc[DELTA_SWINTSSI_SIZE];
 199         u8  delta_swing_tssi_table_2gd[DELTA_SWINTSSI_SIZE];
 200         u8  delta_swing_tssi_table_5ga[BAND_NUM][DELTA_SWINTSSI_SIZE];
 201         u8  delta_swing_tssi_table_5gb[BAND_NUM][DELTA_SWINTSSI_SIZE];
 202         u8  delta_swing_tssi_table_5gc[BAND_NUM][DELTA_SWINTSSI_SIZE];
 203         u8  delta_swing_tssi_table_5gd[BAND_NUM][DELTA_SWINTSSI_SIZE];
 204         s8  delta_swing_table_xtal_p[DELTA_SWINGIDX_SIZE];
 205         s8  delta_swing_table_xtal_n[DELTA_SWINGIDX_SIZE];
 206         u8  delta_swing_table_idx_2ga_p_8188e[DELTA_SWINGIDX_SIZE];
 207         u8  delta_swing_table_idx_2ga_n_8188e[DELTA_SWINGIDX_SIZE];
 208
 209         u8                      bb_swing_idx_ofdm[MAX_RF_PATH];
 210         u8                      bb_swing_idx_ofdm_current;
 211 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
 212         u8                      bb_swing_idx_ofdm_base[MAX_RF_PATH];
 213 #else
 214         u8                      bb_swing_idx_ofdm_base;
 215 #endif
 216         boolean                 bb_swing_flag_ofdm;
 217         u8                      bb_swing_idx_cck;
 218         u8                      bb_swing_idx_cck_current;
 219         u8                      bb_swing_idx_cck_base;
 220         u8                      default_ofdm_index;
 221         u8                      default_cck_index;
 222         boolean                 bb_swing_flag_cck;
 223
 224         s8                      absolute_ofdm_swing_idx[MAX_RF_PATH];
 225         s8                      remnant_ofdm_swing_idx[MAX_RF_PATH];
 226         s8                      absolute_cck_swing_idx[MAX_RF_PATH];
 227         s8                      remnant_cck_swing_idx;
 228         s8                      modify_tx_agc_value;       /*Remnat compensate value at tx_agc */
 229         boolean                 modify_tx_agc_flag_path_a;
 230         boolean                 modify_tx_agc_flag_path_b;
 231         boolean                 modify_tx_agc_flag_path_c;
 232         boolean                 modify_tx_agc_flag_path_d;
 233         boolean                 modify_tx_agc_flag_path_a_cck;
 234         boolean                 modify_tx_agc_flag_path_b_cck;
 235
 236         s8                      kfree_offset[MAX_RF_PATH];
 237
 238         /* -------------------------------------------------------------------- */
 239
 240         /* for IQK */
 241         u32     regc04;
 242         u32     reg874;
 243         u32     regc08;
 244         u32     regb68;
 245         u32     regb6c;
 246         u32     reg870;
 247         u32     reg860;
 248         u32     reg864;
 249
 250         boolean is_iqk_initialized;
 251         boolean is_lck_in_progress;
 252         boolean is_antenna_detected;
 253         boolean is_need_iqk;
 254         boolean is_iqk_in_progress;
 255         boolean is_iqk_pa_off;
 256         u8      delta_iqk;
 257         u32     ADDA_backup[IQK_ADDA_REG_NUM];
 258         u32     IQK_MAC_backup[IQK_MAC_REG_NUM];
 259         u32     IQK_BB_backup_recover[9];
 260         u32     IQK_BB_backup[IQK_BB_REG_NUM];
 261         u32     tx_iqc_8723b[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */
 262         u32     rx_iqc_8723b[2][2][2]; /* { {S1: 0xc14, 0xca0} ,           {S0: 0xc14, 0xca0}} */
 263         u32     tx_iqc_8703b[3][2];     /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/
 264         u32     rx_iqc_8703b[2][2];     /* { {S1: 0xc14, 0xca0} ,           {S0: 0xc14, 0xca0}}*/
 265
 266         u64     iqk_start_time;
 267         u64     iqk_total_progressing_time;
 268         u64     iqk_progressing_time;
 269         u64     lck_progressing_time;
 270         u32  lok_result;
 271         u8      iqk_step;
 272         u8      kcount;
 273         u8      retry_count[4][2]; /* [4]: path ABCD, [2] TXK, RXK */
 274         boolean is_mp_mode;
 275
 276         /* for APK */
 277         u32     ap_koutput[2][2]; /* path A/B; output1_1a/output1_2a */
 278         u8      is_ap_kdone;
 279         u8      is_apk_thermal_meter_ignore;
 280         u8      is_dp_done;
 281 #if 0 /*move below members to halrf_dpk.h*/
 282         u8      is_dp_path_aok;
 283         u8      is_dp_path_bok;
 284         u8      is_dp_path_cok;
 285         u8      is_dp_path_dok;
 286         u8      dp_path_a_result[3];
 287         u8      dp_path_b_result[3];
 288         u8      dp_path_c_result[3];
 289         u8      dp_path_d_result[3];
 290         boolean is_dpk_enable;
 291         u32     txrate[11];
 292         u8      pwsf_2g_a[3];
 293         u8      pwsf_2g_b[3];
 294         u8      pwsf_2g_c[3];
 295         u8      pwsf_2g_d[3];
 296         u32     lut_2g_even_a[3][64];
 297         u32     lut_2g_odd_a[3][64];
 298         u32     lut_2g_even_b[3][64];
 299         u32     lut_2g_odd_b[3][64];
 300         u32     lut_2g_even_c[3][64];
 301         u32     lut_2g_odd_c[3][64];
 302         u32     lut_2g_even_d[3][64];
 303         u32     lut_2g_odd_d[3][64];
 304         u1Byte  is_5g_pdk_a_ok;
 305         u1Byte  is_5g_pdk_b_ok;
 306         u1Byte  is_5g_pdk_c_ok;
 307         u1Byte  is_5g_pdk_d_ok;
 308         u1Byte  pwsf_5g_a[9];
 309         u1Byte  pwsf_5g_b[9];
 310         u1Byte  pwsf_5g_c[9];
 311         u1Byte  pwsf_5g_d[9];
 312         u4Byte  lut_5g_even_a[9][16];
 313         u4Byte  lut_5g_odd_a[9][16];
 314         u4Byte  lut_5g_even_b[9][16];
 315         u4Byte  lut_5g_odd_b[9][16];
 316         u4Byte  lut_5g_even_c[9][16];
 317         u4Byte  lut_5g_odd_c[9][16];
 318         u4Byte  lut_5g_even_d[9][16];
 319         u4Byte  lut_5g_odd_d[9][16];
 320         u8      thermal_value_dpk;
 321         u8      thermal_value_dpk_avg[AVG_THERMAL_NUM_DPK];
 322         u8      thermal_value_dpk_avg_index;
 323 #endif
 324         s8  modify_tx_agc_value_ofdm;
 325         s8  modify_tx_agc_value_cck;
 326
 327         /*Add by Yuchen for Kfree Phydm*/
 328         u8                      reg_rf_kfree_enable;    /*for registry*/
 329         u8                      rf_kfree_enable;                /*for efuse enable check*/
 330         u32     tx_lok[2];
 331 };
 332
 333 void
 334 odm_txpowertracking_check_ap(
 335         void            *dm_void
 336 );
 337
 338 void
 339 odm_txpowertracking_check(
 340         void            *dm_void
 341 );
 342
 343
 344 void
 345 odm_txpowertracking_thermal_meter_init(
 346         void            *dm_void
 347 );
 348
 349 void
 350 odm_txpowertracking_init(
 351         void            *dm_void
 352 );
 353
 354 void
 355 odm_txpowertracking_check_mp(
 356         void            *dm_void
 357 );
 358
 359
 360 void
 361 odm_txpowertracking_check_ce(
 362         void            *dm_void
 363 );
 364
 365
 366 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
 367
 368 void
 369 odm_txpowertracking_callback_thermal_meter92c(
 370         void    *adapter
 371 );
 372
 373 void
 374 odm_txpowertracking_callback_rx_gain_thermal_meter92d(
 375         void    *adapter
 376 );
 377
 378 void
 379 odm_txpowertracking_callback_thermal_meter92d(
 380         void    *adapter
 381 );
 382
 383 void
 384 odm_txpowertracking_direct_call92c(
 385         void            *adapter
 386 );
 387
 388 void
 389 odm_txpowertracking_thermal_meter_check(
 390         void            *adapter
 391 );
 392
 393 #endif
 394
 395
 396
 397 #endif  /*#ifndef __HALRF_POWER_TRACKING_H__*/