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Add rtl8821ce driver version 5.5.2
[android-x86/external-kernel-drivers.git] / rtl8821ce / hal / phydm / phydm_dynamic_rx_path.c
1 /******************************************************************************
2  *
3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12  * more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program; if not, write to the Free Software Foundation, Inc.,
16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17  *
18  *
19  ******************************************************************************/
20
21 /* ************************************************************
22  * include files
23  * ************************************************************ */
24 #include "mp_precomp.h"
25 #include "phydm_precomp.h"
26
27 #if (CONFIG_DYNAMIC_RX_PATH == 1)
28
29 void
30 phydm_process_phy_status_for_dynamic_rx_path(
31         void                    *p_dm_void,
32         void                    *p_phy_info_void,
33         void                    *p_pkt_info_void
34 )
35 {
36         struct PHY_DM_STRUCT                            *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
37         struct _odm_phy_status_info_            *p_phy_info = (struct _odm_phy_status_info_ *)p_phy_info_void;
38         struct _odm_per_pkt_info_               *p_pktinfo = (struct _odm_per_pkt_info_ *)p_pkt_info_void;
39         struct _DYNAMIC_RX_PATH_                                        *p_dm_drp_table = &(p_dm_odm->dm_drp_table);
40         /*u8                                    is_cck_rate=0;*/
41
42
43
44 }
45
46 void
47 phydm_drp_get_statistic(
48         void                    *p_dm_void
49 )
50 {
51         struct PHY_DM_STRUCT                                    *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
52         struct _DYNAMIC_RX_PATH_                                                *p_dm_drp_table = &(p_dm_odm->dm_drp_table);
53         struct _FALSE_ALARM_STATISTICS          *false_alm_cnt = (struct _FALSE_ALARM_STATISTICS *)phydm_get_structure(p_dm_odm, PHYDM_FALSEALMCNT);
54
55         odm_false_alarm_counter_statistics(p_dm_odm);
56
57         ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_RX_PATH, ODM_DBG_LOUD, ("[CCA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n",
58                 false_alm_cnt->cnt_cck_cca, false_alm_cnt->cnt_ofdm_cca, false_alm_cnt->cnt_cca_all));
59
60         ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_RX_PATH, ODM_DBG_LOUD, ("[FA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n",
61                 false_alm_cnt->cnt_cck_fail, false_alm_cnt->cnt_ofdm_fail, false_alm_cnt->cnt_all));
62 }
63
64 void
65 phydm_dynamic_rx_path(
66         void                    *p_dm_void
67 )
68 {
69         struct PHY_DM_STRUCT                            *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
70         struct _DYNAMIC_RX_PATH_                                        *p_dm_drp_table = &(p_dm_odm->dm_drp_table);
71         u8              training_set_timmer_en;
72         u8              curr_drp_state;
73         u32             rx_ok_cal;
74         u32             RSSI = 0;
75         struct _FALSE_ALARM_STATISTICS          *false_alm_cnt = (struct _FALSE_ALARM_STATISTICS *)phydm_get_structure(p_dm_odm, PHYDM_FALSEALMCNT);
76
77         if (!(p_dm_odm->support_ability & ODM_BB_DYNAMIC_RX_PATH)) {
78                 ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_RX_PATH, ODM_DBG_LOUD, ("[Return Init]   Not Support Dynamic RX PAth\n"));
79                 return;
80         }
81
82         ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_RX_PATH, ODM_DBG_LOUD, ("Current drp_state = ((%d))\n", p_dm_drp_table->drp_state));
83
84         curr_drp_state = p_dm_drp_table->drp_state;
85
86         if (p_dm_drp_table->drp_state == DRP_INIT_STATE) {
87
88                 phydm_drp_get_statistic(p_dm_odm);
89
90                 if (false_alm_cnt->cnt_crc32_ok_all > 20) {
91                         ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_RX_PATH, ODM_DBG_LOUD, ("[Stop DRP Training] cnt_crc32_ok_all = ((%d))\n", false_alm_cnt->cnt_crc32_ok_all));
92                         p_dm_drp_table->drp_state  = DRP_INIT_STATE;
93                         training_set_timmer_en = false;
94                 } else {
95                         ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_RX_PATH, ODM_DBG_LOUD, ("[Start DRP Training] cnt_crc32_ok_all = ((%d))\n", false_alm_cnt->cnt_crc32_ok_all));
96                         p_dm_drp_table->drp_state  = DRP_TRAINING_STATE_0;
97                         p_dm_drp_table->curr_rx_path = PHYDM_AB;
98                         training_set_timmer_en = true;
99                 }
100
101         } else if (p_dm_drp_table->drp_state == DRP_TRAINING_STATE_0) {
102
103                 phydm_drp_get_statistic(p_dm_odm);
104
105                 p_dm_drp_table->curr_cca_all_cnt_0 = false_alm_cnt->cnt_cca_all;
106                 p_dm_drp_table->curr_fa_all_cnt_0 = false_alm_cnt->cnt_all;
107
108                 p_dm_drp_table->drp_state  = DRP_TRAINING_STATE_1;
109                 p_dm_drp_table->curr_rx_path = PHYDM_B;
110                 training_set_timmer_en = true;
111
112         } else if (p_dm_drp_table->drp_state == DRP_TRAINING_STATE_1) {
113
114                 phydm_drp_get_statistic(p_dm_odm);
115
116                 p_dm_drp_table->curr_cca_all_cnt_1 = false_alm_cnt->cnt_cca_all;
117                 p_dm_drp_table->curr_fa_all_cnt_1 = false_alm_cnt->cnt_all;
118
119 #if 1
120                 p_dm_drp_table->drp_state  = DRP_DECISION_STATE;
121 #else
122
123                 if (p_dm_odm->mp_mode) {
124                         rx_ok_cal = p_dm_odm->phy_dbg_info.num_qry_phy_status_cck + p_dm_odm->phy_dbg_info.num_qry_phy_status_ofdm;
125                         RSSI = (rx_ok_cal != 0) ? p_dm_odm->rx_pwdb_ave / rx_ok_cal : 0;
126                         ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_RX_PATH, ODM_DBG_LOUD, ("MP RSSI = ((%d))\n", RSSI));
127                 }
128
129                 if (RSSI > p_dm_drp_table->rssi_threshold)
130
131                         p_dm_drp_table->drp_state  = DRP_DECISION_STATE;
132
133                 else  {
134
135                         p_dm_drp_table->drp_state  = DRP_TRAINING_STATE_2;
136                         p_dm_drp_table->curr_rx_path = PHYDM_A;
137                         training_set_timmer_en = true;
138                 }
139 #endif
140         } else if (p_dm_drp_table->drp_state == DRP_TRAINING_STATE_2) {
141
142                 phydm_drp_get_statistic(p_dm_odm);
143
144                 p_dm_drp_table->curr_cca_all_cnt_2 = false_alm_cnt->cnt_cca_all;
145                 p_dm_drp_table->curr_fa_all_cnt_2 = false_alm_cnt->cnt_all;
146                 p_dm_drp_table->drp_state  = DRP_DECISION_STATE;
147         }
148
149         if (p_dm_drp_table->drp_state == DRP_DECISION_STATE) {
150
151                 ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_RX_PATH, ODM_DBG_LOUD, ("Current drp_state = ((%d))\n", p_dm_drp_table->drp_state));
152
153                 ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_RX_PATH, ODM_DBG_LOUD, ("[0] {CCA, FA} = {%d, %d}\n", p_dm_drp_table->curr_cca_all_cnt_0, p_dm_drp_table->curr_fa_all_cnt_0));
154                 ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_RX_PATH, ODM_DBG_LOUD, ("[1] {CCA, FA} = {%d, %d}\n", p_dm_drp_table->curr_cca_all_cnt_1, p_dm_drp_table->curr_fa_all_cnt_1));
155                 ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_RX_PATH, ODM_DBG_LOUD, ("[2] {CCA, FA} = {%d, %d}\n", p_dm_drp_table->curr_cca_all_cnt_2, p_dm_drp_table->curr_fa_all_cnt_2));
156
157                 if (p_dm_drp_table->curr_fa_all_cnt_1 < p_dm_drp_table->curr_fa_all_cnt_0) {
158
159                         if ((p_dm_drp_table->curr_fa_all_cnt_0 - p_dm_drp_table->curr_fa_all_cnt_1) > p_dm_drp_table->fa_diff_threshold)
160                                 p_dm_drp_table->curr_rx_path = PHYDM_B;
161                         else
162                                 p_dm_drp_table->curr_rx_path = PHYDM_AB;
163                 } else
164                         p_dm_drp_table->curr_rx_path = PHYDM_AB;
165
166                 phydm_config_ofdm_rx_path(p_dm_odm, p_dm_drp_table->curr_rx_path);
167                 ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_RX_PATH, ODM_DBG_LOUD, ("[Training Result]  curr_rx_path = ((%s%s)),\n",
168                         ((p_dm_drp_table->curr_rx_path & PHYDM_A)  ? "A"  : " "), ((p_dm_drp_table->curr_rx_path & PHYDM_B)  ? "B"  : " ")));
169
170                 p_dm_drp_table->drp_state = DRP_INIT_STATE;
171                 training_set_timmer_en = false;
172         }
173
174         ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_RX_PATH, ODM_DBG_LOUD, ("DRP_state: ((%d)) -> ((%d))\n", curr_drp_state, p_dm_drp_table->drp_state));
175
176         if (training_set_timmer_en) {
177
178                 ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_RX_PATH, ODM_DBG_LOUD, ("[Training en]  curr_rx_path = ((%s%s)), training_time = ((%d ms))\n",
179                         ((p_dm_drp_table->curr_rx_path & PHYDM_A)  ? "A"  : " "), ((p_dm_drp_table->curr_rx_path & PHYDM_B)  ? "B"  : " "), p_dm_drp_table->training_time));
180
181                 phydm_config_ofdm_rx_path(p_dm_odm, p_dm_drp_table->curr_rx_path);
182                 odm_set_timer(p_dm_odm, &(p_dm_drp_table->phydm_dynamic_rx_path_timer), p_dm_drp_table->training_time); /*ms*/
183         } else
184                 ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_RX_PATH, ODM_DBG_LOUD, ("DRP period end\n\n", curr_drp_state, p_dm_drp_table->drp_state));
185
186 }
187
188 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
189 void
190 phydm_dynamic_rx_path_callback(
191         struct timer_list               *p_timer
192 )
193 {
194         struct _ADAPTER         *adapter = (struct _ADAPTER *)p_timer->adapter;
195         HAL_DATA_TYPE   *p_hal_data = GET_HAL_DATA(adapter);
196         struct PHY_DM_STRUCT            *p_dm_odm = &(p_hal_data->DM_OutSrc);
197         struct _DYNAMIC_RX_PATH_                        *p_dm_drp_table = &(p_dm_odm->dm_drp_table);
198
199 #if DEV_BUS_TYPE == RT_PCI_INTERFACE
200 #if USE_WORKITEM
201         odm_schedule_work_item(&(p_dm_drp_table->phydm_dynamic_rx_path_workitem));
202 #else
203         {
204                 /* dbg_print("phydm_dynamic_rx_path\n"); */
205                 phydm_dynamic_rx_path(p_dm_odm);
206         }
207 #endif
208 #else
209         odm_schedule_work_item(&(p_dm_drp_table->phydm_dynamic_rx_path_workitem));
210 #endif
211 }
212
213 void
214 phydm_dynamic_rx_path_workitem_callback(
215         void            *p_context
216 )
217 {
218         struct _ADAPTER         *p_adapter = (struct _ADAPTER *)p_context;
219         HAL_DATA_TYPE   *p_hal_data = GET_HAL_DATA(p_adapter);
220         struct PHY_DM_STRUCT            *p_dm_odm = &(p_hal_data->DM_OutSrc);
221
222         /* dbg_print("phydm_dynamic_rx_path\n"); */
223         phydm_dynamic_rx_path(p_dm_odm);
224 }
225 #else if (DM_ODM_SUPPORT_TYPE == ODM_CE)
226
227 void
228 phydm_dynamic_rx_path_callback(
229         void *function_context
230 )
231 {
232         struct PHY_DM_STRUCT    *p_dm_odm = (struct PHY_DM_STRUCT *)function_context;
233         struct _ADAPTER *padapter = p_dm_odm->adapter;
234
235         if (padapter->net_closed == _TRUE)
236                 return;
237
238 #if 0 /* Can't do I/O in timer callback*/
239         odm_s0s1_sw_ant_div(p_dm_odm, SWAW_STEP_DETERMINE);
240 #else
241         /*rtw_run_in_thread_cmd(padapter, odm_sw_antdiv_workitem_callback, padapter);*/
242 #endif
243 }
244
245 #endif
246
247 void
248 phydm_dynamic_rx_path_timers(
249         void            *p_dm_void,
250         u8              state
251 )
252 {
253         struct PHY_DM_STRUCT            *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
254         struct _DYNAMIC_RX_PATH_                        *p_dm_drp_table = &(p_dm_odm->dm_drp_table);
255
256         if (state == INIT_DRP_TIMMER) {
257
258                 odm_initialize_timer(p_dm_odm, &(p_dm_drp_table->phydm_dynamic_rx_path_timer),
259                         (void *)phydm_dynamic_rx_path_callback, NULL, "phydm_sw_antenna_switch_timer");
260         } else if (state == CANCEL_DRP_TIMMER)
261
262                 odm_cancel_timer(p_dm_odm, &(p_dm_drp_table->phydm_dynamic_rx_path_timer));
263
264         else if (state == RELEASE_DRP_TIMMER)
265
266                 odm_release_timer(p_dm_odm, &(p_dm_drp_table->phydm_dynamic_rx_path_timer));
267
268 }
269
270 void
271 phydm_dynamic_rx_path_init(
272         void                    *p_dm_void
273 )
274 {
275         struct PHY_DM_STRUCT                            *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
276         struct _DYNAMIC_RX_PATH_                                        *p_dm_drp_table = &(p_dm_odm->dm_drp_table);
277         boolean                 ret_value;
278
279         if (!(p_dm_odm->support_ability & ODM_BB_DYNAMIC_RX_PATH)) {
280                 ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_RX_PATH, ODM_DBG_LOUD, ("[Return]   Not Support Dynamic RX PAth\n"));
281                 return;
282         }
283         ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_RX_PATH, ODM_DBG_LOUD, ("phydm_dynamic_rx_path_init\n"));
284
285         p_dm_drp_table->drp_state = DRP_INIT_STATE;
286         p_dm_drp_table->rssi_threshold = DRP_RSSI_TH;
287         p_dm_drp_table->fa_count_thresold = 50;
288         p_dm_drp_table->fa_diff_threshold = 50;
289         p_dm_drp_table->training_time = 100; /*ms*/
290         p_dm_drp_table->drp_skip_counter = 0;
291         p_dm_drp_table->drp_period  = 0;
292         p_dm_drp_table->drp_init_finished = true;
293
294         ret_value = phydm_api_trx_mode(p_dm_odm, (enum odm_rf_path_e)(ODM_RF_A | ODM_RF_B), (enum odm_rf_path_e)(ODM_RF_A | ODM_RF_B), true);
295
296 }
297
298 void
299 phydm_drp_debug(
300         void            *p_dm_void,
301         u32             *const dm_value,
302         u32             *_used,
303         char                    *output,
304         u32             *_out_len
305 )
306 {
307         struct PHY_DM_STRUCT            *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
308         u32                     used = *_used;
309         u32                     out_len = *_out_len;
310         struct _DYNAMIC_RX_PATH_                        *p_dm_drp_table = &(p_dm_odm->dm_drp_table);
311
312         switch (dm_value[0])    {
313
314         case DRP_TRAINING_TIME:
315                 p_dm_drp_table->training_time = (u16)dm_value[1];
316                 break;
317         case DRP_TRAINING_PERIOD:
318                 p_dm_drp_table->drp_period = (u8)dm_value[1];
319                 break;
320         case DRP_RSSI_THRESHOLD:
321                 p_dm_drp_table->rssi_threshold = (u8)dm_value[1];
322                 break;
323         case DRP_FA_THRESHOLD:
324                 p_dm_drp_table->fa_count_thresold = dm_value[1];
325                 break;
326         case DRP_FA_DIFF_THRESHOLD:
327                 p_dm_drp_table->fa_diff_threshold = dm_value[1];
328                 break;
329         default:
330                 PHYDM_SNPRINTF((output + used, out_len - used, "[DRP] unknown command\n"));
331                 break;
332 }
333 }
334
335 void
336 phydm_dynamic_rx_path_caller(
337         void                    *p_dm_void
338 )
339 {
340         struct PHY_DM_STRUCT            *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
341         struct _DYNAMIC_RX_PATH_                        *p_dm_drp_table = &(p_dm_odm->dm_drp_table);
342
343         if (p_dm_drp_table->drp_skip_counter <  p_dm_drp_table->drp_period)
344                 p_dm_drp_table->drp_skip_counter++;
345         else
346                 p_dm_drp_table->drp_skip_counter = 0;
347
348         if (p_dm_drp_table->drp_skip_counter != 0)
349                 return;
350
351         if (p_dm_drp_table->drp_init_finished != true)
352                 return;
353
354         phydm_dynamic_rx_path(p_dm_odm);
355
356 }
357 #endif