1 /******************************************************************************
3 * Copyright(c) 2007 - 2017 Realtek Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
22 * Larry Finger <Larry.Finger@lwfinger.net>
24 *****************************************************************************/
26 #ifndef __PHYDM_PMAC_TX_SETTING_H__
27 #define __PHYDM_PMAC_TX_SETTING_H__
29 #define PMAC_TX_SETTING_VERSION "1.0"
31 /* @1 ============================================================
33 * 1 ============================================================
35 #define RANDOM_BY_PN32 0x12
36 /* @1 ============================================================
38 * 1 ============================================================
40 struct phydm_pmac_info {
41 u8 en_pmac_tx:1; /*@ disable pmac 1: enable pmac */
42 u8 mode:3; /*@ 0: Packet TX 3:Continuous TX */
44 u8 tx_rate; /* @should be HW rate*/
45 /* @u8 TX_RATE_HEX; */
48 u8 is_short_preamble:1;
52 u8 bw:3; /* @0:20 1:40 2:80Mhz */
53 u8 m_stbc; /* @bSTBC + 1 */
56 /* @u32 PacketLength; */
69 /* @u8 mac_addr[6]; */
72 struct phydm_pmac_tx {
83 /* @1 ============================================================
85 * 1 ============================================================
88 enum phydm_pmac_mode {
94 CCK_CARRIER_SIPPRESSION_TX
97 /* @1 ============================================================
98 * 1 function prototype
99 * 1 ============================================================
101 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
102 void phydm_start_cck_cont_tx_jgr3(void *dm_void,
103 struct phydm_pmac_info *tx_info);
105 void phydm_stop_cck_cont_tx_jgr3(void *dm_void);
107 void phydm_start_ofdm_cont_tx_jgr3(void *dm_void);
109 void phydm_stop_ofdm_cont_tx_jgr3(void *dm_void);
111 void phydm_set_single_tone_jgr3(void *dm_void, boolean is_single_tone,
112 boolean en_pmac_tx, u8 path);
114 void phydm_stop_pmac_tx_jgr3(void *dm_void, struct phydm_pmac_info *tx_info);
116 void phydm_set_mac_phy_txinfo_jgr3(void *dm_void,
117 struct phydm_pmac_info *tx_info);
119 void phydm_set_mac_hdr_jgr3(void *dm_void, struct phydm_pmac_info *tx_info);
121 void phydm_set_sig_jgr3(void *dm_void, struct phydm_pmac_info *tx_info);
123 void phydm_set_cck_preamble_hdr_jgr3(void *dm_void,
124 struct phydm_pmac_info *tx_info);
126 void phydm_set_mode_jgr3(void *dm_void, struct phydm_pmac_info *tx_info,
127 enum phydm_pmac_mode mode);
129 void phydm_set_pmac_txon_jgr3(void *dm_void, struct phydm_pmac_info *tx_info);
131 void phydm_set_pmac_tx_jgr3(void *dm_void, struct phydm_pmac_info *tx_info,
132 enum rf_path mpt_rf_path);
135 void phydm_start_cck_cont_tx(void *dm_void, struct phydm_pmac_info *tx_info);
137 void phydm_stop_cck_cont_tx(void *dm_void);
139 void phydm_start_ofdm_cont_tx(void *dm_void);
141 void phydm_stop_ofdm_cont_tx(void *dm_void);
143 void phydm_set_single_tone(void *dm_void, boolean is_single_tone,
144 boolean en_pmac_tx, u8 path);
146 void phydm_set_pmac_tx(void *dm_void, struct phydm_pmac_info *tx_info,
147 enum rf_path mpt_rf_path);