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Add rtl8821ce driver version 5.5.2
[android-x86/external-kernel-drivers.git] / rtl8821ce / hal / phydm / phydm_pmac_tx_setting.h
1 /******************************************************************************
2  *
3  * Copyright(c) 2007 - 2017  Realtek Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * The full GNU General Public License is included in this distribution in the
15  * file called LICENSE.
16  *
17  * Contact Information:
18  * wlanfae <wlanfae@realtek.com>
19  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20  * Hsinchu 300, Taiwan.
21  *
22  * Larry Finger <Larry.Finger@lwfinger.net>
23  *
24  *****************************************************************************/
25
26 #ifndef __PHYDM_PMAC_TX_SETTING_H__
27 #define __PHYDM_PMAC_TX_SETTING_H__
28
29 #define PMAC_TX_SETTING_VERSION "1.0"
30
31 /* @1 ============================================================
32  * 1  Definition
33  * 1 ============================================================
34  */
35 #define RANDOM_BY_PN32 0x12
36 /* @1 ============================================================
37  * 1  structure
38  * 1 ============================================================
39  */
40 struct phydm_pmac_info {
41         u8 en_pmac_tx:1; /*@ disable pmac 1: enable pmac */
42         u8 mode:3; /*@ 0: Packet TX 3:Continuous TX */
43         /* @u8 Ntx:4; */
44         u8 tx_rate; /* @should be HW rate*/
45         /* @u8 TX_RATE_HEX; */
46         u8 tx_sc;
47         /* @u8 bSGI:1; */
48         u8 is_short_preamble:1;
49         /* @u8 bSTBC:1; */
50         /* @u8 bLDPC:1; */
51         u8 ndp_sound:1;
52         u8 bw:3; /* @0:20 1:40 2:80Mhz */
53         u8 m_stbc; /* @bSTBC + 1 */
54         u16 packet_period;
55         u32 packet_count;
56         /* @u32 PacketLength; */
57         u8 packet_pattern;
58         u16 sfd;
59         u8 signal_field;
60         u8 service_field;
61         u16 length;
62         u8 crc16[2];
63         u8 lsig[3];
64         u8 ht_sig[6];
65         u8 vht_sig_a[6];
66         u8 vht_sig_b[4];
67         u8 vht_sig_b_crc;
68         u8 vht_delimiter[4];
69         /* @u8 mac_addr[6]; */
70 };
71
72 struct phydm_pmac_tx {
73         boolean is_cck_rate;
74         boolean is_ofdm_rate;
75         boolean is_ht_rate;
76         boolean is_vht_rate;
77         boolean cck_cont_tx;
78         boolean ofdm_cont_tx;
79         u8 path;
80         u32 tx_scailing;
81 };
82
83 /* @1 ============================================================
84  * 1  enumeration
85  * 1 ============================================================
86  */
87
88 enum phydm_pmac_mode {
89         NONE_TEST,
90         PKTS_TX,
91         PKTS_RX,
92         CONT_TX,
93         OFDM_SINGLE_TONE_TX,
94         CCK_CARRIER_SIPPRESSION_TX
95 };
96
97 /* @1 ============================================================
98  * 1  function prototype
99  * 1 ============================================================
100  */
101 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
102 void phydm_start_cck_cont_tx_jgr3(void *dm_void,
103                                   struct phydm_pmac_info *tx_info);
104
105 void phydm_stop_cck_cont_tx_jgr3(void *dm_void);
106
107 void phydm_start_ofdm_cont_tx_jgr3(void *dm_void);
108
109 void phydm_stop_ofdm_cont_tx_jgr3(void *dm_void);
110
111 void phydm_set_single_tone_jgr3(void *dm_void, boolean is_single_tone,
112                                 boolean en_pmac_tx, u8 path);
113
114 void phydm_stop_pmac_tx_jgr3(void *dm_void, struct phydm_pmac_info *tx_info);
115
116 void phydm_set_mac_phy_txinfo_jgr3(void *dm_void,
117                                    struct phydm_pmac_info *tx_info);
118
119 void phydm_set_mac_hdr_jgr3(void *dm_void, struct phydm_pmac_info *tx_info);
120
121 void phydm_set_sig_jgr3(void *dm_void, struct phydm_pmac_info *tx_info);
122
123 void phydm_set_cck_preamble_hdr_jgr3(void *dm_void,
124                                      struct phydm_pmac_info *tx_info);
125
126 void phydm_set_mode_jgr3(void *dm_void, struct phydm_pmac_info *tx_info,
127                          enum phydm_pmac_mode mode);
128
129 void phydm_set_pmac_txon_jgr3(void *dm_void, struct phydm_pmac_info *tx_info);
130
131 void phydm_set_pmac_tx_jgr3(void *dm_void, struct phydm_pmac_info *tx_info,
132                             enum rf_path mpt_rf_path);
133 #endif
134
135 void phydm_start_cck_cont_tx(void *dm_void, struct phydm_pmac_info *tx_info);
136
137 void phydm_stop_cck_cont_tx(void *dm_void);
138
139 void phydm_start_ofdm_cont_tx(void *dm_void);
140
141 void phydm_stop_ofdm_cont_tx(void *dm_void);
142
143 void phydm_set_single_tone(void *dm_void, boolean is_single_tone,
144                            boolean en_pmac_tx, u8 path);
145
146 void phydm_set_pmac_tx(void *dm_void, struct phydm_pmac_info *tx_info,
147                        enum rf_path mpt_rf_path);
148
149 #endif