1 /******************************************************************************
3 * Copyright(c) 2007 - 2017 Realtek Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
22 * Larry Finger <Larry.Finger@lwfinger.net>
24 *****************************************************************************/
26 /*Image2HeaderVersion: R3 1.0*/
27 #include "mp_precomp.h"
28 #include "../phydm_precomp.h"
30 #if (RTL8821C_SUPPORT == 1)
40 u32 cond1 = condition1, cond2 = condition2, cond3 = condition3, cond4 = condition4;
42 u8 cut_version_for_para = (dm->cut_version == ODM_CUT_A) ? 15 : dm->cut_version;
43 u8 pkg_type_for_para = (dm->package_type == 0) ? 15 : dm->package_type;
45 u32 driver1 = cut_version_for_para << 24 |
46 (dm->support_interface & 0xF0) << 16 |
47 dm->support_platform << 16 |
48 pkg_type_for_para << 12 |
49 (dm->support_interface & 0x0F) << 8 |
52 u32 driver2 = (dm->type_glna & 0xFF) << 0 |
53 (dm->type_gpa & 0xFF) << 8 |
54 (dm->type_alna & 0xFF) << 16 |
55 (dm->type_apa & 0xFF) << 24;
59 u32 driver4 = (dm->type_glna & 0xFF00) >> 8 |
60 (dm->type_gpa & 0xFF00) |
61 (dm->type_alna & 0xFF00) << 8 |
62 (dm->type_apa & 0xFF00) << 16;
64 PHYDM_DBG(dm, ODM_COMP_INIT,
65 "===> %s (cond1, cond2, cond3, cond4) = (0x%X 0x%X 0x%X 0x%X)\n",
66 __func__, cond1, cond2, cond3, cond4);
67 PHYDM_DBG(dm, ODM_COMP_INIT,
68 "===> %s (driver1, driver2, driver3, driver4) = (0x%X 0x%X 0x%X 0x%X)\n",
69 __func__, driver1, driver2, driver3, driver4);
71 PHYDM_DBG(dm, ODM_COMP_INIT,
72 " (Platform, Interface) = (0x%X, 0x%X)\n",
73 dm->support_platform, dm->support_interface);
74 PHYDM_DBG(dm, ODM_COMP_INIT, " (RFE, Package) = (0x%X, 0x%X)\n",
75 dm->rfe_type, dm->package_type);
78 /*============== value Defined Check ===============*/
79 /*cut version [27:24] need to do value check*/
80 if (((cond1 & 0x0F000000) != 0) && ((cond1 & 0x0F000000) != (driver1 & 0x0F000000)))
83 /*pkg type [15:12] need to do value check*/
84 if (((cond1 & 0x0000F000) != 0) && ((cond1 & 0x0000F000) != (driver1 & 0x0000F000)))
87 /*interface [11:8] need to do value check*/
88 if (((cond1 & 0x00000F00) != 0) && ((cond1 & 0x00000F00) != (driver1 & 0x00000F00)))
90 /*=============== Bit Defined Check ================*/
91 /* We don't care [31:28] */
94 driver1 &= 0x000000FF;
103 struct dm_struct *dm,
104 const u32 condition1,
111 /******************************************************************************
113 ******************************************************************************/
115 u32 array_mp_8821c_agc_tab[] = {
116 0x80001004, 0x00000000, 0x40000000, 0x00000000,
181 0x90001005, 0x00000000, 0x40000000, 0x00000000,
246 0xA0000000, 0x00000000,
311 0xB0000000, 0x00000000,
312 0x80001004, 0x00000000, 0x40000000, 0x00000000,
377 0x90001005, 0x00000000, 0x40000000, 0x00000000,
442 0xA0000000, 0x00000000,
507 0xB0000000, 0x00000000,
508 0x80001004, 0x00000000, 0x40000000, 0x00000000,
573 0x90001005, 0x00000000, 0x40000000, 0x00000000,
638 0xA0000000, 0x00000000,
703 0xB0000000, 0x00000000,
704 0x80001004, 0x00000000, 0x40000000, 0x00000000,
769 0x90001005, 0x00000000, 0x40000000, 0x00000000,
834 0xA0000000, 0x00000000,
899 0xB0000000, 0x00000000,
900 0x80001004, 0x00000000, 0x40000000, 0x00000000,
965 0x90001005, 0x00000000, 0x40000000, 0x00000000,
1030 0xA0000000, 0x00000000,
1095 0xB0000000, 0x00000000,
1096 0x80001004, 0x00000000, 0x40000000, 0x00000000,
1161 0x90001005, 0x00000000, 0x40000000, 0x00000000,
1226 0xA0000000, 0x00000000,
1291 0xB0000000, 0x00000000,
1292 0x80001004, 0x00000000, 0x40000000, 0x00000000,
1295 0x90001005, 0x00000000, 0x40000000, 0x00000000,
1298 0xA0000000, 0x00000000,
1301 0xB0000000, 0x00000000,
1306 odm_read_and_config_mp_8821c_agc_tab(struct dm_struct *dm)
1310 boolean is_matched = true, is_skipped = false;
1311 u32 array_len = sizeof(array_mp_8821c_agc_tab) / sizeof(u32);
1312 u32 *array = array_mp_8821c_agc_tab;
1314 u32 v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0;
1316 PHYDM_DBG(dm, ODM_COMP_INIT, "===> %s\n", __func__);
1318 while ((i + 1) < array_len) {
1322 if (v1 & (BIT(31) | BIT(30))) {/*positive & negative condition*/
1323 if (v1 & BIT(31)) {/* positive condition*/
1324 c_cond = (u8)((v1 & (BIT(29) | BIT(28))) >> 28);
1325 if (c_cond == COND_ENDIF) {/*end*/
1328 PHYDM_DBG(dm, ODM_COMP_INIT, "ENDIF\n");
1329 } else if (c_cond == COND_ELSE) { /*else*/
1330 is_matched = is_skipped ? false : true;
1331 PHYDM_DBG(dm, ODM_COMP_INIT, "ELSE\n");
1332 } else {/*if , else if*/
1335 PHYDM_DBG(dm, ODM_COMP_INIT, "IF or ELSE IF\n");
1337 } else if (v1 & BIT(30)) { /*negative condition*/
1338 if (is_skipped == false) {
1339 if (check_positive(dm, pre_v1, pre_v2, v1, v2)) {
1351 odm_config_bb_agc_8821c(dm, v1, MASKDWORD, v2);
1358 odm_get_version_mp_8821c_agc_tab(void)
1363 /******************************************************************************
1365 ******************************************************************************/
1367 u32 array_mp_8821c_agc_tab_diff_wlg[] = {
1368 0x80001004, 0x00000000, 0x40000000, 0x00000000,
1497 0x90001005, 0x00000000, 0x40000000, 0x00000000,
1626 0xA0000000, 0x00000000,
1755 0xB0000000, 0x00000000,
1758 u32 array_mp_8821c_agc_tab_diff_btg[] = {
1759 0x80001004, 0x00000000, 0x40000000, 0x00000000,
1888 0x90001005, 0x00000000, 0x40000000, 0x00000000,
2017 0xA0000000, 0x00000000,
2146 0xB0000000, 0x00000000,
2150 odm_read_and_config_mp_8821c_agc_tab_diff(struct dm_struct *dm, u32 array[],
2155 boolean is_matched = true, is_skipped = false;
2157 u32 v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0;
2159 PHYDM_DBG(dm, ODM_COMP_INIT, "===> %s\n", __func__);
2161 while ((i + 1) < array_len) {
2165 if (v1 & (BIT(31) | BIT(30))) {/*positive & negative condition*/
2166 if (v1 & BIT(31)) {/* positive condition*/
2167 c_cond = (u8)((v1 & (BIT(29) | BIT(28))) >> 28);
2168 if (c_cond == COND_ENDIF) {/*end*/
2171 PHYDM_DBG(dm, ODM_COMP_INIT, "ENDIF\n");
2172 } else if (c_cond == COND_ELSE) { /*else*/
2173 is_matched = is_skipped ? false : true;
2174 PHYDM_DBG(dm, ODM_COMP_INIT, "ELSE\n");
2175 } else {/*if , else if*/
2178 PHYDM_DBG(dm, ODM_COMP_INIT, "IF or ELSE IF\n");
2180 } else if (v1 & BIT(30)) { /*negative condition*/
2181 if (is_skipped == false) {
2182 if (check_positive(dm, pre_v1, pre_v2, v1, v2)) {
2194 odm_config_bb_agc_8821c(dm, v1, MASKDWORD, v2);
2201 odm_get_version_mp_8821c_agc_tab_diff(void)
2206 /******************************************************************************
2208 ******************************************************************************/
2210 u32 array_mp_8821c_phy_reg[] = {
2445 0x80001005, 0x00000000, 0x40000000, 0x00000000,
2448 0xA0000000, 0x00000000,
2451 0xB0000000, 0x00000000,
3901 odm_read_and_config_mp_8821c_phy_reg(struct dm_struct *dm)
3905 boolean is_matched = true, is_skipped = false;
3906 u32 array_len = sizeof(array_mp_8821c_phy_reg) / sizeof(u32);
3907 u32 *array = array_mp_8821c_phy_reg;
3909 u32 v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0;
3911 PHYDM_DBG(dm, ODM_COMP_INIT, "===> %s\n", __func__);
3913 while ((i + 1) < array_len) {
3917 if (v1 & (BIT(31) | BIT(30))) {/*positive & negative condition*/
3918 if (v1 & BIT(31)) {/* positive condition*/
3919 c_cond = (u8)((v1 & (BIT(29) | BIT(28))) >> 28);
3920 if (c_cond == COND_ENDIF) {/*end*/
3923 PHYDM_DBG(dm, ODM_COMP_INIT, "ENDIF\n");
3924 } else if (c_cond == COND_ELSE) { /*else*/
3925 is_matched = is_skipped ? false : true;
3926 PHYDM_DBG(dm, ODM_COMP_INIT, "ELSE\n");
3927 } else {/*if , else if*/
3930 PHYDM_DBG(dm, ODM_COMP_INIT, "IF or ELSE IF\n");
3932 } else if (v1 & BIT(30)) { /*negative condition*/
3933 if (is_skipped == false) {
3934 if (check_positive(dm, pre_v1, pre_v2, v1, v2)) {
3946 odm_config_bb_phy_8821c(dm, v1, MASKDWORD, v2);
3953 odm_get_version_mp_8821c_phy_reg(void)
3958 /******************************************************************************
3960 ******************************************************************************/
3962 u32 array_mp_8821c_phy_reg_mp[] = {
3969 odm_read_and_config_mp_8821c_phy_reg_mp(struct dm_struct *dm)
3973 boolean is_matched = true, is_skipped = false;
3974 u32 array_len = sizeof(array_mp_8821c_phy_reg_mp) / sizeof(u32);
3975 u32 *array = array_mp_8821c_phy_reg_mp;
3977 u32 v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0;
3979 PHYDM_DBG(dm, ODM_COMP_INIT, "===> %s\n", __func__);
3981 while ((i + 1) < array_len) {
3985 if (v1 & (BIT(31) | BIT(30))) {/*positive & negative condition*/
3986 if (v1 & BIT(31)) {/* positive condition*/
3987 c_cond = (u8)((v1 & (BIT(29) | BIT(28))) >> 28);
3988 if (c_cond == COND_ENDIF) {/*end*/
3991 PHYDM_DBG(dm, ODM_COMP_INIT, "ENDIF\n");
3992 } else if (c_cond == COND_ELSE) { /*else*/
3993 is_matched = is_skipped ? false : true;
3994 PHYDM_DBG(dm, ODM_COMP_INIT, "ELSE\n");
3995 } else {/*if , else if*/
3998 PHYDM_DBG(dm, ODM_COMP_INIT, "IF or ELSE IF\n");
4000 } else if (v1 & BIT(30)) { /*negative condition*/
4001 if (is_skipped == false) {
4002 if (check_positive(dm, pre_v1, pre_v2, v1, v2)) {
4014 odm_config_bb_phy_8821c(dm, v1, MASKDWORD, v2);
4021 odm_get_version_mp_8821c_phy_reg_mp(void)
4026 /******************************************************************************
4028 ******************************************************************************/
4030 u32 array_mp_8821c_phy_reg_pg[] = {
4031 0, 0, 0, 0x00000c20, 0xffffffff, 0x32343638,
4032 0, 0, 0, 0x00000c24, 0xffffffff, 0x36363636,
4033 0, 0, 0, 0x00000c28, 0xffffffff, 0x28303234,
4034 0, 0, 0, 0x00000c2c, 0xffffffff, 0x34363636,
4035 0, 0, 0, 0x00000c30, 0xffffffff, 0x26283032,
4036 0, 0, 0, 0x00000c3c, 0xffffffff, 0x34363636,
4037 0, 0, 0, 0x00000c40, 0xffffffff, 0x26283032,
4038 0, 0, 0, 0x00000c44, 0xffffffff, 0x22222224,
4039 1, 0, 0, 0x00000c24, 0xffffffff, 0x34343434,
4040 1, 0, 0, 0x00000c28, 0xffffffff, 0x26283032,
4041 1, 0, 0, 0x00000c2c, 0xffffffff, 0x32343434,
4042 1, 0, 0, 0x00000c30, 0xffffffff, 0x24262830,
4043 1, 0, 0, 0x00000c3c, 0xffffffff, 0x32343434,
4044 1, 0, 0, 0x00000c40, 0xffffffff, 0x24262830,
4045 1, 0, 0, 0x00000c44, 0xffffffff, 0x20202022
4049 odm_read_and_config_mp_8821c_phy_reg_pg(struct dm_struct *dm)
4052 u32 array_len = sizeof(array_mp_8821c_phy_reg_pg) / sizeof(u32);
4053 u32 *array = array_mp_8821c_phy_reg_pg;
4055 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
4056 void *adapter = dm->adapter;
4057 HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
4059 PlatformZeroMemory(hal_data->BufOfLinesPwrByRate, MAX_LINES_HWCONFIG_TXT * MAX_BYTES_LINE_HWCONFIG_TXT);
4060 hal_data->nLinesReadPwrByRate = array_len / 6;
4063 PHYDM_DBG(dm, ODM_COMP_INIT, "===> %s\n", __func__);
4065 dm->phy_reg_pg_version = 1;
4066 dm->phy_reg_pg_value_type = PHY_REG_PG_EXACT_VALUE;
4068 for (i = 0; i < array_len; i += 6) {
4070 u32 v2 = array[i + 1];
4071 u32 v3 = array[i + 2];
4072 u32 v4 = array[i + 3];
4073 u32 v5 = array[i + 4];
4074 u32 v6 = array[i + 5];
4076 odm_config_bb_phy_reg_pg_8821c(dm, v1, v2, v3, v4, v5, v6);
4078 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
4079 rsprintf((char *)hal_data->BufOfLinesPwrByRate[i / 6], 100, "%s, %s, %s, 0x%X, 0x%08X, 0x%08X,",
4080 (v1 == 0 ? "2.4G" : " 5G"), (v2 == 0 ? "A" : "B"), (v3 == 0 ? "1Tx" : "2Tx"), v4, v5, v6);
4087 /******************************************************************************
4088 * phy_reg_pg_type0x28.TXT
4089 ******************************************************************************/
4091 u32 array_mp_8821c_phy_reg_pg_type0x28[] = {
4092 0, 0, 0, 0x00000c20, 0xffffffff, 0x32343638,
4093 0, 0, 0, 0x00000c24, 0xffffffff, 0x36363636,
4094 0, 0, 0, 0x00000c28, 0xffffffff, 0x28303234,
4095 0, 0, 0, 0x00000c2c, 0xffffffff, 0x34363636,
4096 0, 0, 0, 0x00000c30, 0xffffffff, 0x26283032,
4097 0, 0, 0, 0x00000c3c, 0xffffffff, 0x34363636,
4098 0, 0, 0, 0x00000c40, 0xffffffff, 0x26283032,
4099 0, 0, 0, 0x00000c44, 0xffffffff, 0x22222224,
4100 1, 0, 0, 0x00000c24, 0xffffffff, 0x40404040,
4101 1, 0, 0, 0x00000c28, 0xffffffff, 0x32343638,
4102 1, 0, 0, 0x00000c2c, 0xffffffff, 0x38383838,
4103 1, 0, 0, 0x00000c30, 0xffffffff, 0x30323436,
4104 1, 0, 0, 0x00000c3c, 0xffffffff, 0x36363636,
4105 1, 0, 0, 0x00000c40, 0xffffffff, 0x30323436,
4106 1, 0, 0, 0x00000c44, 0xffffffff, 0x26262628
4110 odm_read_and_config_mp_8821c_phy_reg_pg_type0x28(struct dm_struct *dm)
4113 u32 array_len = sizeof(array_mp_8821c_phy_reg_pg_type0x28) / sizeof(u32);
4114 u32 *array = array_mp_8821c_phy_reg_pg_type0x28;
4116 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
4117 void *adapter = dm->adapter;
4118 HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
4120 PlatformZeroMemory(hal_data->BufOfLinesPwrByRate, MAX_LINES_HWCONFIG_TXT * MAX_BYTES_LINE_HWCONFIG_TXT);
4121 hal_data->nLinesReadPwrByRate = array_len / 6;
4124 PHYDM_DBG(dm, ODM_COMP_INIT, "===> %s\n", __func__);
4126 dm->phy_reg_pg_version = 1;
4127 dm->phy_reg_pg_value_type = PHY_REG_PG_EXACT_VALUE;
4129 for (i = 0; i < array_len; i += 6) {
4131 u32 v2 = array[i + 1];
4132 u32 v3 = array[i + 2];
4133 u32 v4 = array[i + 3];
4134 u32 v5 = array[i + 4];
4135 u32 v6 = array[i + 5];
4137 odm_config_bb_phy_reg_pg_8821c(dm, v1, v2, v3, v4, v5, v6);
4139 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
4140 rsprintf((char *)hal_data->BufOfLinesPwrByRate[i / 6], 100, "%s, %s, %s, 0x%X, 0x%08X, 0x%08X,",
4141 (v1 == 0 ? "2.4G" : " 5G"), (v2 == 0 ? "A" : "B"), (v3 == 0 ? "1Tx" : "2Tx"), v4, v5, v6);
4148 #endif /* end of HWIMG_SUPPORT*/