2 * Copyright © 2009 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 * Zou Nan hai <nanhai.zou@intel.com>
25 * Yan Li <li.l.yan@intel.com>
26 * Liu Xi bin<xibin.liu@intel.com>
29 g1~g30: constant buffer
31 g3~g4:non intra IQ matrix
34 g58~g81:reference data
35 g82: thread payload backup
37 g115: message descriptor for reading reference data */
38 mov (1) g32.8<1>UD 0x07001FUD {align1};
39 send (16) 0 g38.0<1>UW g32<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 8 {align1};
40 add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1};
41 send (16) 0 g46.0<1>UW g32<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 8 {align1};
42 add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1};
43 mov (1) g32.8<1>UD 0x1FUD {align1};
44 send (16) 0 g54.0<1>UW g32<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1};
45 add (16) g58.0<1>UW g38.0<16,16,1>UB g38.1<16,16,1>UB {align1};
46 add (16) g59.0<1>UW g40.0<16,16,1>UB g40.1<16,16,1>UB {align1};
47 add (16) g60.0<1>UW g42.0<16,16,1>UB g42.1<16,16,1>UB {align1};
48 add (16) g61.0<1>UW g44.0<16,16,1>UB g44.1<16,16,1>UB {align1};
49 add (16) g62.0<1>UW g46.0<16,16,1>UB g46.1<16,16,1>UB {align1};
50 add (16) g63.0<1>UW g48.0<16,16,1>UB g48.1<16,16,1>UB {align1};
51 add (16) g64.0<1>UW g50.0<16,16,1>UB g50.1<16,16,1>UB {align1};
52 add (16) g65.0<1>UW g52.0<16,16,1>UB g52.1<16,16,1>UB {align1};
54 add (16) g58.0<1>UW g58.0<16,16,1>UW g40.0<16,16,1>UB {align1};
55 add (16) g59.0<1>UW g59.0<16,16,1>UW g42.0<16,16,1>UB {align1};
56 add (16) g60.0<1>UW g60.0<16,16,1>UW g44.0<16,16,1>UB {align1};
57 add (16) g61.0<1>UW g61.0<16,16,1>UW g46.0<16,16,1>UB {align1};
58 add (16) g62.0<1>UW g62.0<16,16,1>UW g48.0<16,16,1>UB {align1};
59 add (16) g63.0<1>UW g63.0<16,16,1>UW g50.0<16,16,1>UB {align1};
60 add (16) g64.0<1>UW g64.0<16,16,1>UW g52.0<16,16,1>UB {align1};
61 add (16) g65.0<1>UW g65.0<16,16,1>UW g54.0<16,16,1>UB {align1};
63 add (16) g58.0<1>UW g58.0<16,16,1>UW g40.1<16,16,1>UB {align1};
64 add (16) g59.0<1>UW g59.0<16,16,1>UW g42.1<16,16,1>UB {align1};
65 add (16) g60.0<1>UW g60.0<16,16,1>UW g44.1<16,16,1>UB {align1};
66 add (16) g61.0<1>UW g61.0<16,16,1>UW g46.1<16,16,1>UB {align1};
67 add (16) g62.0<1>UW g62.0<16,16,1>UW g48.1<16,16,1>UB {align1};
68 add (16) g63.0<1>UW g63.0<16,16,1>UW g50.1<16,16,1>UB {align1};
69 add (16) g64.0<1>UW g64.0<16,16,1>UW g52.1<16,16,1>UB {align1};
70 add (16) g65.0<1>UW g65.0<16,16,1>UW g54.1<16,16,1>UB {align1};
72 shr (16) g58.0<1>UW g58.0<16,16,1>UW 2UW {align1};
73 shr (16) g59.0<1>UW g59.0<16,16,1>UW 2UW {align1};
74 shr (16) g60.0<1>UW g60.0<16,16,1>UW 2UW {align1};
75 shr (16) g61.0<1>UW g61.0<16,16,1>UW 2UW {align1};
76 shr (16) g62.0<1>UW g62.0<16,16,1>UW 2UW {align1};
77 shr (16) g63.0<1>UW g63.0<16,16,1>UW 2UW {align1};
78 shr (16) g64.0<1>UW g64.0<16,16,1>UW 2UW {align1};
79 shr (16) g65.0<1>UW g65.0<16,16,1>UW 2UW {align1};
81 mov (1) g32.8<1>UD 0x07001FUD {align1};
82 send (16) 0 g38.0<1>UW g32<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 8 {align1};
83 add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1};
84 send (16) 0 g46.0<1>UW g32<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 8 {align1};
85 add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1};
86 mov (1) g32.8<1>UD 0x1FUD {align1};
87 send (16) 0 g54.0<1>UW g32<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1};
88 add (16) g66.0<1>UW g38.0<16,16,1>UB g38.1<16,16,1>UB {align1};
89 add (16) g67.0<1>UW g40.0<16,16,1>UB g40.1<16,16,1>UB {align1};
90 add (16) g68.0<1>UW g42.0<16,16,1>UB g42.1<16,16,1>UB {align1};
91 add (16) g69.0<1>UW g44.0<16,16,1>UB g44.1<16,16,1>UB {align1};
92 add (16) g70.0<1>UW g46.0<16,16,1>UB g46.1<16,16,1>UB {align1};
93 add (16) g71.0<1>UW g48.0<16,16,1>UB g48.1<16,16,1>UB {align1};
94 add (16) g72.0<1>UW g50.0<16,16,1>UB g50.1<16,16,1>UB {align1};
95 add (16) g73.0<1>UW g52.0<16,16,1>UB g52.1<16,16,1>UB {align1};
97 add (16) g66.0<1>UW g66.0<16,16,1>UW g40.0<16,16,1>UB {align1};
98 add (16) g67.0<1>UW g67.0<16,16,1>UW g42.0<16,16,1>UB {align1};
99 add (16) g68.0<1>UW g68.0<16,16,1>UW g44.0<16,16,1>UB {align1};
100 add (16) g69.0<1>UW g69.0<16,16,1>UW g46.0<16,16,1>UB {align1};
101 add (16) g70.0<1>UW g70.0<16,16,1>UW g48.0<16,16,1>UB {align1};
102 add (16) g71.0<1>UW g71.0<16,16,1>UW g50.0<16,16,1>UB {align1};
103 add (16) g72.0<1>UW g72.0<16,16,1>UW g52.0<16,16,1>UB {align1};
104 add (16) g73.0<1>UW g73.0<16,16,1>UW g54.0<16,16,1>UB {align1};
106 add (16) g66.0<1>UW g66.0<16,16,1>UW g40.1<16,16,1>UB {align1};
107 add (16) g67.0<1>UW g67.0<16,16,1>UW g42.1<16,16,1>UB {align1};
108 add (16) g68.0<1>UW g68.0<16,16,1>UW g44.1<16,16,1>UB {align1};
109 add (16) g69.0<1>UW g69.0<16,16,1>UW g46.1<16,16,1>UB {align1};
110 add (16) g70.0<1>UW g70.0<16,16,1>UW g48.1<16,16,1>UB {align1};
111 add (16) g71.0<1>UW g71.0<16,16,1>UW g50.1<16,16,1>UB {align1};
112 add (16) g72.0<1>UW g72.0<16,16,1>UW g52.1<16,16,1>UB {align1};
113 add (16) g73.0<1>UW g73.0<16,16,1>UW g54.1<16,16,1>UB {align1};
115 shr (16) g66.0<1>UW g66.0<16,16,1>UW 2UW {align1};
116 shr (16) g67.0<1>UW g67.0<16,16,1>UW 2UW {align1};
117 shr (16) g68.0<1>UW g68.0<16,16,1>UW 2UW {align1};
118 shr (16) g69.0<1>UW g69.0<16,16,1>UW 2UW {align1};
119 shr (16) g70.0<1>UW g70.0<16,16,1>UW 2UW {align1};
120 shr (16) g71.0<1>UW g71.0<16,16,1>UW 2UW {align1};
121 shr (16) g72.0<1>UW g72.0<16,16,1>UW 2UW {align1};
122 shr (16) g73.0<1>UW g73.0<16,16,1>UW 2UW {align1};