shared-core/i915_dma.c

   1 /* i915_dma.c -- DMA support for the I915 -*- linux-c -*-
   2  */
   3 /*
   4  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   5  * All Rights Reserved.
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a
   8  * copy of this software and associated documentation files (the
   9  * "Software"), to deal in the Software without restriction, including
  10  * without limitation the rights to use, copy, modify, merge, publish,
  11  * distribute, sub license, and/or sell copies of the Software, and to
  12  * permit persons to whom the Software is furnished to do so, subject to
  13  * the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the
  16  * next paragraph) shall be included in all copies or substantial portions
  17  * of the Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  20  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  21  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  22  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  23  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  24  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  25  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  26  *
  27  */
  28
  29 #include "drmP.h"
  30 #include "drm.h"
  31 #include "i915_drm.h"
  32 #include "i915_drv.h"
  33
  34 /* Really want an OS-independent resettable timer.  Would like to have
  35  * this loop run for (eg) 3 sec, but have the timer reset every time
  36  * the head pointer changes, so that EBUSY only happens if the ring
  37  * actually stalls for (eg) 3 seconds.
  38  */
  39 int i915_wait_ring(struct drm_device * dev, int n, const char *caller)
  40 {
  41         drm_i915_private_t *dev_priv = dev->dev_private;
  42         drm_i915_ring_buffer_t *ring = &(dev_priv->ring);
  43         u32 last_head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
  44         int i;
  45
  46         for (i = 0; i < 10000; i++) {
  47                 ring->head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
  48                 ring->space = ring->head - (ring->tail + 8);
  49                 if (ring->space < 0)
  50                         ring->space += ring->Size;
  51                 if (ring->space >= n)
  52                         return 0;
  53
  54                 if (ring->head != last_head)
  55                         i = 0;
  56
  57                 last_head = ring->head;
  58                 DRM_UDELAY(1);
  59         }
  60
  61         return -EBUSY;
  62 }
  63
  64 void i915_kernel_lost_context(struct drm_device * dev)
  65 {
  66         drm_i915_private_t *dev_priv = dev->dev_private;
  67         drm_i915_ring_buffer_t *ring = &(dev_priv->ring);
  68
  69         ring->head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
  70         ring->tail = I915_READ(LP_RING + RING_TAIL) & TAIL_ADDR;
  71         ring->space = ring->head - (ring->tail + 8);
  72         if (ring->space < 0)
  73                 ring->space += ring->Size;
  74 }
  75
  76 static int i915_dma_cleanup(struct drm_device * dev)
  77 {
  78         drm_i915_private_t *dev_priv = dev->dev_private;
  79         /* Make sure interrupts are disabled here because the uninstall ioctl
  80          * may not have been called from userspace and after dev_private
  81          * is freed, it's too late.
  82          */
  83         if (dev->irq)
  84                 drm_irq_uninstall(dev);
  85
  86         if (dev_priv->ring.virtual_start) {
  87                 drm_core_ioremapfree(&dev_priv->ring.map, dev);
  88                 dev_priv->ring.virtual_start = 0;
  89                 dev_priv->ring.map.handle = 0;
  90                 dev_priv->ring.map.size = 0;
  91         }
  92
  93         if (dev_priv->status_page_dmah) {
  94                 drm_pci_free(dev, dev_priv->status_page_dmah);
  95                 dev_priv->status_page_dmah = NULL;
  96                 /* Need to rewrite hardware status page */
  97                 I915_WRITE(0x02080, 0x1ffff000);
  98         }
  99
 100         if (dev_priv->status_gfx_addr) {
 101                 dev_priv->status_gfx_addr = 0;
 102                 drm_core_ioremapfree(&dev_priv->hws_map, dev);
 103                 I915_WRITE(0x02080, 0x1ffff000);
 104         }
 105
 106         return 0;
 107 }
 108
 109
 110 #define DRI2_SAREA_BLOCK_TYPE(b) ((b) >> 16)
 111 #define DRI2_SAREA_BLOCK_SIZE(b) ((b) & 0xffff)
 112 #define DRI2_SAREA_BLOCK_NEXT(p)                                \
 113         ((void *) ((unsigned char *) (p) +                      \
 114                    DRI2_SAREA_BLOCK_SIZE(*(unsigned int *) p)))
 115
 116 #define DRI2_SAREA_BLOCK_END            0x0000
 117 #define DRI2_SAREA_BLOCK_LOCK           0x0001
 118 #define DRI2_SAREA_BLOCK_EVENT_BUFFER   0x0002
 119
 120 static int
 121 setup_dri2_sarea(struct drm_device * dev,
 122                  struct drm_file *file_priv,
 123                  drm_i915_init_t * init)
 124 {
 125         drm_i915_private_t *dev_priv = dev->dev_private;
 126         int ret;
 127         unsigned int *p, *end, *next;
 128
 129         mutex_lock(&dev->struct_mutex);
 130         dev_priv->sarea_bo =
 131                 drm_lookup_buffer_object(file_priv,
 132                                          init->sarea_handle, 1);
 133         mutex_unlock(&dev->struct_mutex);
 134
 135         if (!dev_priv->sarea_bo) {
 136                 DRM_ERROR("did not find sarea bo\n");
 137                 return -EINVAL;
 138         }
 139
 140         ret = drm_bo_kmap(dev_priv->sarea_bo, 0,
 141                           dev_priv->sarea_bo->num_pages,
 142                           &dev_priv->sarea_kmap);
 143         if (ret) {
 144                 DRM_ERROR("could not map sarea bo\n");
 145                 return ret;
 146         }
 147
 148         p = dev_priv->sarea_kmap.virtual;
 149         end = (void *) p + (dev_priv->sarea_bo->num_pages << PAGE_SHIFT);
 150         while (p < end && DRI2_SAREA_BLOCK_TYPE(*p) != DRI2_SAREA_BLOCK_END) {
 151                 switch (DRI2_SAREA_BLOCK_TYPE(*p)) {
 152                 case DRI2_SAREA_BLOCK_LOCK:
 153                         dev->lock.hw_lock = (void *) (p + 1);
 154                         dev->sigdata.lock = dev->lock.hw_lock;
 155                         break;
 156                 }
 157                 next = DRI2_SAREA_BLOCK_NEXT(p);
 158                 if (next <= p || end < next) {
 159                         DRM_ERROR("malformed dri2 sarea: next is %p should be within %p-%p\n",
 160                                   next, p, end);
 161                         return -EINVAL;
 162                 }
 163                 p = next;
 164         }
 165
 166         return 0;
 167 }
 168
 169
 170 static int i915_initialize(struct drm_device * dev,
 171                            struct drm_file *file_priv,
 172                            drm_i915_init_t * init)
 173 {
 174         drm_i915_private_t *dev_priv = dev->dev_private;
 175         int ret;
 176
 177         dev_priv->sarea = drm_getsarea(dev);
 178         if (!dev_priv->sarea) {
 179                 DRM_ERROR("can not find sarea!\n");
 180                 i915_dma_cleanup(dev);
 181                 return -EINVAL;
 182         }
 183
 184         if (init->mmio_offset != 0)
 185                 dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset);
 186         if (!dev_priv->mmio_map) {
 187                 i915_dma_cleanup(dev);
 188                 DRM_ERROR("can not find mmio map!\n");
 189                 return -EINVAL;
 190         }
 191
 192 #ifdef I915_HAVE_BUFFER
 193         dev_priv->max_validate_buffers = I915_MAX_VALIDATE_BUFFERS;
 194 #endif
 195
 196         if (init->sarea_priv_offset)
 197                 dev_priv->sarea_priv = (drm_i915_sarea_t *)
 198                         ((u8 *) dev_priv->sarea->handle +
 199                          init->sarea_priv_offset);
 200         else {
 201                 /* No sarea_priv for you! */
 202                 dev_priv->sarea_priv = NULL;
 203         }
 204
 205         dev_priv->ring.Start = init->ring_start;
 206         dev_priv->ring.End = init->ring_end;
 207         dev_priv->ring.Size = init->ring_size;
 208         dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
 209
 210         dev_priv->ring.map.offset = init->ring_start;
 211         dev_priv->ring.map.size = init->ring_size;
 212         dev_priv->ring.map.type = 0;
 213         dev_priv->ring.map.flags = 0;
 214         dev_priv->ring.map.mtrr = 0;
 215
 216         drm_core_ioremap(&dev_priv->ring.map, dev);
 217
 218         if (dev_priv->ring.map.handle == NULL) {
 219                 i915_dma_cleanup(dev);
 220                 DRM_ERROR("can not ioremap virtual address for"
 221                           " ring buffer\n");
 222                 return -ENOMEM;
 223         }
 224
 225         dev_priv->ring.virtual_start = dev_priv->ring.map.handle;
 226
 227         dev_priv->cpp = init->cpp;
 228
 229         if (dev_priv->sarea_priv)
 230                 dev_priv->sarea_priv->pf_current_page = 0;
 231
 232         /* We are using separate values as placeholders for mechanisms for
 233          * private backbuffer/depthbuffer usage.
 234          */
 235         dev_priv->use_mi_batchbuffer_start = 0;
 236         if (IS_I965G(dev)) /* 965 doesn't support older method */
 237                 dev_priv->use_mi_batchbuffer_start = 1;
 238
 239         /* Allow hardware batchbuffers unless told otherwise.
 240          */
 241         dev_priv->allow_batchbuffer = 1;
 242
 243         /* Enable vblank on pipe A for older X servers
 244          */
 245         dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A;
 246
 247         /* Program Hardware Status Page */
 248         if (!IS_G33(dev)) {
 249                 dev_priv->status_page_dmah =
 250                         drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE, 0xffffffff);
 251
 252                 if (!dev_priv->status_page_dmah) {
 253                         i915_dma_cleanup(dev);
 254                         DRM_ERROR("Can not allocate hardware status page\n");
 255                         return -ENOMEM;
 256                 }
 257                 dev_priv->hw_status_page = dev_priv->status_page_dmah->vaddr;
 258                 dev_priv->dma_status_page = dev_priv->status_page_dmah->busaddr;
 259
 260                 memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
 261
 262                 I915_WRITE(0x02080, dev_priv->dma_status_page);
 263         }
 264         DRM_DEBUG("Enabled hardware status page\n");
 265 #ifdef I915_HAVE_BUFFER
 266         mutex_init(&dev_priv->cmdbuf_mutex);
 267 #endif
 268
 269         if (init->func == I915_INIT_DMA2) {
 270                 ret = setup_dri2_sarea(dev, file_priv, init);
 271                 if (ret) {
 272                         i915_dma_cleanup(dev);
 273                         DRM_ERROR("could not set up dri2 sarea\n");
 274                         return ret;
 275                 }
 276         }
 277
 278
 279         return 0;
 280 }
 281
 282 static int i915_dma_resume(struct drm_device * dev)
 283 {
 284         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 285
 286         DRM_DEBUG("\n");
 287
 288         if (!dev_priv->sarea) {
 289                 DRM_ERROR("can not find sarea!\n");
 290                 return -EINVAL;
 291         }
 292
 293         if (!dev_priv->mmio_map) {
 294                 DRM_ERROR("can not find mmio map!\n");
 295                 return -EINVAL;
 296         }
 297
 298         if (dev_priv->ring.map.handle == NULL) {
 299                 DRM_ERROR("can not ioremap virtual address for"
 300                           " ring buffer\n");
 301                 return -ENOMEM;
 302         }
 303
 304         /* Program Hardware Status Page */
 305         if (!dev_priv->hw_status_page) {
 306                 DRM_ERROR("Can not find hardware status page\n");
 307                 return -EINVAL;
 308         }
 309         DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
 310
 311         if (dev_priv->status_gfx_addr != 0)
 312                 I915_WRITE(0x02080, dev_priv->status_gfx_addr);
 313         else
 314                 I915_WRITE(0x02080, dev_priv->dma_status_page);
 315         DRM_DEBUG("Enabled hardware status page\n");
 316
 317         return 0;
 318 }
 319
 320 static int i915_dma_init(struct drm_device *dev, void *data,
 321                          struct drm_file *file_priv)
 322 {
 323         drm_i915_init_t *init = data;
 324         int retcode = 0;
 325
 326         switch (init->func) {
 327         case I915_INIT_DMA:
 328         case I915_INIT_DMA2:
 329                 retcode = i915_initialize(dev, file_priv, init);
 330                 break;
 331         case I915_CLEANUP_DMA:
 332                 retcode = i915_dma_cleanup(dev);
 333                 break;
 334         case I915_RESUME_DMA:
 335                 retcode = i915_dma_resume(dev);
 336                 break;
 337         default:
 338                 retcode = -EINVAL;
 339                 break;
 340         }
 341
 342         return retcode;
 343 }
 344
 345 /* Implement basically the same security restrictions as hardware does
 346  * for MI_BATCH_NON_SECURE.  These can be made stricter at any time.
 347  *
 348  * Most of the calculations below involve calculating the size of a
 349  * particular instruction.  It's important to get the size right as
 350  * that tells us where the next instruction to check is.  Any illegal
 351  * instruction detected will be given a size of zero, which is a
 352  * signal to abort the rest of the buffer.
 353  */
 354 static int do_validate_cmd(int cmd)
 355 {
 356         switch (((cmd >> 29) & 0x7)) {
 357         case 0x0:
 358                 switch ((cmd >> 23) & 0x3f) {
 359                 case 0x0:
 360                         return 1;       /* MI_NOOP */
 361                 case 0x4:
 362                         return 1;       /* MI_FLUSH */
 363                 default:
 364                         return 0;       /* disallow everything else */
 365                 }
 366                 break;
 367         case 0x1:
 368                 return 0;       /* reserved */
 369         case 0x2:
 370                 return (cmd & 0xff) + 2;        /* 2d commands */
 371         case 0x3:
 372                 if (((cmd >> 24) & 0x1f) <= 0x18)
 373                         return 1;
 374
 375                 switch ((cmd >> 24) & 0x1f) {
 376                 case 0x1c:
 377                         return 1;
 378                 case 0x1d:
 379                         switch ((cmd >> 16) & 0xff) {
 380                         case 0x3:
 381                                 return (cmd & 0x1f) + 2;
 382                         case 0x4:
 383                                 return (cmd & 0xf) + 2;
 384                         default:
 385                                 return (cmd & 0xffff) + 2;
 386                         }
 387                 case 0x1e:
 388                         if (cmd & (1 << 23))
 389                                 return (cmd & 0xffff) + 1;
 390                         else
 391                                 return 1;
 392                 case 0x1f:
 393                         if ((cmd & (1 << 23)) == 0)     /* inline vertices */
 394                                 return (cmd & 0x1ffff) + 2;
 395                         else if (cmd & (1 << 17))       /* indirect random */
 396                                 if ((cmd & 0xffff) == 0)
 397                                         return 0;       /* unknown length, too hard */
 398                                 else
 399                                         return (((cmd & 0xffff) + 1) / 2) + 1;
 400                         else
 401                                 return 2;       /* indirect sequential */
 402                 default:
 403                         return 0;
 404                 }
 405         default:
 406                 return 0;
 407         }
 408
 409         return 0;
 410 }
 411
 412 static int validate_cmd(int cmd)
 413 {
 414         int ret = do_validate_cmd(cmd);
 415
 416 /*      printk("validate_cmd( %x ): %d\n", cmd, ret); */
 417
 418         return ret;
 419 }
 420
 421 static int i915_emit_cmds(struct drm_device *dev, int __user *buffer,
 422                           int dwords)
 423 {
 424         drm_i915_private_t *dev_priv = dev->dev_private;
 425         int i;
 426         RING_LOCALS;
 427
 428         if ((dwords+1) * sizeof(int) >= dev_priv->ring.Size - 8)
 429                 return -EINVAL;
 430
 431         BEGIN_LP_RING((dwords+1)&~1);
 432
 433         for (i = 0; i < dwords;) {
 434                 int cmd, sz;
 435
 436                 if (DRM_COPY_FROM_USER_UNCHECKED(&cmd, &buffer[i], sizeof(cmd)))
 437                         return -EINVAL;
 438
 439                 if ((sz = validate_cmd(cmd)) == 0 || i + sz > dwords)
 440                         return -EINVAL;
 441
 442                 OUT_RING(cmd);
 443
 444                 while (++i, --sz) {
 445                         if (DRM_COPY_FROM_USER_UNCHECKED(&cmd, &buffer[i],
 446                                                          sizeof(cmd))) {
 447                                 return -EINVAL;
 448                         }
 449                         OUT_RING(cmd);
 450                 }
 451         }
 452
 453         if (dwords & 1)
 454                 OUT_RING(0);
 455
 456         ADVANCE_LP_RING();
 457
 458         return 0;
 459 }
 460
 461 static int i915_emit_box(struct drm_device * dev,
 462                          struct drm_clip_rect __user * boxes,
 463                          int i, int DR1, int DR4)
 464 {
 465         drm_i915_private_t *dev_priv = dev->dev_private;
 466         struct drm_clip_rect box;
 467         RING_LOCALS;
 468
 469         if (DRM_COPY_FROM_USER_UNCHECKED(&box, &boxes[i], sizeof(box))) {
 470                 return -EFAULT;
 471         }
 472
 473         if (box.y2 <= box.y1 || box.x2 <= box.x1 || box.y2 <= 0 || box.x2 <= 0) {
 474                 DRM_ERROR("Bad box %d,%d..%d,%d\n",
 475                           box.x1, box.y1, box.x2, box.y2);
 476                 return -EINVAL;
 477         }
 478
 479         if (IS_I965G(dev)) {
 480                 BEGIN_LP_RING(4);
 481                 OUT_RING(GFX_OP_DRAWRECT_INFO_I965);
 482                 OUT_RING((box.x1 & 0xffff) | (box.y1 << 16));
 483                 OUT_RING(((box.x2 - 1) & 0xffff) | ((box.y2 - 1) << 16));
 484                 OUT_RING(DR4);
 485                 ADVANCE_LP_RING();
 486         } else {
 487                 BEGIN_LP_RING(6);
 488                 OUT_RING(GFX_OP_DRAWRECT_INFO);
 489                 OUT_RING(DR1);
 490                 OUT_RING((box.x1 & 0xffff) | (box.y1 << 16));
 491                 OUT_RING(((box.x2 - 1) & 0xffff) | ((box.y2 - 1) << 16));
 492                 OUT_RING(DR4);
 493                 OUT_RING(0);
 494                 ADVANCE_LP_RING();
 495         }
 496
 497         return 0;
 498 }
 499
 500 /* XXX: Emitting the counter should really be moved to part of the IRQ
 501  * emit. For now, do it in both places:
 502  */
 503
 504 void i915_emit_breadcrumb(struct drm_device *dev)
 505 {
 506         drm_i915_private_t *dev_priv = dev->dev_private;
 507         RING_LOCALS;
 508
 509         if (++dev_priv->counter > BREADCRUMB_MASK) {
 510                  dev_priv->counter = 1;
 511                  DRM_DEBUG("Breadcrumb counter wrapped around\n");
 512         }
 513
 514         if (dev_priv->sarea_priv)
 515                 dev_priv->sarea_priv->last_enqueue = dev_priv->counter;
 516
 517         BEGIN_LP_RING(4);
 518         OUT_RING(CMD_STORE_DWORD_IDX);
 519         OUT_RING(20);
 520         OUT_RING(dev_priv->counter);
 521         OUT_RING(0);
 522         ADVANCE_LP_RING();
 523 }
 524
 525
 526 int i915_emit_mi_flush(struct drm_device *dev, uint32_t flush)
 527 {
 528         drm_i915_private_t *dev_priv = dev->dev_private;
 529         uint32_t flush_cmd = CMD_MI_FLUSH;
 530         RING_LOCALS;
 531
 532         flush_cmd |= flush;
 533
 534         i915_kernel_lost_context(dev);
 535
 536         BEGIN_LP_RING(4);
 537         OUT_RING(flush_cmd);
 538         OUT_RING(0);
 539         OUT_RING(0);
 540         OUT_RING(0);
 541         ADVANCE_LP_RING();
 542
 543         return 0;
 544 }
 545
 546
 547 static int i915_dispatch_cmdbuffer(struct drm_device * dev,
 548                                    drm_i915_cmdbuffer_t * cmd)
 549 {
 550 #ifdef I915_HAVE_FENCE
 551         drm_i915_private_t *dev_priv = dev->dev_private;
 552 #endif
 553         int nbox = cmd->num_cliprects;
 554         int i = 0, count, ret;
 555
 556         if (cmd->sz & 0x3) {
 557                 DRM_ERROR("alignment\n");
 558                 return -EINVAL;
 559         }
 560
 561         i915_kernel_lost_context(dev);
 562
 563         count = nbox ? nbox : 1;
 564
 565         for (i = 0; i < count; i++) {
 566                 if (i < nbox) {
 567                         ret = i915_emit_box(dev, cmd->cliprects, i,
 568                                             cmd->DR1, cmd->DR4);
 569                         if (ret)
 570                                 return ret;
 571                 }
 572
 573                 ret = i915_emit_cmds(dev, (int __user *)cmd->buf, cmd->sz / 4);
 574                 if (ret)
 575                         return ret;
 576         }
 577
 578         i915_emit_breadcrumb(dev);
 579 #ifdef I915_HAVE_FENCE
 580         if (unlikely((dev_priv->counter & 0xFF) == 0))
 581                 drm_fence_flush_old(dev, 0, dev_priv->counter);
 582 #endif
 583         return 0;
 584 }
 585
 586 static int i915_dispatch_batchbuffer(struct drm_device * dev,
 587                                      drm_i915_batchbuffer_t * batch)
 588 {
 589         drm_i915_private_t *dev_priv = dev->dev_private;
 590         struct drm_clip_rect __user *boxes = batch->cliprects;
 591         int nbox = batch->num_cliprects;
 592         int i = 0, count;
 593         RING_LOCALS;
 594
 595         if ((batch->start | batch->used) & 0x7) {
 596                 DRM_ERROR("alignment\n");
 597                 return -EINVAL;
 598         }
 599
 600         i915_kernel_lost_context(dev);
 601
 602         count = nbox ? nbox : 1;
 603
 604         for (i = 0; i < count; i++) {
 605                 if (i < nbox) {
 606                         int ret = i915_emit_box(dev, boxes, i,
 607                                                 batch->DR1, batch->DR4);
 608                         if (ret)
 609                                 return ret;
 610                 }
 611
 612                 if (dev_priv->use_mi_batchbuffer_start) {
 613                         BEGIN_LP_RING(2);
 614                         if (IS_I965G(dev)) {
 615                                 OUT_RING(MI_BATCH_BUFFER_START | (2 << 6) | MI_BATCH_NON_SECURE_I965);
 616                                 OUT_RING(batch->start);
 617                         } else {
 618                                 OUT_RING(MI_BATCH_BUFFER_START | (2 << 6));
 619                                 OUT_RING(batch->start | MI_BATCH_NON_SECURE);
 620                         }
 621                         ADVANCE_LP_RING();
 622
 623                 } else {
 624                         BEGIN_LP_RING(4);
 625                         OUT_RING(MI_BATCH_BUFFER);
 626                         OUT_RING(batch->start | MI_BATCH_NON_SECURE);
 627                         OUT_RING(batch->start + batch->used - 4);
 628                         OUT_RING(0);
 629                         ADVANCE_LP_RING();
 630                 }
 631         }
 632
 633         i915_emit_breadcrumb(dev);
 634 #ifdef I915_HAVE_FENCE
 635         if (unlikely((dev_priv->counter & 0xFF) == 0))
 636                 drm_fence_flush_old(dev, 0, dev_priv->counter);
 637 #endif
 638         return 0;
 639 }
 640
 641 static void i915_do_dispatch_flip(struct drm_device * dev, int plane, int sync)
 642 {
 643         drm_i915_private_t *dev_priv = dev->dev_private;
 644         u32 num_pages, current_page, next_page, dspbase;
 645         int shift = 2 * plane, x, y;
 646         RING_LOCALS;
 647
 648         /* Calculate display base offset */
 649         num_pages = dev_priv->sarea_priv->third_handle ? 3 : 2;
 650         current_page = (dev_priv->sarea_priv->pf_current_page >> shift) & 0x3;
 651         next_page = (current_page + 1) % num_pages;
 652
 653         switch (next_page) {
 654         default:
 655         case 0:
 656                 dspbase = dev_priv->sarea_priv->front_offset;
 657                 break;
 658         case 1:
 659                 dspbase = dev_priv->sarea_priv->back_offset;
 660                 break;
 661         case 2:
 662                 dspbase = dev_priv->sarea_priv->third_offset;
 663                 break;
 664         }
 665
 666         if (plane == 0) {
 667                 x = dev_priv->sarea_priv->planeA_x;
 668                 y = dev_priv->sarea_priv->planeA_y;
 669         } else {
 670                 x = dev_priv->sarea_priv->planeB_x;
 671                 y = dev_priv->sarea_priv->planeB_y;
 672         }
 673
 674         dspbase += (y * dev_priv->sarea_priv->pitch + x) * dev_priv->cpp;
 675
 676         DRM_DEBUG("plane=%d current_page=%d dspbase=0x%x\n", plane, current_page,
 677                   dspbase);
 678
 679         BEGIN_LP_RING(4);
 680         OUT_RING(sync ? 0 :
 681                  (MI_WAIT_FOR_EVENT | (plane ? MI_WAIT_FOR_PLANE_B_FLIP :
 682                                        MI_WAIT_FOR_PLANE_A_FLIP)));
 683         OUT_RING(CMD_OP_DISPLAYBUFFER_INFO | (sync ? 0 : ASYNC_FLIP) |
 684                  (plane ? DISPLAY_PLANE_B : DISPLAY_PLANE_A));
 685         OUT_RING(dev_priv->sarea_priv->pitch * dev_priv->cpp);
 686         OUT_RING(dspbase);
 687         ADVANCE_LP_RING();
 688
 689         dev_priv->sarea_priv->pf_current_page &= ~(0x3 << shift);
 690         dev_priv->sarea_priv->pf_current_page |= next_page << shift;
 691 }
 692
 693 void i915_dispatch_flip(struct drm_device * dev, int planes, int sync)
 694 {
 695         drm_i915_private_t *dev_priv = dev->dev_private;
 696         int i;
 697
 698         DRM_DEBUG("planes=0x%x pfCurrentPage=%d\n",
 699                   planes, dev_priv->sarea_priv->pf_current_page);
 700
 701         i915_emit_mi_flush(dev, MI_READ_FLUSH | MI_EXE_FLUSH);
 702
 703         for (i = 0; i < 2; i++)
 704                 if (planes & (1 << i))
 705                         i915_do_dispatch_flip(dev, i, sync);
 706
 707         i915_emit_breadcrumb(dev);
 708 #ifdef I915_HAVE_FENCE
 709         if (unlikely(!sync && ((dev_priv->counter & 0xFF) == 0)))
 710                 drm_fence_flush_old(dev, 0, dev_priv->counter);
 711 #endif
 712 }
 713
 714 static int i915_quiescent(struct drm_device *dev)
 715 {
 716         drm_i915_private_t *dev_priv = dev->dev_private;
 717
 718         i915_kernel_lost_context(dev);
 719         return i915_wait_ring(dev, dev_priv->ring.Size - 8, __FUNCTION__);
 720 }
 721
 722 static int i915_flush_ioctl(struct drm_device *dev, void *data,
 723                             struct drm_file *file_priv)
 724 {
 725
 726         LOCK_TEST_WITH_RETURN(dev, file_priv);
 727
 728         return i915_quiescent(dev);
 729 }
 730
 731 static int i915_batchbuffer(struct drm_device *dev, void *data,
 732                             struct drm_file *file_priv)
 733 {
 734         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 735         drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
 736             dev_priv->sarea_priv;
 737         drm_i915_batchbuffer_t *batch = data;
 738         int ret;
 739
 740         if (!dev_priv->allow_batchbuffer) {
 741                 DRM_ERROR("Batchbuffer ioctl disabled\n");
 742                 return -EINVAL;
 743         }
 744
 745         DRM_DEBUG("i915 batchbuffer, start %x used %d cliprects %d\n",
 746                   batch->start, batch->used, batch->num_cliprects);
 747
 748         LOCK_TEST_WITH_RETURN(dev, file_priv);
 749
 750         if (batch->num_cliprects && DRM_VERIFYAREA_READ(batch->cliprects,
 751                                                         batch->num_cliprects *
 752                                                         sizeof(struct drm_clip_rect)))
 753                 return -EFAULT;
 754
 755         ret = i915_dispatch_batchbuffer(dev, batch);
 756
 757         sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
 758         return ret;
 759 }
 760
 761 static int i915_cmdbuffer(struct drm_device *dev, void *data,
 762                           struct drm_file *file_priv)
 763 {
 764         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 765         drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
 766             dev_priv->sarea_priv;
 767         drm_i915_cmdbuffer_t *cmdbuf = data;
 768         int ret;
 769
 770         DRM_DEBUG("i915 cmdbuffer, buf %p sz %d cliprects %d\n",
 771                   cmdbuf->buf, cmdbuf->sz, cmdbuf->num_cliprects);
 772
 773         LOCK_TEST_WITH_RETURN(dev, file_priv);
 774
 775         if (cmdbuf->num_cliprects &&
 776             DRM_VERIFYAREA_READ(cmdbuf->cliprects,
 777                                 cmdbuf->num_cliprects *
 778                                 sizeof(struct drm_clip_rect))) {
 779                 DRM_ERROR("Fault accessing cliprects\n");
 780                 return -EFAULT;
 781         }
 782
 783         ret = i915_dispatch_cmdbuffer(dev, cmdbuf);
 784         if (ret) {
 785                 DRM_ERROR("i915_dispatch_cmdbuffer failed\n");
 786                 return ret;
 787         }
 788
 789         sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
 790         return 0;
 791 }
 792
 793 #if DRM_DEBUG_CODE
 794 #define DRM_DEBUG_RELOCATION    (drm_debug != 0)
 795 #else
 796 #define DRM_DEBUG_RELOCATION    0
 797 #endif
 798
 799 #ifdef I915_HAVE_BUFFER
 800
 801 struct i915_relocatee_info {
 802         struct drm_buffer_object *buf;
 803         unsigned long offset;
 804         u32 *data_page;
 805         unsigned page_offset;
 806         struct drm_bo_kmap_obj kmap;
 807         int is_iomem;
 808         int idle;
 809         int evicted;
 810 };
 811
 812 struct drm_i915_validate_buffer {
 813         struct drm_buffer_object *buffer;
 814         struct drm_bo_info_rep rep;
 815         int presumed_offset_correct;
 816         void __user *data;
 817         int ret;
 818 };
 819
 820 static void i915_dereference_buffers_locked(struct drm_i915_validate_buffer *buffers,
 821                                             unsigned num_buffers)
 822 {
 823         while (num_buffers--)
 824                 drm_bo_usage_deref_locked(&buffers[num_buffers].buffer);
 825 }
 826
 827 int i915_apply_reloc(struct drm_file *file_priv, int num_buffers,
 828                      struct drm_i915_validate_buffer *buffers,
 829                      struct i915_relocatee_info *relocatee,
 830                      uint32_t *reloc)
 831 {
 832         unsigned index;
 833         unsigned long new_cmd_offset;
 834         u32 val;
 835         int ret, i;
 836         int buf_index = -1;
 837
 838         /*
 839          * FIXME: O(relocs * buffers) complexity.
 840          */
 841
 842         for (i = 0; i <= num_buffers; i++)
 843                 if (buffers[i].buffer)
 844                         if (reloc[2] == buffers[i].buffer->base.hash.key)
 845                                 buf_index = i;
 846
 847         if (buf_index == -1) {
 848                 DRM_ERROR("Illegal relocation buffer %08X\n", reloc[2]);
 849                 return -EINVAL;
 850         }
 851
 852         /*
 853          * Short-circuit relocations that were correctly
 854          * guessed by the client
 855          */
 856         if (buffers[buf_index].presumed_offset_correct && !DRM_DEBUG_RELOCATION)
 857                 return 0;
 858
 859         new_cmd_offset = reloc[0];
 860         if (!relocatee->data_page ||
 861             !drm_bo_same_page(relocatee->offset, new_cmd_offset)) {
 862                 drm_bo_kunmap(&relocatee->kmap);
 863                 relocatee->data_page = NULL;
 864                 relocatee->offset = new_cmd_offset;
 865
 866                 if (unlikely(!relocatee->idle)) {
 867                         ret = drm_bo_wait(relocatee->buf, 0, 0, 0);
 868                         if (ret)
 869                                 return ret;
 870                         relocatee->idle = 1;
 871                 }
 872
 873                 ret = drm_bo_kmap(relocatee->buf, new_cmd_offset >> PAGE_SHIFT,
 874                                   1, &relocatee->kmap);
 875                 if (ret) {
 876                         DRM_ERROR("Could not map command buffer to apply relocs\n %08lx", new_cmd_offset);
 877                         return ret;
 878                 }
 879                 relocatee->data_page = drm_bmo_virtual(&relocatee->kmap,
 880                                                        &relocatee->is_iomem);
 881                 relocatee->page_offset = (relocatee->offset & PAGE_MASK);
 882
 883                 if (!relocatee->evicted &&
 884                     relocatee->buf->mem.flags & DRM_BO_FLAG_CACHED_MAPPED) {
 885                     drm_bo_evict_cached(relocatee->buf);
 886                     relocatee->evicted = 1;
 887                 }
 888         }
 889
 890         val = buffers[buf_index].buffer->offset;
 891         index = (reloc[0] - relocatee->page_offset) >> 2;
 892
 893         /* add in validate */
 894         val = val + reloc[1];
 895
 896         if (DRM_DEBUG_RELOCATION) {
 897                 if (buffers[buf_index].presumed_offset_correct &&
 898                     relocatee->data_page[index] != val) {
 899                         DRM_DEBUG ("Relocation mismatch source %d target %d buffer %d user %08x kernel %08x\n",
 900                                    reloc[0], reloc[1], buf_index, relocatee->data_page[index], val);
 901                 }
 902         }
 903
 904         if (relocatee->is_iomem)
 905                 iowrite32(val, relocatee->data_page + index);
 906         else
 907                 relocatee->data_page[index] = val;
 908         return 0;
 909 }
 910
 911 int i915_process_relocs(struct drm_file *file_priv,
 912                         uint32_t buf_handle,
 913                         uint32_t __user **reloc_user_ptr,
 914                         struct i915_relocatee_info *relocatee,
 915                         struct drm_i915_validate_buffer *buffers,
 916                         uint32_t num_buffers)
 917 {
 918         int ret, reloc_stride;
 919         uint32_t cur_offset;
 920         uint32_t reloc_count;
 921         uint32_t reloc_type;
 922         uint32_t reloc_buf_size;
 923         uint32_t *reloc_buf = NULL;
 924         int i;
 925
 926         /* do a copy from user from the user ptr */
 927         ret = get_user(reloc_count, *reloc_user_ptr);
 928         if (ret) {
 929                 DRM_ERROR("Could not map relocation buffer.\n");
 930                 goto out;
 931         }
 932
 933         ret = get_user(reloc_type, (*reloc_user_ptr)+1);
 934         if (ret) {
 935                 DRM_ERROR("Could not map relocation buffer.\n");
 936                 goto out;
 937         }
 938
 939         if (reloc_type != 0) {
 940                 DRM_ERROR("Unsupported relocation type requested\n");
 941                 ret = -EINVAL;
 942                 goto out;
 943         }
 944
 945         reloc_buf_size = (I915_RELOC_HEADER + (reloc_count * I915_RELOC0_STRIDE)) * sizeof(uint32_t);
 946         reloc_buf = kmalloc(reloc_buf_size, GFP_KERNEL);
 947         if (!reloc_buf) {
 948                 DRM_ERROR("Out of memory for reloc buffer\n");
 949                 ret = -ENOMEM;
 950                 goto out;
 951         }
 952
 953         if (copy_from_user(reloc_buf, *reloc_user_ptr, reloc_buf_size)) {
 954                 ret = -EFAULT;
 955                 goto out;
 956         }
 957
 958         /* get next relocate buffer handle */
 959         *reloc_user_ptr = (uint32_t *)*(unsigned long *)&reloc_buf[2];
 960
 961         reloc_stride = I915_RELOC0_STRIDE * sizeof(uint32_t); /* may be different for other types of relocs */
 962
 963         DRM_DEBUG("num relocs is %d, next is %p\n", reloc_count, *reloc_user_ptr);
 964
 965         for (i = 0; i < reloc_count; i++) {
 966                 cur_offset = I915_RELOC_HEADER + (i * I915_RELOC0_STRIDE);
 967
 968                 ret = i915_apply_reloc(file_priv, num_buffers, buffers,
 969                                        relocatee, reloc_buf + cur_offset);
 970                 if (ret)
 971                         goto out;
 972         }
 973
 974 out:
 975         if (reloc_buf)
 976                 kfree(reloc_buf);
 977
 978         if (relocatee->data_page) {
 979                 drm_bo_kunmap(&relocatee->kmap);
 980                 relocatee->data_page = NULL;
 981         }
 982
 983         return ret;
 984 }
 985
 986 static int i915_exec_reloc(struct drm_file *file_priv, drm_handle_t buf_handle,
 987                            uint32_t __user *reloc_user_ptr,
 988                            struct drm_i915_validate_buffer *buffers,
 989                            uint32_t buf_count)
 990 {
 991         struct drm_device *dev = file_priv->minor->dev;
 992         struct i915_relocatee_info relocatee;
 993         int ret = 0;
 994         int b;
 995
 996         /*
 997          * Short circuit relocations when all previous
 998          * buffers offsets were correctly guessed by
 999          * the client
1000          */
1001         if (!DRM_DEBUG_RELOCATION) {
1002                 for (b = 0; b < buf_count; b++)
1003                         if (!buffers[b].presumed_offset_correct)
1004                                 break;
1005
1006                 if (b == buf_count)
1007                         return 0;
1008         }
1009
1010         memset(&relocatee, 0, sizeof(relocatee));
1011
1012         mutex_lock(&dev->struct_mutex);
1013         relocatee.buf = drm_lookup_buffer_object(file_priv, buf_handle, 1);
1014         mutex_unlock(&dev->struct_mutex);
1015         if (!relocatee.buf) {
1016                 DRM_DEBUG("relocatee buffer invalid %08x\n", buf_handle);
1017                 ret = -EINVAL;
1018                 goto out_err;
1019         }
1020
1021         mutex_lock (&relocatee.buf->mutex);
1022         while (reloc_user_ptr) {
1023                 ret = i915_process_relocs(file_priv, buf_handle, &reloc_user_ptr, &relocatee, buffers, buf_count);
1024                 if (ret) {
1025                         DRM_ERROR("process relocs failed\n");
1026                         goto out_err1;
1027                 }
1028         }
1029
1030 out_err1:
1031         mutex_unlock (&relocatee.buf->mutex);
1032         drm_bo_usage_deref_unlocked(&relocatee.buf);
1033 out_err:
1034         return ret;
1035 }
1036
1037 static int i915_check_presumed(struct drm_i915_op_arg *arg,
1038                                struct drm_buffer_object *bo,
1039                                uint32_t __user *data,
1040                                int *presumed_ok)
1041 {
1042         struct drm_bo_op_req *req = &arg->d.req;
1043         uint32_t hint_offset;
1044         uint32_t hint = req->bo_req.hint;
1045
1046         *presumed_ok = 0;
1047
1048         if (!(hint & DRM_BO_HINT_PRESUMED_OFFSET))
1049                 return 0;
1050         if (bo->offset == req->bo_req.presumed_offset) {
1051                 *presumed_ok = 1;
1052                 return 0;
1053         }
1054
1055         /*
1056          * We need to turn off the HINT_PRESUMED_OFFSET for this buffer in
1057          * the user-space IOCTL argument list, since the buffer has moved,
1058          * we're about to apply relocations and we might subsequently
1059          * hit an -EAGAIN. In that case the argument list will be reused by
1060          * user-space, but the presumed offset is no longer valid.
1061          *
1062          * Needless to say, this is a bit ugly.
1063          */
1064
1065         hint_offset = (uint32_t *)&req->bo_req.hint - (uint32_t *)arg;
1066         hint &= ~DRM_BO_HINT_PRESUMED_OFFSET;
1067         return __put_user(hint, data + hint_offset);
1068 }
1069
1070
1071 /*
1072  * Validate, add fence and relocate a block of bos from a userspace list
1073  */
1074 int i915_validate_buffer_list(struct drm_file *file_priv,
1075                               unsigned int fence_class, uint64_t data,
1076                               struct drm_i915_validate_buffer *buffers,
1077                               uint32_t *num_buffers)
1078 {
1079         struct drm_i915_op_arg arg;
1080         struct drm_bo_op_req *req = &arg.d.req;
1081         int ret = 0;
1082         unsigned buf_count = 0;
1083         uint32_t buf_handle;
1084         uint32_t __user *reloc_user_ptr;
1085         struct drm_i915_validate_buffer *item = buffers;
1086
1087         do {
1088                 if (buf_count >= *num_buffers) {
1089                         DRM_ERROR("Buffer count exceeded %d\n.", *num_buffers);
1090                         ret = -EINVAL;
1091                         goto out_err;
1092                 }
1093                 item = buffers + buf_count;
1094                 item->buffer = NULL;
1095                 item->presumed_offset_correct = 0;
1096
1097                 buffers[buf_count].buffer = NULL;
1098
1099                 if (copy_from_user(&arg, (void __user *)(unsigned long)data, sizeof(arg))) {
1100                         ret = -EFAULT;
1101                         goto out_err;
1102                 }
1103
1104                 ret = 0;
1105                 if (req->op != drm_bo_validate) {
1106                         DRM_ERROR
1107                             ("Buffer object operation wasn't \"validate\".\n");
1108                         ret = -EINVAL;
1109                         goto out_err;
1110                 }
1111                 item->ret = 0;
1112                 item->data = (void __user *) (unsigned long) data;
1113
1114                 buf_handle = req->bo_req.handle;
1115                 reloc_user_ptr = (uint32_t *)(unsigned long)arg.reloc_ptr;
1116
1117                 if (reloc_user_ptr) {
1118                         ret = i915_exec_reloc(file_priv, buf_handle, reloc_user_ptr, buffers, buf_count);
1119                         if (ret)
1120                                 goto out_err;
1121                         DRM_MEMORYBARRIER();
1122                 }
1123
1124                 ret = drm_bo_handle_validate(file_priv, req->bo_req.handle,
1125                                              req->bo_req.flags, req->bo_req.mask,
1126                                              req->bo_req.hint,
1127                                              req->bo_req.fence_class, 0,
1128                                              &item->rep,
1129                                              &item->buffer);
1130
1131                 if (ret) {
1132                         DRM_ERROR("error on handle validate %d\n", ret);
1133                         goto out_err;
1134                 }
1135
1136                 buf_count++;
1137
1138                 ret = i915_check_presumed(&arg, item->buffer,
1139                                           (uint32_t __user *)
1140                                           (unsigned long) data,
1141                                           &item->presumed_offset_correct);
1142                 if (ret)
1143                         goto out_err;
1144
1145                 data = arg.next;
1146         } while (data != 0);
1147 out_err:
1148         *num_buffers = buf_count;
1149         item->ret = (ret != -EAGAIN) ? ret : 0;
1150         return ret;
1151 }
1152
1153
1154 /*
1155  * Remove all buffers from the unfenced list.
1156  * If the execbuffer operation was aborted, for example due to a signal,
1157  * this also make sure that buffers retain their original state and
1158  * fence pointers.
1159  * Copy back buffer information to user-space unless we were interrupted
1160  * by a signal. In which case the IOCTL must be rerun.
1161  */
1162
1163 static int i915_handle_copyback(struct drm_device *dev,
1164                                 struct drm_i915_validate_buffer *buffers,
1165                                 unsigned int num_buffers, int ret)
1166 {
1167         int err = ret;
1168         int i;
1169         struct drm_i915_op_arg arg;
1170
1171         if (ret)
1172                 drm_putback_buffer_objects(dev);
1173
1174         if (ret != -EAGAIN) {
1175                 for (i = 0; i < num_buffers; ++i) {
1176                         arg.handled = 1;
1177                         arg.d.rep.ret = buffers->ret;
1178                         arg.d.rep.bo_info = buffers->rep;
1179                         if (__copy_to_user(buffers->data, &arg, sizeof(arg)))
1180                                 err = -EFAULT;
1181                         buffers++;
1182                 }
1183         }
1184
1185         return err;
1186 }
1187
1188 /*
1189  * Create a fence object, and if that fails, pretend that everything is
1190  * OK and just idle the GPU.
1191  */
1192
1193 void i915_fence_or_sync(struct drm_file *file_priv,
1194                         uint32_t fence_flags,
1195                         struct drm_fence_arg *fence_arg,
1196                         struct drm_fence_object **fence_p)
1197 {
1198         struct drm_device *dev = file_priv->minor->dev;
1199         int ret;
1200         struct drm_fence_object *fence;
1201
1202         ret = drm_fence_buffer_objects(dev, NULL, fence_flags,
1203                          NULL, &fence);
1204
1205         if (ret) {
1206
1207                 /*
1208                  * Fence creation failed.
1209                  * Fall back to synchronous operation and idle the engine.
1210                  */
1211
1212                 (void) i915_emit_mi_flush(dev, MI_READ_FLUSH);
1213                 (void) i915_quiescent(dev);
1214
1215                 if (!(fence_flags & DRM_FENCE_FLAG_NO_USER)) {
1216
1217                         /*
1218                          * Communicate to user-space that
1219                          * fence creation has failed and that
1220                          * the engine is idle.
1221                          */
1222
1223                         fence_arg->handle = ~0;
1224                         fence_arg->error = ret;
1225                 }
1226
1227                 drm_putback_buffer_objects(dev);
1228                 if (fence_p)
1229                     *fence_p = NULL;
1230                 return;
1231         }
1232
1233         if (!(fence_flags & DRM_FENCE_FLAG_NO_USER)) {
1234
1235                 ret = drm_fence_add_user_object(file_priv, fence,
1236                                                 fence_flags &
1237                                                 DRM_FENCE_FLAG_SHAREABLE);
1238                 if (!ret)
1239                         drm_fence_fill_arg(fence, fence_arg);
1240                 else {
1241                         /*
1242                          * Fence user object creation failed.
1243                          * We must idle the engine here as well, as user-
1244                          * space expects a fence object to wait on. Since we
1245                          * have a fence object we wait for it to signal
1246                          * to indicate engine "sufficiently" idle.
1247                          */
1248
1249                         (void) drm_fence_object_wait(fence, 0, 1,
1250                                                      fence->type);
1251                         drm_fence_usage_deref_unlocked(&fence);
1252                         fence_arg->handle = ~0;
1253                         fence_arg->error = ret;
1254                 }
1255         }
1256
1257         if (fence_p)
1258                 *fence_p = fence;
1259         else if (fence)
1260                 drm_fence_usage_deref_unlocked(&fence);
1261 }
1262
1263
1264 static int i915_execbuffer(struct drm_device *dev, void *data,
1265                            struct drm_file *file_priv)
1266 {
1267         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
1268         drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
1269                 dev_priv->sarea_priv;
1270         struct drm_i915_execbuffer *exec_buf = data;
1271         struct drm_i915_batchbuffer *batch = &exec_buf->batch;
1272         struct drm_fence_arg *fence_arg = &exec_buf->fence_arg;
1273         int num_buffers;
1274         int ret;
1275         struct drm_i915_validate_buffer *buffers;
1276
1277         if (!dev_priv->allow_batchbuffer) {
1278                 DRM_ERROR("Batchbuffer ioctl disabled\n");
1279                 return -EINVAL;
1280         }
1281
1282
1283         if (batch->num_cliprects && DRM_VERIFYAREA_READ(batch->cliprects,
1284                                                         batch->num_cliprects *
1285                                                         sizeof(struct drm_clip_rect)))
1286                 return -EFAULT;
1287
1288         if (exec_buf->num_buffers > dev_priv->max_validate_buffers)
1289                 return -EINVAL;
1290
1291
1292         ret = drm_bo_read_lock(&dev->bm.bm_lock);
1293         if (ret)
1294                 return ret;
1295
1296         /*
1297          * The cmdbuf_mutex makes sure the validate-submit-fence
1298          * operation is atomic.
1299          */
1300
1301         ret = mutex_lock_interruptible(&dev_priv->cmdbuf_mutex);
1302         if (ret) {
1303                 drm_bo_read_unlock(&dev->bm.bm_lock);
1304                 return -EAGAIN;
1305         }
1306
1307         num_buffers = exec_buf->num_buffers;
1308
1309         buffers = drm_calloc(num_buffers, sizeof(struct drm_i915_validate_buffer), DRM_MEM_DRIVER);
1310         if (!buffers) {
1311                 drm_bo_read_unlock(&dev->bm.bm_lock);
1312                 mutex_unlock(&dev_priv->cmdbuf_mutex);
1313                 return -ENOMEM;
1314         }
1315
1316         /* validate buffer list + fixup relocations */
1317         ret = i915_validate_buffer_list(file_priv, 0, exec_buf->ops_list,
1318                                         buffers, &num_buffers);
1319         if (ret)
1320                 goto out_err0;
1321
1322         /* make sure all previous memory operations have passed */
1323         DRM_MEMORYBARRIER();
1324         drm_agp_chipset_flush(dev);
1325
1326         /* submit buffer */
1327         batch->start = buffers[num_buffers-1].buffer->offset;
1328
1329         DRM_DEBUG("i915 exec batchbuffer, start %x used %d cliprects %d\n",
1330                   batch->start, batch->used, batch->num_cliprects);
1331
1332         ret = i915_dispatch_batchbuffer(dev, batch);
1333         if (ret)
1334                 goto out_err0;
1335
1336         if (sarea_priv)
1337                 sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
1338
1339         i915_fence_or_sync(file_priv, fence_arg->flags, fence_arg, NULL);
1340
1341 out_err0:
1342
1343         /* handle errors */
1344         ret = i915_handle_copyback(dev, buffers, num_buffers, ret);
1345         mutex_lock(&dev->struct_mutex);
1346         i915_dereference_buffers_locked(buffers, num_buffers);
1347         mutex_unlock(&dev->struct_mutex);
1348
1349         drm_free(buffers, (exec_buf->num_buffers * sizeof(struct drm_buffer_object *)), DRM_MEM_DRIVER);
1350
1351         mutex_unlock(&dev_priv->cmdbuf_mutex);
1352         drm_bo_read_unlock(&dev->bm.bm_lock);
1353         return ret;
1354 }
1355 #endif
1356
1357 static int i915_do_cleanup_pageflip(struct drm_device * dev)
1358 {
1359         drm_i915_private_t *dev_priv = dev->dev_private;
1360         int i, planes, num_pages = dev_priv->sarea_priv->third_handle ? 3 : 2;
1361
1362         DRM_DEBUG("\n");
1363
1364         for (i = 0, planes = 0; i < 2; i++)
1365                 if (dev_priv->sarea_priv->pf_current_page & (0x3 << (2 * i))) {
1366                         dev_priv->sarea_priv->pf_current_page =
1367                                 (dev_priv->sarea_priv->pf_current_page &
1368                                  ~(0x3 << (2 * i))) | ((num_pages - 1) << (2 * i));
1369
1370                         planes |= 1 << i;
1371                 }
1372
1373         if (planes)
1374                 i915_dispatch_flip(dev, planes, 0);
1375
1376         return 0;
1377 }
1378
1379 static int i915_flip_bufs(struct drm_device *dev, void *data, struct drm_file *file_priv)
1380 {
1381         drm_i915_flip_t *param = data;
1382
1383         DRM_DEBUG("\n");
1384
1385         LOCK_TEST_WITH_RETURN(dev, file_priv);
1386
1387         /* This is really planes */
1388         if (param->pipes & ~0x3) {
1389                 DRM_ERROR("Invalid planes 0x%x, only <= 0x3 is valid\n",
1390                           param->pipes);
1391                 return -EINVAL;
1392         }
1393
1394         i915_dispatch_flip(dev, param->pipes, 0);
1395
1396         return 0;
1397 }
1398
1399
1400 static int i915_getparam(struct drm_device *dev, void *data,
1401                          struct drm_file *file_priv)
1402 {
1403         drm_i915_private_t *dev_priv = dev->dev_private;
1404         drm_i915_getparam_t *param = data;
1405         int value;
1406
1407         if (!dev_priv) {
1408                 DRM_ERROR("called with no initialization\n");
1409                 return -EINVAL;
1410         }
1411
1412         switch (param->param) {
1413         case I915_PARAM_IRQ_ACTIVE:
1414                 value = dev->irq ? 1 : 0;
1415                 break;
1416         case I915_PARAM_ALLOW_BATCHBUFFER:
1417                 value = dev_priv->allow_batchbuffer ? 1 : 0;
1418                 break;
1419         case I915_PARAM_LAST_DISPATCH:
1420                 value = READ_BREADCRUMB(dev_priv);
1421                 break;
1422         case I915_PARAM_CHIPSET_ID:
1423                 value = dev->pci_device;
1424                 break;
1425         default:
1426                 DRM_ERROR("Unknown parameter %d\n", param->param);
1427                 return -EINVAL;
1428         }
1429
1430         if (DRM_COPY_TO_USER(param->value, &value, sizeof(int))) {
1431                 DRM_ERROR("DRM_COPY_TO_USER failed\n");
1432                 return -EFAULT;
1433         }
1434
1435         return 0;
1436 }
1437
1438 static int i915_setparam(struct drm_device *dev, void *data,
1439                          struct drm_file *file_priv)
1440 {
1441         drm_i915_private_t *dev_priv = dev->dev_private;
1442         drm_i915_setparam_t *param = data;
1443
1444         if (!dev_priv) {
1445                 DRM_ERROR("called with no initialization\n");
1446                 return -EINVAL;
1447         }
1448
1449         switch (param->param) {
1450         case I915_SETPARAM_USE_MI_BATCHBUFFER_START:
1451                 if (!IS_I965G(dev))
1452                         dev_priv->use_mi_batchbuffer_start = param->value;
1453                 break;
1454         case I915_SETPARAM_TEX_LRU_LOG_GRANULARITY:
1455                 dev_priv->tex_lru_log_granularity = param->value;
1456                 break;
1457         case I915_SETPARAM_ALLOW_BATCHBUFFER:
1458                 dev_priv->allow_batchbuffer = param->value;
1459                 break;
1460         default:
1461                 DRM_ERROR("unknown parameter %d\n", param->param);
1462                 return -EINVAL;
1463         }
1464
1465         return 0;
1466 }
1467
1468 drm_i915_mmio_entry_t mmio_table[] = {
1469         [MMIO_REGS_PS_DEPTH_COUNT] = {
1470                 I915_MMIO_MAY_READ|I915_MMIO_MAY_WRITE,
1471                 0x2350,
1472                 8
1473         }
1474 };
1475
1476 static int mmio_table_size = sizeof(mmio_table)/sizeof(drm_i915_mmio_entry_t);
1477
1478 static int i915_mmio(struct drm_device *dev, void *data,
1479                      struct drm_file *file_priv)
1480 {
1481         uint32_t buf[8];
1482         drm_i915_private_t *dev_priv = dev->dev_private;
1483         drm_i915_mmio_entry_t *e;
1484         drm_i915_mmio_t *mmio = data;
1485         void __iomem *base;
1486         int i;
1487
1488         if (!dev_priv) {
1489                 DRM_ERROR("called with no initialization\n");
1490                 return -EINVAL;
1491         }
1492
1493         if (mmio->reg >= mmio_table_size)
1494                 return -EINVAL;
1495
1496         e = &mmio_table[mmio->reg];
1497         base = (u8 *) dev_priv->mmio_map->handle + e->offset;
1498
1499         switch (mmio->read_write) {
1500         case I915_MMIO_READ:
1501                 if (!(e->flag & I915_MMIO_MAY_READ))
1502                         return -EINVAL;
1503                 for (i = 0; i < e->size / 4; i++)
1504                         buf[i] = I915_READ(e->offset + i * 4);
1505                 if (DRM_COPY_TO_USER(mmio->data, buf, e->size)) {
1506                         DRM_ERROR("DRM_COPY_TO_USER failed\n");
1507                         return -EFAULT;
1508                 }
1509                 break;
1510
1511         case I915_MMIO_WRITE:
1512                 if (!(e->flag & I915_MMIO_MAY_WRITE))
1513                         return -EINVAL;
1514                 if (DRM_COPY_FROM_USER(buf, mmio->data, e->size)) {
1515                         DRM_ERROR("DRM_COPY_TO_USER failed\n");
1516                         return -EFAULT;
1517                 }
1518                 for (i = 0; i < e->size / 4; i++)
1519                         I915_WRITE(e->offset + i * 4, buf[i]);
1520                 break;
1521         }
1522         return 0;
1523 }
1524
1525 static int i915_set_status_page(struct drm_device *dev, void *data,
1526                                 struct drm_file *file_priv)
1527 {
1528         drm_i915_private_t *dev_priv = dev->dev_private;
1529         drm_i915_hws_addr_t *hws = data;
1530
1531         if (!dev_priv) {
1532                 DRM_ERROR("called with no initialization\n");
1533                 return -EINVAL;
1534         }
1535         DRM_DEBUG("set status page addr 0x%08x\n", (u32)hws->addr);
1536
1537         dev_priv->status_gfx_addr = hws->addr & (0x1ffff<<12);
1538
1539         dev_priv->hws_map.offset = dev->agp->base + hws->addr;
1540         dev_priv->hws_map.size = 4*1024;
1541         dev_priv->hws_map.type = 0;
1542         dev_priv->hws_map.flags = 0;
1543         dev_priv->hws_map.mtrr = 0;
1544
1545         drm_core_ioremap(&dev_priv->hws_map, dev);
1546         if (dev_priv->hws_map.handle == NULL) {
1547                 i915_dma_cleanup(dev);
1548                 dev_priv->status_gfx_addr = 0;
1549                 DRM_ERROR("can not ioremap virtual address for"
1550                                 " G33 hw status page\n");
1551                 return -ENOMEM;
1552         }
1553         dev_priv->hw_status_page = dev_priv->hws_map.handle;
1554
1555         memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
1556         I915_WRITE(0x02080, dev_priv->status_gfx_addr);
1557         DRM_DEBUG("load hws 0x2080 with gfx mem 0x%x\n",
1558                         dev_priv->status_gfx_addr);
1559         DRM_DEBUG("load hws at %p\n", dev_priv->hw_status_page);
1560         return 0;
1561 }
1562
1563 int i915_driver_load(struct drm_device *dev, unsigned long flags)
1564 {
1565         struct drm_i915_private *dev_priv = dev->dev_private;
1566         unsigned long base, size;
1567         int ret = 0, mmio_bar = IS_I9XX(dev) ? 0 : 1;
1568
1569         /* i915 has 4 more counters */
1570         dev->counters += 4;
1571         dev->types[6] = _DRM_STAT_IRQ;
1572         dev->types[7] = _DRM_STAT_PRIMARY;
1573         dev->types[8] = _DRM_STAT_SECONDARY;
1574         dev->types[9] = _DRM_STAT_DMA;
1575
1576         dev_priv = drm_alloc(sizeof(drm_i915_private_t), DRM_MEM_DRIVER);
1577         if (dev_priv == NULL)
1578                 return -ENOMEM;
1579
1580         memset(dev_priv, 0, sizeof(drm_i915_private_t));
1581
1582         dev->dev_private = (void *)dev_priv;
1583
1584         /* Add register map (needed for suspend/resume) */
1585         base = drm_get_resource_start(dev, mmio_bar);
1586         size = drm_get_resource_len(dev, mmio_bar);
1587
1588         ret = drm_addmap(dev, base, size, _DRM_REGISTERS,
1589                 _DRM_KERNEL | _DRM_DRIVER, &dev_priv->mmio_map);
1590
1591 #ifdef __linux__
1592 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25)
1593         intel_init_chipset_flush_compat(dev);
1594 #endif
1595 #endif
1596
1597         return ret;
1598 }
1599
1600 int i915_driver_unload(struct drm_device *dev)
1601 {
1602         struct drm_i915_private *dev_priv = dev->dev_private;
1603
1604         if (dev_priv->mmio_map)
1605                 drm_rmmap(dev, dev_priv->mmio_map);
1606
1607         drm_free(dev->dev_private, sizeof(drm_i915_private_t),
1608                  DRM_MEM_DRIVER);
1609 #ifdef __linux__
1610 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25)
1611         intel_fini_chipset_flush_compat(dev);
1612 #endif
1613 #endif
1614         return 0;
1615 }
1616
1617 void i915_driver_lastclose(struct drm_device * dev)
1618 {
1619         drm_i915_private_t *dev_priv = dev->dev_private;
1620
1621         if (drm_getsarea(dev) && dev_priv->sarea_priv)
1622                 i915_do_cleanup_pageflip(dev);
1623         if (dev_priv->agp_heap)
1624                 i915_mem_takedown(&(dev_priv->agp_heap));
1625
1626         if (dev_priv->sarea_kmap.virtual) {
1627                 drm_bo_kunmap(&dev_priv->sarea_kmap);
1628                 dev_priv->sarea_kmap.virtual = NULL;
1629                 dev->lock.hw_lock = NULL;
1630                 dev->sigdata.lock = NULL;
1631         }
1632
1633         if (dev_priv->sarea_bo) {
1634                 mutex_lock(&dev->struct_mutex);
1635                 drm_bo_usage_deref_locked(&dev_priv->sarea_bo);
1636                 mutex_unlock(&dev->struct_mutex);
1637                 dev_priv->sarea_bo = NULL;
1638         }
1639
1640         i915_dma_cleanup(dev);
1641 }
1642
1643 void i915_driver_preclose(struct drm_device * dev, struct drm_file *file_priv)
1644 {
1645         drm_i915_private_t *dev_priv = dev->dev_private;
1646         i915_mem_release(dev, file_priv, dev_priv->agp_heap);
1647 }
1648
1649 struct drm_ioctl_desc i915_ioctls[] = {
1650         DRM_IOCTL_DEF(DRM_I915_INIT, i915_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1651         DRM_IOCTL_DEF(DRM_I915_FLUSH, i915_flush_ioctl, DRM_AUTH),
1652         DRM_IOCTL_DEF(DRM_I915_FLIP, i915_flip_bufs, DRM_AUTH),
1653         DRM_IOCTL_DEF(DRM_I915_BATCHBUFFER, i915_batchbuffer, DRM_AUTH),
1654         DRM_IOCTL_DEF(DRM_I915_IRQ_EMIT, i915_irq_emit, DRM_AUTH),
1655         DRM_IOCTL_DEF(DRM_I915_IRQ_WAIT, i915_irq_wait, DRM_AUTH),
1656         DRM_IOCTL_DEF(DRM_I915_GETPARAM, i915_getparam, DRM_AUTH),
1657         DRM_IOCTL_DEF(DRM_I915_SETPARAM, i915_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1658         DRM_IOCTL_DEF(DRM_I915_ALLOC, i915_mem_alloc, DRM_AUTH),
1659         DRM_IOCTL_DEF(DRM_I915_FREE, i915_mem_free, DRM_AUTH),
1660         DRM_IOCTL_DEF(DRM_I915_INIT_HEAP, i915_mem_init_heap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1661         DRM_IOCTL_DEF(DRM_I915_CMDBUFFER, i915_cmdbuffer, DRM_AUTH),
1662         DRM_IOCTL_DEF(DRM_I915_DESTROY_HEAP,  i915_mem_destroy_heap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY ),
1663         DRM_IOCTL_DEF(DRM_I915_SET_VBLANK_PIPE,  i915_vblank_pipe_set, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY ),
1664         DRM_IOCTL_DEF(DRM_I915_GET_VBLANK_PIPE,  i915_vblank_pipe_get, DRM_AUTH ),
1665         DRM_IOCTL_DEF(DRM_I915_VBLANK_SWAP, i915_vblank_swap, DRM_AUTH),
1666         DRM_IOCTL_DEF(DRM_I915_MMIO, i915_mmio, DRM_AUTH),
1667         DRM_IOCTL_DEF(DRM_I915_HWS_ADDR, i915_set_status_page, DRM_AUTH),
1668 #ifdef I915_HAVE_BUFFER
1669         DRM_IOCTL_DEF(DRM_I915_EXECBUFFER, i915_execbuffer, DRM_AUTH),
1670 #endif
1671 };
1672
1673 int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls);
1674
1675 /**
1676  * Determine if the device really is AGP or not.
1677  *
1678  * All Intel graphics chipsets are treated as AGP, even if they are really
1679  * PCI-e.
1680  *
1681  * \param dev   The device to be tested.
1682  *
1683  * \returns
1684  * A value of 1 is always retured to indictate every i9x5 is AGP.
1685  */
1686 int i915_driver_device_is_agp(struct drm_device * dev)
1687 {
1688         return 1;
1689 }
1690
1691 int i915_driver_firstopen(struct drm_device *dev)
1692 {
1693 #ifdef I915_HAVE_BUFFER
1694         drm_bo_driver_init(dev);
1695 #endif
1696         return 0;
1697 }