shared-core/i915_init.c

   1 /*
   2  * Copyright (c) 2007 Intel Corporation
   3  *   Jesse Barnes <jesse.barnes@intel.com>
   4  *
   5  * Copyright © 2002, 2003 David Dawes <dawes@xfree86.org>
   6  *                   2004 Sylvain Meyer
   7  *
   8  * GPL/BSD dual license
   9  */
  10 #include "drmP.h"
  11 #include "drm.h"
  12 #include "drm_sarea.h"
  13 #include "i915_drm.h"
  14 #include "i915_drv.h"
  15
  16 /**
  17  * i915_probe_agp - get AGP bootup configuration
  18  * @pdev: PCI device
  19  * @aperture_size: returns AGP aperture configured size
  20  * @preallocated_size: returns size of BIOS preallocated AGP space
  21  *
  22  * Since Intel integrated graphics are UMA, the BIOS has to set aside
  23  * some RAM for the framebuffer at early boot.  This code figures out
  24  * how much was set aside so we can use it for our own purposes.
  25  */
  26 int i915_probe_agp(struct pci_dev *pdev, unsigned long *aperture_size,
  27                    unsigned long *preallocated_size)
  28 {
  29         struct pci_dev *bridge_dev;
  30         u16 tmp = 0;
  31         unsigned long overhead;
  32
  33         bridge_dev = pci_get_bus_and_slot(0, PCI_DEVFN(0,0));
  34         if (!bridge_dev) {
  35                 DRM_ERROR("bridge device not found\n");
  36                 return -1;
  37         }
  38
  39         /* Get the fb aperture size and "stolen" memory amount. */
  40         pci_read_config_word(bridge_dev, INTEL_GMCH_CTRL, &tmp);
  41         pci_dev_put(bridge_dev);
  42
  43         *aperture_size = 1024 * 1024;
  44         *preallocated_size = 1024 * 1024;
  45
  46         switch (pdev->device) {
  47         case PCI_DEVICE_ID_INTEL_82830_CGC:
  48         case PCI_DEVICE_ID_INTEL_82845G_HB:
  49         case PCI_DEVICE_ID_INTEL_82855GM_IG:
  50         case PCI_DEVICE_ID_INTEL_82865_IG:
  51                 if ((tmp & INTEL_GMCH_MEM_MASK) == INTEL_GMCH_MEM_64M)
  52                         *aperture_size *= 64;
  53                 else
  54                         *aperture_size *= 128;
  55                 break;
  56         default:
  57                 /* 9xx supports large sizes, just look at the length */
  58                 *aperture_size = pci_resource_len(pdev, 2);
  59                 break;
  60         }
  61
  62         /*
  63          * Some of the preallocated space is taken by the GTT
  64          * and popup.  GTT is 1K per MB of aperture size, and popup is 4K.
  65          */
  66         overhead = (*aperture_size / 1024) + 4096;
  67         switch (tmp & INTEL_855_GMCH_GMS_MASK) {
  68         case INTEL_855_GMCH_GMS_STOLEN_1M:
  69                 break; /* 1M already */
  70         case INTEL_855_GMCH_GMS_STOLEN_4M:
  71                 *preallocated_size *= 4;
  72                 break;
  73         case INTEL_855_GMCH_GMS_STOLEN_8M:
  74                 *preallocated_size *= 8;
  75                 break;
  76         case INTEL_855_GMCH_GMS_STOLEN_16M:
  77                 *preallocated_size *= 16;
  78                 break;
  79         case INTEL_855_GMCH_GMS_STOLEN_32M:
  80                 *preallocated_size *= 32;
  81                 break;
  82         case INTEL_915G_GMCH_GMS_STOLEN_48M:
  83                 *preallocated_size *= 48;
  84                 break;
  85         case INTEL_915G_GMCH_GMS_STOLEN_64M:
  86                 *preallocated_size *= 64;
  87                 break;
  88         case INTEL_855_GMCH_GMS_DISABLED:
  89                 DRM_ERROR("video memory is disabled\n");
  90                 return -1;
  91         default:
  92                 DRM_ERROR("unexpected GMCH_GMS value: 0x%02x\n",
  93                         tmp & INTEL_855_GMCH_GMS_MASK);
  94                 return -1;
  95         }
  96         *preallocated_size -= overhead;
  97
  98         return 0;
  99 }
 100
 101 /**
 102  * i915_driver_load - setup chip and create an initial config
 103  * @dev: DRM device
 104  * @flags: startup flags
 105  *
 106  * The driver load routine has to do several things:
 107  *   - drive output discovery via intel_modeset_init()
 108  *   - initialize the memory manager
 109  *   - allocate initial config memory
 110  *   - setup the DRM framebuffer with the allocated memory
 111  */
 112 int i915_driver_load(drm_device_t *dev, unsigned long flags)
 113 {
 114         drm_i915_private_t *dev_priv;
 115         drm_i915_init_t init;
 116         drm_buffer_object_t *entry;
 117         struct drm_framebuffer *fb;
 118         unsigned long agp_size, prealloc_size;
 119         int hsize, vsize, bytes_per_pixel, size, ret;
 120
 121         dev_priv = drm_alloc(sizeof(drm_i915_private_t), DRM_MEM_DRIVER);
 122         if (dev_priv == NULL)
 123                 return DRM_ERR(ENOMEM);
 124
 125         memset(dev_priv, 0, sizeof(drm_i915_private_t));
 126         dev->dev_private = (void *)dev_priv;
 127 //      dev_priv->flags = flags;
 128
 129         /* i915 has 4 more counters */
 130         dev->counters += 4;
 131         dev->types[6] = _DRM_STAT_IRQ;
 132         dev->types[7] = _DRM_STAT_PRIMARY;
 133         dev->types[8] = _DRM_STAT_SECONDARY;
 134         dev->types[9] = _DRM_STAT_DMA;
 135
 136         if (IS_I9XX(dev)) {
 137                 dev_priv->mmiobase = drm_get_resource_start(dev, 0);
 138                 dev_priv->mmiolen = drm_get_resource_len(dev, 0);
 139                 dev->mode_config.fb_base = dev_priv->baseaddr =
 140                         drm_get_resource_start(dev, 2) & 0xff000000;
 141         } else if (drm_get_resource_start(dev, 1)) {
 142                 dev_priv->mmiobase = drm_get_resource_start(dev, 1);
 143                 dev_priv->mmiolen = drm_get_resource_len(dev, 1);
 144                 dev->mode_config.fb_base = dev_priv->baseaddr =
 145                         drm_get_resource_start(dev, 0) & 0xff000000;
 146         } else {
 147                 DRM_ERROR("Unable to find MMIO registers\n");
 148                 return -ENODEV;
 149         }
 150
 151         ret = drm_addmap(dev, dev_priv->mmiobase, dev_priv->mmiolen,
 152                          _DRM_REGISTERS, _DRM_READ_ONLY, &dev_priv->mmio_map);
 153         if (ret != 0) {
 154                 DRM_ERROR("Cannot add mapping for MMIO registers\n");
 155                 return ret;
 156         }
 157
 158         ret = drm_setup(dev);
 159         if (ret) {
 160                 DRM_ERROR("drm_setup failed\n");
 161                 return ret;
 162         }
 163
 164         DRM_GETSAREA();
 165         if (!dev_priv->sarea) {
 166                 DRM_ERROR("can not find sarea!\n");
 167                 dev->dev_private = (void *)dev_priv;
 168                 i915_dma_cleanup(dev);
 169                 return DRM_ERR(EINVAL);
 170         }
 171
 172         /* FIXME: assume sarea_priv is right after SAREA */
 173         dev_priv->sarea_priv = dev_priv->sarea->handle + sizeof(drm_sarea_t);
 174
 175         /*
 176          * Initialize the memory manager for local and AGP space
 177          */
 178         drm_bo_driver_init(dev);
 179
 180         i915_probe_agp(dev->pdev, &agp_size, &prealloc_size);
 181         drm_bo_init_mm(dev, DRM_BO_MEM_PRIV0, dev_priv->baseaddr,
 182                        prealloc_size);
 183
 184         /* Allocate scanout buffer and command ring */
 185         /* FIXME: types and other args correct? */
 186         hsize = 1280;
 187         vsize = 800;
 188         bytes_per_pixel = 4;
 189         size = hsize * vsize * bytes_per_pixel;
 190         drm_buffer_object_create(dev, size, drm_bo_type_kernel,
 191                                  DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE |
 192                                  DRM_BO_FLAG_MEM_PRIV0 | DRM_BO_FLAG_NO_MOVE,
 193                                  0, PAGE_SIZE, 0,
 194                                  &entry);
 195
 196         DRM_DEBUG("allocated bo, start: 0x%lx, offset: 0x%lx\n",
 197                   entry->buffer_start, entry->offset);
 198         intel_modeset_init(dev);
 199
 200         fb = drm_framebuffer_create(dev);
 201         if (!fb) {
 202                 DRM_ERROR("failed to allocate fb\n");
 203                 return -EINVAL;
 204         }
 205
 206         fb->width = hsize;
 207         fb->height = vsize;
 208         fb->pitch = hsize;
 209         fb->bits_per_pixel = bytes_per_pixel * 8;
 210         fb->depth = bytes_per_pixel * 8;
 211         fb->offset = entry->offset;
 212         fb->bo = entry;
 213
 214         drm_initial_config(dev, fb, false);
 215         drmfb_probe(dev, fb);
 216 #if 0
 217         /* FIXME: command ring needs AGP space, do we own it at this point? */
 218         dev_priv->ring.Start = dev_priv->baseaddr;
 219         dev_priv->ring.End = 128*1024;
 220         dev_priv->ring.Size = 128*1024;
 221         dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
 222
 223         dev_priv->ring.map.offset = dev_priv->ring.Start;
 224         dev_priv->ring.map.size = dev_priv->ring.Size;
 225         dev_priv->ring.map.type = 0;
 226         dev_priv->ring.map.flags = 0;
 227         dev_priv->ring.map.mtrr = 0;
 228
 229         drm_core_ioremap(&dev_priv->ring.map, dev);
 230
 231         if (dev_priv->ring.map.handle == NULL) {
 232                 dev->dev_private = (void *)dev_priv;
 233                 i915_dma_cleanup(dev);
 234                 DRM_ERROR("can not ioremap virtual address for"
 235                           " ring buffer\n");
 236                 return DRM_ERR(ENOMEM);
 237         }
 238
 239         dev_priv->ring.virtual_start = dev_priv->ring.map.handle;
 240         dev_priv->cpp = 4;
 241         dev_priv->sarea_priv->pf_current_page = 0;
 242
 243         /* We are using separate values as placeholders for mechanisms for
 244          * private backbuffer/depthbuffer usage.
 245          */
 246         dev_priv->use_mi_batchbuffer_start = 0;
 247
 248         /* Allow hardware batchbuffers unless told otherwise.
 249          */
 250         dev_priv->allow_batchbuffer = 1;
 251
 252         /* Program Hardware Status Page */
 253         dev_priv->status_page_dmah = drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE,
 254             0xffffffff);
 255
 256         if (!dev_priv->status_page_dmah) {
 257                 dev->dev_private = (void *)dev_priv;
 258                 i915_dma_cleanup(dev);
 259                 DRM_ERROR("Can not allocate hardware status page\n");
 260                 return DRM_ERR(ENOMEM);
 261         }
 262         dev_priv->hw_status_page = dev_priv->status_page_dmah->vaddr;
 263         dev_priv->dma_status_page = dev_priv->status_page_dmah->busaddr;
 264
 265         memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
 266         DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
 267
 268         I915_WRITE(0x02080, dev_priv->dma_status_page);
 269         DRM_DEBUG("Enabled hardware status page\n");
 270 #endif
 271
 272         return 0;
 273 }
 274
 275 int i915_driver_unload(drm_device_t *dev)
 276 {
 277         drm_i915_private_t *dev_priv = dev->dev_private;
 278         struct drm_framebuffer *fb;
 279
 280         /* FIXME: remove framebuffer */
 281         intel_modeset_cleanup(dev);
 282         drm_free(dev_priv, sizeof(*dev_priv), DRM_MEM_DRIVER);
 283
 284         dev->dev_private = NULL;
 285         return 0;
 286 }
 287
 288 void i915_driver_lastclose(drm_device_t * dev)
 289 {
 290         drm_i915_private_t *dev_priv = dev->dev_private;
 291
 292         i915_mem_takedown(&(dev_priv->agp_heap));
 293
 294         i915_dma_cleanup(dev);
 295
 296         dev_priv->mmio_map = NULL;
 297 }
 298
 299 void i915_driver_preclose(drm_device_t * dev, DRMFILE filp)
 300 {
 301         drm_i915_private_t *dev_priv = dev->dev_private;
 302         i915_mem_release(dev, filp, dev_priv->agp_heap);
 303 }
 304