shared-core/i915_irq.c

   1 /* i915_irq.c -- IRQ support for the I915 -*- linux-c -*-
   2  */
   3 /*
   4  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   5  * All Rights Reserved.
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a
   8  * copy of this software and associated documentation files (the
   9  * "Software"), to deal in the Software without restriction, including
  10  * without limitation the rights to use, copy, modify, merge, publish,
  11  * distribute, sub license, and/or sell copies of the Software, and to
  12  * permit persons to whom the Software is furnished to do so, subject to
  13  * the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the
  16  * next paragraph) shall be included in all copies or substantial portions
  17  * of the Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  20  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  21  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  22  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  23  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  24  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  25  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  26  *
  27  */
  28
  29 #include "drmP.h"
  30 #include "drm.h"
  31 #include "i915_drm.h"
  32 #include "i915_drv.h"
  33
  34 #define USER_INT_FLAG (1<<1)
  35 #define VSYNC_PIPEB_FLAG (1<<5)
  36 #define VSYNC_PIPEA_FLAG (1<<7)
  37
  38 #define MAX_NOPID ((u32)~0)
  39
  40 /**
  41  * i915_get_pipe - return the the pipe associated with a given plane
  42  * @dev: DRM device
  43  * @plane: plane to look for
  44  *
  45  * The Intel Mesa & 2D drivers call the vblank routines with a plane number
  46  * rather than a pipe number, since they may not always be equal.  This routine
  47  * maps the given @plane back to a pipe number.
  48  */
  49 static int
  50 i915_get_pipe(struct drm_device *dev, int plane)
  51 {
  52         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
  53         u32 dspcntr;
  54
  55         dspcntr = plane ? I915_READ(DSPBCNTR) : I915_READ(DSPACNTR);
  56
  57         return dspcntr & DISPPLANE_SEL_PIPE_MASK ? 1 : 0;
  58 }
  59
  60 /**
  61  * i915_get_plane - return the the plane associated with a given pipe
  62  * @dev: DRM device
  63  * @pipe: pipe to look for
  64  *
  65  * The Intel Mesa & 2D drivers call the vblank routines with a plane number
  66  * rather than a plane number, since they may not always be equal.  This routine
  67  * maps the given @pipe back to a plane number.
  68  */
  69 static int
  70 i915_get_plane(struct drm_device *dev, int pipe)
  71 {
  72         if (i915_get_pipe(dev, 0) == pipe)
  73                 return 0;
  74         return 1;
  75 }
  76
  77 /**
  78  * i915_pipe_enabled - check if a pipe is enabled
  79  * @dev: DRM device
  80  * @pipe: pipe to check
  81  *
  82  * Reading certain registers when the pipe is disabled can hang the chip.
  83  * Use this routine to make sure the PLL is running and the pipe is active
  84  * before reading such registers if unsure.
  85  */
  86 static int
  87 i915_pipe_enabled(struct drm_device *dev, int pipe)
  88 {
  89         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
  90         unsigned long pipeconf = pipe ? PIPEBCONF : PIPEACONF;
  91
  92         if (I915_READ(pipeconf) & PIPEACONF_ENABLE)
  93                 return 1;
  94
  95         return 0;
  96 }
  97
  98 /**
  99  * Emit a synchronous flip.
 100  *
 101  * This function must be called with the drawable spinlock held.
 102  */
 103 static void
 104 i915_dispatch_vsync_flip(struct drm_device *dev, struct drm_drawable_info *drw,
 105                          int plane)
 106 {
 107         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 108         drm_i915_sarea_t *sarea_priv = dev_priv->sarea_priv;
 109         u16 x1, y1, x2, y2;
 110         int pf_planes = 1 << plane;
 111
 112         DRM_SPINLOCK_ASSERT(&dev->drw_lock);
 113
 114         /* If the window is visible on the other plane, we have to flip on that
 115          * plane as well.
 116          */
 117         if (plane == 1) {
 118                 x1 = sarea_priv->planeA_x;
 119                 y1 = sarea_priv->planeA_y;
 120                 x2 = x1 + sarea_priv->planeA_w;
 121                 y2 = y1 + sarea_priv->planeA_h;
 122         } else {
 123                 x1 = sarea_priv->planeB_x;
 124                 y1 = sarea_priv->planeB_y;
 125                 x2 = x1 + sarea_priv->planeB_w;
 126                 y2 = y1 + sarea_priv->planeB_h;
 127         }
 128
 129         if (x2 > 0 && y2 > 0) {
 130                 int i, num_rects = drw->num_rects;
 131                 struct drm_clip_rect *rect = drw->rects;
 132
 133                 for (i = 0; i < num_rects; i++)
 134                         if (!(rect[i].x1 >= x2 || rect[i].y1 >= y2 ||
 135                               rect[i].x2 <= x1 || rect[i].y2 <= y1)) {
 136                                 pf_planes = 0x3;
 137
 138                                 break;
 139                         }
 140         }
 141
 142         i915_dispatch_flip(dev, pf_planes, 1);
 143 }
 144
 145 /**
 146  * Emit blits for scheduled buffer swaps.
 147  *
 148  * This function will be called with the HW lock held.
 149  */
 150 static void i915_vblank_tasklet(struct drm_device *dev)
 151 {
 152         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 153         struct list_head *list, *tmp, hits, *hit;
 154         int nhits, nrects, slice[2], upper[2], lower[2], i, num_pages;
 155         unsigned counter[2];
 156         struct drm_drawable_info *drw;
 157         drm_i915_sarea_t *sarea_priv = dev_priv->sarea_priv;
 158         u32 cpp = dev_priv->cpp,  offsets[3];
 159         u32 cmd = (cpp == 4) ? (XY_SRC_COPY_BLT_CMD |
 160                                 XY_SRC_COPY_BLT_WRITE_ALPHA |
 161                                 XY_SRC_COPY_BLT_WRITE_RGB)
 162                              : XY_SRC_COPY_BLT_CMD;
 163         u32 pitchropcpp = (sarea_priv->pitch * cpp) | (0xcc << 16) |
 164                           (cpp << 23) | (1 << 24);
 165         RING_LOCALS;
 166
 167         counter[0] = drm_vblank_count(dev, 0);
 168         counter[1] = drm_vblank_count(dev, 1);
 169
 170         DRM_DEBUG("\n");
 171
 172         INIT_LIST_HEAD(&hits);
 173
 174         nhits = nrects = 0;
 175
 176         /* No irqsave/restore necessary.  This tasklet may be run in an
 177          * interrupt context or normal context, but we don't have to worry
 178          * about getting interrupted by something acquiring the lock, because
 179          * we are the interrupt context thing that acquires the lock.
 180          */
 181         DRM_SPINLOCK(&dev_priv->swaps_lock);
 182
 183         /* Find buffer swaps scheduled for this vertical blank */
 184         list_for_each_safe(list, tmp, &dev_priv->vbl_swaps.head) {
 185                 drm_i915_vbl_swap_t *vbl_swap =
 186                         list_entry(list, drm_i915_vbl_swap_t, head);
 187                 int pipe = i915_get_pipe(dev, vbl_swap->plane);
 188
 189                 if ((counter[pipe] - vbl_swap->sequence) > (1<<23))
 190                         continue;
 191
 192                 list_del(list);
 193                 dev_priv->swaps_pending--;
 194                 drm_vblank_put(dev, pipe);
 195
 196                 DRM_SPINUNLOCK(&dev_priv->swaps_lock);
 197                 DRM_SPINLOCK(&dev->drw_lock);
 198
 199                 drw = drm_get_drawable_info(dev, vbl_swap->drw_id);
 200
 201                 if (!drw) {
 202                         DRM_SPINUNLOCK(&dev->drw_lock);
 203                         drm_free(vbl_swap, sizeof(*vbl_swap), DRM_MEM_DRIVER);
 204                         DRM_SPINLOCK(&dev_priv->swaps_lock);
 205                         continue;
 206                 }
 207
 208                 list_for_each(hit, &hits) {
 209                         drm_i915_vbl_swap_t *swap_cmp =
 210                                 list_entry(hit, drm_i915_vbl_swap_t, head);
 211                         struct drm_drawable_info *drw_cmp =
 212                                 drm_get_drawable_info(dev, swap_cmp->drw_id);
 213
 214                         if (drw_cmp &&
 215                             drw_cmp->rects[0].y1 > drw->rects[0].y1) {
 216                                 list_add_tail(list, hit);
 217                                 break;
 218                         }
 219                 }
 220
 221                 DRM_SPINUNLOCK(&dev->drw_lock);
 222
 223                 /* List of hits was empty, or we reached the end of it */
 224                 if (hit == &hits)
 225                         list_add_tail(list, hits.prev);
 226
 227                 nhits++;
 228
 229                 DRM_SPINLOCK(&dev_priv->swaps_lock);
 230         }
 231
 232         DRM_SPINUNLOCK(&dev_priv->swaps_lock);
 233
 234         if (nhits == 0) {
 235                 return;
 236         }
 237
 238         i915_kernel_lost_context(dev);
 239
 240         upper[0] = upper[1] = 0;
 241         slice[0] = max(sarea_priv->planeA_h / nhits, 1);
 242         slice[1] = max(sarea_priv->planeB_h / nhits, 1);
 243         lower[0] = sarea_priv->planeA_y + slice[0];
 244         lower[1] = sarea_priv->planeB_y + slice[0];
 245
 246         offsets[0] = sarea_priv->front_offset;
 247         offsets[1] = sarea_priv->back_offset;
 248         offsets[2] = sarea_priv->third_offset;
 249         num_pages = sarea_priv->third_handle ? 3 : 2;
 250
 251         DRM_SPINLOCK(&dev->drw_lock);
 252
 253         /* Emit blits for buffer swaps, partitioning both outputs into as many
 254          * slices as there are buffer swaps scheduled in order to avoid tearing
 255          * (based on the assumption that a single buffer swap would always
 256          * complete before scanout starts).
 257          */
 258         for (i = 0; i++ < nhits;
 259              upper[0] = lower[0], lower[0] += slice[0],
 260              upper[1] = lower[1], lower[1] += slice[1]) {
 261                 int init_drawrect = 1;
 262
 263                 if (i == nhits)
 264                         lower[0] = lower[1] = sarea_priv->height;
 265
 266                 list_for_each(hit, &hits) {
 267                         drm_i915_vbl_swap_t *swap_hit =
 268                                 list_entry(hit, drm_i915_vbl_swap_t, head);
 269                         struct drm_clip_rect *rect;
 270                         int num_rects, plane, front, back;
 271                         unsigned short top, bottom;
 272
 273                         drw = drm_get_drawable_info(dev, swap_hit->drw_id);
 274
 275                         if (!drw)
 276                                 continue;
 277
 278                         plane = swap_hit->plane;
 279
 280                         if (swap_hit->flip) {
 281                                 i915_dispatch_vsync_flip(dev, drw, plane);
 282                                 continue;
 283                         }
 284
 285                         if (init_drawrect) {
 286                                 BEGIN_LP_RING(6);
 287
 288                                 OUT_RING(GFX_OP_DRAWRECT_INFO);
 289                                 OUT_RING(0);
 290                                 OUT_RING(0);
 291                                 OUT_RING(sarea_priv->width | sarea_priv->height << 16);
 292                                 OUT_RING(sarea_priv->width | sarea_priv->height << 16);
 293                                 OUT_RING(0);
 294
 295                                 ADVANCE_LP_RING();
 296
 297                                 sarea_priv->ctxOwner = DRM_KERNEL_CONTEXT;
 298
 299                                 init_drawrect = 0;
 300                         }
 301
 302                         rect = drw->rects;
 303                         top = upper[plane];
 304                         bottom = lower[plane];
 305
 306                         front = (dev_priv->sarea_priv->pf_current_page >>
 307                                  (2 * plane)) & 0x3;
 308                         back = (front + 1) % num_pages;
 309
 310                         for (num_rects = drw->num_rects; num_rects--; rect++) {
 311                                 int y1 = max(rect->y1, top);
 312                                 int y2 = min(rect->y2, bottom);
 313
 314                                 if (y1 >= y2)
 315                                         continue;
 316
 317                                 BEGIN_LP_RING(8);
 318
 319                                 OUT_RING(cmd);
 320                                 OUT_RING(pitchropcpp);
 321                                 OUT_RING((y1 << 16) | rect->x1);
 322                                 OUT_RING((y2 << 16) | rect->x2);
 323                                 OUT_RING(offsets[front]);
 324                                 OUT_RING((y1 << 16) | rect->x1);
 325                                 OUT_RING(pitchropcpp & 0xffff);
 326                                 OUT_RING(offsets[back]);
 327
 328                                 ADVANCE_LP_RING();
 329                         }
 330                 }
 331         }
 332
 333         DRM_SPINUNLOCK(&dev->drw_lock);
 334
 335         list_for_each_safe(hit, tmp, &hits) {
 336                 drm_i915_vbl_swap_t *swap_hit =
 337                         list_entry(hit, drm_i915_vbl_swap_t, head);
 338
 339                 list_del(hit);
 340
 341                 drm_free(swap_hit, sizeof(*swap_hit), DRM_MEM_DRIVER);
 342         }
 343 }
 344 #if 0
 345 static int i915_in_vblank(struct drm_device *dev, int pipe)
 346 {
 347         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 348         unsigned long pipedsl, vblank, vtotal;
 349         unsigned long vbl_start, vbl_end, cur_line;
 350
 351         pipedsl = pipe ? PIPEBDSL : PIPEADSL;
 352         vblank = pipe ? VBLANK_B : VBLANK_A;
 353         vtotal = pipe ? VTOTAL_B : VTOTAL_A;
 354
 355         vbl_start = I915_READ(vblank) & VBLANK_START_MASK;
 356         vbl_end = (I915_READ(vblank) >> VBLANK_END_SHIFT) & VBLANK_END_MASK;
 357
 358         cur_line = I915_READ(pipedsl);
 359
 360         if (cur_line >= vbl_start)
 361                 return 1;
 362
 363         return 0;
 364 }
 365 #endif
 366 u32 i915_get_vblank_counter(struct drm_device *dev, int plane)
 367 {
 368         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 369         unsigned long high_frame;
 370         unsigned long low_frame;
 371         u32 high1, high2, low, count;
 372         int pipe;
 373
 374         pipe = i915_get_pipe(dev, plane);
 375         high_frame = pipe ? PIPEBFRAMEHIGH : PIPEAFRAMEHIGH;
 376         low_frame = pipe ? PIPEBFRAMEPIXEL : PIPEAFRAMEPIXEL;
 377
 378         if (!i915_pipe_enabled(dev, pipe)) {
 379             printk(KERN_ERR "trying to get vblank count for disabled "
 380                    "pipe %d\n", pipe);
 381             return 0;
 382         }
 383
 384         /*
 385          * High & low register fields aren't synchronized, so make sure
 386          * we get a low value that's stable across two reads of the high
 387          * register.
 388          */
 389         do {
 390                 high1 = ((I915_READ(high_frame) & PIPE_FRAME_HIGH_MASK) >>
 391                          PIPE_FRAME_HIGH_SHIFT);
 392                 low =  ((I915_READ(low_frame) & PIPE_FRAME_LOW_MASK) >>
 393                         PIPE_FRAME_LOW_SHIFT);
 394                 high2 = ((I915_READ(high_frame) & PIPE_FRAME_HIGH_MASK) >>
 395                          PIPE_FRAME_HIGH_SHIFT);
 396         } while (high1 != high2);
 397
 398         count = (high1 << 8) | low;
 399
 400         /*
 401          * If we're in the middle of the vblank period, the
 402          * above regs won't have been updated yet, so return
 403          * an incremented count to stay accurate
 404          */
 405 #if 0
 406         if (i915_in_vblank(dev, pipe))
 407                 count++;
 408 #endif
 409         /* count may be reset by other driver(e.g. 2D driver),
 410            we have no way to know if it is wrapped or resetted
 411            when count is zero. do a rough guess.
 412         */
 413         if (count == 0 && dev->last_vblank[pipe] < dev->max_vblank_count/2)
 414                 dev->last_vblank[pipe] = 0;
 415
 416         return count;
 417 }
 418
 419 irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
 420 {
 421         struct drm_device *dev = (struct drm_device *) arg;
 422         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 423         u16 temp;
 424         u32 pipea_stats, pipeb_stats;
 425
 426         pipea_stats = I915_READ(I915REG_PIPEASTAT);
 427         pipeb_stats = I915_READ(I915REG_PIPEBSTAT);
 428
 429         temp = I915_READ16(I915REG_INT_IDENTITY_R);
 430
 431 #if 0
 432         DRM_DEBUG("flag=%08x\n", temp);
 433 #endif
 434         if (temp == 0)
 435                 return IRQ_NONE;
 436
 437         /*
 438          * Clear the PIPE(A|B)STAT regs before the IIR otherwise
 439          * we may get extra interrupts.
 440          */
 441         if (temp & VSYNC_PIPEA_FLAG) {
 442                 drm_handle_vblank(dev, i915_get_plane(dev, 0));
 443                 I915_WRITE(I915REG_PIPEASTAT,
 444                            pipea_stats | I915_VBLANK_INTERRUPT_ENABLE |
 445                            I915_VBLANK_CLEAR);
 446         }
 447         if (temp & VSYNC_PIPEB_FLAG) {
 448                 drm_handle_vblank(dev, i915_get_plane(dev, 1));
 449                 I915_WRITE(I915REG_PIPEBSTAT,
 450                            pipeb_stats | I915_VBLANK_INTERRUPT_ENABLE |
 451                            I915_VBLANK_CLEAR);
 452         }
 453
 454         I915_WRITE16(I915REG_INT_IDENTITY_R, temp);
 455         (void) I915_READ16(I915REG_INT_IDENTITY_R); /* Flush posted write */
 456
 457         temp &= (dev_priv->irq_enable_reg | USER_INT_FLAG | VSYNC_PIPEA_FLAG |
 458                  VSYNC_PIPEB_FLAG);
 459
 460         if (dev_priv->sarea_priv)
 461                 dev_priv->sarea_priv->last_dispatch =
 462                         READ_BREADCRUMB(dev_priv);
 463
 464         if (temp & USER_INT_FLAG) {
 465                 DRM_WAKEUP(&dev_priv->irq_queue);
 466 #ifdef I915_HAVE_FENCE
 467                 i915_fence_handler(dev);
 468 #endif
 469         }
 470
 471         if (temp & (VSYNC_PIPEA_FLAG | VSYNC_PIPEB_FLAG)) {
 472                 if (dev_priv->swaps_pending > 0)
 473                         drm_locked_tasklet(dev, i915_vblank_tasklet);
 474         }
 475
 476         return IRQ_HANDLED;
 477 }
 478
 479 int i915_emit_irq(struct drm_device *dev)
 480 {
 481         drm_i915_private_t *dev_priv = dev->dev_private;
 482         RING_LOCALS;
 483
 484         i915_kernel_lost_context(dev);
 485
 486         DRM_DEBUG("\n");
 487
 488         i915_emit_breadcrumb(dev);
 489
 490         BEGIN_LP_RING(2);
 491         OUT_RING(0);
 492         OUT_RING(GFX_OP_USER_INTERRUPT);
 493         ADVANCE_LP_RING();
 494
 495         return dev_priv->counter;
 496 }
 497
 498 void i915_user_irq_on(drm_i915_private_t *dev_priv)
 499 {
 500         DRM_SPINLOCK(&dev_priv->user_irq_lock);
 501         if (dev_priv->irq_enabled && (++dev_priv->user_irq_refcount == 1)){
 502                 dev_priv->irq_enable_reg |= USER_INT_FLAG;
 503                 I915_WRITE16(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
 504         }
 505         DRM_SPINUNLOCK(&dev_priv->user_irq_lock);
 506
 507 }
 508
 509 void i915_user_irq_off(drm_i915_private_t *dev_priv)
 510 {
 511         DRM_SPINLOCK(&dev_priv->user_irq_lock);
 512         if (dev_priv->irq_enabled && (--dev_priv->user_irq_refcount == 0)) {
 513                 //              dev_priv->irq_enable_reg &= ~USER_INT_FLAG;
 514                 //              I915_WRITE16(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
 515         }
 516         DRM_SPINUNLOCK(&dev_priv->user_irq_lock);
 517 }
 518
 519
 520 static int i915_wait_irq(struct drm_device * dev, int irq_nr)
 521 {
 522         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 523         int ret = 0;
 524
 525         DRM_DEBUG("irq_nr=%d breadcrumb=%d\n", irq_nr,
 526                   READ_BREADCRUMB(dev_priv));
 527
 528         if (READ_BREADCRUMB(dev_priv) >= irq_nr)
 529                 return 0;
 530
 531         i915_user_irq_on(dev_priv);
 532         DRM_WAIT_ON(ret, dev_priv->irq_queue, 3 * DRM_HZ,
 533                     READ_BREADCRUMB(dev_priv) >= irq_nr);
 534         i915_user_irq_off(dev_priv);
 535
 536         if (ret == -EBUSY) {
 537                 DRM_ERROR("EBUSY -- rec: %d emitted: %d\n",
 538                           READ_BREADCRUMB(dev_priv), (int)dev_priv->counter);
 539         }
 540
 541         if (dev_priv->sarea_priv)
 542                 dev_priv->sarea_priv->last_dispatch =
 543                         READ_BREADCRUMB(dev_priv);
 544         return ret;
 545 }
 546
 547 /* Needs the lock as it touches the ring.
 548  */
 549 int i915_irq_emit(struct drm_device *dev, void *data,
 550                          struct drm_file *file_priv)
 551 {
 552         drm_i915_private_t *dev_priv = dev->dev_private;
 553         drm_i915_irq_emit_t *emit = data;
 554         int result;
 555
 556         LOCK_TEST_WITH_RETURN(dev, file_priv);
 557
 558         if (!dev_priv) {
 559                 DRM_ERROR("called with no initialization\n");
 560                 return -EINVAL;
 561         }
 562
 563         result = i915_emit_irq(dev);
 564
 565         if (DRM_COPY_TO_USER(emit->irq_seq, &result, sizeof(int))) {
 566                 DRM_ERROR("copy_to_user\n");
 567                 return -EFAULT;
 568         }
 569
 570         return 0;
 571 }
 572
 573 /* Doesn't need the hardware lock.
 574  */
 575 int i915_irq_wait(struct drm_device *dev, void *data,
 576                   struct drm_file *file_priv)
 577 {
 578         drm_i915_private_t *dev_priv = dev->dev_private;
 579         drm_i915_irq_wait_t *irqwait = data;
 580
 581         if (!dev_priv) {
 582                 DRM_ERROR("called with no initialization\n");
 583                 return -EINVAL;
 584         }
 585
 586         return i915_wait_irq(dev, irqwait->irq_seq);
 587 }
 588
 589 int i915_enable_vblank(struct drm_device *dev, int plane)
 590 {
 591         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 592         int pipe = i915_get_pipe(dev, plane);
 593
 594         switch (pipe) {
 595         case 0:
 596                 dev_priv->irq_enable_reg |= VSYNC_PIPEA_FLAG;
 597                 break;
 598         case 1:
 599                 dev_priv->irq_enable_reg |= VSYNC_PIPEB_FLAG;
 600                 break;
 601         default:
 602                 DRM_ERROR("tried to enable vblank on non-existent pipe %d\n",
 603                           pipe);
 604                 break;
 605         }
 606
 607         I915_WRITE16(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
 608
 609         return 0;
 610 }
 611
 612 void i915_disable_vblank(struct drm_device *dev, int plane)
 613 {
 614         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 615         int pipe = i915_get_pipe(dev, plane);
 616
 617         switch (pipe) {
 618         case 0:
 619                 dev_priv->irq_enable_reg &= ~VSYNC_PIPEA_FLAG;
 620                 break;
 621         case 1:
 622                 dev_priv->irq_enable_reg &= ~VSYNC_PIPEB_FLAG;
 623                 break;
 624         default:
 625                 DRM_ERROR("tried to disable vblank on non-existent pipe %d\n",
 626                           pipe);
 627                 break;
 628         }
 629
 630         I915_WRITE16(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
 631 }
 632
 633 static void i915_enable_interrupt (struct drm_device *dev)
 634 {
 635         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 636
 637         dev_priv->irq_enable_reg |= USER_INT_FLAG;
 638
 639         I915_WRITE16(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
 640         dev_priv->irq_enabled = 1;
 641 }
 642
 643 /* Set the vblank monitor pipe
 644  */
 645 int i915_vblank_pipe_set(struct drm_device *dev, void *data,
 646                          struct drm_file *file_priv)
 647 {
 648         drm_i915_private_t *dev_priv = dev->dev_private;
 649         drm_i915_vblank_pipe_t *pipe = data;
 650
 651         if (!dev_priv) {
 652                 DRM_ERROR("called with no initialization\n");
 653                 return -EINVAL;
 654         }
 655
 656         if (pipe->pipe & ~(DRM_I915_VBLANK_PIPE_A|DRM_I915_VBLANK_PIPE_B)) {
 657                 DRM_ERROR("called with invalid pipe 0x%x\n", pipe->pipe);
 658                 return -EINVAL;
 659         }
 660
 661         dev_priv->vblank_pipe = pipe->pipe;
 662
 663         return 0;
 664 }
 665
 666 int i915_vblank_pipe_get(struct drm_device *dev, void *data,
 667                          struct drm_file *file_priv)
 668 {
 669         drm_i915_private_t *dev_priv = dev->dev_private;
 670         drm_i915_vblank_pipe_t *pipe = data;
 671         u16 flag;
 672
 673         if (!dev_priv) {
 674                 DRM_ERROR("called with no initialization\n");
 675                 return -EINVAL;
 676         }
 677
 678         flag = I915_READ(I915REG_INT_ENABLE_R);
 679         pipe->pipe = 0;
 680         if (flag & VSYNC_PIPEA_FLAG)
 681                 pipe->pipe |= DRM_I915_VBLANK_PIPE_A;
 682         if (flag & VSYNC_PIPEB_FLAG)
 683                 pipe->pipe |= DRM_I915_VBLANK_PIPE_B;
 684
 685         return 0;
 686 }
 687
 688 /**
 689  * Schedule buffer swap at given vertical blank.
 690  */
 691 int i915_vblank_swap(struct drm_device *dev, void *data,
 692                      struct drm_file *file_priv)
 693 {
 694         drm_i915_private_t *dev_priv = dev->dev_private;
 695         drm_i915_vblank_swap_t *swap = data;
 696         drm_i915_vbl_swap_t *vbl_swap;
 697         unsigned int pipe, seqtype, curseq, plane;
 698         unsigned long irqflags;
 699         struct list_head *list;
 700         int ret;
 701
 702         if (!dev_priv) {
 703                 DRM_ERROR("%s called with no initialization\n", __func__);
 704                 return -EINVAL;
 705         }
 706
 707         if (!dev_priv->sarea_priv || dev_priv->sarea_priv->rotation) {
 708                 DRM_DEBUG("Rotation not supported\n");
 709                 return -EINVAL;
 710         }
 711
 712         if (swap->seqtype & ~(_DRM_VBLANK_RELATIVE | _DRM_VBLANK_ABSOLUTE |
 713                              _DRM_VBLANK_SECONDARY | _DRM_VBLANK_NEXTONMISS |
 714                              _DRM_VBLANK_FLIP)) {
 715                 DRM_ERROR("Invalid sequence type 0x%x\n", swap->seqtype);
 716                 return -EINVAL;
 717         }
 718
 719         plane = (swap->seqtype & _DRM_VBLANK_SECONDARY) ? 1 : 0;
 720         pipe = i915_get_pipe(dev, plane);
 721
 722         seqtype = swap->seqtype & (_DRM_VBLANK_RELATIVE | _DRM_VBLANK_ABSOLUTE);
 723
 724         if (!(dev_priv->vblank_pipe & (1 << pipe))) {
 725                 DRM_ERROR("Invalid pipe %d\n", pipe);
 726                 return -EINVAL;
 727         }
 728
 729         DRM_SPINLOCK_IRQSAVE(&dev->drw_lock, irqflags);
 730
 731         /* It makes no sense to schedule a swap for a drawable that doesn't have
 732          * valid information at this point. E.g. this could mean that the X
 733          * server is too old to push drawable information to the DRM, in which
 734          * case all such swaps would become ineffective.
 735          */
 736         if (!drm_get_drawable_info(dev, swap->drawable)) {
 737                 DRM_SPINUNLOCK_IRQRESTORE(&dev->drw_lock, irqflags);
 738                 DRM_DEBUG("Invalid drawable ID %d\n", swap->drawable);
 739                 return -EINVAL;
 740         }
 741
 742         DRM_SPINUNLOCK_IRQRESTORE(&dev->drw_lock, irqflags);
 743
 744         drm_update_vblank_count(dev, pipe);
 745         curseq = drm_vblank_count(dev, pipe);
 746
 747         if (seqtype == _DRM_VBLANK_RELATIVE)
 748                 swap->sequence += curseq;
 749
 750         if ((curseq - swap->sequence) <= (1<<23)) {
 751                 if (swap->seqtype & _DRM_VBLANK_NEXTONMISS) {
 752                         swap->sequence = curseq + 1;
 753                 } else {
 754                         DRM_DEBUG("Missed target sequence\n");
 755                         return -EINVAL;
 756                 }
 757         }
 758
 759         if (swap->seqtype & _DRM_VBLANK_FLIP) {
 760                 swap->sequence--;
 761
 762                 if ((curseq - swap->sequence) <= (1<<23)) {
 763                         struct drm_drawable_info *drw;
 764
 765                         LOCK_TEST_WITH_RETURN(dev, file_priv);
 766
 767                         DRM_SPINLOCK_IRQSAVE(&dev->drw_lock, irqflags);
 768
 769                         drw = drm_get_drawable_info(dev, swap->drawable);
 770
 771                         if (!drw) {
 772                                 DRM_SPINUNLOCK_IRQRESTORE(&dev->drw_lock,
 773                                     irqflags);
 774                                 DRM_DEBUG("Invalid drawable ID %d\n",
 775                                           swap->drawable);
 776                                 return -EINVAL;
 777                         }
 778
 779                         i915_dispatch_vsync_flip(dev, drw, plane);
 780
 781                         DRM_SPINUNLOCK_IRQRESTORE(&dev->drw_lock, irqflags);
 782
 783                         return 0;
 784                 }
 785         }
 786
 787         DRM_SPINLOCK_IRQSAVE(&dev_priv->swaps_lock, irqflags);
 788
 789         list_for_each(list, &dev_priv->vbl_swaps.head) {
 790                 vbl_swap = list_entry(list, drm_i915_vbl_swap_t, head);
 791
 792                 if (vbl_swap->drw_id == swap->drawable &&
 793                     vbl_swap->plane == plane &&
 794                     vbl_swap->sequence == swap->sequence) {
 795                         vbl_swap->flip = (swap->seqtype & _DRM_VBLANK_FLIP);
 796                         DRM_SPINUNLOCK_IRQRESTORE(&dev_priv->swaps_lock, irqflags);
 797                         DRM_DEBUG("Already scheduled\n");
 798                         return 0;
 799                 }
 800         }
 801
 802         DRM_SPINUNLOCK_IRQRESTORE(&dev_priv->swaps_lock, irqflags);
 803
 804         if (dev_priv->swaps_pending >= 100) {
 805                 DRM_DEBUG("Too many swaps queued\n");
 806                 return -EBUSY;
 807         }
 808
 809         vbl_swap = drm_calloc(1, sizeof(*vbl_swap), DRM_MEM_DRIVER);
 810
 811         if (!vbl_swap) {
 812                 DRM_ERROR("Failed to allocate memory to queue swap\n");
 813                 return -ENOMEM;
 814         }
 815
 816         DRM_DEBUG("\n");
 817
 818         ret = drm_vblank_get(dev, pipe);
 819         if (ret) {
 820                 drm_free(vbl_swap, sizeof(*vbl_swap), DRM_MEM_DRIVER);
 821                 return ret;
 822         }
 823
 824         vbl_swap->drw_id = swap->drawable;
 825         vbl_swap->plane = plane;
 826         vbl_swap->sequence = swap->sequence;
 827         vbl_swap->flip = (swap->seqtype & _DRM_VBLANK_FLIP);
 828
 829         if (vbl_swap->flip)
 830                 swap->sequence++;
 831
 832         DRM_SPINLOCK_IRQSAVE(&dev_priv->swaps_lock, irqflags);
 833
 834         list_add_tail(&vbl_swap->head, &dev_priv->vbl_swaps.head);
 835         dev_priv->swaps_pending++;
 836
 837         DRM_SPINUNLOCK_IRQRESTORE(&dev_priv->swaps_lock, irqflags);
 838
 839         return 0;
 840 }
 841
 842 /* drm_dma.h hooks
 843 */
 844 void i915_driver_irq_preinstall(struct drm_device * dev)
 845 {
 846         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 847
 848         I915_WRITE16(I915REG_HWSTAM, 0xeffe);
 849         I915_WRITE16(I915REG_INT_MASK_R, 0x0);
 850         I915_WRITE16(I915REG_INT_ENABLE_R, 0x0);
 851 }
 852
 853 int i915_driver_irq_postinstall(struct drm_device * dev)
 854 {
 855         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 856         int ret, num_pipes = 2;
 857
 858         DRM_SPININIT(&dev_priv->swaps_lock, "swap");
 859         INIT_LIST_HEAD(&dev_priv->vbl_swaps.head);
 860         dev_priv->swaps_pending = 0;
 861
 862         DRM_SPININIT(&dev_priv->user_irq_lock, "userirq");
 863         dev_priv->user_irq_refcount = 0;
 864         dev_priv->irq_enable_reg = 0;
 865
 866         ret = drm_vblank_init(dev, num_pipes);
 867         if (ret)
 868                 return ret;
 869
 870         dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
 871
 872         i915_enable_interrupt(dev);
 873         DRM_INIT_WAITQUEUE(&dev_priv->irq_queue);
 874
 875         /*
 876          * Initialize the hardware status page IRQ location.
 877          */
 878
 879         I915_WRITE(I915REG_INSTPM, (1 << 5) | (1 << 21));
 880         return 0;
 881 }
 882
 883 void i915_driver_irq_uninstall(struct drm_device * dev)
 884 {
 885         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 886         u16 temp;
 887
 888         if (!dev_priv)
 889                 return;
 890
 891         dev_priv->irq_enabled = 0;
 892         I915_WRITE16(I915REG_HWSTAM, 0xffff);
 893         I915_WRITE16(I915REG_INT_MASK_R, 0xffff);
 894         I915_WRITE16(I915REG_INT_ENABLE_R, 0x0);
 895
 896         temp = I915_READ16(I915REG_INT_IDENTITY_R);
 897         I915_WRITE16(I915REG_INT_IDENTITY_R, temp);
 898 }