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intel: Sync GEM ioctl comments for easier diffing against the kernel.
[android-x86/external-libdrm.git] / shared-core / i915_irq.c
1 /* i915_irq.c -- IRQ support for the I915 -*- linux-c -*-
2  */
3 /*
4  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
5  * All Rights Reserved.
6  *
7  * Permission is hereby granted, free of charge, to any person obtaining a
8  * copy of this software and associated documentation files (the
9  * "Software"), to deal in the Software without restriction, including
10  * without limitation the rights to use, copy, modify, merge, publish,
11  * distribute, sub license, and/or sell copies of the Software, and to
12  * permit persons to whom the Software is furnished to do so, subject to
13  * the following conditions:
14  *
15  * The above copyright notice and this permission notice (including the
16  * next paragraph) shall be included in all copies or substantial portions
17  * of the Software.
18  *
19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
23  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26  *
27  */
28
29 #include "drmP.h"
30 #include "drm.h"
31 #include "i915_drm.h"
32 #include "i915_drv.h"
33
34 #define MAX_NOPID ((u32)~0)
35
36 /*
37  * These are the interrupts used by the driver
38  */
39 #define I915_INTERRUPT_ENABLE_MASK (I915_USER_INTERRUPT | \
40                                     I915_DISPLAY_PIPE_A_EVENT_INTERRUPT | \
41                                     I915_DISPLAY_PIPE_B_EVENT_INTERRUPT)
42
43 static inline void
44 i915_enable_irq(drm_i915_private_t *dev_priv, uint32_t mask)
45 {
46         if ((dev_priv->irq_mask_reg & mask) != 0) {
47                 dev_priv->irq_mask_reg &= ~mask;
48                 I915_WRITE(IMR, dev_priv->irq_mask_reg);
49                 (void) I915_READ(IMR);
50         }
51 }
52
53 static inline void
54 i915_disable_irq(drm_i915_private_t *dev_priv, uint32_t mask)
55 {
56         if ((dev_priv->irq_mask_reg & mask) != mask) {
57                 dev_priv->irq_mask_reg |= mask;
58                 I915_WRITE(IMR, dev_priv->irq_mask_reg);
59                 (void) I915_READ(IMR);
60         }
61 }
62
63 /**
64  * i915_get_pipe - return the the pipe associated with a given plane
65  * @dev: DRM device
66  * @plane: plane to look for
67  *
68  * The Intel Mesa & 2D drivers call the vblank routines with a plane number
69  * rather than a pipe number, since they may not always be equal.  This routine
70  * maps the given @plane back to a pipe number.
71  */
72 static int
73 i915_get_pipe(struct drm_device *dev, int plane)
74 {
75         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
76         u32 dspcntr;
77
78         dspcntr = plane ? I915_READ(DSPBCNTR) : I915_READ(DSPACNTR);
79
80         return dspcntr & DISPPLANE_SEL_PIPE_MASK ? 1 : 0;
81 }
82
83 /**
84  * i915_get_plane - return the the plane associated with a given pipe
85  * @dev: DRM device
86  * @pipe: pipe to look for
87  *
88  * The Intel Mesa & 2D drivers call the vblank routines with a plane number
89  * rather than a plane number, since they may not always be equal.  This routine
90  * maps the given @pipe back to a plane number.
91  */
92 static int
93 i915_get_plane(struct drm_device *dev, int pipe)
94 {
95         if (i915_get_pipe(dev, 0) == pipe)
96                 return 0;
97         return 1;
98 }
99
100 /**
101  * i915_pipe_enabled - check if a pipe is enabled
102  * @dev: DRM device
103  * @pipe: pipe to check
104  *
105  * Reading certain registers when the pipe is disabled can hang the chip.
106  * Use this routine to make sure the PLL is running and the pipe is active
107  * before reading such registers if unsure.
108  */
109 static int
110 i915_pipe_enabled(struct drm_device *dev, int pipe)
111 {
112         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
113         unsigned long pipeconf = pipe ? PIPEBCONF : PIPEACONF;
114
115         if (I915_READ(pipeconf) & PIPEACONF_ENABLE)
116                 return 1;
117
118         return 0;
119 }
120
121 /**
122  * Emit a synchronous flip.
123  *
124  * This function must be called with the drawable spinlock held.
125  */
126 static void
127 i915_dispatch_vsync_flip(struct drm_device *dev, struct drm_drawable_info *drw,
128                          int plane)
129 {
130         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
131         drm_i915_sarea_t *sarea_priv = dev_priv->sarea_priv;
132         u16 x1, y1, x2, y2;
133         int pf_planes = 1 << plane;
134
135         DRM_SPINLOCK_ASSERT(&dev->drw_lock);
136
137         /* If the window is visible on the other plane, we have to flip on that
138          * plane as well.
139          */
140         if (plane == 1) {
141                 x1 = sarea_priv->planeA_x;
142                 y1 = sarea_priv->planeA_y;
143                 x2 = x1 + sarea_priv->planeA_w;
144                 y2 = y1 + sarea_priv->planeA_h;
145         } else {
146                 x1 = sarea_priv->planeB_x;
147                 y1 = sarea_priv->planeB_y;
148                 x2 = x1 + sarea_priv->planeB_w;
149                 y2 = y1 + sarea_priv->planeB_h;
150         }
151
152         if (x2 > 0 && y2 > 0) {
153                 int i, num_rects = drw->num_rects;
154                 struct drm_clip_rect *rect = drw->rects;
155
156                 for (i = 0; i < num_rects; i++)
157                         if (!(rect[i].x1 >= x2 || rect[i].y1 >= y2 ||
158                               rect[i].x2 <= x1 || rect[i].y2 <= y1)) {
159                                 pf_planes = 0x3;
160
161                                 break;
162                         }
163         }
164
165         i915_dispatch_flip(dev, pf_planes, 1);
166 }
167
168 /**
169  * Emit blits for scheduled buffer swaps.
170  *
171  * This function will be called with the HW lock held.
172  */
173 static void i915_vblank_tasklet(struct drm_device *dev)
174 {
175         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
176         struct list_head *list, *tmp, hits, *hit;
177         int nhits, nrects, slice[2], upper[2], lower[2], i, num_pages;
178         unsigned counter[2];
179         struct drm_drawable_info *drw;
180         drm_i915_sarea_t *sarea_priv = dev_priv->sarea_priv;
181         u32 cpp = dev_priv->cpp,  offsets[3];
182         u32 cmd = (cpp == 4) ? (XY_SRC_COPY_BLT_CMD |
183                                 XY_SRC_COPY_BLT_WRITE_ALPHA |
184                                 XY_SRC_COPY_BLT_WRITE_RGB)
185                              : XY_SRC_COPY_BLT_CMD;
186         u32 src_pitch = sarea_priv->pitch * cpp;
187         u32 dst_pitch = sarea_priv->pitch * cpp;
188         /* COPY rop (0xcc), map cpp to magic color depth constants */
189         u32 ropcpp = (0xcc << 16) | ((cpp - 1) << 24);
190         RING_LOCALS;
191         
192         if (IS_I965G(dev) && sarea_priv->front_tiled) {
193                 cmd |= XY_SRC_COPY_BLT_DST_TILED;
194                 dst_pitch >>= 2;
195         }
196         if (IS_I965G(dev) && sarea_priv->back_tiled) {
197                 cmd |= XY_SRC_COPY_BLT_SRC_TILED;
198                 src_pitch >>= 2;
199         }
200         
201         counter[0] = drm_vblank_count(dev, 0);
202         counter[1] = drm_vblank_count(dev, 1);
203
204         DRM_DEBUG("\n");
205
206         INIT_LIST_HEAD(&hits);
207
208         nhits = nrects = 0;
209
210         /* No irqsave/restore necessary.  This tasklet may be run in an
211          * interrupt context or normal context, but we don't have to worry
212          * about getting interrupted by something acquiring the lock, because
213          * we are the interrupt context thing that acquires the lock.
214          */
215         DRM_SPINLOCK(&dev_priv->swaps_lock);
216
217         /* Find buffer swaps scheduled for this vertical blank */
218         list_for_each_safe(list, tmp, &dev_priv->vbl_swaps.head) {
219                 drm_i915_vbl_swap_t *vbl_swap =
220                         list_entry(list, drm_i915_vbl_swap_t, head);
221                 int pipe = i915_get_pipe(dev, vbl_swap->plane);
222
223                 if ((counter[pipe] - vbl_swap->sequence) > (1<<23))
224                         continue;
225
226                 list_del(list);
227                 dev_priv->swaps_pending--;
228                 drm_vblank_put(dev, pipe);
229
230                 DRM_SPINUNLOCK(&dev_priv->swaps_lock);
231                 DRM_SPINLOCK(&dev->drw_lock);
232
233                 drw = drm_get_drawable_info(dev, vbl_swap->drw_id);
234
235                 if (!drw) {
236                         DRM_SPINUNLOCK(&dev->drw_lock);
237                         drm_free(vbl_swap, sizeof(*vbl_swap), DRM_MEM_DRIVER);
238                         DRM_SPINLOCK(&dev_priv->swaps_lock);
239                         continue;
240                 }
241
242                 list_for_each(hit, &hits) {
243                         drm_i915_vbl_swap_t *swap_cmp =
244                                 list_entry(hit, drm_i915_vbl_swap_t, head);
245                         struct drm_drawable_info *drw_cmp =
246                                 drm_get_drawable_info(dev, swap_cmp->drw_id);
247
248                         if (drw_cmp &&
249                             drw_cmp->rects[0].y1 > drw->rects[0].y1) {
250                                 list_add_tail(list, hit);
251                                 break;
252                         }
253                 }
254
255                 DRM_SPINUNLOCK(&dev->drw_lock);
256
257                 /* List of hits was empty, or we reached the end of it */
258                 if (hit == &hits)
259                         list_add_tail(list, hits.prev);
260
261                 nhits++;
262
263                 DRM_SPINLOCK(&dev_priv->swaps_lock);
264         }
265
266         DRM_SPINUNLOCK(&dev_priv->swaps_lock);
267
268         if (nhits == 0) {
269                 return;
270         }
271
272         i915_kernel_lost_context(dev);
273
274         upper[0] = upper[1] = 0;
275         slice[0] = max(sarea_priv->planeA_h / nhits, 1);
276         slice[1] = max(sarea_priv->planeB_h / nhits, 1);
277         lower[0] = sarea_priv->planeA_y + slice[0];
278         lower[1] = sarea_priv->planeB_y + slice[0];
279
280         offsets[0] = sarea_priv->front_offset;
281         offsets[1] = sarea_priv->back_offset;
282         offsets[2] = sarea_priv->third_offset;
283         num_pages = sarea_priv->third_handle ? 3 : 2;
284
285         DRM_SPINLOCK(&dev->drw_lock);
286
287         /* Emit blits for buffer swaps, partitioning both outputs into as many
288          * slices as there are buffer swaps scheduled in order to avoid tearing
289          * (based on the assumption that a single buffer swap would always
290          * complete before scanout starts).
291          */
292         for (i = 0; i++ < nhits;
293              upper[0] = lower[0], lower[0] += slice[0],
294              upper[1] = lower[1], lower[1] += slice[1]) {
295                 int init_drawrect = 1;
296
297                 if (i == nhits)
298                         lower[0] = lower[1] = sarea_priv->height;
299
300                 list_for_each(hit, &hits) {
301                         drm_i915_vbl_swap_t *swap_hit =
302                                 list_entry(hit, drm_i915_vbl_swap_t, head);
303                         struct drm_clip_rect *rect;
304                         int num_rects, plane, front, back;
305                         unsigned short top, bottom;
306
307                         drw = drm_get_drawable_info(dev, swap_hit->drw_id);
308
309                         if (!drw)
310                                 continue;
311
312                         plane = swap_hit->plane;
313
314                         if (swap_hit->flip) {
315                                 i915_dispatch_vsync_flip(dev, drw, plane);
316                                 continue;
317                         }
318
319                         if (init_drawrect) {
320                                 int width  = sarea_priv->width;
321                                 int height = sarea_priv->height;
322                                 if (IS_I965G(dev)) {
323                                         BEGIN_LP_RING(4);
324
325                                         OUT_RING(GFX_OP_DRAWRECT_INFO_I965);
326                                         OUT_RING(0);
327                                         OUT_RING(((width - 1) & 0xffff) | ((height - 1) << 16));
328                                         OUT_RING(0);
329                                         
330                                         ADVANCE_LP_RING();
331                                 } else {
332                                         BEGIN_LP_RING(6);
333         
334                                         OUT_RING(GFX_OP_DRAWRECT_INFO);
335                                         OUT_RING(0);
336                                         OUT_RING(0);
337                                         OUT_RING(((width - 1) & 0xffff) | ((height - 1) << 16));
338                                         OUT_RING(0);
339                                         OUT_RING(0);
340                                         
341                                         ADVANCE_LP_RING();
342                                 }
343
344                                 sarea_priv->ctxOwner = DRM_KERNEL_CONTEXT;
345
346                                 init_drawrect = 0;
347                         }
348
349                         rect = drw->rects;
350                         top = upper[plane];
351                         bottom = lower[plane];
352
353                         front = (dev_priv->sarea_priv->pf_current_page >>
354                                  (2 * plane)) & 0x3;
355                         back = (front + 1) % num_pages;
356
357                         for (num_rects = drw->num_rects; num_rects--; rect++) {
358                                 int y1 = max(rect->y1, top);
359                                 int y2 = min(rect->y2, bottom);
360
361                                 if (y1 >= y2)
362                                         continue;
363
364                                 BEGIN_LP_RING(8);
365
366                                 OUT_RING(cmd);
367                                 OUT_RING(ropcpp | dst_pitch);
368                                 OUT_RING((y1 << 16) | rect->x1);
369                                 OUT_RING((y2 << 16) | rect->x2);
370                                 OUT_RING(offsets[front]);
371                                 OUT_RING((y1 << 16) | rect->x1);
372                                 OUT_RING(src_pitch);
373                                 OUT_RING(offsets[back]);
374
375                                 ADVANCE_LP_RING();
376                         }
377                 }
378         }
379
380         DRM_SPINUNLOCK(&dev->drw_lock);
381
382         list_for_each_safe(hit, tmp, &hits) {
383                 drm_i915_vbl_swap_t *swap_hit =
384                         list_entry(hit, drm_i915_vbl_swap_t, head);
385
386                 list_del(hit);
387
388                 drm_free(swap_hit, sizeof(*swap_hit), DRM_MEM_DRIVER);
389         }
390 }
391
392 u32 i915_get_vblank_counter(struct drm_device *dev, int plane)
393 {
394         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
395         unsigned long high_frame;
396         unsigned long low_frame;
397         u32 high1, high2, low, count;
398         int pipe;
399
400         pipe = i915_get_pipe(dev, plane);
401         high_frame = pipe ? PIPEBFRAMEHIGH : PIPEAFRAMEHIGH;
402         low_frame = pipe ? PIPEBFRAMEPIXEL : PIPEAFRAMEPIXEL;
403
404         if (!i915_pipe_enabled(dev, pipe)) {
405             DRM_DEBUG("trying to get vblank count for disabled pipe %d\n", pipe);
406             return 0;
407         }
408
409         /*
410          * High & low register fields aren't synchronized, so make sure
411          * we get a low value that's stable across two reads of the high
412          * register.
413          */
414         do {
415                 high1 = ((I915_READ(high_frame) & PIPE_FRAME_HIGH_MASK) >>
416                          PIPE_FRAME_HIGH_SHIFT);
417                 low =  ((I915_READ(low_frame) & PIPE_FRAME_LOW_MASK) >>
418                         PIPE_FRAME_LOW_SHIFT);
419                 high2 = ((I915_READ(high_frame) & PIPE_FRAME_HIGH_MASK) >>
420                          PIPE_FRAME_HIGH_SHIFT);
421         } while (high1 != high2);
422
423         count = (high1 << 8) | low;
424
425         return count;
426 }
427
428 irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
429 {
430         struct drm_device *dev = (struct drm_device *) arg;
431         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
432         u32 iir;
433         u32 pipea_stats = 0, pipeb_stats = 0;
434         int vblank = 0;
435 #ifdef __linux__
436         if (dev->pdev->msi_enabled)
437                 I915_WRITE(IMR, ~0);
438 #endif
439         iir = I915_READ(IIR);
440 #if 0
441         DRM_DEBUG("flag=%08x\n", iir);
442 #endif
443         atomic_inc(&dev_priv->irq_received);
444         if (iir == 0) {
445 #ifdef __linux__
446                 if (dev->pdev->msi_enabled) {
447                         I915_WRITE(IMR, dev_priv->irq_mask_reg);
448                         (void) I915_READ(IMR);
449                 }
450 #endif
451                 return IRQ_NONE;
452         }
453
454         /*
455          * Clear the PIPE(A|B)STAT regs before the IIR otherwise
456          * we may get extra interrupts.
457          */
458         if (iir & I915_DISPLAY_PIPE_A_EVENT_INTERRUPT) {
459                 pipea_stats = I915_READ(PIPEASTAT);
460
461                 /* The vblank interrupt gets enabled even if we didn't ask for
462                    it, so make sure it's shut down again */
463                 if (!(dev_priv->vblank_pipe & DRM_I915_VBLANK_PIPE_A))
464                         pipea_stats &= ~(PIPE_START_VBLANK_INTERRUPT_ENABLE |
465                                          PIPE_VBLANK_INTERRUPT_ENABLE);
466                 else if (pipea_stats & (PIPE_START_VBLANK_INTERRUPT_STATUS|
467                                         PIPE_VBLANK_INTERRUPT_STATUS))
468                 {
469                         vblank++;
470                         drm_handle_vblank(dev, i915_get_plane(dev, 0));
471                 }
472
473                 I915_WRITE(PIPEASTAT, pipea_stats);
474         }
475         if (iir & I915_DISPLAY_PIPE_B_EVENT_INTERRUPT) {
476                 pipeb_stats = I915_READ(PIPEBSTAT);
477
478                 /* The vblank interrupt gets enabled even if we didn't ask for
479                    it, so make sure it's shut down again */
480                 if (!(dev_priv->vblank_pipe & DRM_I915_VBLANK_PIPE_B))
481                         pipeb_stats &= ~(PIPE_START_VBLANK_INTERRUPT_ENABLE |
482                                          PIPE_VBLANK_INTERRUPT_ENABLE);
483                 else if (pipeb_stats & (PIPE_START_VBLANK_INTERRUPT_STATUS|
484                                         PIPE_VBLANK_INTERRUPT_STATUS))
485                 {
486                         vblank++;
487                         drm_handle_vblank(dev, i915_get_plane(dev, 1));
488                 }
489
490 #ifdef __linux__
491 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,25)
492                 if (pipeb_stats & I915_LEGACY_BLC_EVENT_ENABLE)
493                         opregion_asle_intr(dev);
494 #endif
495 #endif
496                 I915_WRITE(PIPEBSTAT, pipeb_stats);
497         }
498
499 #ifdef __linux__
500 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,25)
501         if (iir & I915_ASLE_INTERRUPT)
502                 opregion_asle_intr(dev);
503 #endif
504 #endif
505
506         if (dev_priv->sarea_priv)
507             dev_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
508
509         I915_WRITE(IIR, iir);
510 #ifdef __linux__
511         if (dev->pdev->msi_enabled)
512                 I915_WRITE(IMR, dev_priv->irq_mask_reg);
513 #endif
514         (void) I915_READ(IIR); /* Flush posted writes */
515
516         if (iir & I915_USER_INTERRUPT) {
517 #ifdef I915_HAVE_GEM
518                 dev_priv->mm.irq_gem_seqno = i915_get_gem_seqno(dev);
519 #endif
520                 DRM_WAKEUP(&dev_priv->irq_queue);
521 #ifdef I915_HAVE_FENCE
522                 i915_fence_handler(dev);
523 #endif
524         }
525
526         if (vblank) {
527                 if (dev_priv->swaps_pending > 0)
528                         drm_locked_tasklet(dev, i915_vblank_tasklet);
529         }
530
531         return IRQ_HANDLED;
532 }
533
534 int i915_emit_irq(struct drm_device *dev)
535 {
536         drm_i915_private_t *dev_priv = dev->dev_private;
537         RING_LOCALS;
538
539         i915_kernel_lost_context(dev);
540
541         DRM_DEBUG("\n");
542
543         i915_emit_breadcrumb(dev);
544
545         BEGIN_LP_RING(2);
546         OUT_RING(0);
547         OUT_RING(MI_USER_INTERRUPT);
548         ADVANCE_LP_RING();
549
550         return dev_priv->counter;
551 }
552
553 void i915_user_irq_on(drm_i915_private_t *dev_priv)
554 {
555         DRM_SPINLOCK(&dev_priv->user_irq_lock);
556         if (dev_priv->irq_enabled && (++dev_priv->user_irq_refcount == 1))
557                 i915_enable_irq(dev_priv, I915_USER_INTERRUPT);
558         DRM_SPINUNLOCK(&dev_priv->user_irq_lock);
559 }
560
561 void i915_user_irq_off(drm_i915_private_t *dev_priv)
562 {
563         DRM_SPINLOCK(&dev_priv->user_irq_lock);
564 #ifdef __linux__
565         BUG_ON(dev_priv->irq_enabled && dev_priv->user_irq_refcount <= 0);
566 #endif
567         if (dev_priv->irq_enabled && (--dev_priv->user_irq_refcount == 0))
568                 i915_disable_irq(dev_priv, I915_USER_INTERRUPT);
569         DRM_SPINUNLOCK(&dev_priv->user_irq_lock);
570 }
571
572
573 int i915_wait_irq(struct drm_device * dev, int irq_nr)
574 {
575         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
576         int ret = 0;
577
578         if (!dev_priv) {
579                 DRM_ERROR("called with no initialization\n");
580                 return -EINVAL;
581         }
582
583         DRM_DEBUG("irq_nr=%d breadcrumb=%d\n", irq_nr,
584                   READ_BREADCRUMB(dev_priv));
585
586         if (READ_BREADCRUMB(dev_priv) >= irq_nr) {
587                 if (dev_priv->sarea_priv)
588                         dev_priv->sarea_priv->last_dispatch =
589                                 READ_BREADCRUMB(dev_priv);
590                 return 0;
591         }
592
593         i915_user_irq_on(dev_priv);
594         DRM_WAIT_ON(ret, dev_priv->irq_queue, 3 * DRM_HZ,
595                     READ_BREADCRUMB(dev_priv) >= irq_nr);
596         i915_user_irq_off(dev_priv);
597
598         if (ret == -EBUSY) {
599                 DRM_ERROR("EBUSY -- rec: %d emitted: %d\n",
600                           READ_BREADCRUMB(dev_priv), (int)dev_priv->counter);
601         }
602
603         if (dev_priv->sarea_priv)
604                 dev_priv->sarea_priv->last_dispatch =
605                         READ_BREADCRUMB(dev_priv);
606         return ret;
607 }
608
609 /* Needs the lock as it touches the ring.
610  */
611 int i915_irq_emit(struct drm_device *dev, void *data,
612                          struct drm_file *file_priv)
613 {
614         drm_i915_private_t *dev_priv = dev->dev_private;
615         drm_i915_irq_emit_t *emit = data;
616         int result;
617
618         LOCK_TEST_WITH_RETURN(dev, file_priv);
619
620         if (!dev_priv) {
621                 DRM_ERROR("called with no initialization\n");
622                 return -EINVAL;
623         }
624
625         result = i915_emit_irq(dev);
626
627         if (DRM_COPY_TO_USER(emit->irq_seq, &result, sizeof(int))) {
628                 DRM_ERROR("copy_to_user\n");
629                 return -EFAULT;
630         }
631
632         return 0;
633 }
634
635 /* Doesn't need the hardware lock.
636  */
637 int i915_irq_wait(struct drm_device *dev, void *data,
638                   struct drm_file *file_priv)
639 {
640         drm_i915_private_t *dev_priv = dev->dev_private;
641         drm_i915_irq_wait_t *irqwait = data;
642
643         if (!dev_priv) {
644                 DRM_ERROR("called with no initialization\n");
645                 return -EINVAL;
646         }
647
648         return i915_wait_irq(dev, irqwait->irq_seq);
649 }
650
651 int i915_enable_vblank(struct drm_device *dev, int plane)
652 {
653         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
654         int pipe = i915_get_pipe(dev, plane);
655         u32     pipestat_reg = 0;
656         u32     mask_reg = 0;
657         u32     pipestat;
658
659         switch (pipe) {
660         case 0:
661                 pipestat_reg = PIPEASTAT;
662                 mask_reg |= I915_DISPLAY_PIPE_A_EVENT_INTERRUPT;
663                 break;
664         case 1:
665                 pipestat_reg = PIPEBSTAT;
666                 mask_reg |= I915_DISPLAY_PIPE_B_EVENT_INTERRUPT;
667                 break;
668         default:
669                 DRM_ERROR("tried to enable vblank on non-existent pipe %d\n",
670                           pipe);
671                 break;
672         }
673
674         if (pipestat_reg)
675         {
676                 pipestat = I915_READ (pipestat_reg);
677                 /*
678                  * Older chips didn't have the start vblank interrupt,
679                  * but 
680                  */
681                 if (IS_I965G (dev))
682                         pipestat |= PIPE_START_VBLANK_INTERRUPT_ENABLE;
683                 else
684                         pipestat |= PIPE_VBLANK_INTERRUPT_ENABLE;
685                 /*
686                  * Clear any pending status
687                  */
688                 pipestat |= (PIPE_START_VBLANK_INTERRUPT_STATUS |
689                              PIPE_VBLANK_INTERRUPT_STATUS);
690                 I915_WRITE(pipestat_reg, pipestat);
691         }
692         DRM_SPINLOCK(&dev_priv->user_irq_lock);
693         i915_enable_irq(dev_priv, mask_reg);
694         DRM_SPINUNLOCK(&dev_priv->user_irq_lock);
695
696         return 0;
697 }
698
699 void i915_disable_vblank(struct drm_device *dev, int plane)
700 {
701         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
702         int pipe = i915_get_pipe(dev, plane);
703         u32     pipestat_reg = 0;
704         u32     mask_reg = 0;
705         u32     pipestat;
706
707         switch (pipe) {
708         case 0:
709                 pipestat_reg = PIPEASTAT;
710                 mask_reg |= I915_DISPLAY_PIPE_A_EVENT_INTERRUPT;
711                 break;
712         case 1:
713                 pipestat_reg = PIPEBSTAT;
714                 mask_reg |= I915_DISPLAY_PIPE_B_EVENT_INTERRUPT;
715                 break;
716         default:
717                 DRM_ERROR("tried to disable vblank on non-existent pipe %d\n",
718                           pipe);
719                 break;
720         }
721
722         DRM_SPINLOCK(&dev_priv->user_irq_lock);
723         i915_disable_irq(dev_priv, mask_reg);
724         DRM_SPINUNLOCK(&dev_priv->user_irq_lock);
725
726         if (pipestat_reg)
727         {
728                 pipestat = I915_READ (pipestat_reg);
729                 pipestat &= ~(PIPE_START_VBLANK_INTERRUPT_ENABLE |
730                               PIPE_VBLANK_INTERRUPT_ENABLE);
731                 /*
732                  * Clear any pending status
733                  */
734                 pipestat |= (PIPE_START_VBLANK_INTERRUPT_STATUS |
735                              PIPE_VBLANK_INTERRUPT_STATUS);
736                 I915_WRITE(pipestat_reg, pipestat);
737                 (void) I915_READ(pipestat_reg);
738         }
739 }
740
741 static void i915_enable_interrupt (struct drm_device *dev)
742 {
743         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
744
745         dev_priv->irq_mask_reg = ~0;
746         I915_WRITE(IMR, dev_priv->irq_mask_reg);
747         I915_WRITE(IER, I915_INTERRUPT_ENABLE_MASK);
748         (void) I915_READ (IER);
749
750 #ifdef __linux__
751 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,25)
752         opregion_enable_asle(dev);
753 #endif
754 #endif
755
756         dev_priv->irq_enabled = 1;
757 }
758
759 /* Set the vblank monitor pipe
760  */
761 int i915_vblank_pipe_set(struct drm_device *dev, void *data,
762                          struct drm_file *file_priv)
763 {
764         drm_i915_private_t *dev_priv = dev->dev_private;
765
766         if (!dev_priv) {
767                 DRM_ERROR("called with no initialization\n");
768                 return -EINVAL;
769         }
770
771         return 0;
772 }
773
774 int i915_vblank_pipe_get(struct drm_device *dev, void *data,
775                          struct drm_file *file_priv)
776 {
777         drm_i915_private_t *dev_priv = dev->dev_private;
778         drm_i915_vblank_pipe_t *pipe = data;
779
780         if (!dev_priv) {
781                 DRM_ERROR("called with no initialization\n");
782                 return -EINVAL;
783         }
784
785         pipe->pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B;
786
787         return 0;
788 }
789
790 /**
791  * Schedule buffer swap at given vertical blank.
792  */
793 int i915_vblank_swap(struct drm_device *dev, void *data,
794                      struct drm_file *file_priv)
795 {
796         drm_i915_private_t *dev_priv = dev->dev_private;
797         drm_i915_vblank_swap_t *swap = data;
798         drm_i915_vbl_swap_t *vbl_swap;
799         unsigned int pipe, seqtype, curseq, plane;
800         unsigned long irqflags;
801         struct list_head *list;
802         int ret;
803
804         if (!dev_priv) {
805                 DRM_ERROR("%s called with no initialization\n", __func__);
806                 return -EINVAL;
807         }
808
809         if (!dev_priv->sarea_priv || dev_priv->sarea_priv->rotation) {
810                 DRM_DEBUG("Rotation not supported\n");
811                 return -EINVAL;
812         }
813
814         if (swap->seqtype & ~(_DRM_VBLANK_RELATIVE | _DRM_VBLANK_ABSOLUTE |
815                              _DRM_VBLANK_SECONDARY | _DRM_VBLANK_NEXTONMISS |
816                              _DRM_VBLANK_FLIP)) {
817                 DRM_ERROR("Invalid sequence type 0x%x\n", swap->seqtype);
818                 return -EINVAL;
819         }
820
821         plane = (swap->seqtype & _DRM_VBLANK_SECONDARY) ? 1 : 0;
822         pipe = i915_get_pipe(dev, plane);
823
824         seqtype = swap->seqtype & (_DRM_VBLANK_RELATIVE | _DRM_VBLANK_ABSOLUTE);
825
826         if (!(dev_priv->vblank_pipe & (1 << pipe))) {
827                 DRM_ERROR("Invalid pipe %d\n", pipe);
828                 return -EINVAL;
829         }
830
831         DRM_SPINLOCK_IRQSAVE(&dev->drw_lock, irqflags);
832
833         /* It makes no sense to schedule a swap for a drawable that doesn't have
834          * valid information at this point. E.g. this could mean that the X
835          * server is too old to push drawable information to the DRM, in which
836          * case all such swaps would become ineffective.
837          */
838         if (!drm_get_drawable_info(dev, swap->drawable)) {
839                 DRM_SPINUNLOCK_IRQRESTORE(&dev->drw_lock, irqflags);
840                 DRM_DEBUG("Invalid drawable ID %d\n", swap->drawable);
841                 return -EINVAL;
842         }
843
844         DRM_SPINUNLOCK_IRQRESTORE(&dev->drw_lock, irqflags);
845
846         /*
847          * We take the ref here and put it when the swap actually completes
848          * in the tasklet.
849          */
850         ret = drm_vblank_get(dev, pipe);
851         if (ret)
852                 return ret;
853         curseq = drm_vblank_count(dev, pipe);
854
855         if (seqtype == _DRM_VBLANK_RELATIVE)
856                 swap->sequence += curseq;
857
858         if ((curseq - swap->sequence) <= (1<<23)) {
859                 if (swap->seqtype & _DRM_VBLANK_NEXTONMISS) {
860                         swap->sequence = curseq + 1;
861                 } else {
862                         DRM_DEBUG("Missed target sequence\n");
863                         drm_vblank_put(dev, pipe);
864                         return -EINVAL;
865                 }
866         }
867
868         if (swap->seqtype & _DRM_VBLANK_FLIP) {
869                 swap->sequence--;
870
871                 if ((curseq - swap->sequence) <= (1<<23)) {
872                         struct drm_drawable_info *drw;
873
874                         LOCK_TEST_WITH_RETURN(dev, file_priv);
875
876                         DRM_SPINLOCK_IRQSAVE(&dev->drw_lock, irqflags);
877
878                         drw = drm_get_drawable_info(dev, swap->drawable);
879
880                         if (!drw) {
881                                 DRM_SPINUNLOCK_IRQRESTORE(&dev->drw_lock,
882                                     irqflags);
883                                 DRM_DEBUG("Invalid drawable ID %d\n",
884                                           swap->drawable);
885                                 drm_vblank_put(dev, pipe);
886                                 return -EINVAL;
887                         }
888
889                         i915_dispatch_vsync_flip(dev, drw, plane);
890
891                         DRM_SPINUNLOCK_IRQRESTORE(&dev->drw_lock, irqflags);
892
893                         drm_vblank_put(dev, pipe);
894                         return 0;
895                 }
896         }
897
898         DRM_SPINLOCK_IRQSAVE(&dev_priv->swaps_lock, irqflags);
899
900         list_for_each(list, &dev_priv->vbl_swaps.head) {
901                 vbl_swap = list_entry(list, drm_i915_vbl_swap_t, head);
902
903                 if (vbl_swap->drw_id == swap->drawable &&
904                     vbl_swap->plane == plane &&
905                     vbl_swap->sequence == swap->sequence) {
906                         vbl_swap->flip = (swap->seqtype & _DRM_VBLANK_FLIP);
907                         DRM_SPINUNLOCK_IRQRESTORE(&dev_priv->swaps_lock, irqflags);
908                         DRM_DEBUG("Already scheduled\n");
909                         return 0;
910                 }
911         }
912
913         DRM_SPINUNLOCK_IRQRESTORE(&dev_priv->swaps_lock, irqflags);
914
915         if (dev_priv->swaps_pending >= 100) {
916                 DRM_DEBUG("Too many swaps queued\n");
917                 drm_vblank_put(dev, pipe);
918                 return -EBUSY;
919         }
920
921         vbl_swap = drm_calloc(1, sizeof(*vbl_swap), DRM_MEM_DRIVER);
922
923         if (!vbl_swap) {
924                 DRM_ERROR("Failed to allocate memory to queue swap\n");
925                 drm_vblank_put(dev, pipe);
926                 return -ENOMEM;
927         }
928
929         DRM_DEBUG("\n");
930
931         vbl_swap->drw_id = swap->drawable;
932         vbl_swap->plane = plane;
933         vbl_swap->sequence = swap->sequence;
934         vbl_swap->flip = (swap->seqtype & _DRM_VBLANK_FLIP);
935
936         if (vbl_swap->flip)
937                 swap->sequence++;
938
939         DRM_SPINLOCK_IRQSAVE(&dev_priv->swaps_lock, irqflags);
940
941         list_add_tail(&vbl_swap->head, &dev_priv->vbl_swaps.head);
942         dev_priv->swaps_pending++;
943
944         DRM_SPINUNLOCK_IRQRESTORE(&dev_priv->swaps_lock, irqflags);
945
946         return 0;
947 }
948
949 /* drm_dma.h hooks
950 */
951 void i915_driver_irq_preinstall(struct drm_device * dev)
952 {
953         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
954
955         I915_WRITE(HWSTAM, 0xeffe);
956         I915_WRITE(IMR, 0xffffffff);
957         I915_WRITE(IER, 0x0);
958 }
959
960 int i915_driver_irq_postinstall(struct drm_device * dev)
961 {
962         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
963         int ret, num_pipes = 2;
964
965         INIT_LIST_HEAD(&dev_priv->vbl_swaps.head);
966         dev_priv->swaps_pending = 0;
967
968         dev_priv->user_irq_refcount = 0;
969         dev_priv->irq_mask_reg = ~0;
970
971         ret = drm_vblank_init(dev, num_pipes);
972         if (ret)
973                 return ret;
974
975         dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B;
976         dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
977
978         i915_enable_interrupt(dev);
979         DRM_INIT_WAITQUEUE(&dev_priv->irq_queue);
980
981         /*
982          * Initialize the hardware status page IRQ location.
983          */
984
985         I915_WRITE(INSTPM, (1 << 5) | (1 << 21));
986         return 0;
987 }
988
989 void i915_driver_irq_uninstall(struct drm_device * dev)
990 {
991         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
992         u32 temp;
993
994         if (!dev_priv)
995                 return;
996
997         dev_priv->vblank_pipe = 0;
998
999         dev_priv->irq_enabled = 0;
1000         I915_WRITE(HWSTAM, 0xffffffff);
1001         I915_WRITE(IMR, 0xffffffff);
1002         I915_WRITE(IER, 0x0);
1003
1004         temp = I915_READ(PIPEASTAT);
1005         I915_WRITE(PIPEASTAT, temp);
1006         temp = I915_READ(PIPEBSTAT);
1007         I915_WRITE(PIPEBSTAT, temp);
1008         temp = I915_READ(IIR);
1009         I915_WRITE(IIR, temp);
1010 }