shared-core/i915_irq.c

   1 /* i915_irq.c -- IRQ support for the I915 -*- linux-c -*-
   2  */
   3 /*
   4  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   5  * All Rights Reserved.
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a
   8  * copy of this software and associated documentation files (the
   9  * "Software"), to deal in the Software without restriction, including
  10  * without limitation the rights to use, copy, modify, merge, publish,
  11  * distribute, sub license, and/or sell copies of the Software, and to
  12  * permit persons to whom the Software is furnished to do so, subject to
  13  * the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the
  16  * next paragraph) shall be included in all copies or substantial portions
  17  * of the Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  20  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  21  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  22  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  23  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  24  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  25  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  26  *
  27  */
  28
  29 #include "drmP.h"
  30 #include "drm.h"
  31 #include "i915_drm.h"
  32 #include "i915_drv.h"
  33
  34 #define USER_INT_FLAG (1<<1)
  35 #define VSYNC_PIPEB_FLAG (1<<5)
  36 #define VSYNC_PIPEA_FLAG (1<<7)
  37
  38 #define MAX_NOPID ((u32)~0)
  39
  40 /**
  41  * i915_get_pipe - return the the pipe associated with a given plane
  42  * @dev: DRM device
  43  * @plane: plane to look for
  44  *
  45  * The Intel Mesa & 2D drivers call the vblank routines with a plane number
  46  * rather than a pipe number, since they may not always be equal.  This routine
  47  * maps the given @plane back to a pipe number.
  48  */
  49 static int
  50 i915_get_pipe(struct drm_device *dev, int plane)
  51 {
  52         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
  53         u32 dspcntr;
  54
  55         dspcntr = plane ? I915_READ(DSPBCNTR) : I915_READ(DSPACNTR);
  56
  57         return dspcntr & DISPPLANE_SEL_PIPE_MASK ? 1 : 0;
  58 }
  59
  60 /**
  61  * i915_get_plane - return the the plane associated with a given pipe
  62  * @dev: DRM device
  63  * @pipe: pipe to look for
  64  *
  65  * The Intel Mesa & 2D drivers call the vblank routines with a plane number
  66  * rather than a plane number, since they may not always be equal.  This routine
  67  * maps the given @pipe back to a plane number.
  68  */
  69 static int
  70 i915_get_plane(struct drm_device *dev, int pipe)
  71 {
  72         if (i915_get_pipe(dev, 0) == pipe)
  73                 return 0;
  74         return 1;
  75 }
  76
  77 /**
  78  * i915_pipe_enabled - check if a pipe is enabled
  79  * @dev: DRM device
  80  * @pipe: pipe to check
  81  *
  82  * Reading certain registers when the pipe is disabled can hang the chip.
  83  * Use this routine to make sure the PLL is running and the pipe is active
  84  * before reading such registers if unsure.
  85  */
  86 static int
  87 i915_pipe_enabled(struct drm_device *dev, int pipe)
  88 {
  89         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
  90         unsigned long pipeconf = pipe ? PIPEBCONF : PIPEACONF;
  91
  92         if (I915_READ(pipeconf) & PIPEACONF_ENABLE)
  93                 return 1;
  94
  95         return 0;
  96 }
  97
  98 /**
  99  * Emit a synchronous flip.
 100  *
 101  * This function must be called with the drawable spinlock held.
 102  */
 103 static void
 104 i915_dispatch_vsync_flip(struct drm_device *dev, struct drm_drawable_info *drw,
 105                          int plane)
 106 {
 107         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 108         drm_i915_sarea_t *sarea_priv = dev_priv->sarea_priv;
 109         u16 x1, y1, x2, y2;
 110         int pf_planes = 1 << plane;
 111
 112         DRM_SPINLOCK_ASSERT(&dev->drw_lock);
 113
 114         /* If the window is visible on the other plane, we have to flip on that
 115          * plane as well.
 116          */
 117         if (plane == 1) {
 118                 x1 = sarea_priv->planeA_x;
 119                 y1 = sarea_priv->planeA_y;
 120                 x2 = x1 + sarea_priv->planeA_w;
 121                 y2 = y1 + sarea_priv->planeA_h;
 122         } else {
 123                 x1 = sarea_priv->planeB_x;
 124                 y1 = sarea_priv->planeB_y;
 125                 x2 = x1 + sarea_priv->planeB_w;
 126                 y2 = y1 + sarea_priv->planeB_h;
 127         }
 128
 129         if (x2 > 0 && y2 > 0) {
 130                 int i, num_rects = drw->num_rects;
 131                 struct drm_clip_rect *rect = drw->rects;
 132
 133                 for (i = 0; i < num_rects; i++)
 134                         if (!(rect[i].x1 >= x2 || rect[i].y1 >= y2 ||
 135                               rect[i].x2 <= x1 || rect[i].y2 <= y1)) {
 136                                 pf_planes = 0x3;
 137
 138                                 break;
 139                         }
 140         }
 141
 142         i915_dispatch_flip(dev, pf_planes, 1);
 143 }
 144
 145 /**
 146  * Emit blits for scheduled buffer swaps.
 147  *
 148  * This function will be called with the HW lock held.
 149  */
 150 static void i915_vblank_tasklet(struct drm_device *dev)
 151 {
 152         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 153         struct list_head *list, *tmp, hits, *hit;
 154         int nhits, nrects, slice[2], upper[2], lower[2], i, num_pages;
 155         unsigned counter[2];
 156         struct drm_drawable_info *drw;
 157         drm_i915_sarea_t *sarea_priv = dev_priv->sarea_priv;
 158         u32 cpp = dev_priv->cpp,  offsets[3];
 159         u32 cmd = (cpp == 4) ? (XY_SRC_COPY_BLT_CMD |
 160                                 XY_SRC_COPY_BLT_WRITE_ALPHA |
 161                                 XY_SRC_COPY_BLT_WRITE_RGB)
 162                              : XY_SRC_COPY_BLT_CMD;
 163         u32 pitchropcpp = (sarea_priv->pitch * cpp) | (0xcc << 16) |
 164                           (cpp << 23) | (1 << 24);
 165         RING_LOCALS;
 166
 167         counter[0] = drm_vblank_count(dev, 0);
 168         counter[1] = drm_vblank_count(dev, 1);
 169
 170         DRM_DEBUG("\n");
 171
 172         INIT_LIST_HEAD(&hits);
 173
 174         nhits = nrects = 0;
 175
 176         /* No irqsave/restore necessary.  This tasklet may be run in an
 177          * interrupt context or normal context, but we don't have to worry
 178          * about getting interrupted by something acquiring the lock, because
 179          * we are the interrupt context thing that acquires the lock.
 180          */
 181         DRM_SPINLOCK(&dev_priv->swaps_lock);
 182
 183         /* Find buffer swaps scheduled for this vertical blank */
 184         list_for_each_safe(list, tmp, &dev_priv->vbl_swaps.head) {
 185                 drm_i915_vbl_swap_t *vbl_swap =
 186                         list_entry(list, drm_i915_vbl_swap_t, head);
 187                 int pipe = i915_get_pipe(dev, vbl_swap->plane);
 188
 189                 if ((counter[pipe] - vbl_swap->sequence) > (1<<23))
 190                         continue;
 191
 192                 list_del(list);
 193                 dev_priv->swaps_pending--;
 194                 drm_vblank_put(dev, pipe);
 195
 196                 DRM_SPINUNLOCK(&dev_priv->swaps_lock);
 197                 DRM_SPINLOCK(&dev->drw_lock);
 198
 199                 drw = drm_get_drawable_info(dev, vbl_swap->drw_id);
 200
 201                 if (!drw) {
 202                         DRM_SPINUNLOCK(&dev->drw_lock);
 203                         drm_free(vbl_swap, sizeof(*vbl_swap), DRM_MEM_DRIVER);
 204                         DRM_SPINLOCK(&dev_priv->swaps_lock);
 205                         continue;
 206                 }
 207
 208                 list_for_each(hit, &hits) {
 209                         drm_i915_vbl_swap_t *swap_cmp =
 210                                 list_entry(hit, drm_i915_vbl_swap_t, head);
 211                         struct drm_drawable_info *drw_cmp =
 212                                 drm_get_drawable_info(dev, swap_cmp->drw_id);
 213
 214                         if (drw_cmp &&
 215                             drw_cmp->rects[0].y1 > drw->rects[0].y1) {
 216                                 list_add_tail(list, hit);
 217                                 break;
 218                         }
 219                 }
 220
 221                 DRM_SPINUNLOCK(&dev->drw_lock);
 222
 223                 /* List of hits was empty, or we reached the end of it */
 224                 if (hit == &hits)
 225                         list_add_tail(list, hits.prev);
 226
 227                 nhits++;
 228
 229                 DRM_SPINLOCK(&dev_priv->swaps_lock);
 230         }
 231
 232         DRM_SPINUNLOCK(&dev_priv->swaps_lock);
 233
 234         if (nhits == 0) {
 235                 return;
 236         }
 237
 238         i915_kernel_lost_context(dev);
 239
 240         upper[0] = upper[1] = 0;
 241         slice[0] = max(sarea_priv->planeA_h / nhits, 1);
 242         slice[1] = max(sarea_priv->planeB_h / nhits, 1);
 243         lower[0] = sarea_priv->planeA_y + slice[0];
 244         lower[1] = sarea_priv->planeB_y + slice[0];
 245
 246         offsets[0] = sarea_priv->front_offset;
 247         offsets[1] = sarea_priv->back_offset;
 248         offsets[2] = sarea_priv->third_offset;
 249         num_pages = sarea_priv->third_handle ? 3 : 2;
 250
 251         DRM_SPINLOCK(&dev->drw_lock);
 252
 253         /* Emit blits for buffer swaps, partitioning both outputs into as many
 254          * slices as there are buffer swaps scheduled in order to avoid tearing
 255          * (based on the assumption that a single buffer swap would always
 256          * complete before scanout starts).
 257          */
 258         for (i = 0; i++ < nhits;
 259              upper[0] = lower[0], lower[0] += slice[0],
 260              upper[1] = lower[1], lower[1] += slice[1]) {
 261                 int init_drawrect = 1;
 262
 263                 if (i == nhits)
 264                         lower[0] = lower[1] = sarea_priv->height;
 265
 266                 list_for_each(hit, &hits) {
 267                         drm_i915_vbl_swap_t *swap_hit =
 268                                 list_entry(hit, drm_i915_vbl_swap_t, head);
 269                         struct drm_clip_rect *rect;
 270                         int num_rects, plane, front, back;
 271                         unsigned short top, bottom;
 272
 273                         drw = drm_get_drawable_info(dev, swap_hit->drw_id);
 274
 275                         if (!drw)
 276                                 continue;
 277
 278                         plane = swap_hit->plane;
 279
 280                         if (swap_hit->flip) {
 281                                 i915_dispatch_vsync_flip(dev, drw, plane);
 282                                 continue;
 283                         }
 284
 285                         if (init_drawrect) {
 286                                 BEGIN_LP_RING(6);
 287
 288                                 OUT_RING(GFX_OP_DRAWRECT_INFO);
 289                                 OUT_RING(0);
 290                                 OUT_RING(0);
 291                                 OUT_RING(sarea_priv->width | sarea_priv->height << 16);
 292                                 OUT_RING(sarea_priv->width | sarea_priv->height << 16);
 293                                 OUT_RING(0);
 294
 295                                 ADVANCE_LP_RING();
 296
 297                                 sarea_priv->ctxOwner = DRM_KERNEL_CONTEXT;
 298
 299                                 init_drawrect = 0;
 300                         }
 301
 302                         rect = drw->rects;
 303                         top = upper[plane];
 304                         bottom = lower[plane];
 305
 306                         front = (dev_priv->sarea_priv->pf_current_page >>
 307                                  (2 * plane)) & 0x3;
 308                         back = (front + 1) % num_pages;
 309
 310                         for (num_rects = drw->num_rects; num_rects--; rect++) {
 311                                 int y1 = max(rect->y1, top);
 312                                 int y2 = min(rect->y2, bottom);
 313
 314                                 if (y1 >= y2)
 315                                         continue;
 316
 317                                 BEGIN_LP_RING(8);
 318
 319                                 OUT_RING(cmd);
 320                                 OUT_RING(pitchropcpp);
 321                                 OUT_RING((y1 << 16) | rect->x1);
 322                                 OUT_RING((y2 << 16) | rect->x2);
 323                                 OUT_RING(offsets[front]);
 324                                 OUT_RING((y1 << 16) | rect->x1);
 325                                 OUT_RING(pitchropcpp & 0xffff);
 326                                 OUT_RING(offsets[back]);
 327
 328                                 ADVANCE_LP_RING();
 329                         }
 330                 }
 331         }
 332
 333         DRM_SPINUNLOCK(&dev->drw_lock);
 334
 335         list_for_each_safe(hit, tmp, &hits) {
 336                 drm_i915_vbl_swap_t *swap_hit =
 337                         list_entry(hit, drm_i915_vbl_swap_t, head);
 338
 339                 list_del(hit);
 340
 341                 drm_free(swap_hit, sizeof(*swap_hit), DRM_MEM_DRIVER);
 342         }
 343 }
 344 #if 0
 345 static int i915_in_vblank(struct drm_device *dev, int pipe)
 346 {
 347         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 348         unsigned long pipedsl, vblank, vtotal;
 349         unsigned long vbl_start, vbl_end, cur_line;
 350
 351         pipedsl = pipe ? PIPEBDSL : PIPEADSL;
 352         vblank = pipe ? VBLANK_B : VBLANK_A;
 353         vtotal = pipe ? VTOTAL_B : VTOTAL_A;
 354
 355         vbl_start = I915_READ(vblank) & VBLANK_START_MASK;
 356         vbl_end = (I915_READ(vblank) >> VBLANK_END_SHIFT) & VBLANK_END_MASK;
 357
 358         cur_line = I915_READ(pipedsl);
 359
 360         if (cur_line >= vbl_start)
 361                 return 1;
 362
 363         return 0;
 364 }
 365 #endif
 366 u32 i915_get_vblank_counter(struct drm_device *dev, int plane)
 367 {
 368         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 369         unsigned long high_frame;
 370         unsigned long low_frame;
 371         u32 high1, high2, low, count;
 372         int pipe;
 373
 374         pipe = i915_get_pipe(dev, plane);
 375         high_frame = pipe ? PIPEBFRAMEHIGH : PIPEAFRAMEHIGH;
 376         low_frame = pipe ? PIPEBFRAMEPIXEL : PIPEAFRAMEPIXEL;
 377
 378         if (!i915_pipe_enabled(dev, pipe)) {
 379             printk(KERN_ERR "trying to get vblank count for disabled "
 380                    "pipe %d\n", pipe);
 381             return 0;
 382         }
 383
 384         /*
 385          * High & low register fields aren't synchronized, so make sure
 386          * we get a low value that's stable across two reads of the high
 387          * register.
 388          */
 389         do {
 390                 high1 = ((I915_READ(high_frame) & PIPE_FRAME_HIGH_MASK) >>
 391                          PIPE_FRAME_HIGH_SHIFT);
 392                 low =  ((I915_READ(low_frame) & PIPE_FRAME_LOW_MASK) >>
 393                         PIPE_FRAME_LOW_SHIFT);
 394                 high2 = ((I915_READ(high_frame) & PIPE_FRAME_HIGH_MASK) >>
 395                          PIPE_FRAME_HIGH_SHIFT);
 396         } while (high1 != high2);
 397
 398         count = (high1 << 8) | low;
 399
 400         /*
 401          * If we're in the middle of the vblank period, the
 402          * above regs won't have been updated yet, so return
 403          * an incremented count to stay accurate
 404          */
 405 #if 0
 406         if (i915_in_vblank(dev, pipe))
 407                 count++;
 408 #endif
 409         return count;
 410 }
 411
 412 irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
 413 {
 414         struct drm_device *dev = (struct drm_device *) arg;
 415         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 416         u16 temp;
 417         u32 pipea_stats, pipeb_stats;
 418
 419         pipea_stats = I915_READ(I915REG_PIPEASTAT);
 420         pipeb_stats = I915_READ(I915REG_PIPEBSTAT);
 421
 422         temp = I915_READ16(I915REG_INT_IDENTITY_R);
 423
 424 #if 0
 425         DRM_DEBUG("flag=%08x\n", temp);
 426 #endif
 427         if (temp == 0)
 428                 return IRQ_NONE;
 429
 430         /*
 431          * Clear the PIPE(A|B)STAT regs before the IIR otherwise
 432          * we may get extra interrupts.
 433          */
 434         if (temp & VSYNC_PIPEA_FLAG) {
 435                 drm_handle_vblank(dev, i915_get_plane(dev, 0));
 436                 I915_WRITE(I915REG_PIPEASTAT,
 437                            pipea_stats | I915_VBLANK_INTERRUPT_ENABLE |
 438                            I915_VBLANK_CLEAR);
 439         }
 440         if (temp & VSYNC_PIPEB_FLAG) {
 441                 drm_handle_vblank(dev, i915_get_plane(dev, 1));
 442                 I915_WRITE(I915REG_PIPEBSTAT,
 443                            pipeb_stats | I915_VBLANK_INTERRUPT_ENABLE |
 444                            I915_VBLANK_CLEAR);
 445         }
 446
 447         I915_WRITE16(I915REG_INT_IDENTITY_R, temp);
 448         (void) I915_READ16(I915REG_INT_IDENTITY_R); /* Flush posted write */
 449
 450         temp &= (dev_priv->irq_enable_reg | USER_INT_FLAG | VSYNC_PIPEA_FLAG |
 451                  VSYNC_PIPEB_FLAG);
 452
 453         if (dev_priv->sarea_priv)
 454                 dev_priv->sarea_priv->last_dispatch =
 455                         READ_BREADCRUMB(dev_priv);
 456
 457         if (temp & USER_INT_FLAG) {
 458                 DRM_WAKEUP(&dev_priv->irq_queue);
 459 #ifdef I915_HAVE_FENCE
 460                 i915_fence_handler(dev);
 461 #endif
 462         }
 463
 464         if (temp & (VSYNC_PIPEA_FLAG | VSYNC_PIPEB_FLAG)) {
 465                 if (dev_priv->swaps_pending > 0)
 466                         drm_locked_tasklet(dev, i915_vblank_tasklet);
 467         }
 468
 469         return IRQ_HANDLED;
 470 }
 471
 472 int i915_emit_irq(struct drm_device *dev)
 473 {
 474         drm_i915_private_t *dev_priv = dev->dev_private;
 475         RING_LOCALS;
 476
 477         i915_kernel_lost_context(dev);
 478
 479         DRM_DEBUG("\n");
 480
 481         i915_emit_breadcrumb(dev);
 482
 483         BEGIN_LP_RING(2);
 484         OUT_RING(0);
 485         OUT_RING(GFX_OP_USER_INTERRUPT);
 486         ADVANCE_LP_RING();
 487
 488         return dev_priv->counter;
 489 }
 490
 491 void i915_user_irq_on(drm_i915_private_t *dev_priv)
 492 {
 493         DRM_SPINLOCK(&dev_priv->user_irq_lock);
 494         if (dev_priv->irq_enabled && (++dev_priv->user_irq_refcount == 1)){
 495                 dev_priv->irq_enable_reg |= USER_INT_FLAG;
 496                 I915_WRITE16(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
 497         }
 498         DRM_SPINUNLOCK(&dev_priv->user_irq_lock);
 499
 500 }
 501
 502 void i915_user_irq_off(drm_i915_private_t *dev_priv)
 503 {
 504         DRM_SPINLOCK(&dev_priv->user_irq_lock);
 505         if (dev_priv->irq_enabled && (--dev_priv->user_irq_refcount == 0)) {
 506                 //              dev_priv->irq_enable_reg &= ~USER_INT_FLAG;
 507                 //              I915_WRITE16(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
 508         }
 509         DRM_SPINUNLOCK(&dev_priv->user_irq_lock);
 510 }
 511
 512
 513 static int i915_wait_irq(struct drm_device * dev, int irq_nr)
 514 {
 515         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 516         int ret = 0;
 517
 518         DRM_DEBUG("irq_nr=%d breadcrumb=%d\n", irq_nr,
 519                   READ_BREADCRUMB(dev_priv));
 520
 521         if (READ_BREADCRUMB(dev_priv) >= irq_nr)
 522                 return 0;
 523
 524         i915_user_irq_on(dev_priv);
 525         DRM_WAIT_ON(ret, dev_priv->irq_queue, 3 * DRM_HZ,
 526                     READ_BREADCRUMB(dev_priv) >= irq_nr);
 527         i915_user_irq_off(dev_priv);
 528
 529         if (ret == -EBUSY) {
 530                 DRM_ERROR("EBUSY -- rec: %d emitted: %d\n",
 531                           READ_BREADCRUMB(dev_priv), (int)dev_priv->counter);
 532         }
 533
 534         if (dev_priv->sarea_priv)
 535                 dev_priv->sarea_priv->last_dispatch =
 536                         READ_BREADCRUMB(dev_priv);
 537         return ret;
 538 }
 539
 540 /* Needs the lock as it touches the ring.
 541  */
 542 int i915_irq_emit(struct drm_device *dev, void *data,
 543                          struct drm_file *file_priv)
 544 {
 545         drm_i915_private_t *dev_priv = dev->dev_private;
 546         drm_i915_irq_emit_t *emit = data;
 547         int result;
 548
 549         LOCK_TEST_WITH_RETURN(dev, file_priv);
 550
 551         if (!dev_priv) {
 552                 DRM_ERROR("called with no initialization\n");
 553                 return -EINVAL;
 554         }
 555
 556         result = i915_emit_irq(dev);
 557
 558         if (DRM_COPY_TO_USER(emit->irq_seq, &result, sizeof(int))) {
 559                 DRM_ERROR("copy_to_user\n");
 560                 return -EFAULT;
 561         }
 562
 563         return 0;
 564 }
 565
 566 /* Doesn't need the hardware lock.
 567  */
 568 int i915_irq_wait(struct drm_device *dev, void *data,
 569                   struct drm_file *file_priv)
 570 {
 571         drm_i915_private_t *dev_priv = dev->dev_private;
 572         drm_i915_irq_wait_t *irqwait = data;
 573
 574         if (!dev_priv) {
 575                 DRM_ERROR("called with no initialization\n");
 576                 return -EINVAL;
 577         }
 578
 579         return i915_wait_irq(dev, irqwait->irq_seq);
 580 }
 581
 582 int i915_enable_vblank(struct drm_device *dev, int plane)
 583 {
 584         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 585         int pipe = i915_get_pipe(dev, plane);
 586
 587         switch (pipe) {
 588         case 0:
 589                 dev_priv->irq_enable_reg |= VSYNC_PIPEA_FLAG;
 590                 break;
 591         case 1:
 592                 dev_priv->irq_enable_reg |= VSYNC_PIPEB_FLAG;
 593                 break;
 594         default:
 595                 DRM_ERROR("tried to enable vblank on non-existent pipe %d\n",
 596                           pipe);
 597                 break;
 598         }
 599
 600         I915_WRITE16(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
 601
 602         return 0;
 603 }
 604
 605 void i915_disable_vblank(struct drm_device *dev, int plane)
 606 {
 607         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 608         int pipe = i915_get_pipe(dev, plane);
 609
 610         switch (pipe) {
 611         case 0:
 612                 dev_priv->irq_enable_reg &= ~VSYNC_PIPEA_FLAG;
 613                 break;
 614         case 1:
 615                 dev_priv->irq_enable_reg &= ~VSYNC_PIPEB_FLAG;
 616                 break;
 617         default:
 618                 DRM_ERROR("tried to disable vblank on non-existent pipe %d\n",
 619                           pipe);
 620                 break;
 621         }
 622
 623         I915_WRITE16(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
 624 }
 625
 626 static void i915_enable_interrupt (struct drm_device *dev)
 627 {
 628         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 629
 630         dev_priv->irq_enable_reg |= USER_INT_FLAG;
 631
 632         I915_WRITE16(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
 633         dev_priv->irq_enabled = 1;
 634 }
 635
 636 /* Set the vblank monitor pipe
 637  */
 638 int i915_vblank_pipe_set(struct drm_device *dev, void *data,
 639                          struct drm_file *file_priv)
 640 {
 641         drm_i915_private_t *dev_priv = dev->dev_private;
 642         drm_i915_vblank_pipe_t *pipe = data;
 643
 644         if (!dev_priv) {
 645                 DRM_ERROR("called with no initialization\n");
 646                 return -EINVAL;
 647         }
 648
 649         if (pipe->pipe & ~(DRM_I915_VBLANK_PIPE_A|DRM_I915_VBLANK_PIPE_B)) {
 650                 DRM_ERROR("called with invalid pipe 0x%x\n", pipe->pipe);
 651                 return -EINVAL;
 652         }
 653
 654         dev_priv->vblank_pipe = pipe->pipe;
 655
 656         return 0;
 657 }
 658
 659 int i915_vblank_pipe_get(struct drm_device *dev, void *data,
 660                          struct drm_file *file_priv)
 661 {
 662         drm_i915_private_t *dev_priv = dev->dev_private;
 663         drm_i915_vblank_pipe_t *pipe = data;
 664         u16 flag;
 665
 666         if (!dev_priv) {
 667                 DRM_ERROR("called with no initialization\n");
 668                 return -EINVAL;
 669         }
 670
 671         flag = I915_READ(I915REG_INT_ENABLE_R);
 672         pipe->pipe = 0;
 673         if (flag & VSYNC_PIPEA_FLAG)
 674                 pipe->pipe |= DRM_I915_VBLANK_PIPE_A;
 675         if (flag & VSYNC_PIPEB_FLAG)
 676                 pipe->pipe |= DRM_I915_VBLANK_PIPE_B;
 677
 678         return 0;
 679 }
 680
 681 /**
 682  * Schedule buffer swap at given vertical blank.
 683  */
 684 int i915_vblank_swap(struct drm_device *dev, void *data,
 685                      struct drm_file *file_priv)
 686 {
 687         drm_i915_private_t *dev_priv = dev->dev_private;
 688         drm_i915_vblank_swap_t *swap = data;
 689         drm_i915_vbl_swap_t *vbl_swap;
 690         unsigned int pipe, seqtype, curseq, plane;
 691         unsigned long irqflags;
 692         struct list_head *list;
 693         int ret;
 694
 695         if (!dev_priv) {
 696                 DRM_ERROR("%s called with no initialization\n", __func__);
 697                 return -EINVAL;
 698         }
 699
 700         if (!dev_priv->sarea_priv || dev_priv->sarea_priv->rotation) {
 701                 DRM_DEBUG("Rotation not supported\n");
 702                 return -EINVAL;
 703         }
 704
 705         if (swap->seqtype & ~(_DRM_VBLANK_RELATIVE | _DRM_VBLANK_ABSOLUTE |
 706                              _DRM_VBLANK_SECONDARY | _DRM_VBLANK_NEXTONMISS |
 707                              _DRM_VBLANK_FLIP)) {
 708                 DRM_ERROR("Invalid sequence type 0x%x\n", swap->seqtype);
 709                 return -EINVAL;
 710         }
 711
 712         plane = (swap->seqtype & _DRM_VBLANK_SECONDARY) ? 1 : 0;
 713         pipe = i915_get_pipe(dev, plane);
 714
 715         seqtype = swap->seqtype & (_DRM_VBLANK_RELATIVE | _DRM_VBLANK_ABSOLUTE);
 716
 717         if (!(dev_priv->vblank_pipe & (1 << pipe))) {
 718                 DRM_ERROR("Invalid pipe %d\n", pipe);
 719                 return -EINVAL;
 720         }
 721
 722         DRM_SPINLOCK_IRQSAVE(&dev->drw_lock, irqflags);
 723
 724         /* It makes no sense to schedule a swap for a drawable that doesn't have
 725          * valid information at this point. E.g. this could mean that the X
 726          * server is too old to push drawable information to the DRM, in which
 727          * case all such swaps would become ineffective.
 728          */
 729         if (!drm_get_drawable_info(dev, swap->drawable)) {
 730                 DRM_SPINUNLOCK_IRQRESTORE(&dev->drw_lock, irqflags);
 731                 DRM_DEBUG("Invalid drawable ID %d\n", swap->drawable);
 732                 return -EINVAL;
 733         }
 734
 735         DRM_SPINUNLOCK_IRQRESTORE(&dev->drw_lock, irqflags);
 736
 737         drm_update_vblank_count(dev, pipe);
 738         curseq = drm_vblank_count(dev, pipe);
 739
 740         if (seqtype == _DRM_VBLANK_RELATIVE)
 741                 swap->sequence += curseq;
 742
 743         if ((curseq - swap->sequence) <= (1<<23)) {
 744                 if (swap->seqtype & _DRM_VBLANK_NEXTONMISS) {
 745                         swap->sequence = curseq + 1;
 746                 } else {
 747                         DRM_DEBUG("Missed target sequence\n");
 748                         return -EINVAL;
 749                 }
 750         }
 751
 752         if (swap->seqtype & _DRM_VBLANK_FLIP) {
 753                 swap->sequence--;
 754
 755                 if ((curseq - swap->sequence) <= (1<<23)) {
 756                         struct drm_drawable_info *drw;
 757
 758                         LOCK_TEST_WITH_RETURN(dev, file_priv);
 759
 760                         DRM_SPINLOCK_IRQSAVE(&dev->drw_lock, irqflags);
 761
 762                         drw = drm_get_drawable_info(dev, swap->drawable);
 763
 764                         if (!drw) {
 765                                 DRM_SPINUNLOCK_IRQRESTORE(&dev->drw_lock,
 766                                     irqflags);
 767                                 DRM_DEBUG("Invalid drawable ID %d\n",
 768                                           swap->drawable);
 769                                 return -EINVAL;
 770                         }
 771
 772                         i915_dispatch_vsync_flip(dev, drw, plane);
 773
 774                         DRM_SPINUNLOCK_IRQRESTORE(&dev->drw_lock, irqflags);
 775
 776                         return 0;
 777                 }
 778         }
 779
 780         DRM_SPINLOCK_IRQSAVE(&dev_priv->swaps_lock, irqflags);
 781
 782         list_for_each(list, &dev_priv->vbl_swaps.head) {
 783                 vbl_swap = list_entry(list, drm_i915_vbl_swap_t, head);
 784
 785                 if (vbl_swap->drw_id == swap->drawable &&
 786                     vbl_swap->plane == plane &&
 787                     vbl_swap->sequence == swap->sequence) {
 788                         vbl_swap->flip = (swap->seqtype & _DRM_VBLANK_FLIP);
 789                         DRM_SPINUNLOCK_IRQRESTORE(&dev_priv->swaps_lock, irqflags);
 790                         DRM_DEBUG("Already scheduled\n");
 791                         return 0;
 792                 }
 793         }
 794
 795         DRM_SPINUNLOCK_IRQRESTORE(&dev_priv->swaps_lock, irqflags);
 796
 797         if (dev_priv->swaps_pending >= 100) {
 798                 DRM_DEBUG("Too many swaps queued\n");
 799                 return -EBUSY;
 800         }
 801
 802         vbl_swap = drm_calloc(1, sizeof(*vbl_swap), DRM_MEM_DRIVER);
 803
 804         if (!vbl_swap) {
 805                 DRM_ERROR("Failed to allocate memory to queue swap\n");
 806                 return -ENOMEM;
 807         }
 808
 809         DRM_DEBUG("\n");
 810
 811         ret = drm_vblank_get(dev, pipe);
 812         if (ret) {
 813                 drm_free(vbl_swap, sizeof(*vbl_swap), DRM_MEM_DRIVER);
 814                 return ret;
 815         }
 816
 817         vbl_swap->drw_id = swap->drawable;
 818         vbl_swap->plane = plane;
 819         vbl_swap->sequence = swap->sequence;
 820         vbl_swap->flip = (swap->seqtype & _DRM_VBLANK_FLIP);
 821
 822         if (vbl_swap->flip)
 823                 swap->sequence++;
 824
 825         DRM_SPINLOCK_IRQSAVE(&dev_priv->swaps_lock, irqflags);
 826
 827         list_add_tail(&vbl_swap->head, &dev_priv->vbl_swaps.head);
 828         dev_priv->swaps_pending++;
 829
 830         DRM_SPINUNLOCK_IRQRESTORE(&dev_priv->swaps_lock, irqflags);
 831
 832         return 0;
 833 }
 834
 835 /* drm_dma.h hooks
 836 */
 837 void i915_driver_irq_preinstall(struct drm_device * dev)
 838 {
 839         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 840
 841         I915_WRITE16(I915REG_HWSTAM, 0xeffe);
 842         I915_WRITE16(I915REG_INT_MASK_R, 0x0);
 843         I915_WRITE16(I915REG_INT_ENABLE_R, 0x0);
 844 }
 845
 846 int i915_driver_irq_postinstall(struct drm_device * dev)
 847 {
 848         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 849         int ret, num_pipes = 2;
 850
 851         DRM_SPININIT(&dev_priv->swaps_lock, "swap");
 852         INIT_LIST_HEAD(&dev_priv->vbl_swaps.head);
 853         dev_priv->swaps_pending = 0;
 854
 855         DRM_SPININIT(&dev_priv->user_irq_lock, "userirq");
 856         dev_priv->user_irq_refcount = 0;
 857         dev_priv->irq_enable_reg = 0;
 858
 859         ret = drm_vblank_init(dev, num_pipes);
 860         if (ret)
 861                 return ret;
 862
 863         dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
 864
 865         i915_enable_interrupt(dev);
 866         DRM_INIT_WAITQUEUE(&dev_priv->irq_queue);
 867
 868         /*
 869          * Initialize the hardware status page IRQ location.
 870          */
 871
 872         I915_WRITE(I915REG_INSTPM, (1 << 5) | (1 << 21));
 873         return 0;
 874 }
 875
 876 void i915_driver_irq_uninstall(struct drm_device * dev)
 877 {
 878         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 879         u16 temp;
 880
 881         if (!dev_priv)
 882                 return;
 883
 884         dev_priv->irq_enabled = 0;
 885         I915_WRITE16(I915REG_HWSTAM, 0xffff);
 886         I915_WRITE16(I915REG_INT_MASK_R, 0xffff);
 887         I915_WRITE16(I915REG_INT_ENABLE_R, 0x0);
 888
 889         temp = I915_READ16(I915REG_INT_IDENTITY_R);
 890         I915_WRITE16(I915REG_INT_IDENTITY_R, temp);
 891 }