shared-core/i915_irq.c

   1 /* i915_irq.c -- IRQ support for the I915 -*- linux-c -*-
   2  */
   3 /*
   4  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   5  * All Rights Reserved.
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a
   8  * copy of this software and associated documentation files (the
   9  * "Software"), to deal in the Software without restriction, including
  10  * without limitation the rights to use, copy, modify, merge, publish,
  11  * distribute, sub license, and/or sell copies of the Software, and to
  12  * permit persons to whom the Software is furnished to do so, subject to
  13  * the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the
  16  * next paragraph) shall be included in all copies or substantial portions
  17  * of the Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  20  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  21  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  22  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  23  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  24  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  25  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  26  *
  27  */
  28
  29 #include "drmP.h"
  30 #include "drm.h"
  31 #include "i915_drm.h"
  32 #include "i915_drv.h"
  33 #include "intel_drv.h"
  34 #include "drm_crtc_helper.h"
  35
  36 #define MAX_NOPID ((u32)~0)
  37
  38 /**
  39  * i915_get_pipe - return the the pipe associated with a given plane
  40  * @dev: DRM device
  41  * @plane: plane to look for
  42  *
  43  * The Intel Mesa & 2D drivers call the vblank routines with a plane number
  44  * rather than a pipe number, since they may not always be equal.  This routine
  45  * maps the given @plane back to a pipe number.
  46  */
  47 static int
  48 i915_get_pipe(struct drm_device *dev, int plane)
  49 {
  50         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
  51         u32 dspcntr;
  52
  53         dspcntr = plane ? I915_READ(DSPBCNTR) : I915_READ(DSPACNTR);
  54
  55         return dspcntr & DISPPLANE_SEL_PIPE_MASK ? 1 : 0;
  56 }
  57
  58 /**
  59  * i915_get_plane - return the the plane associated with a given pipe
  60  * @dev: DRM device
  61  * @pipe: pipe to look for
  62  *
  63  * The Intel Mesa & 2D drivers call the vblank routines with a plane number
  64  * rather than a plane number, since they may not always be equal.  This routine
  65  * maps the given @pipe back to a plane number.
  66  */
  67 static int
  68 i915_get_plane(struct drm_device *dev, int pipe)
  69 {
  70         if (i915_get_pipe(dev, 0) == pipe)
  71                 return 0;
  72         return 1;
  73 }
  74
  75 /**
  76  * i915_pipe_enabled - check if a pipe is enabled
  77  * @dev: DRM device
  78  * @pipe: pipe to check
  79  *
  80  * Reading certain registers when the pipe is disabled can hang the chip.
  81  * Use this routine to make sure the PLL is running and the pipe is active
  82  * before reading such registers if unsure.
  83  */
  84 static int
  85 i915_pipe_enabled(struct drm_device *dev, int pipe)
  86 {
  87         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
  88         unsigned long pipeconf = pipe ? PIPEBCONF : PIPEACONF;
  89
  90         if (I915_READ(pipeconf) & PIPEACONF_ENABLE)
  91                 return 1;
  92
  93         return 0;
  94 }
  95
  96 /**
  97  * Emit a synchronous flip.
  98  *
  99  * This function must be called with the drawable spinlock held.
 100  */
 101 static void
 102 i915_dispatch_vsync_flip(struct drm_device *dev, struct drm_drawable_info *drw,
 103                          int plane)
 104 {
 105         struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
 106         struct drm_i915_sarea *sarea_priv = master_priv->sarea_priv;
 107         u16 x1, y1, x2, y2;
 108         int pf_planes = 1 << plane;
 109
 110         DRM_SPINLOCK_ASSERT(&dev->drw_lock);
 111
 112         /* If the window is visible on the other plane, we have to flip on that
 113          * plane as well.
 114          */
 115         if (plane == 1) {
 116                 x1 = sarea_priv->planeA_x;
 117                 y1 = sarea_priv->planeA_y;
 118                 x2 = x1 + sarea_priv->planeA_w;
 119                 y2 = y1 + sarea_priv->planeA_h;
 120         } else {
 121                 x1 = sarea_priv->planeB_x;
 122                 y1 = sarea_priv->planeB_y;
 123                 x2 = x1 + sarea_priv->planeB_w;
 124                 y2 = y1 + sarea_priv->planeB_h;
 125         }
 126
 127         if (x2 > 0 && y2 > 0) {
 128                 int i, num_rects = drw->num_rects;
 129                 struct drm_clip_rect *rect = drw->rects;
 130
 131                 for (i = 0; i < num_rects; i++)
 132                         if (!(rect[i].x1 >= x2 || rect[i].y1 >= y2 ||
 133                               rect[i].x2 <= x1 || rect[i].y2 <= y1)) {
 134                                 pf_planes = 0x3;
 135
 136                                 break;
 137                         }
 138         }
 139
 140         i915_dispatch_flip(dev, pf_planes, 1);
 141 }
 142
 143 /**
 144  * Emit blits for scheduled buffer swaps.
 145  *
 146  * This function will be called with the HW lock held.
 147  */
 148 static void i915_vblank_tasklet(struct drm_device *dev)
 149 {
 150         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
 151         struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
 152         struct list_head *list, *tmp, hits, *hit;
 153         int nhits, nrects, slice[2], upper[2], lower[2], i, num_pages;
 154         unsigned counter[2];
 155         struct drm_drawable_info *drw;
 156         struct drm_i915_sarea *sarea_priv = master_priv->sarea_priv;
 157         u32 cpp = dev_priv->cpp,  offsets[3];
 158         u32 cmd = (cpp == 4) ? (XY_SRC_COPY_BLT_CMD |
 159                                 XY_SRC_COPY_BLT_WRITE_ALPHA |
 160                                 XY_SRC_COPY_BLT_WRITE_RGB)
 161                              : XY_SRC_COPY_BLT_CMD;
 162         u32 src_pitch = sarea_priv->pitch * cpp;
 163         u32 dst_pitch = sarea_priv->pitch * cpp;
 164         /* COPY rop (0xcc), map cpp to magic color depth constants */
 165         u32 ropcpp = (0xcc << 16) | ((cpp - 1) << 24);
 166         RING_LOCALS;
 167
 168         if (sarea_priv->front_tiled) {
 169                 cmd |= XY_SRC_COPY_BLT_DST_TILED;
 170                 dst_pitch >>= 2;
 171         }
 172         if (sarea_priv->back_tiled) {
 173                 cmd |= XY_SRC_COPY_BLT_SRC_TILED;
 174                 src_pitch >>= 2;
 175         }
 176
 177         counter[0] = drm_vblank_count(dev, 0);
 178         counter[1] = drm_vblank_count(dev, 1);
 179
 180         DRM_DEBUG("\n");
 181
 182         INIT_LIST_HEAD(&hits);
 183
 184         nhits = nrects = 0;
 185
 186         /* No irqsave/restore necessary.  This tasklet may be run in an
 187          * interrupt context or normal context, but we don't have to worry
 188          * about getting interrupted by something acquiring the lock, because
 189          * we are the interrupt context thing that acquires the lock.
 190          */
 191         DRM_SPINLOCK(&dev_priv->swaps_lock);
 192
 193         /* Find buffer swaps scheduled for this vertical blank */
 194         list_for_each_safe(list, tmp, &dev_priv->vbl_swaps.head) {
 195                 struct drm_i915_vbl_swap *vbl_swap =
 196                         list_entry(list, struct drm_i915_vbl_swap, head);
 197                 int pipe = i915_get_pipe(dev, vbl_swap->plane);
 198
 199                 if ((counter[pipe] - vbl_swap->sequence) > (1<<23))
 200                         continue;
 201
 202                 master_priv = vbl_swap->minor->master->driver_priv;
 203                 sarea_priv = master_priv->sarea_priv;
 204
 205                 list_del(list);
 206                 dev_priv->swaps_pending--;
 207                 drm_vblank_put(dev, pipe);
 208
 209                 DRM_SPINUNLOCK(&dev_priv->swaps_lock);
 210                 DRM_SPINLOCK(&dev->drw_lock);
 211
 212                 drw = drm_get_drawable_info(dev, vbl_swap->drw_id);
 213
 214                 if (!drw) {
 215                         DRM_SPINUNLOCK(&dev->drw_lock);
 216                         drm_free(vbl_swap, sizeof(*vbl_swap), DRM_MEM_DRIVER);
 217                         DRM_SPINLOCK(&dev_priv->swaps_lock);
 218                         continue;
 219                 }
 220
 221                 list_for_each(hit, &hits) {
 222                         struct drm_i915_vbl_swap *swap_cmp =
 223                                 list_entry(hit, struct drm_i915_vbl_swap, head);
 224                         struct drm_drawable_info *drw_cmp =
 225                                 drm_get_drawable_info(dev, swap_cmp->drw_id);
 226
 227                         if (drw_cmp &&
 228                             drw_cmp->rects[0].y1 > drw->rects[0].y1) {
 229                                 list_add_tail(list, hit);
 230                                 break;
 231                         }
 232                 }
 233
 234                 DRM_SPINUNLOCK(&dev->drw_lock);
 235
 236                 /* List of hits was empty, or we reached the end of it */
 237                 if (hit == &hits)
 238                         list_add_tail(list, hits.prev);
 239
 240                 nhits++;
 241
 242                 DRM_SPINLOCK(&dev_priv->swaps_lock);
 243         }
 244
 245         DRM_SPINUNLOCK(&dev_priv->swaps_lock);
 246
 247         if (nhits == 0) {
 248                 return;
 249         }
 250
 251         i915_kernel_lost_context(dev);
 252
 253         upper[0] = upper[1] = 0;
 254         slice[0] = max(sarea_priv->planeA_h / nhits, 1);
 255         slice[1] = max(sarea_priv->planeB_h / nhits, 1);
 256         lower[0] = sarea_priv->planeA_y + slice[0];
 257         lower[1] = sarea_priv->planeB_y + slice[0];
 258
 259         offsets[0] = sarea_priv->front_offset;
 260         offsets[1] = sarea_priv->back_offset;
 261         offsets[2] = sarea_priv->third_offset;
 262         num_pages = sarea_priv->third_handle ? 3 : 2;
 263
 264         DRM_SPINLOCK(&dev->drw_lock);
 265
 266         /* Emit blits for buffer swaps, partitioning both outputs into as many
 267          * slices as there are buffer swaps scheduled in order to avoid tearing
 268          * (based on the assumption that a single buffer swap would always
 269          * complete before scanout starts).
 270          */
 271         for (i = 0; i++ < nhits;
 272              upper[0] = lower[0], lower[0] += slice[0],
 273              upper[1] = lower[1], lower[1] += slice[1]) {
 274                 int init_drawrect = 1;
 275
 276                 if (i == nhits)
 277                         lower[0] = lower[1] = sarea_priv->height;
 278
 279                 list_for_each(hit, &hits) {
 280                         struct drm_i915_vbl_swap *swap_hit =
 281                                 list_entry(hit, struct drm_i915_vbl_swap, head);
 282                         struct drm_clip_rect *rect;
 283                         int num_rects, plane, front, back;
 284                         unsigned short top, bottom;
 285
 286                         drw = drm_get_drawable_info(dev, swap_hit->drw_id);
 287
 288                         if (!drw)
 289                                 continue;
 290
 291                         plane = swap_hit->plane;
 292
 293                         if (swap_hit->flip) {
 294                                 i915_dispatch_vsync_flip(dev, drw, plane);
 295                                 continue;
 296                         }
 297
 298                         if (init_drawrect) {
 299                                 int width  = sarea_priv->width;
 300                                 int height = sarea_priv->height;
 301                                 if (IS_I965G(dev)) {
 302                                         BEGIN_LP_RING(4);
 303
 304                                         OUT_RING(GFX_OP_DRAWRECT_INFO_I965);
 305                                         OUT_RING(0);
 306                                         OUT_RING(((width - 1) & 0xffff) | ((height - 1) << 16));
 307                                         OUT_RING(0);
 308
 309                                         ADVANCE_LP_RING();
 310                                 } else {
 311                                         BEGIN_LP_RING(6);
 312
 313                                         OUT_RING(GFX_OP_DRAWRECT_INFO);
 314                                         OUT_RING(0);
 315                                         OUT_RING(0);
 316                                         OUT_RING(((width - 1) & 0xffff) | ((height - 1) << 16));
 317                                         OUT_RING(0);
 318                                         OUT_RING(0);
 319
 320                                         ADVANCE_LP_RING();
 321                                 }
 322
 323                                 sarea_priv->ctxOwner = DRM_KERNEL_CONTEXT;
 324
 325                                 init_drawrect = 0;
 326                         }
 327
 328                         rect = drw->rects;
 329                         top = upper[plane];
 330                         bottom = lower[plane];
 331
 332                         front = (master_priv->sarea_priv->pf_current_page >>
 333                                  (2 * plane)) & 0x3;
 334                         back = (front + 1) % num_pages;
 335
 336                         for (num_rects = drw->num_rects; num_rects--; rect++) {
 337                                 int y1 = max(rect->y1, top);
 338                                 int y2 = min(rect->y2, bottom);
 339
 340                                 if (y1 >= y2)
 341                                         continue;
 342
 343                                 BEGIN_LP_RING(8);
 344
 345                                 OUT_RING(cmd);
 346                                 OUT_RING(ropcpp | dst_pitch);
 347                                 OUT_RING((y1 << 16) | rect->x1);
 348                                 OUT_RING((y2 << 16) | rect->x2);
 349                                 OUT_RING(offsets[front]);
 350                                 OUT_RING((y1 << 16) | rect->x1);
 351                                 OUT_RING(src_pitch);
 352                                 OUT_RING(offsets[back]);
 353
 354                                 ADVANCE_LP_RING();
 355                         }
 356                 }
 357         }
 358
 359         DRM_SPINUNLOCK(&dev->drw_lock);
 360
 361         list_for_each_safe(hit, tmp, &hits) {
 362                 struct drm_i915_vbl_swap *swap_hit =
 363                         list_entry(hit, struct drm_i915_vbl_swap, head);
 364
 365                 list_del(hit);
 366
 367                 drm_free(swap_hit, sizeof(*swap_hit), DRM_MEM_DRIVER);
 368         }
 369 }
 370 #if 0
 371 static int i915_in_vblank(struct drm_device *dev, int pipe)
 372 {
 373         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
 374         unsigned long pipedsl, vblank, vtotal;
 375         unsigned long vbl_start, vbl_end, cur_line;
 376
 377         pipedsl = pipe ? PIPEBDSL : PIPEADSL;
 378         vblank = pipe ? VBLANK_B : VBLANK_A;
 379         vtotal = pipe ? VTOTAL_B : VTOTAL_A;
 380
 381         vbl_start = I915_READ(vblank) & VBLANK_START_MASK;
 382         vbl_end = (I915_READ(vblank) >> VBLANK_END_SHIFT) & VBLANK_END_MASK;
 383
 384         cur_line = I915_READ(pipedsl);
 385
 386         if (cur_line >= vbl_start)
 387                 return 1;
 388
 389         return 0;
 390 }
 391 #endif
 392 u32 i915_get_vblank_counter(struct drm_device *dev, int plane)
 393 {
 394         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
 395         unsigned long high_frame;
 396         unsigned long low_frame;
 397         u32 high1, high2, low, count;
 398         int pipe;
 399
 400         pipe = i915_get_pipe(dev, plane);
 401         high_frame = pipe ? PIPEBFRAMEHIGH : PIPEAFRAMEHIGH;
 402         low_frame = pipe ? PIPEBFRAMEPIXEL : PIPEAFRAMEPIXEL;
 403
 404         if (!i915_pipe_enabled(dev, pipe)) {
 405             DRM_ERROR("trying to get vblank count for disabled pipe %d\n", pipe);
 406             return 0;
 407         }
 408
 409         /*
 410          * High & low register fields aren't synchronized, so make sure
 411          * we get a low value that's stable across two reads of the high
 412          * register.
 413          */
 414         do {
 415                 high1 = ((I915_READ(high_frame) & PIPE_FRAME_HIGH_MASK) >>
 416                          PIPE_FRAME_HIGH_SHIFT);
 417                 low =  ((I915_READ(low_frame) & PIPE_FRAME_LOW_MASK) >>
 418                         PIPE_FRAME_LOW_SHIFT);
 419                 high2 = ((I915_READ(high_frame) & PIPE_FRAME_HIGH_MASK) >>
 420                          PIPE_FRAME_HIGH_SHIFT);
 421         } while (high1 != high2);
 422
 423         count = (high1 << 8) | low;
 424
 425         /*
 426          * If we're in the middle of the vblank period, the
 427          * above regs won't have been updated yet, so return
 428          * an incremented count to stay accurate
 429          */
 430 #if 0
 431         if (i915_in_vblank(dev, pipe))
 432                 count++;
 433 #endif
 434         /* count may be reset by other driver(e.g. 2D driver),
 435            we have no way to know if it is wrapped or resetted
 436            when count is zero. do a rough guess.
 437         */
 438         if (count == 0 && dev->last_vblank[pipe] < dev->max_vblank_count/2)
 439                 dev->last_vblank[pipe] = 0;
 440
 441         return count;
 442 }
 443
 444 static struct drm_device *hotplug_dev;
 445
 446 /**
 447  * Handler for user interrupts in process context (able to sleep, do VFS
 448  * operations, etc.
 449  *
 450  * If another IRQ comes in while we're in this handler, it will still get put
 451  * on the queue again to be rerun when we finish.
 452  */
 453 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
 454 static void i915_hotplug_work_func(void *work)
 455 #else
 456 static void i915_hotplug_work_func(struct work_struct *work)
 457 #endif
 458 {
 459         struct drm_device *dev = hotplug_dev;
 460
 461         drm_helper_hotplug_stage_two(dev);
 462         drm_handle_hotplug(dev);
 463 }
 464
 465 static int i915_run_hotplug_tasklet(struct drm_device *dev, uint32_t stat)
 466 {
 467 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
 468         static DECLARE_WORK(hotplug, i915_hotplug_work_func, NULL);
 469 #else
 470         static DECLARE_WORK(hotplug, i915_hotplug_work_func);
 471 #endif
 472         struct drm_i915_private *dev_priv = dev->dev_private;
 473
 474         hotplug_dev = dev;
 475
 476         if (stat & TV_HOTPLUG_INT_STATUS) {
 477                 DRM_DEBUG("TV event\n");
 478         }
 479
 480         if (stat & CRT_HOTPLUG_INT_STATUS) {
 481                 DRM_DEBUG("CRT event\n");
 482         }
 483
 484         if (stat & SDVOB_HOTPLUG_INT_STATUS) {
 485                 DRM_DEBUG("sDVOB event\n");
 486         }
 487
 488         if (stat & SDVOC_HOTPLUG_INT_STATUS) {
 489                 DRM_DEBUG("sDVOC event\n");
 490         }
 491         queue_work(dev_priv->wq, &hotplug);
 492
 493         return 0;
 494 }
 495
 496 void
 497 i915_user_interrupt_handler(struct work_struct *work)
 498 {
 499         struct drm_i915_private *dev_priv;
 500         struct drm_device *dev;
 501
 502         dev_priv = container_of(work, struct drm_i915_private,
 503                                 user_interrupt_task);
 504         dev = dev_priv->dev;
 505
 506         mutex_lock(&dev->struct_mutex);
 507         i915_gem_retire_requests(dev);
 508         mutex_unlock(&dev->struct_mutex);
 509 }
 510
 511 irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
 512 {
 513         struct drm_device *dev = (struct drm_device *) arg;
 514         struct drm_i915_master_private *master_priv;
 515         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
 516         u32 iir;
 517         u32 pipea_stats = 0, pipeb_stats, tvdac;
 518         int hotplug = 0;
 519         int vblank = 0;
 520
 521         /* On i8xx/i915 hw the IIR and IER are 16bit on i9xx its 32bit */
 522         if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev))
 523                 iir = I915_READ(IIR);
 524         else
 525                 iir = I915_READ16(IIR);
 526
 527         iir &= (dev_priv->irq_mask_reg | I915_USER_INTERRUPT);
 528
 529 #if 0
 530         DRM_DEBUG("flag=%08x\n", iir);
 531 #endif
 532         if (iir == 0) {
 533 #if 0
 534                 DRM_DEBUG ("iir 0x%08x im 0x%08x ie 0x%08x pipea 0x%08x pipeb 0x%08x\n",
 535                            iir,
 536                            I915_READ(IMR),
 537                            I915_READ(IER),
 538                            I915_READ(PIPEASTAT),
 539                            I915_READ(PIPEBSTAT));
 540 #endif
 541                 return IRQ_NONE;
 542         }
 543
 544         /*
 545          * Clear the PIPE(A|B)STAT regs before the IIR otherwise
 546          * we may get extra interrupts.
 547          */
 548         if (iir & I915_DISPLAY_PIPE_A_EVENT_INTERRUPT) {
 549                 pipea_stats = I915_READ(PIPEASTAT);
 550                 if (pipea_stats & (PIPE_START_VBLANK_INTERRUPT_STATUS|
 551                                    PIPE_VBLANK_INTERRUPT_STATUS))
 552                 {
 553                         vblank++;
 554                         drm_handle_vblank(dev, i915_get_plane(dev, 0));
 555                 }
 556
 557                 /* This is a global event, and not a pipe A event */
 558                 if (pipea_stats & PIPE_HOTPLUG_INTERRUPT_STATUS)
 559                         hotplug = 1;
 560
 561                 if (pipea_stats & PIPE_HOTPLUG_TV_INTERRUPT_STATUS) {
 562                         hotplug = 1;
 563                         /* Toggle hotplug detection to clear hotplug status */
 564                         tvdac = I915_READ(TV_DAC);
 565                         I915_WRITE(TV_DAC, tvdac & ~TVDAC_STATE_CHG_EN);
 566                         I915_WRITE(TV_DAC, tvdac | TVDAC_STATE_CHG_EN);
 567                 }
 568
 569                 I915_WRITE(PIPEASTAT, pipea_stats);
 570         }
 571
 572         if (iir & I915_DISPLAY_PIPE_B_EVENT_INTERRUPT) {
 573                 pipeb_stats = I915_READ(PIPEBSTAT);
 574                 if (pipeb_stats & (PIPE_START_VBLANK_INTERRUPT_STATUS|
 575                                    PIPE_VBLANK_INTERRUPT_STATUS))
 576                 {
 577                         vblank++;
 578                         drm_handle_vblank(dev, i915_get_plane(dev, 1));
 579                 }
 580                 I915_WRITE(PIPEBSTAT, pipeb_stats);
 581         }
 582
 583         /* Clear the generated interrupt */
 584         if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev)) {
 585                 I915_WRITE(IIR, iir);
 586                 (void) I915_READ(IIR);
 587         } else {
 588                 I915_WRITE16(IIR, iir);
 589                 (void) I915_READ16(IIR);
 590         }
 591
 592         if (dev->primary->master) {
 593                 master_priv = dev->primary->master->driver_priv;
 594                 master_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
 595         }
 596
 597         if (iir & I915_USER_INTERRUPT) {
 598                 DRM_WAKEUP(&dev_priv->irq_queue);
 599 #ifdef I915_HAVE_FENCE
 600                 i915_fence_handler(dev);
 601                 schedule_work(&dev_priv->user_interrupt_task);
 602 #endif
 603         }
 604
 605         if (vblank) {
 606                 if (dev_priv->swaps_pending > 0)
 607                         drm_locked_tasklet(dev, i915_vblank_tasklet);
 608         }
 609
 610         if ((iir & I915_DISPLAY_PORT_INTERRUPT) || hotplug) {
 611                 u32 temp2 = 0;
 612
 613                 DRM_INFO("Hotplug event received\n");
 614
 615                 if (!IS_I9XX(dev) || IS_I915G(dev) || IS_I915GM(dev)) {
 616                         if (pipea_stats & PIPE_HOTPLUG_INTERRUPT_STATUS)
 617                                 temp2 |= SDVOB_HOTPLUG_INT_STATUS |
 618                                         SDVOC_HOTPLUG_INT_STATUS;
 619                         if (pipea_stats & PIPE_HOTPLUG_TV_INTERRUPT_STATUS)
 620                                 temp2 |= TV_HOTPLUG_INT_STATUS;
 621                 } else {
 622                         temp2 = I915_READ(PORT_HOTPLUG_STAT);
 623
 624                         I915_WRITE(PORT_HOTPLUG_STAT, temp2);
 625                 }
 626                 i915_run_hotplug_tasklet(dev, temp2);
 627         }
 628
 629         return IRQ_HANDLED;
 630 }
 631
 632 int i915_emit_irq(struct drm_device *dev)
 633 {
 634         struct drm_i915_private *dev_priv = dev->dev_private;
 635         RING_LOCALS;
 636
 637         i915_kernel_lost_context(dev);
 638
 639         DRM_DEBUG("\n");
 640
 641         i915_emit_breadcrumb(dev);
 642
 643         BEGIN_LP_RING(2);
 644         OUT_RING(0);
 645         OUT_RING(MI_USER_INTERRUPT);
 646         ADVANCE_LP_RING();
 647
 648         return dev_priv->counter;
 649 }
 650
 651 void i915_user_irq_on(struct drm_device *dev)
 652 {
 653         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
 654
 655         DRM_SPINLOCK(&dev_priv->user_irq_lock);
 656         if (dev_priv->irq_enabled && (++dev_priv->user_irq_refcount == 1)){
 657                 dev_priv->irq_mask_reg &= ~I915_USER_INTERRUPT;
 658                 if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev))
 659                         I915_WRITE(IMR, dev_priv->irq_mask_reg);
 660                 else
 661                         I915_WRITE16(IMR, dev_priv->irq_mask_reg);
 662                 I915_READ16(IMR);
 663         }
 664         DRM_SPINUNLOCK(&dev_priv->user_irq_lock);
 665
 666 }
 667
 668 void i915_user_irq_off(struct drm_device *dev)
 669 {
 670         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
 671
 672         DRM_SPINLOCK(&dev_priv->user_irq_lock);
 673         BUG_ON(dev_priv->irq_enabled && dev_priv->user_irq_refcount <= 0);
 674         if (dev_priv->irq_enabled && (--dev_priv->user_irq_refcount == 0)) {
 675                 dev_priv->irq_mask_reg |= I915_USER_INTERRUPT;
 676                 if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev))
 677                         I915_WRITE(IMR, dev_priv->irq_mask_reg);
 678                 else
 679                         I915_WRITE16(IMR, dev_priv->irq_mask_reg);
 680                 I915_READ16(IMR);
 681         }
 682         DRM_SPINUNLOCK(&dev_priv->user_irq_lock);
 683 }
 684
 685
 686 int i915_wait_irq(struct drm_device * dev, int irq_nr)
 687 {
 688         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
 689         struct drm_i915_master_private *master_priv;
 690         int ret = 0;
 691
 692         if (!dev_priv) {
 693                 DRM_ERROR("called with no initialization\n");
 694                 return -EINVAL;
 695         }
 696
 697         DRM_DEBUG("irq_nr=%d breadcrumb=%d\n", irq_nr,
 698                   READ_BREADCRUMB(dev_priv));
 699
 700         if (READ_BREADCRUMB(dev_priv) >= irq_nr)
 701                 return 0;
 702
 703         i915_user_irq_on(dev);
 704         DRM_WAIT_ON(ret, dev_priv->irq_queue, 3 * DRM_HZ,
 705                     READ_BREADCRUMB(dev_priv) >= irq_nr);
 706         i915_user_irq_off(dev);
 707
 708         if (ret == -EBUSY) {
 709                 DRM_ERROR("EBUSY -- rec: %d emitted: %d\n",
 710                           READ_BREADCRUMB(dev_priv), (int)dev_priv->counter);
 711         }
 712
 713         if (dev->primary->master) {
 714                 master_priv = dev->primary->master->driver_priv;
 715                 master_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
 716         }
 717
 718         return ret;
 719 }
 720
 721 /* Needs the lock as it touches the ring.
 722  */
 723 int i915_irq_emit(struct drm_device *dev, void *data,
 724                          struct drm_file *file_priv)
 725 {
 726         struct drm_i915_private *dev_priv = dev->dev_private;
 727         struct drm_i915_irq_emit *emit = data;
 728         int result;
 729
 730         LOCK_TEST_WITH_RETURN(dev, file_priv);
 731
 732         if (!dev_priv) {
 733                 DRM_ERROR("called with no initialization\n");
 734                 return -EINVAL;
 735         }
 736
 737         result = i915_emit_irq(dev);
 738
 739         if (DRM_COPY_TO_USER(emit->irq_seq, &result, sizeof(int))) {
 740                 DRM_ERROR("copy_to_user\n");
 741                 return -EFAULT;
 742         }
 743
 744         return 0;
 745 }
 746
 747 /* Doesn't need the hardware lock.
 748  */
 749 int i915_irq_wait(struct drm_device *dev, void *data,
 750                   struct drm_file *file_priv)
 751 {
 752         struct drm_i915_private *dev_priv = dev->dev_private;
 753         struct drm_i915_irq_wait *irqwait = data;
 754
 755         if (!dev_priv) {
 756                 DRM_ERROR("called with no initialization\n");
 757                 return -EINVAL;
 758         }
 759
 760         return i915_wait_irq(dev, irqwait->irq_seq);
 761 }
 762
 763 int i915_enable_vblank(struct drm_device *dev, int plane)
 764 {
 765         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
 766         int pipe = i915_get_pipe(dev, plane);
 767         u32     pipestat_reg = 0;
 768         u32     mask_reg = 0;
 769         u32     pipestat;
 770
 771         switch (pipe) {
 772         case 0:
 773                 pipestat_reg = PIPEASTAT;
 774                 mask_reg |= I915_DISPLAY_PIPE_A_EVENT_INTERRUPT;
 775                 break;
 776         case 1:
 777                 pipestat_reg = PIPEBSTAT;
 778                 mask_reg |= I915_DISPLAY_PIPE_B_EVENT_INTERRUPT;
 779                 break;
 780         default:
 781                 DRM_ERROR("tried to enable vblank on non-existent pipe %d\n",
 782                           pipe);
 783                 break;
 784         }
 785
 786         if (pipestat_reg)
 787         {
 788                 pipestat = I915_READ (pipestat_reg);
 789                 /*
 790                  * Older chips didn't have the start vblank interrupt,
 791                  * but
 792                  */
 793                 if (IS_I965G (dev))
 794                         pipestat |= PIPE_START_VBLANK_INTERRUPT_ENABLE;
 795                 else
 796                         pipestat |= PIPE_VBLANK_INTERRUPT_ENABLE;
 797                 /*
 798                  * Clear any pending status
 799                  */
 800                 pipestat |= (PIPE_START_VBLANK_INTERRUPT_STATUS |
 801                              PIPE_VBLANK_INTERRUPT_STATUS);
 802                 I915_WRITE(pipestat_reg, pipestat);
 803         }
 804
 805         DRM_SPINLOCK(&dev_priv->user_irq_lock);
 806         dev_priv->irq_mask_reg &= ~mask_reg;
 807         if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev))
 808                 I915_WRITE(IMR, dev_priv->irq_mask_reg);
 809         else
 810                 I915_WRITE16(IMR, dev_priv->irq_mask_reg);
 811         DRM_SPINUNLOCK(&dev_priv->user_irq_lock);
 812
 813         return 0;
 814 }
 815
 816 void i915_disable_vblank(struct drm_device *dev, int plane)
 817 {
 818         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
 819         int pipe = i915_get_pipe(dev, plane);
 820         u32     pipestat_reg = 0;
 821         u32     mask_reg = 0;
 822         u32     pipestat;
 823
 824         switch (pipe) {
 825         case 0:
 826                 pipestat_reg = PIPEASTAT;
 827                 mask_reg |= I915_DISPLAY_PIPE_A_EVENT_INTERRUPT;
 828                 break;
 829         case 1:
 830                 pipestat_reg = PIPEBSTAT;
 831                 mask_reg |= I915_DISPLAY_PIPE_B_EVENT_INTERRUPT;
 832                 break;
 833         default:
 834                 DRM_ERROR("tried to disable vblank on non-existent pipe %d\n",
 835                           pipe);
 836                 break;
 837         }
 838
 839         DRM_SPINLOCK(&dev_priv->user_irq_lock);
 840         dev_priv->irq_mask_reg |= mask_reg;
 841         if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev))
 842                 I915_WRITE(IMR, dev_priv->irq_mask_reg);
 843         else
 844                 I915_WRITE16(IMR, dev_priv->irq_mask_reg);
 845         DRM_SPINUNLOCK(&dev_priv->user_irq_lock);
 846
 847         if (pipestat_reg) {
 848                 pipestat = I915_READ (pipestat_reg);
 849                 pipestat &= ~(PIPE_START_VBLANK_INTERRUPT_ENABLE |
 850                               PIPE_VBLANK_INTERRUPT_ENABLE);
 851                 /*
 852                  * Clear any pending status
 853                  */
 854                 pipestat |= (PIPE_START_VBLANK_INTERRUPT_STATUS |
 855                              PIPE_VBLANK_INTERRUPT_STATUS);
 856                 I915_WRITE(pipestat_reg, pipestat);
 857                 (void) I915_READ(pipestat_reg);
 858         }
 859 }
 860
 861 void i915_enable_interrupt (struct drm_device *dev)
 862 {
 863         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
 864         struct drm_connector *o;
 865
 866         dev_priv->irq_mask_reg &= ~I915_USER_INTERRUPT;
 867
 868         if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev)) {
 869                 if (dev->mode_config.num_connector)
 870                         dev_priv->irq_mask_reg &= ~I915_DISPLAY_PORT_INTERRUPT;
 871         } else {
 872                 if (dev->mode_config.num_connector)
 873                         dev_priv->irq_mask_reg &= ~I915_DISPLAY_PIPE_A_EVENT_INTERRUPT;
 874
 875                 /* Enable global interrupts for hotplug - not a pipeA event */
 876                 I915_WRITE(PIPEASTAT, I915_READ(PIPEASTAT) |
 877                            PIPE_HOTPLUG_INTERRUPT_ENABLE |
 878                            PIPE_HOTPLUG_TV_INTERRUPT_ENABLE |
 879                            PIPE_HOTPLUG_TV_INTERRUPT_STATUS |
 880                            PIPE_HOTPLUG_INTERRUPT_STATUS);
 881         }
 882
 883         if (!(dev_priv->irq_mask_reg & I915_DISPLAY_PORT_INTERRUPT) ||
 884             !(dev_priv->irq_mask_reg & I915_DISPLAY_PIPE_A_EVENT_INTERRUPT)) {
 885                 u32 temp = 0;
 886
 887                 if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev)) {
 888                         temp = I915_READ(PORT_HOTPLUG_EN);
 889
 890                         /* Activate the CRT */
 891                         temp |= CRT_HOTPLUG_INT_EN;
 892                 }
 893
 894                 if (IS_I9XX(dev)) {
 895                         /* SDVOB */
 896                         o = intel_sdvo_find(dev, 1);
 897                         if (o && intel_sdvo_supports_hotplug(o)) {
 898                                 intel_sdvo_set_hotplug(o, 1);
 899                                 temp |= SDVOB_HOTPLUG_INT_EN;
 900                         }
 901
 902                         /* SDVOC */
 903                         o = intel_sdvo_find(dev, 0);
 904                         if (o && intel_sdvo_supports_hotplug(o)) {
 905                                 intel_sdvo_set_hotplug(o, 1);
 906                                 temp |= SDVOC_HOTPLUG_INT_EN;
 907                         }
 908
 909                         I915_WRITE(SDVOB, I915_READ(SDVOB) | SDVO_INTERRUPT_ENABLE);
 910                         I915_WRITE(SDVOC, I915_READ(SDVOC) | SDVO_INTERRUPT_ENABLE);
 911
 912                         /* TV */
 913                         I915_WRITE(TV_DAC, I915_READ(TV_DAC) | TVDAC_STATE_CHG_EN);
 914                 } else {
 915                         /* DVO ???? */
 916                 }
 917
 918                 if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev)) {
 919                         I915_WRITE(PORT_HOTPLUG_EN, temp);
 920
 921                         DRM_DEBUG("HEN %08x\n",I915_READ(PORT_HOTPLUG_EN));
 922                         DRM_DEBUG("HST %08x\n",I915_READ(PORT_HOTPLUG_STAT));
 923
 924                         I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));
 925                 }
 926         }
 927
 928         if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev)) {
 929                 I915_WRITE(IMR, dev_priv->irq_mask_reg);
 930                 I915_WRITE(IER, ~dev_priv->irq_mask_reg);
 931         } else {
 932                 I915_WRITE16(IMR, dev_priv->irq_mask_reg);
 933                 I915_WRITE16(IER, ~(u16)dev_priv->irq_mask_reg);
 934         }
 935
 936         dev_priv->irq_enabled = 1;
 937 }
 938
 939 /* Set the vblank monitor pipe
 940  */
 941 int i915_vblank_pipe_set(struct drm_device *dev, void *data,
 942                          struct drm_file *file_priv)
 943 {
 944         struct drm_i915_private *dev_priv = dev->dev_private;
 945         struct drm_i915_vblank_pipe *pipe = data;
 946
 947         if (!dev_priv) {
 948                 DRM_ERROR("called with no initialization\n");
 949                 return -EINVAL;
 950         }
 951
 952         if (pipe->pipe & ~(DRM_I915_VBLANK_PIPE_A|DRM_I915_VBLANK_PIPE_B)) {
 953                 DRM_ERROR("called with invalid pipe 0x%x\n", pipe->pipe);
 954                 return -EINVAL;
 955         }
 956
 957         dev_priv->vblank_pipe = pipe->pipe;
 958
 959         return 0;
 960 }
 961
 962 int i915_vblank_pipe_get(struct drm_device *dev, void *data,
 963                          struct drm_file *file_priv)
 964 {
 965         struct drm_i915_private *dev_priv = dev->dev_private;
 966         struct drm_i915_vblank_pipe *pipe = data;
 967         u16 flag;
 968
 969         if (!dev_priv) {
 970                 DRM_ERROR("called with no initialization\n");
 971                 return -EINVAL;
 972         }
 973
 974         if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev))
 975                 flag = I915_READ(IER);
 976         else
 977                 flag = I915_READ16(IER);
 978
 979         pipe->pipe = 0;
 980         if (flag & I915_DISPLAY_PIPE_A_EVENT_INTERRUPT)
 981                 pipe->pipe |= DRM_I915_VBLANK_PIPE_A;
 982         if (flag & I915_DISPLAY_PIPE_B_EVENT_INTERRUPT)
 983                 pipe->pipe |= DRM_I915_VBLANK_PIPE_B;
 984
 985         return 0;
 986 }
 987
 988 /**
 989  * Schedule buffer swap at given vertical blank.
 990  */
 991 int i915_vblank_swap(struct drm_device *dev, void *data,
 992                      struct drm_file *file_priv)
 993 {
 994         struct drm_i915_private *dev_priv = dev->dev_private;
 995         struct drm_i915_master_private *master_priv;
 996         struct drm_i915_vblank_swap *swap = data;
 997         struct drm_i915_vbl_swap *vbl_swap;
 998         unsigned int pipe, seqtype, curseq, plane;
 999         unsigned long irqflags;
1000         struct list_head *list;
1001         int ret;
1002
1003         if (!dev_priv) {
1004                 DRM_ERROR("%s called with no initialization\n", __func__);
1005                 return -EINVAL;
1006         }
1007
1008         if (!dev->primary->master)
1009                 return -EINVAL;
1010
1011         master_priv = dev->primary->master->driver_priv;
1012
1013         if (master_priv->sarea_priv->rotation) {
1014                 DRM_DEBUG("Rotation not supported\n");
1015                 return -EINVAL;
1016         }
1017
1018         if (swap->seqtype & ~(_DRM_VBLANK_RELATIVE | _DRM_VBLANK_ABSOLUTE |
1019                              _DRM_VBLANK_SECONDARY | _DRM_VBLANK_NEXTONMISS |
1020                              _DRM_VBLANK_FLIP)) {
1021                 DRM_ERROR("Invalid sequence type 0x%x\n", swap->seqtype);
1022                 return -EINVAL;
1023         }
1024
1025         plane = (swap->seqtype & _DRM_VBLANK_SECONDARY) ? 1 : 0;
1026         pipe = i915_get_pipe(dev, plane);
1027
1028         seqtype = swap->seqtype & (_DRM_VBLANK_RELATIVE | _DRM_VBLANK_ABSOLUTE);
1029
1030         if (!(dev_priv->vblank_pipe & (1 << pipe))) {
1031                 DRM_ERROR("Invalid pipe %d\n", pipe);
1032                 return -EINVAL;
1033         }
1034
1035         DRM_SPINLOCK_IRQSAVE(&dev->drw_lock, irqflags);
1036
1037         /* It makes no sense to schedule a swap for a drawable that doesn't have
1038          * valid information at this point. E.g. this could mean that the X
1039          * server is too old to push drawable information to the DRM, in which
1040          * case all such swaps would become ineffective.
1041          */
1042         if (!drm_get_drawable_info(dev, swap->drawable)) {
1043                 DRM_SPINUNLOCK_IRQRESTORE(&dev->drw_lock, irqflags);
1044                 DRM_DEBUG("Invalid drawable ID %d\n", swap->drawable);
1045                 return -EINVAL;
1046         }
1047
1048         DRM_SPINUNLOCK_IRQRESTORE(&dev->drw_lock, irqflags);
1049
1050         drm_update_vblank_count(dev, pipe);
1051         curseq = drm_vblank_count(dev, pipe);
1052
1053         if (seqtype == _DRM_VBLANK_RELATIVE)
1054                 swap->sequence += curseq;
1055
1056         if ((curseq - swap->sequence) <= (1<<23)) {
1057                 if (swap->seqtype & _DRM_VBLANK_NEXTONMISS) {
1058                         swap->sequence = curseq + 1;
1059                 } else {
1060                         DRM_DEBUG("Missed target sequence\n");
1061                         return -EINVAL;
1062                 }
1063         }
1064
1065         if (swap->seqtype & _DRM_VBLANK_FLIP) {
1066                 swap->sequence--;
1067
1068                 if ((curseq - swap->sequence) <= (1<<23)) {
1069                         struct drm_drawable_info *drw;
1070
1071                         LOCK_TEST_WITH_RETURN(dev, file_priv);
1072
1073                         DRM_SPINLOCK_IRQSAVE(&dev->drw_lock, irqflags);
1074
1075                         drw = drm_get_drawable_info(dev, swap->drawable);
1076
1077                         if (!drw) {
1078                                 DRM_SPINUNLOCK_IRQRESTORE(&dev->drw_lock,
1079                                     irqflags);
1080                                 DRM_DEBUG("Invalid drawable ID %d\n",
1081                                           swap->drawable);
1082                                 return -EINVAL;
1083                         }
1084
1085                         i915_dispatch_vsync_flip(dev, drw, plane);
1086
1087                         DRM_SPINUNLOCK_IRQRESTORE(&dev->drw_lock, irqflags);
1088
1089                         return 0;
1090                 }
1091         }
1092
1093         DRM_SPINLOCK_IRQSAVE(&dev_priv->swaps_lock, irqflags);
1094
1095         list_for_each(list, &dev_priv->vbl_swaps.head) {
1096                 vbl_swap = list_entry(list, struct drm_i915_vbl_swap, head);
1097
1098                 if (vbl_swap->drw_id == swap->drawable &&
1099                     vbl_swap->plane == plane &&
1100                     vbl_swap->sequence == swap->sequence) {
1101                         vbl_swap->flip = (swap->seqtype & _DRM_VBLANK_FLIP);
1102                         DRM_SPINUNLOCK_IRQRESTORE(&dev_priv->swaps_lock, irqflags);
1103                         DRM_DEBUG("Already scheduled\n");
1104                         return 0;
1105                 }
1106         }
1107
1108         DRM_SPINUNLOCK_IRQRESTORE(&dev_priv->swaps_lock, irqflags);
1109
1110         if (dev_priv->swaps_pending >= 100) {
1111                 DRM_DEBUG("Too many swaps queued\n");
1112                 return -EBUSY;
1113         }
1114
1115         vbl_swap = drm_calloc(1, sizeof(*vbl_swap), DRM_MEM_DRIVER);
1116
1117         if (!vbl_swap) {
1118                 DRM_ERROR("Failed to allocate memory to queue swap\n");
1119                 return -ENOMEM;
1120         }
1121
1122         DRM_DEBUG("\n");
1123
1124         ret = drm_vblank_get(dev, pipe);
1125         if (ret) {
1126                 drm_free(vbl_swap, sizeof(*vbl_swap), DRM_MEM_DRIVER);
1127                 return ret;
1128         }
1129
1130         vbl_swap->drw_id = swap->drawable;
1131         vbl_swap->plane = plane;
1132         vbl_swap->sequence = swap->sequence;
1133         vbl_swap->flip = (swap->seqtype & _DRM_VBLANK_FLIP);
1134         vbl_swap->minor = file_priv->minor;
1135
1136         if (vbl_swap->flip)
1137                 swap->sequence++;
1138
1139         DRM_SPINLOCK_IRQSAVE(&dev_priv->swaps_lock, irqflags);
1140
1141         list_add_tail(&vbl_swap->head, &dev_priv->vbl_swaps.head);
1142         dev_priv->swaps_pending++;
1143
1144         DRM_SPINUNLOCK_IRQRESTORE(&dev_priv->swaps_lock, irqflags);
1145
1146         return 0;
1147 }
1148
1149 /* drm_dma.h hooks
1150 */
1151 void i915_driver_irq_preinstall(struct drm_device * dev)
1152 {
1153         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
1154         u32 tmp;
1155
1156         tmp = I915_READ(PIPEASTAT);
1157         I915_WRITE(PIPEASTAT, tmp);
1158         tmp = I915_READ(PIPEBSTAT);
1159         I915_WRITE(PIPEBSTAT, tmp);
1160
1161
1162         I915_WRITE16(HWSTAM, 0xeffe);
1163         if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev)) {
1164                 I915_WRITE(IMR, 0x0);
1165                 I915_WRITE(IER, 0x0);
1166                 tmp = I915_READ(IIR);
1167                 I915_WRITE(IIR, tmp);
1168         } else {
1169                 I915_WRITE16(IMR, 0x0);
1170                 I915_WRITE16(IER, 0x0);
1171                 tmp = I915_READ16(IIR);
1172                 I915_WRITE16(IIR, tmp);
1173         }
1174 }
1175
1176 int i915_driver_irq_postinstall(struct drm_device * dev)
1177 {
1178         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
1179         int ret, num_pipes = 2;
1180
1181         DRM_SPININIT(&dev_priv->swaps_lock, "swap");
1182         INIT_LIST_HEAD(&dev_priv->vbl_swaps.head);
1183         dev_priv->swaps_pending = 0;
1184
1185         DRM_SPININIT(&dev_priv->user_irq_lock, "userirq");
1186         dev_priv->user_irq_refcount = 0;
1187         dev_priv->irq_mask_reg = ~0;
1188
1189         ret = drm_vblank_init(dev, num_pipes);
1190         if (ret)
1191                 return ret;
1192
1193         ret = drm_hotplug_init(dev);
1194         if (ret)
1195                 return ret;
1196
1197         dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
1198
1199         i915_enable_interrupt(dev);
1200         DRM_INIT_WAITQUEUE(&dev_priv->irq_queue);
1201
1202         /*
1203          * Initialize the hardware status page IRQ location.
1204          */
1205
1206         I915_WRITE(INSTPM, (1 << 5) | (1 << 21));
1207         return 0;
1208 }
1209
1210 void i915_driver_irq_uninstall(struct drm_device * dev)
1211 {
1212         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
1213         u32 temp;
1214
1215         if (!dev_priv)
1216                 return;
1217
1218         dev_priv->irq_enabled = 1;
1219
1220         temp = I915_READ(PIPEASTAT);
1221         I915_WRITE(PIPEASTAT, temp);
1222         temp = I915_READ(PIPEBSTAT);
1223         I915_WRITE(PIPEBSTAT, temp);
1224         if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev)) {
1225                 I915_WRITE(HWSTAM, 0xffffffff);
1226                 I915_WRITE(IMR, 0xffffffff);
1227                 I915_WRITE(IER, 0x0);
1228
1229                 temp = I915_READ(IIR);
1230                 I915_WRITE(IIR, temp);
1231         } else {
1232                 I915_WRITE16(HWSTAM, 0xffff);
1233                 I915_WRITE16(IMR, 0xffff);
1234                 I915_WRITE16(IER, 0x0);
1235
1236                 temp = I915_READ16(IIR);
1237                 I915_WRITE16(IIR, temp);
1238         }
1239 }