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Merge branch 'modesetting-101' of ssh://git.freedesktop.org/git/mesa/drm into modeset...
[android-x86/external-libdrm.git] / shared-core / i915_irq.c
1 /* i915_irq.c -- IRQ support for the I915 -*- linux-c -*-
2  */
3 /*
4  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
5  * All Rights Reserved.
6  *
7  * Permission is hereby granted, free of charge, to any person obtaining a
8  * copy of this software and associated documentation files (the
9  * "Software"), to deal in the Software without restriction, including
10  * without limitation the rights to use, copy, modify, merge, publish,
11  * distribute, sub license, and/or sell copies of the Software, and to
12  * permit persons to whom the Software is furnished to do so, subject to
13  * the following conditions:
14  *
15  * The above copyright notice and this permission notice (including the
16  * next paragraph) shall be included in all copies or substantial portions
17  * of the Software.
18  *
19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
23  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26  *
27  */
28
29 #include "drmP.h"
30 #include "drm.h"
31 #include "i915_drm.h"
32 #include "i915_drv.h"
33 #include "intel_drv.h"
34
35 #define MAX_NOPID ((u32)~0)
36
37 /**
38  * i915_get_pipe - return the the pipe associated with a given plane
39  * @dev: DRM device
40  * @plane: plane to look for
41  *
42  * The Intel Mesa & 2D drivers call the vblank routines with a plane number
43  * rather than a pipe number, since they may not always be equal.  This routine
44  * maps the given @plane back to a pipe number.
45  */
46 static int
47 i915_get_pipe(struct drm_device *dev, int plane)
48 {
49         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
50         u32 dspcntr;
51
52         dspcntr = plane ? I915_READ(DSPBCNTR) : I915_READ(DSPACNTR);
53
54         return dspcntr & DISPPLANE_SEL_PIPE_MASK ? 1 : 0;
55 }
56
57 /**
58  * i915_get_plane - return the the plane associated with a given pipe
59  * @dev: DRM device
60  * @pipe: pipe to look for
61  *
62  * The Intel Mesa & 2D drivers call the vblank routines with a plane number
63  * rather than a plane number, since they may not always be equal.  This routine
64  * maps the given @pipe back to a plane number.
65  */
66 static int
67 i915_get_plane(struct drm_device *dev, int pipe)
68 {
69         if (i915_get_pipe(dev, 0) == pipe)
70                 return 0;
71         return 1;
72 }
73
74 /**
75  * i915_pipe_enabled - check if a pipe is enabled
76  * @dev: DRM device
77  * @pipe: pipe to check
78  *
79  * Reading certain registers when the pipe is disabled can hang the chip.
80  * Use this routine to make sure the PLL is running and the pipe is active
81  * before reading such registers if unsure.
82  */
83 static int
84 i915_pipe_enabled(struct drm_device *dev, int pipe)
85 {
86         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
87         unsigned long pipeconf = pipe ? PIPEBCONF : PIPEACONF;
88
89         if (I915_READ(pipeconf) & PIPEACONF_ENABLE)
90                 return 1;
91
92         return 0;
93 }
94
95 /**
96  * Emit a synchronous flip.
97  *
98  * This function must be called with the drawable spinlock held.
99  */
100 static void
101 i915_dispatch_vsync_flip(struct drm_device *dev, struct drm_drawable_info *drw,
102                          int plane)
103 {
104         struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
105         struct drm_i915_sarea *sarea_priv = master_priv->sarea_priv;
106         u16 x1, y1, x2, y2;
107         int pf_planes = 1 << plane;
108
109         DRM_SPINLOCK_ASSERT(&dev->drw_lock);
110
111         /* If the window is visible on the other plane, we have to flip on that
112          * plane as well.
113          */
114         if (plane == 1) {
115                 x1 = sarea_priv->planeA_x;
116                 y1 = sarea_priv->planeA_y;
117                 x2 = x1 + sarea_priv->planeA_w;
118                 y2 = y1 + sarea_priv->planeA_h;
119         } else {
120                 x1 = sarea_priv->planeB_x;
121                 y1 = sarea_priv->planeB_y;
122                 x2 = x1 + sarea_priv->planeB_w;
123                 y2 = y1 + sarea_priv->planeB_h;
124         }
125
126         if (x2 > 0 && y2 > 0) {
127                 int i, num_rects = drw->num_rects;
128                 struct drm_clip_rect *rect = drw->rects;
129
130                 for (i = 0; i < num_rects; i++)
131                         if (!(rect[i].x1 >= x2 || rect[i].y1 >= y2 ||
132                               rect[i].x2 <= x1 || rect[i].y2 <= y1)) {
133                                 pf_planes = 0x3;
134
135                                 break;
136                         }
137         }
138
139         i915_dispatch_flip(dev, pf_planes, 1);
140 }
141
142 /**
143  * Emit blits for scheduled buffer swaps.
144  *
145  * This function will be called with the HW lock held.
146  */
147 static void i915_vblank_tasklet(struct drm_device *dev)
148 {
149         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
150         struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
151         struct list_head *list, *tmp, hits, *hit;
152         int nhits, nrects, slice[2], upper[2], lower[2], i, num_pages;
153         unsigned counter[2];
154         struct drm_drawable_info *drw;
155         struct drm_i915_sarea *sarea_priv = master_priv->sarea_priv;
156         u32 cpp = dev_priv->cpp,  offsets[3];
157         u32 cmd = (cpp == 4) ? (XY_SRC_COPY_BLT_CMD |
158                                 XY_SRC_COPY_BLT_WRITE_ALPHA |
159                                 XY_SRC_COPY_BLT_WRITE_RGB)
160                              : XY_SRC_COPY_BLT_CMD;
161         u32 pitchropcpp = (sarea_priv->pitch * cpp) | (0xcc << 16) |
162                                         (cpp << 23) | (1 << 24);
163         RING_LOCALS;
164
165         counter[0] = drm_vblank_count(dev, 0);
166         counter[1] = drm_vblank_count(dev, 1);
167
168         DRM_DEBUG("\n");
169
170         INIT_LIST_HEAD(&hits);
171
172         nhits = nrects = 0;
173
174         /* No irqsave/restore necessary.  This tasklet may be run in an
175          * interrupt context or normal context, but we don't have to worry
176          * about getting interrupted by something acquiring the lock, because
177          * we are the interrupt context thing that acquires the lock.
178          */
179         DRM_SPINLOCK(&dev_priv->swaps_lock);
180
181         /* Find buffer swaps scheduled for this vertical blank */
182         list_for_each_safe(list, tmp, &dev_priv->vbl_swaps.head) {
183                 struct drm_i915_vbl_swap *vbl_swap =
184                         list_entry(list, struct drm_i915_vbl_swap, head);
185                 int pipe = i915_get_pipe(dev, vbl_swap->plane);
186
187                 if ((counter[pipe] - vbl_swap->sequence) > (1<<23))
188                         continue;
189
190                 master_priv = vbl_swap->minor->master->driver_priv;
191                 sarea_priv = master_priv->sarea_priv;
192                 
193                 pitchropcpp = (sarea_priv->pitch * cpp) | (0xcc << 16) |
194                         (cpp << 23) | (1 << 24);
195
196                 list_del(list);
197                 dev_priv->swaps_pending--;
198                 drm_vblank_put(dev, pipe);
199
200                 DRM_SPINUNLOCK(&dev_priv->swaps_lock);
201                 DRM_SPINLOCK(&dev->drw_lock);
202
203                 drw = drm_get_drawable_info(dev, vbl_swap->drw_id);
204
205                 if (!drw) {
206                         DRM_SPINUNLOCK(&dev->drw_lock);
207                         drm_free(vbl_swap, sizeof(*vbl_swap), DRM_MEM_DRIVER);
208                         DRM_SPINLOCK(&dev_priv->swaps_lock);
209                         continue;
210                 }
211
212                 list_for_each(hit, &hits) {
213                         struct drm_i915_vbl_swap *swap_cmp =
214                                 list_entry(hit, struct drm_i915_vbl_swap, head);
215                         struct drm_drawable_info *drw_cmp =
216                                 drm_get_drawable_info(dev, swap_cmp->drw_id);
217
218                         if (drw_cmp &&
219                             drw_cmp->rects[0].y1 > drw->rects[0].y1) {
220                                 list_add_tail(list, hit);
221                                 break;
222                         }
223                 }
224
225                 DRM_SPINUNLOCK(&dev->drw_lock);
226
227                 /* List of hits was empty, or we reached the end of it */
228                 if (hit == &hits)
229                         list_add_tail(list, hits.prev);
230
231                 nhits++;
232
233                 DRM_SPINLOCK(&dev_priv->swaps_lock);
234         }
235
236         DRM_SPINUNLOCK(&dev_priv->swaps_lock);
237
238         if (nhits == 0) {
239                 return;
240         }
241
242         i915_kernel_lost_context(dev);
243
244         upper[0] = upper[1] = 0;
245         slice[0] = max(sarea_priv->planeA_h / nhits, 1);
246         slice[1] = max(sarea_priv->planeB_h / nhits, 1);
247         lower[0] = sarea_priv->planeA_y + slice[0];
248         lower[1] = sarea_priv->planeB_y + slice[0];
249
250         offsets[0] = sarea_priv->front_offset;
251         offsets[1] = sarea_priv->back_offset;
252         offsets[2] = sarea_priv->third_offset;
253         num_pages = sarea_priv->third_handle ? 3 : 2;
254
255         DRM_SPINLOCK(&dev->drw_lock);
256
257         /* Emit blits for buffer swaps, partitioning both outputs into as many
258          * slices as there are buffer swaps scheduled in order to avoid tearing
259          * (based on the assumption that a single buffer swap would always
260          * complete before scanout starts).
261          */
262         for (i = 0; i++ < nhits;
263              upper[0] = lower[0], lower[0] += slice[0],
264              upper[1] = lower[1], lower[1] += slice[1]) {
265                 int init_drawrect = 1;
266
267                 if (i == nhits)
268                         lower[0] = lower[1] = sarea_priv->height;
269
270                 list_for_each(hit, &hits) {
271                         struct drm_i915_vbl_swap *swap_hit =
272                                 list_entry(hit, struct drm_i915_vbl_swap, head);
273                         struct drm_clip_rect *rect;
274                         int num_rects, plane, front, back;
275                         unsigned short top, bottom;
276
277                         drw = drm_get_drawable_info(dev, swap_hit->drw_id);
278
279                         if (!drw)
280                                 continue;
281
282                         plane = swap_hit->plane;
283
284                         if (swap_hit->flip) {
285                                 i915_dispatch_vsync_flip(dev, drw, plane);
286                                 continue;
287                         }
288
289                         if (init_drawrect) {
290                                 BEGIN_LP_RING(6);
291
292                                 OUT_RING(GFX_OP_DRAWRECT_INFO);
293                                 OUT_RING(0);
294                                 OUT_RING(0);
295                                 OUT_RING(sarea_priv->width | sarea_priv->height << 16);
296                                 OUT_RING(sarea_priv->width | sarea_priv->height << 16);
297                                 OUT_RING(0);
298
299                                 ADVANCE_LP_RING();
300
301                                 sarea_priv->ctxOwner = DRM_KERNEL_CONTEXT;
302
303                                 init_drawrect = 0;
304                         }
305
306                         rect = drw->rects;
307                         top = upper[plane];
308                         bottom = lower[plane];
309
310                         front = (master_priv->sarea_priv->pf_current_page >>
311                                  (2 * plane)) & 0x3;
312                         back = (front + 1) % num_pages;
313
314                         for (num_rects = drw->num_rects; num_rects--; rect++) {
315                                 int y1 = max(rect->y1, top);
316                                 int y2 = min(rect->y2, bottom);
317
318                                 if (y1 >= y2)
319                                         continue;
320
321                                 BEGIN_LP_RING(8);
322
323                                 OUT_RING(cmd);
324                                 OUT_RING(pitchropcpp);
325                                 OUT_RING((y1 << 16) | rect->x1);
326                                 OUT_RING((y2 << 16) | rect->x2);
327                                 OUT_RING(offsets[front]);
328                                 OUT_RING((y1 << 16) | rect->x1);
329                                 OUT_RING(pitchropcpp & 0xffff);
330                                 OUT_RING(offsets[back]);
331
332                                 ADVANCE_LP_RING();
333                         }
334                 }
335         }
336
337         DRM_SPINUNLOCK(&dev->drw_lock);
338
339         list_for_each_safe(hit, tmp, &hits) {
340                 struct drm_i915_vbl_swap *swap_hit =
341                         list_entry(hit, struct drm_i915_vbl_swap, head);
342
343                 list_del(hit);
344
345                 drm_free(swap_hit, sizeof(*swap_hit), DRM_MEM_DRIVER);
346         }
347 }
348 #if 0
349 static int i915_in_vblank(struct drm_device *dev, int pipe)
350 {
351         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
352         unsigned long pipedsl, vblank, vtotal;
353         unsigned long vbl_start, vbl_end, cur_line;
354
355         pipedsl = pipe ? PIPEBDSL : PIPEADSL;
356         vblank = pipe ? VBLANK_B : VBLANK_A;
357         vtotal = pipe ? VTOTAL_B : VTOTAL_A;
358
359         vbl_start = I915_READ(vblank) & VBLANK_START_MASK;
360         vbl_end = (I915_READ(vblank) >> VBLANK_END_SHIFT) & VBLANK_END_MASK;
361
362         cur_line = I915_READ(pipedsl);
363
364         if (cur_line >= vbl_start)
365                 return 1;
366
367         return 0;
368 }
369 #endif
370 u32 i915_get_vblank_counter(struct drm_device *dev, int plane)
371 {
372         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
373         unsigned long high_frame;
374         unsigned long low_frame;
375         u32 high1, high2, low, count;
376         int pipe;
377
378         pipe = i915_get_pipe(dev, plane);
379         high_frame = pipe ? PIPEBFRAMEHIGH : PIPEAFRAMEHIGH;
380         low_frame = pipe ? PIPEBFRAMEPIXEL : PIPEAFRAMEPIXEL;
381
382         if (!i915_pipe_enabled(dev, pipe)) {
383             printk(KERN_ERR "trying to get vblank count for disabled "
384                    "pipe %d\n", pipe);
385             return 0;
386         }
387
388         /*
389          * High & low register fields aren't synchronized, so make sure
390          * we get a low value that's stable across two reads of the high
391          * register.
392          */
393         do {
394                 high1 = ((I915_READ(high_frame) & PIPE_FRAME_HIGH_MASK) >>
395                          PIPE_FRAME_HIGH_SHIFT);
396                 low =  ((I915_READ(low_frame) & PIPE_FRAME_LOW_MASK) >>
397                         PIPE_FRAME_LOW_SHIFT);
398                 high2 = ((I915_READ(high_frame) & PIPE_FRAME_HIGH_MASK) >>
399                          PIPE_FRAME_HIGH_SHIFT);
400         } while (high1 != high2);
401
402         count = (high1 << 8) | low;
403
404         /*
405          * If we're in the middle of the vblank period, the
406          * above regs won't have been updated yet, so return
407          * an incremented count to stay accurate
408          */
409 #if 0
410         if (i915_in_vblank(dev, pipe))
411                 count++;
412 #endif
413         /* count may be reset by other driver(e.g. 2D driver), 
414            we have no way to know if it is wrapped or resetted 
415            when count is zero. do a rough guess.
416         */
417         if (count == 0 && dev->last_vblank[pipe] < dev->max_vblank_count/2)
418                 dev->last_vblank[pipe] = 0; 
419         
420         return count;
421 }
422
423 #define HOTPLUG_CMD_CRT 1
424 #define HOTPLUG_CMD_CRT_DIS 2
425 #define HOTPLUG_CMD_SDVOB 4
426 #define HOTPLUG_CMD_SDVOC 8
427 #define HOTPLUG_CMD_TV 16
428
429 static struct drm_device *hotplug_dev;
430 static int hotplug_cmd = 0;
431 static spinlock_t hotplug_lock = SPIN_LOCK_UNLOCKED;
432
433 static void i915_hotplug_tv(struct drm_device *dev)
434 {
435         struct drm_output *output;
436         struct intel_output *iout;
437         enum drm_output_status status;
438
439         mutex_lock(&dev->mode_config.mutex);
440
441         /* find the crt output */
442         list_for_each_entry(output, &dev->mode_config.output_list, head) {
443                 iout = output->driver_private;
444                 if (iout->type == INTEL_OUTPUT_TVOUT)
445                         break;
446                 else
447                         iout = 0;
448         }
449
450         if (iout == 0)
451                 goto unlock;
452
453         /* may need to I915_WRITE(TVDAC, 1<<31) to ack the interrupt */
454         status = output->funcs->detect(output);
455         drm_hotplug_stage_two(dev, output,
456                               status == output_status_connected ? 1 : 0);
457
458 unlock:
459         mutex_unlock(&dev->mode_config.mutex);
460 }
461
462 static void i915_hotplug_crt(struct drm_device *dev, bool isconnected)
463 {
464         struct drm_output *output;
465         struct intel_output *iout;
466
467         mutex_lock(&dev->mode_config.mutex);
468
469         /* find the crt output */
470         list_for_each_entry(output, &dev->mode_config.output_list, head) {
471                 iout = output->driver_private;
472                 if (iout->type == INTEL_OUTPUT_ANALOG)
473                         break;
474                 else
475                         iout = 0;
476         }
477
478         if (iout == 0)
479                 goto unlock;
480
481         drm_hotplug_stage_two(dev, output, isconnected);
482
483 unlock:
484         mutex_unlock(&dev->mode_config.mutex);
485 }
486
487 static void i915_hotplug_sdvo(struct drm_device *dev, int sdvoB)
488 {
489         struct drm_output *output = 0;
490         enum drm_output_status status;
491
492         mutex_lock(&dev->mode_config.mutex);
493
494         output = intel_sdvo_find(dev, sdvoB);
495
496         if (!output)
497                 goto unlock;
498
499         status = output->funcs->detect(output);
500
501         if (status != output_status_connected)
502                 drm_hotplug_stage_two(dev, output, false);
503         else
504                 drm_hotplug_stage_two(dev, output, true);
505
506         intel_sdvo_set_hotplug(output, 1);
507
508 unlock:
509         mutex_unlock(&dev->mode_config.mutex);
510 }
511 /*
512  * This code is called in a more safe envirmoent to handle the hotplugs.
513  * Add code here for hotplug love to userspace.
514  */
515 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
516 static void i915_hotplug_work_func(void *work)
517 #else
518 static void i915_hotplug_work_func(struct work_struct *work)
519 #endif
520 {
521         struct drm_device *dev = hotplug_dev;
522         int crt;
523         int crtDis;
524         int sdvoB;
525         int sdvoC;
526         int tv;
527
528         spin_lock(&hotplug_lock);
529         tv = hotplug_cmd & HOTPLUG_CMD_TV;
530         crt = hotplug_cmd & HOTPLUG_CMD_CRT;
531         crtDis = hotplug_cmd & HOTPLUG_CMD_CRT_DIS;
532         sdvoB = hotplug_cmd & HOTPLUG_CMD_SDVOB;
533         sdvoC = hotplug_cmd & HOTPLUG_CMD_SDVOC;
534         hotplug_cmd = 0;
535         spin_unlock(&hotplug_lock);
536
537         if (tv)
538                 i915_hotplug_tv(dev);
539         if (crt)
540                 i915_hotplug_crt(dev, true);
541         if (crtDis)
542                 i915_hotplug_crt(dev, false);
543
544         if (sdvoB)
545                 i915_hotplug_sdvo(dev, 1);
546
547         if (sdvoC)
548                 i915_hotplug_sdvo(dev, 0);
549
550         drm_handle_hotplug(dev);
551 }
552
553 static int i915_run_hotplug_tasklet(struct drm_device *dev, uint32_t stat)
554 {
555 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
556         static DECLARE_WORK(hotplug, i915_hotplug_work_func, NULL);
557 #else
558         static DECLARE_WORK(hotplug, i915_hotplug_work_func);
559 #endif
560         struct drm_i915_private *dev_priv = dev->dev_private;
561
562         hotplug_dev = dev;
563
564         if (stat & TV_HOTPLUG_INT_STATUS) {
565                 DRM_DEBUG("TV event\n");
566
567                 spin_lock(&hotplug_lock);
568                 hotplug_cmd |= HOTPLUG_CMD_TV;
569                 spin_unlock(&hotplug_lock);
570         }
571
572         if (stat & CRT_HOTPLUG_INT_STATUS) {
573                 DRM_DEBUG("CRT event\n");
574
575                 if (stat & CRT_HOTPLUG_MONITOR_MASK) {
576                         spin_lock(&hotplug_lock);
577                         hotplug_cmd |= HOTPLUG_CMD_CRT;
578                         spin_unlock(&hotplug_lock);
579                 } else {
580                         spin_lock(&hotplug_lock);
581                         hotplug_cmd |= HOTPLUG_CMD_CRT_DIS;
582                         spin_unlock(&hotplug_lock);
583                 }
584         }
585
586         if (stat & SDVOB_HOTPLUG_INT_STATUS) {
587                 DRM_DEBUG("sDVOB event\n");
588
589                 spin_lock(&hotplug_lock);
590                 hotplug_cmd |= HOTPLUG_CMD_SDVOB;
591                 spin_unlock(&hotplug_lock);
592         }
593
594         if (stat & SDVOC_HOTPLUG_INT_STATUS) {
595                 DRM_DEBUG("sDVOC event\n");
596
597                 spin_lock(&hotplug_lock);
598                 hotplug_cmd |= HOTPLUG_CMD_SDVOC;
599                 spin_unlock(&hotplug_lock);
600         }
601
602         queue_work(dev_priv->wq, &hotplug);
603
604         return 0;
605 }
606
607 irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
608 {
609         struct drm_device *dev = (struct drm_device *) arg;
610         struct drm_i915_master_private *master_priv;
611         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
612         u32 iir;
613         u32 pipea_stats, pipeb_stats;
614         int hotplug = 0;
615         int vblank = 0;
616
617         /* On i8xx/i915 hw the IIR and IER are 16bit on i9xx its 32bit */
618         if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev))
619                 iir = I915_READ(I915REG_INT_IDENTITY_R);
620         else
621                 iir = I915_READ16(I915REG_INT_IDENTITY_R);
622
623         iir &= (dev_priv->irq_enable_reg | I915_USER_INTERRUPT);
624
625 #if 0
626         DRM_DEBUG("flag=%08x\n", iir);
627 #endif
628         if (iir == 0) {
629 #if 0
630                 DRM_DEBUG ("iir 0x%08x im 0x%08x ie 0x%08x pipea 0x%08x pipeb 0x%08x\n",
631                            iir,
632                            I915_READ(I915REG_INT_MASK_R),
633                            I915_READ(I915REG_INT_ENABLE_R),
634                            I915_READ(I915REG_PIPEASTAT),
635                            I915_READ(I915REG_PIPEBSTAT));
636 #endif
637                 return IRQ_NONE;
638         }
639
640         /*
641          * Clear the PIPE(A|B)STAT regs before the IIR otherwise
642          * we may get extra interrupts.
643          */
644         if (iir & I915_DISPLAY_PIPE_A_EVENT_INTERRUPT) {
645                 pipea_stats = I915_READ(I915REG_PIPEASTAT);
646                 if (pipea_stats & (I915_START_VBLANK_INTERRUPT_STATUS|
647                                    I915_VBLANK_INTERRUPT_STATUS))
648                 {
649                         vblank++;
650                         drm_handle_vblank(dev, i915_get_plane(dev, 0));
651                 }
652
653                 /* This is a global event, and not a pipe A event */
654                 if ((pipea_stats & I915_HOTPLUG_INTERRUPT_STATUS) ||
655                     (pipea_stats & I915_HOTPLUG_TV_INTERRUPT_STATUS))
656                         hotplug = 1;
657
658                 I915_WRITE(I915REG_PIPEASTAT, pipea_stats);
659         }
660
661         if (iir & I915_DISPLAY_PIPE_B_EVENT_INTERRUPT) {
662                 pipeb_stats = I915_READ(I915REG_PIPEBSTAT);
663                 if (pipeb_stats & (I915_START_VBLANK_INTERRUPT_STATUS|
664                                    I915_VBLANK_INTERRUPT_STATUS))
665                 {
666                         vblank++;
667                         drm_handle_vblank(dev, i915_get_plane(dev, 1));
668                 }
669                 I915_WRITE(I915REG_PIPEBSTAT, pipeb_stats);
670         }
671
672         /* Clear the generated interrupt */
673         if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev)) {
674                 I915_WRITE(I915REG_INT_IDENTITY_R, iir);
675                 (void) I915_READ(I915REG_INT_IDENTITY_R);
676         } else {
677                 I915_WRITE16(I915REG_INT_IDENTITY_R, iir);
678                 (void) I915_READ16(I915REG_INT_IDENTITY_R);
679         }
680
681         if (dev->primary->master) {
682                 master_priv = dev->primary->master->driver_priv;
683                 master_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
684         }
685
686         if (iir & I915_USER_INTERRUPT) {
687                 DRM_WAKEUP(&dev_priv->irq_queue);
688 #ifdef I915_HAVE_FENCE
689                 i915_fence_handler(dev);
690 #endif
691         }
692
693         if (vblank) {
694                 if (dev_priv->swaps_pending > 0)
695                         drm_locked_tasklet(dev, i915_vblank_tasklet);
696         }
697
698         if ((iir & I915_DISPLAY_PORT_INTERRUPT) || hotplug) {
699                 u32 temp2 = 0;
700
701                 DRM_INFO("Hotplug event received\n");
702
703                 if (!IS_I9XX(dev) || IS_I915G(dev) || IS_I915GM(dev)) {
704                         if (pipea_stats & I915_HOTPLUG_INTERRUPT_STATUS)
705                                 temp2 |= SDVOB_HOTPLUG_INT_STATUS |
706                                         SDVOC_HOTPLUG_INT_STATUS;
707                         if (pipea_stats & I915_HOTPLUG_TV_INTERRUPT_STATUS)
708                                 temp2 |= TV_HOTPLUG_INT_STATUS;
709                 } else {
710                         temp2 = I915_READ(PORT_HOTPLUG_STAT);
711
712                         I915_WRITE(PORT_HOTPLUG_STAT, temp2);
713                 }
714                 i915_run_hotplug_tasklet(dev, temp2);
715         }
716
717         return IRQ_HANDLED;
718 }
719
720 int i915_emit_irq(struct drm_device *dev)
721 {
722         struct drm_i915_private *dev_priv = dev->dev_private;
723         RING_LOCALS;
724
725         i915_kernel_lost_context(dev);
726
727         DRM_DEBUG("\n");
728
729         i915_emit_breadcrumb(dev);
730
731         BEGIN_LP_RING(2);
732         OUT_RING(0);
733         OUT_RING(GFX_OP_USER_INTERRUPT);
734         ADVANCE_LP_RING();
735
736         return dev_priv->counter;
737 }
738
739 void i915_user_irq_on(struct drm_device *dev)
740 {
741         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
742
743         DRM_SPINLOCK(&dev_priv->user_irq_lock);
744         if (dev_priv->irq_enabled && (++dev_priv->user_irq_refcount == 1)){
745                 dev_priv->irq_enable_reg |= I915_USER_INTERRUPT;
746                 if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev))
747                         I915_WRITE(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
748                 else
749                         I915_WRITE16(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
750         }
751         DRM_SPINUNLOCK(&dev_priv->user_irq_lock);
752
753 }
754                 
755 void i915_user_irq_off(struct drm_device *dev)
756 {
757         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
758
759         DRM_SPINLOCK(&dev_priv->user_irq_lock);
760         if (dev_priv->irq_enabled && (--dev_priv->user_irq_refcount == 0)) {
761                 //              dev_priv->irq_enable_reg &= ~I915_USER_INTERRUPT;
762                 //              if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev))
763                 //                      I915_WRITE(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
764                 //              else
765                 //                      I915_WRITE16(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
766         }
767         DRM_SPINUNLOCK(&dev_priv->user_irq_lock);
768 }
769
770
771 static int i915_wait_irq(struct drm_device * dev, int irq_nr)
772 {
773         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
774         struct drm_i915_master_private *master_priv;
775         int ret = 0;
776
777         DRM_DEBUG("irq_nr=%d breadcrumb=%d\n", irq_nr,
778                   READ_BREADCRUMB(dev_priv));
779
780         if (READ_BREADCRUMB(dev_priv) >= irq_nr)
781                 return 0;
782
783         i915_user_irq_on(dev);
784         DRM_WAIT_ON(ret, dev_priv->irq_queue, 3 * DRM_HZ,
785                     READ_BREADCRUMB(dev_priv) >= irq_nr);
786         i915_user_irq_off(dev);
787
788         if (ret == -EBUSY) {
789                 DRM_ERROR("EBUSY -- rec: %d emitted: %d\n",
790                           READ_BREADCRUMB(dev_priv), (int)dev_priv->counter);
791         }
792         
793         if (dev->primary->master) {
794                 master_priv = dev->primary->master->driver_priv;
795                 master_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
796         }
797
798         return ret;
799 }
800
801 /* Needs the lock as it touches the ring.
802  */
803 int i915_irq_emit(struct drm_device *dev, void *data,
804                          struct drm_file *file_priv)
805 {
806         struct drm_i915_private *dev_priv = dev->dev_private;
807         struct drm_i915_irq_emit *emit = data;
808         int result;
809
810         LOCK_TEST_WITH_RETURN(dev, file_priv);
811
812         if (!dev_priv) {
813                 DRM_ERROR("called with no initialization\n");
814                 return -EINVAL;
815         }
816
817         result = i915_emit_irq(dev);
818
819         if (DRM_COPY_TO_USER(emit->irq_seq, &result, sizeof(int))) {
820                 DRM_ERROR("copy_to_user\n");
821                 return -EFAULT;
822         }
823
824         return 0;
825 }
826
827 /* Doesn't need the hardware lock.
828  */
829 int i915_irq_wait(struct drm_device *dev, void *data,
830                   struct drm_file *file_priv)
831 {
832         struct drm_i915_private *dev_priv = dev->dev_private;
833         struct drm_i915_irq_wait *irqwait = data;
834
835         if (!dev_priv) {
836                 DRM_ERROR("called with no initialization\n");
837                 return -EINVAL;
838         }
839
840         return i915_wait_irq(dev, irqwait->irq_seq);
841 }
842
843 int i915_enable_vblank(struct drm_device *dev, int plane)
844 {
845         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
846         int pipe = i915_get_pipe(dev, plane);
847         u32     pipestat_reg = 0;
848         u32     pipestat;
849
850         switch (pipe) {
851         case 0:
852                 pipestat_reg = I915REG_PIPEASTAT;
853                 dev_priv->irq_enable_reg |= I915_DISPLAY_PIPE_A_EVENT_INTERRUPT;
854                 break;
855         case 1:
856                 pipestat_reg = I915REG_PIPEBSTAT;
857                 dev_priv->irq_enable_reg |= I915_DISPLAY_PIPE_B_EVENT_INTERRUPT;
858                 break;
859         default:
860                 DRM_ERROR("tried to enable vblank on non-existent pipe %d\n",
861                           pipe);
862                 break;
863         }
864
865         if (pipestat_reg)
866         {
867                 pipestat = I915_READ (pipestat_reg);
868                 /*
869                  * Older chips didn't have the start vblank interrupt,
870                  * but 
871                  */
872                 if (IS_I965G (dev))
873                         pipestat |= I915_START_VBLANK_INTERRUPT_ENABLE;
874                 else
875                         pipestat |= I915_VBLANK_INTERRUPT_ENABLE;
876                 /*
877                  * Clear any pending status
878                  */
879                 pipestat |= (I915_START_VBLANK_INTERRUPT_STATUS |
880                              I915_VBLANK_INTERRUPT_STATUS);
881                 I915_WRITE(pipestat_reg, pipestat);
882         }
883
884         if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev))
885                 I915_WRITE(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
886         else
887                 I915_WRITE16(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
888
889
890         return 0;
891 }
892
893 void i915_disable_vblank(struct drm_device *dev, int plane)
894 {
895         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
896         int pipe = i915_get_pipe(dev, plane);
897         u32     pipestat_reg = 0;
898         u32     pipestat;
899
900         switch (pipe) {
901         case 0:
902                 pipestat_reg = I915REG_PIPEASTAT;
903                 dev_priv->irq_enable_reg &= ~I915_DISPLAY_PIPE_A_EVENT_INTERRUPT;
904                 break;
905         case 1:
906                 pipestat_reg = I915REG_PIPEBSTAT;
907                 dev_priv->irq_enable_reg &= ~I915_DISPLAY_PIPE_B_EVENT_INTERRUPT;
908                 break;
909         default:
910                 DRM_ERROR("tried to disable vblank on non-existent pipe %d\n",
911                           pipe);
912                 break;
913         }
914
915         if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev))
916                 I915_WRITE(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
917         else
918                 I915_WRITE16(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
919
920         if (pipestat_reg)
921         {
922                 pipestat = I915_READ (pipestat_reg);
923                 pipestat &= ~(I915_START_VBLANK_INTERRUPT_ENABLE |
924                               I915_VBLANK_INTERRUPT_ENABLE);
925                 /*
926                  * Clear any pending status
927                  */
928                 pipestat |= (I915_START_VBLANK_INTERRUPT_STATUS |
929                              I915_VBLANK_INTERRUPT_STATUS);
930                 I915_WRITE(pipestat_reg, pipestat);
931         }
932 }
933
934 void i915_enable_interrupt (struct drm_device *dev)
935 {
936         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
937         struct drm_output *o;
938
939         dev_priv->irq_enable_reg |= I915_USER_INTERRUPT;
940
941         if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev)) {
942                 if (dev->mode_config.num_output)
943                         dev_priv->irq_enable_reg |= I915_DISPLAY_PORT_INTERRUPT;
944         } else {
945                 if (dev->mode_config.num_output)
946                         dev_priv->irq_enable_reg |= I915_DISPLAY_PIPE_A_EVENT_INTERRUPT;
947
948                 /* Enable global interrupts for hotplug - not a pipeA event */
949                 I915_WRITE(I915REG_PIPEASTAT, I915_READ(I915REG_PIPEASTAT) |
950                            I915_HOTPLUG_INTERRUPT_ENABLE |
951                            I915_HOTPLUG_TV_INTERRUPT_ENABLE |
952                            I915_HOTPLUG_TV_CLEAR |
953                            I915_HOTPLUG_CLEAR);
954         }
955
956         if (dev_priv->irq_enable_reg & (I915_DISPLAY_PORT_INTERRUPT | I915_DISPLAY_PIPE_A_EVENT_INTERRUPT)) {
957                 u32 temp = 0;
958
959                 if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev)) {
960                         temp = I915_READ(PORT_HOTPLUG_EN);
961
962                         /* Activate the CRT */
963                         temp |= CRT_HOTPLUG_INT_EN;
964                 }
965
966                 if (IS_I9XX(dev)) {
967                         /* SDVOB */
968                         o = intel_sdvo_find(dev, 1);
969                         if (o && intel_sdvo_supports_hotplug(o)) {
970                                 intel_sdvo_set_hotplug(o, 1);
971                                 temp |= SDVOB_HOTPLUG_INT_EN;
972                         }
973
974                         /* SDVOC */
975                         o = intel_sdvo_find(dev, 0);
976                         if (o && intel_sdvo_supports_hotplug(o)) {
977                                 intel_sdvo_set_hotplug(o, 1);
978                                 temp |= SDVOC_HOTPLUG_INT_EN;
979                         }
980
981                         I915_WRITE(SDVOB, I915_READ(SDVOB) | SDVO_INTERRUPT_ENABLE);
982                         I915_WRITE(SDVOC, I915_READ(SDVOC) | SDVO_INTERRUPT_ENABLE);
983                 } else {
984                         /* DVO ???? */
985                 }
986
987                 if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev)) {
988                         I915_WRITE(PORT_HOTPLUG_EN, temp);
989
990                         DRM_DEBUG("HEN %08x\n",I915_READ(PORT_HOTPLUG_EN));
991                         DRM_DEBUG("HST %08x\n",I915_READ(PORT_HOTPLUG_STAT));
992
993                         I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));
994                 }
995         }
996
997         if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev))
998                 I915_WRITE(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
999         else
1000                 I915_WRITE16(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
1001
1002         dev_priv->irq_enabled = 1;
1003 }
1004
1005 /* Set the vblank monitor pipe
1006  */
1007 int i915_vblank_pipe_set(struct drm_device *dev, void *data,
1008                          struct drm_file *file_priv)
1009 {
1010         struct drm_i915_private *dev_priv = dev->dev_private;
1011         struct drm_i915_vblank_pipe *pipe = data;
1012
1013         if (!dev_priv) {
1014                 DRM_ERROR("called with no initialization\n");
1015                 return -EINVAL;
1016         }
1017
1018         if (pipe->pipe & ~(DRM_I915_VBLANK_PIPE_A|DRM_I915_VBLANK_PIPE_B)) {
1019                 DRM_ERROR("called with invalid pipe 0x%x\n", pipe->pipe);
1020                 return -EINVAL;
1021         }
1022
1023         dev_priv->vblank_pipe = pipe->pipe;
1024
1025         return 0;
1026 }
1027
1028 int i915_vblank_pipe_get(struct drm_device *dev, void *data,
1029                          struct drm_file *file_priv)
1030 {
1031         struct drm_i915_private *dev_priv = dev->dev_private;
1032         struct drm_i915_vblank_pipe *pipe = data;
1033         u16 flag;
1034
1035         if (!dev_priv) {
1036                 DRM_ERROR("called with no initialization\n");
1037                 return -EINVAL;
1038         }
1039
1040         if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev))
1041                 flag = I915_READ(I915REG_INT_ENABLE_R);
1042         else
1043                 flag = I915_READ16(I915REG_INT_ENABLE_R);
1044
1045         pipe->pipe = 0;
1046         if (flag & I915_DISPLAY_PIPE_A_EVENT_INTERRUPT)
1047                 pipe->pipe |= DRM_I915_VBLANK_PIPE_A;
1048         if (flag & I915_DISPLAY_PIPE_B_EVENT_INTERRUPT)
1049                 pipe->pipe |= DRM_I915_VBLANK_PIPE_B;
1050
1051         return 0;
1052 }
1053
1054 /**
1055  * Schedule buffer swap at given vertical blank.
1056  */
1057 int i915_vblank_swap(struct drm_device *dev, void *data,
1058                      struct drm_file *file_priv)
1059 {
1060         struct drm_i915_private *dev_priv = dev->dev_private;
1061         struct drm_i915_master_private *master_priv;
1062         struct drm_i915_vblank_swap *swap = data;
1063         struct drm_i915_vbl_swap *vbl_swap;
1064         unsigned int pipe, seqtype, curseq, plane;
1065         unsigned long irqflags;
1066         struct list_head *list;
1067         int ret;
1068
1069         if (!dev_priv) {
1070                 DRM_ERROR("%s called with no initialization\n", __func__);
1071                 return -EINVAL;
1072         }
1073
1074         if (!dev->primary->master)
1075                 return -EINVAL;
1076
1077         master_priv = dev->primary->master->driver_priv;
1078
1079         if (master_priv->sarea_priv->rotation) {
1080                 DRM_DEBUG("Rotation not supported\n");
1081                 return -EINVAL;
1082         }
1083
1084         if (swap->seqtype & ~(_DRM_VBLANK_RELATIVE | _DRM_VBLANK_ABSOLUTE |
1085                              _DRM_VBLANK_SECONDARY | _DRM_VBLANK_NEXTONMISS |
1086                              _DRM_VBLANK_FLIP)) {
1087                 DRM_ERROR("Invalid sequence type 0x%x\n", swap->seqtype);
1088                 return -EINVAL;
1089         }
1090
1091         plane = (swap->seqtype & _DRM_VBLANK_SECONDARY) ? 1 : 0;
1092         pipe = i915_get_pipe(dev, plane);
1093
1094         seqtype = swap->seqtype & (_DRM_VBLANK_RELATIVE | _DRM_VBLANK_ABSOLUTE);
1095
1096         if (!(dev_priv->vblank_pipe & (1 << pipe))) {
1097                 DRM_ERROR("Invalid pipe %d\n", pipe);
1098                 return -EINVAL;
1099         }
1100
1101         DRM_SPINLOCK_IRQSAVE(&dev->drw_lock, irqflags);
1102
1103         /* It makes no sense to schedule a swap for a drawable that doesn't have
1104          * valid information at this point. E.g. this could mean that the X
1105          * server is too old to push drawable information to the DRM, in which
1106          * case all such swaps would become ineffective.
1107          */
1108         if (!drm_get_drawable_info(dev, swap->drawable)) {
1109                 DRM_SPINUNLOCK_IRQRESTORE(&dev->drw_lock, irqflags);
1110                 DRM_DEBUG("Invalid drawable ID %d\n", swap->drawable);
1111                 return -EINVAL;
1112         }
1113
1114         DRM_SPINUNLOCK_IRQRESTORE(&dev->drw_lock, irqflags);
1115
1116         drm_update_vblank_count(dev, pipe);
1117         curseq = drm_vblank_count(dev, pipe);
1118
1119         if (seqtype == _DRM_VBLANK_RELATIVE)
1120                 swap->sequence += curseq;
1121
1122         if ((curseq - swap->sequence) <= (1<<23)) {
1123                 if (swap->seqtype & _DRM_VBLANK_NEXTONMISS) {
1124                         swap->sequence = curseq + 1;
1125                 } else {
1126                         DRM_DEBUG("Missed target sequence\n");
1127                         return -EINVAL;
1128                 }
1129         }
1130
1131         if (swap->seqtype & _DRM_VBLANK_FLIP) {
1132                 swap->sequence--;
1133
1134                 if ((curseq - swap->sequence) <= (1<<23)) {
1135                         struct drm_drawable_info *drw;
1136
1137                         LOCK_TEST_WITH_RETURN(dev, file_priv);
1138
1139                         DRM_SPINLOCK_IRQSAVE(&dev->drw_lock, irqflags);
1140
1141                         drw = drm_get_drawable_info(dev, swap->drawable);
1142
1143                         if (!drw) {
1144                                 DRM_SPINUNLOCK_IRQRESTORE(&dev->drw_lock,
1145                                     irqflags);
1146                                 DRM_DEBUG("Invalid drawable ID %d\n",
1147                                           swap->drawable);
1148                                 return -EINVAL;
1149                         }
1150
1151                         i915_dispatch_vsync_flip(dev, drw, plane);
1152
1153                         DRM_SPINUNLOCK_IRQRESTORE(&dev->drw_lock, irqflags);
1154
1155                         return 0;
1156                 }
1157         }
1158
1159         DRM_SPINLOCK_IRQSAVE(&dev_priv->swaps_lock, irqflags);
1160
1161         list_for_each(list, &dev_priv->vbl_swaps.head) {
1162                 vbl_swap = list_entry(list, struct drm_i915_vbl_swap, head);
1163
1164                 if (vbl_swap->drw_id == swap->drawable &&
1165                     vbl_swap->plane == plane &&
1166                     vbl_swap->sequence == swap->sequence) {
1167                         vbl_swap->flip = (swap->seqtype & _DRM_VBLANK_FLIP);
1168                         DRM_SPINUNLOCK_IRQRESTORE(&dev_priv->swaps_lock, irqflags);
1169                         DRM_DEBUG("Already scheduled\n");
1170                         return 0;
1171                 }
1172         }
1173
1174         DRM_SPINUNLOCK_IRQRESTORE(&dev_priv->swaps_lock, irqflags);
1175
1176         if (dev_priv->swaps_pending >= 100) {
1177                 DRM_DEBUG("Too many swaps queued\n");
1178                 return -EBUSY;
1179         }
1180
1181         vbl_swap = drm_calloc(1, sizeof(*vbl_swap), DRM_MEM_DRIVER);
1182
1183         if (!vbl_swap) {
1184                 DRM_ERROR("Failed to allocate memory to queue swap\n");
1185                 return -ENOMEM;
1186         }
1187
1188         DRM_DEBUG("\n");
1189
1190         ret = drm_vblank_get(dev, pipe);
1191         if (ret) {
1192                 drm_free(vbl_swap, sizeof(*vbl_swap), DRM_MEM_DRIVER);
1193                 return ret;
1194         }
1195
1196         vbl_swap->drw_id = swap->drawable;
1197         vbl_swap->plane = plane;
1198         vbl_swap->sequence = swap->sequence;
1199         vbl_swap->flip = (swap->seqtype & _DRM_VBLANK_FLIP);
1200         vbl_swap->minor = file_priv->minor;
1201
1202         if (vbl_swap->flip)
1203                 swap->sequence++;
1204
1205         DRM_SPINLOCK_IRQSAVE(&dev_priv->swaps_lock, irqflags);
1206
1207         list_add_tail(&vbl_swap->head, &dev_priv->vbl_swaps.head);
1208         dev_priv->swaps_pending++;
1209
1210         DRM_SPINUNLOCK_IRQRESTORE(&dev_priv->swaps_lock, irqflags);
1211
1212         return 0;
1213 }
1214
1215 /* drm_dma.h hooks
1216 */
1217 void i915_driver_irq_preinstall(struct drm_device * dev)
1218 {
1219         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
1220
1221         I915_WRITE16(I915REG_HWSTAM, 0xeffe);
1222         if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev)) {
1223                 I915_WRITE(I915REG_INT_MASK_R, 0x0);
1224                 I915_WRITE(I915REG_INT_ENABLE_R, 0x0);
1225         } else {
1226                 I915_WRITE16(I915REG_INT_MASK_R, 0x0);
1227                 I915_WRITE16(I915REG_INT_ENABLE_R, 0x0);
1228         }
1229
1230 }
1231
1232 int i915_driver_irq_postinstall(struct drm_device * dev)
1233 {
1234         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
1235         int ret, num_pipes = 2;
1236
1237         DRM_SPININIT(&dev_priv->swaps_lock, "swap");
1238         INIT_LIST_HEAD(&dev_priv->vbl_swaps.head);
1239         dev_priv->swaps_pending = 0;
1240
1241         DRM_SPININIT(&dev_priv->user_irq_lock, "userirq");
1242         dev_priv->user_irq_refcount = 0;
1243         dev_priv->irq_enable_reg = 0;
1244
1245         ret = drm_vblank_init(dev, num_pipes);
1246         if (ret)
1247                 return ret;
1248
1249         ret = drm_hotplug_init(dev);
1250         if (ret)
1251                 return ret;
1252
1253         dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
1254
1255         i915_enable_interrupt(dev);
1256         DRM_INIT_WAITQUEUE(&dev_priv->irq_queue);
1257
1258         /*
1259          * Initialize the hardware status page IRQ location.
1260          */
1261
1262         I915_WRITE(I915REG_INSTPM, (1 << 5) | (1 << 21));
1263         return 0;
1264 }
1265
1266 void i915_driver_irq_uninstall(struct drm_device * dev)
1267 {
1268         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
1269         u32 temp;
1270
1271         if (!dev_priv)
1272                 return;
1273
1274         dev_priv->irq_enabled = 0;
1275
1276         temp = I915_READ(I915REG_PIPEASTAT);
1277         I915_WRITE(I915REG_PIPEASTAT, temp);
1278         temp = I915_READ(I915REG_PIPEBSTAT);
1279         I915_WRITE(I915REG_PIPEBSTAT, temp);
1280         if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev)) {
1281                 I915_WRITE(I915REG_HWSTAM, 0xffffffff);
1282                 I915_WRITE(I915REG_INT_MASK_R, 0xffffffff);
1283                 I915_WRITE(I915REG_INT_ENABLE_R, 0x0);
1284
1285                 temp = I915_READ(I915REG_INT_IDENTITY_R);
1286                 I915_WRITE(I915REG_INT_IDENTITY_R, temp);
1287         } else {
1288                 I915_WRITE16(I915REG_HWSTAM, 0xffff);
1289                 I915_WRITE16(I915REG_INT_MASK_R, 0xffff);
1290                 I915_WRITE16(I915REG_INT_ENABLE_R, 0x0);
1291
1292                 temp = I915_READ16(I915REG_INT_IDENTITY_R);
1293                 I915_WRITE16(I915REG_INT_IDENTITY_R, temp);
1294         }
1295 }