shared-core/i915_irq.c

   1 /* i915_irq.c -- IRQ support for the I915 -*- linux-c -*-
   2  */
   3 /*
   4  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   5  * All Rights Reserved.
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a
   8  * copy of this software and associated documentation files (the
   9  * "Software"), to deal in the Software without restriction, including
  10  * without limitation the rights to use, copy, modify, merge, publish,
  11  * distribute, sub license, and/or sell copies of the Software, and to
  12  * permit persons to whom the Software is furnished to do so, subject to
  13  * the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the
  16  * next paragraph) shall be included in all copies or substantial portions
  17  * of the Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  20  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  21  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  22  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  23  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  24  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  25  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  26  *
  27  */
  28
  29 #include "drmP.h"
  30 #include "drm.h"
  31 #include "i915_drm.h"
  32 #include "i915_drv.h"
  33 #include "intel_drv.h"
  34
  35 #define MAX_NOPID ((u32)~0)
  36
  37 /**
  38  * i915_get_pipe - return the the pipe associated with a given plane
  39  * @dev: DRM device
  40  * @plane: plane to look for
  41  *
  42  * The Intel Mesa & 2D drivers call the vblank routines with a plane number
  43  * rather than a pipe number, since they may not always be equal.  This routine
  44  * maps the given @plane back to a pipe number.
  45  */
  46 static int
  47 i915_get_pipe(struct drm_device *dev, int plane)
  48 {
  49         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
  50         u32 dspcntr;
  51
  52         dspcntr = plane ? I915_READ(DSPBCNTR) : I915_READ(DSPACNTR);
  53
  54         return dspcntr & DISPPLANE_SEL_PIPE_MASK ? 1 : 0;
  55 }
  56
  57 /**
  58  * i915_get_plane - return the the plane associated with a given pipe
  59  * @dev: DRM device
  60  * @pipe: pipe to look for
  61  *
  62  * The Intel Mesa & 2D drivers call the vblank routines with a plane number
  63  * rather than a plane number, since they may not always be equal.  This routine
  64  * maps the given @pipe back to a plane number.
  65  */
  66 static int
  67 i915_get_plane(struct drm_device *dev, int pipe)
  68 {
  69         if (i915_get_pipe(dev, 0) == pipe)
  70                 return 0;
  71         return 1;
  72 }
  73
  74 /**
  75  * i915_pipe_enabled - check if a pipe is enabled
  76  * @dev: DRM device
  77  * @pipe: pipe to check
  78  *
  79  * Reading certain registers when the pipe is disabled can hang the chip.
  80  * Use this routine to make sure the PLL is running and the pipe is active
  81  * before reading such registers if unsure.
  82  */
  83 static int
  84 i915_pipe_enabled(struct drm_device *dev, int pipe)
  85 {
  86         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
  87         unsigned long pipeconf = pipe ? PIPEBCONF : PIPEACONF;
  88
  89         if (I915_READ(pipeconf) & PIPEACONF_ENABLE)
  90                 return 1;
  91
  92         return 0;
  93 }
  94
  95 /**
  96  * Emit a synchronous flip.
  97  *
  98  * This function must be called with the drawable spinlock held.
  99  */
 100 static void
 101 i915_dispatch_vsync_flip(struct drm_device *dev, struct drm_drawable_info *drw,
 102                          int plane)
 103 {
 104         struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
 105         struct drm_i915_sarea *sarea_priv = master_priv->sarea_priv;
 106         u16 x1, y1, x2, y2;
 107         int pf_planes = 1 << plane;
 108
 109         DRM_SPINLOCK_ASSERT(&dev->drw_lock);
 110
 111         /* If the window is visible on the other plane, we have to flip on that
 112          * plane as well.
 113          */
 114         if (plane == 1) {
 115                 x1 = sarea_priv->planeA_x;
 116                 y1 = sarea_priv->planeA_y;
 117                 x2 = x1 + sarea_priv->planeA_w;
 118                 y2 = y1 + sarea_priv->planeA_h;
 119         } else {
 120                 x1 = sarea_priv->planeB_x;
 121                 y1 = sarea_priv->planeB_y;
 122                 x2 = x1 + sarea_priv->planeB_w;
 123                 y2 = y1 + sarea_priv->planeB_h;
 124         }
 125
 126         if (x2 > 0 && y2 > 0) {
 127                 int i, num_rects = drw->num_rects;
 128                 struct drm_clip_rect *rect = drw->rects;
 129
 130                 for (i = 0; i < num_rects; i++)
 131                         if (!(rect[i].x1 >= x2 || rect[i].y1 >= y2 ||
 132                               rect[i].x2 <= x1 || rect[i].y2 <= y1)) {
 133                                 pf_planes = 0x3;
 134
 135                                 break;
 136                         }
 137         }
 138
 139         i915_dispatch_flip(dev, pf_planes, 1);
 140 }
 141
 142 /**
 143  * Emit blits for scheduled buffer swaps.
 144  *
 145  * This function will be called with the HW lock held.
 146  */
 147 static void i915_vblank_tasklet(struct drm_device *dev)
 148 {
 149         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
 150         struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
 151         struct list_head *list, *tmp, hits, *hit;
 152         int nhits, nrects, slice[2], upper[2], lower[2], i, num_pages;
 153         unsigned counter[2];
 154         struct drm_drawable_info *drw;
 155         struct drm_i915_sarea *sarea_priv = master_priv->sarea_priv;
 156         u32 cpp = dev_priv->cpp,  offsets[3];
 157         u32 cmd = (cpp == 4) ? (XY_SRC_COPY_BLT_CMD |
 158                                 XY_SRC_COPY_BLT_WRITE_ALPHA |
 159                                 XY_SRC_COPY_BLT_WRITE_RGB)
 160                              : XY_SRC_COPY_BLT_CMD;
 161         u32 pitchropcpp = (sarea_priv->pitch * cpp) | (0xcc << 16) |
 162                                         (cpp << 23) | (1 << 24);
 163         RING_LOCALS;
 164
 165         counter[0] = drm_vblank_count(dev, 0);
 166         counter[1] = drm_vblank_count(dev, 1);
 167
 168         DRM_DEBUG("\n");
 169
 170         INIT_LIST_HEAD(&hits);
 171
 172         nhits = nrects = 0;
 173
 174         /* No irqsave/restore necessary.  This tasklet may be run in an
 175          * interrupt context or normal context, but we don't have to worry
 176          * about getting interrupted by something acquiring the lock, because
 177          * we are the interrupt context thing that acquires the lock.
 178          */
 179         DRM_SPINLOCK(&dev_priv->swaps_lock);
 180
 181         /* Find buffer swaps scheduled for this vertical blank */
 182         list_for_each_safe(list, tmp, &dev_priv->vbl_swaps.head) {
 183                 struct drm_i915_vbl_swap *vbl_swap =
 184                         list_entry(list, struct drm_i915_vbl_swap, head);
 185                 int pipe = i915_get_pipe(dev, vbl_swap->plane);
 186
 187                 if ((counter[pipe] - vbl_swap->sequence) > (1<<23))
 188                         continue;
 189
 190                 master_priv = vbl_swap->minor->master->driver_priv;
 191                 sarea_priv = master_priv->sarea_priv;
 192
 193                 pitchropcpp = (sarea_priv->pitch * cpp) | (0xcc << 16) |
 194                         (cpp << 23) | (1 << 24);
 195
 196                 list_del(list);
 197                 dev_priv->swaps_pending--;
 198                 drm_vblank_put(dev, pipe);
 199
 200                 DRM_SPINUNLOCK(&dev_priv->swaps_lock);
 201                 DRM_SPINLOCK(&dev->drw_lock);
 202
 203                 drw = drm_get_drawable_info(dev, vbl_swap->drw_id);
 204
 205                 if (!drw) {
 206                         DRM_SPINUNLOCK(&dev->drw_lock);
 207                         drm_free(vbl_swap, sizeof(*vbl_swap), DRM_MEM_DRIVER);
 208                         DRM_SPINLOCK(&dev_priv->swaps_lock);
 209                         continue;
 210                 }
 211
 212                 list_for_each(hit, &hits) {
 213                         struct drm_i915_vbl_swap *swap_cmp =
 214                                 list_entry(hit, struct drm_i915_vbl_swap, head);
 215                         struct drm_drawable_info *drw_cmp =
 216                                 drm_get_drawable_info(dev, swap_cmp->drw_id);
 217
 218                         if (drw_cmp &&
 219                             drw_cmp->rects[0].y1 > drw->rects[0].y1) {
 220                                 list_add_tail(list, hit);
 221                                 break;
 222                         }
 223                 }
 224
 225                 DRM_SPINUNLOCK(&dev->drw_lock);
 226
 227                 /* List of hits was empty, or we reached the end of it */
 228                 if (hit == &hits)
 229                         list_add_tail(list, hits.prev);
 230
 231                 nhits++;
 232
 233                 DRM_SPINLOCK(&dev_priv->swaps_lock);
 234         }
 235
 236         DRM_SPINUNLOCK(&dev_priv->swaps_lock);
 237
 238         if (nhits == 0) {
 239                 return;
 240         }
 241
 242         i915_kernel_lost_context(dev);
 243
 244         upper[0] = upper[1] = 0;
 245         slice[0] = max(sarea_priv->planeA_h / nhits, 1);
 246         slice[1] = max(sarea_priv->planeB_h / nhits, 1);
 247         lower[0] = sarea_priv->planeA_y + slice[0];
 248         lower[1] = sarea_priv->planeB_y + slice[0];
 249
 250         offsets[0] = sarea_priv->front_offset;
 251         offsets[1] = sarea_priv->back_offset;
 252         offsets[2] = sarea_priv->third_offset;
 253         num_pages = sarea_priv->third_handle ? 3 : 2;
 254
 255         DRM_SPINLOCK(&dev->drw_lock);
 256
 257         /* Emit blits for buffer swaps, partitioning both outputs into as many
 258          * slices as there are buffer swaps scheduled in order to avoid tearing
 259          * (based on the assumption that a single buffer swap would always
 260          * complete before scanout starts).
 261          */
 262         for (i = 0; i++ < nhits;
 263              upper[0] = lower[0], lower[0] += slice[0],
 264              upper[1] = lower[1], lower[1] += slice[1]) {
 265                 int init_drawrect = 1;
 266
 267                 if (i == nhits)
 268                         lower[0] = lower[1] = sarea_priv->height;
 269
 270                 list_for_each(hit, &hits) {
 271                         struct drm_i915_vbl_swap *swap_hit =
 272                                 list_entry(hit, struct drm_i915_vbl_swap, head);
 273                         struct drm_clip_rect *rect;
 274                         int num_rects, plane, front, back;
 275                         unsigned short top, bottom;
 276
 277                         drw = drm_get_drawable_info(dev, swap_hit->drw_id);
 278
 279                         if (!drw)
 280                                 continue;
 281
 282                         plane = swap_hit->plane;
 283
 284                         if (swap_hit->flip) {
 285                                 i915_dispatch_vsync_flip(dev, drw, plane);
 286                                 continue;
 287                         }
 288
 289                         if (init_drawrect) {
 290                                 BEGIN_LP_RING(6);
 291
 292                                 OUT_RING(GFX_OP_DRAWRECT_INFO);
 293                                 OUT_RING(0);
 294                                 OUT_RING(0);
 295                                 OUT_RING(sarea_priv->width | sarea_priv->height << 16);
 296                                 OUT_RING(sarea_priv->width | sarea_priv->height << 16);
 297                                 OUT_RING(0);
 298
 299                                 ADVANCE_LP_RING();
 300
 301                                 sarea_priv->ctxOwner = DRM_KERNEL_CONTEXT;
 302
 303                                 init_drawrect = 0;
 304                         }
 305
 306                         rect = drw->rects;
 307                         top = upper[plane];
 308                         bottom = lower[plane];
 309
 310                         front = (master_priv->sarea_priv->pf_current_page >>
 311                                  (2 * plane)) & 0x3;
 312                         back = (front + 1) % num_pages;
 313
 314                         for (num_rects = drw->num_rects; num_rects--; rect++) {
 315                                 int y1 = max(rect->y1, top);
 316                                 int y2 = min(rect->y2, bottom);
 317
 318                                 if (y1 >= y2)
 319                                         continue;
 320
 321                                 BEGIN_LP_RING(8);
 322
 323                                 OUT_RING(cmd);
 324                                 OUT_RING(pitchropcpp);
 325                                 OUT_RING((y1 << 16) | rect->x1);
 326                                 OUT_RING((y2 << 16) | rect->x2);
 327                                 OUT_RING(offsets[front]);
 328                                 OUT_RING((y1 << 16) | rect->x1);
 329                                 OUT_RING(pitchropcpp & 0xffff);
 330                                 OUT_RING(offsets[back]);
 331
 332                                 ADVANCE_LP_RING();
 333                         }
 334                 }
 335         }
 336
 337         DRM_SPINUNLOCK(&dev->drw_lock);
 338
 339         list_for_each_safe(hit, tmp, &hits) {
 340                 struct drm_i915_vbl_swap *swap_hit =
 341                         list_entry(hit, struct drm_i915_vbl_swap, head);
 342
 343                 list_del(hit);
 344
 345                 drm_free(swap_hit, sizeof(*swap_hit), DRM_MEM_DRIVER);
 346         }
 347 }
 348 #if 0
 349 static int i915_in_vblank(struct drm_device *dev, int pipe)
 350 {
 351         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
 352         unsigned long pipedsl, vblank, vtotal;
 353         unsigned long vbl_start, vbl_end, cur_line;
 354
 355         pipedsl = pipe ? PIPEBDSL : PIPEADSL;
 356         vblank = pipe ? VBLANK_B : VBLANK_A;
 357         vtotal = pipe ? VTOTAL_B : VTOTAL_A;
 358
 359         vbl_start = I915_READ(vblank) & VBLANK_START_MASK;
 360         vbl_end = (I915_READ(vblank) >> VBLANK_END_SHIFT) & VBLANK_END_MASK;
 361
 362         cur_line = I915_READ(pipedsl);
 363
 364         if (cur_line >= vbl_start)
 365                 return 1;
 366
 367         return 0;
 368 }
 369 #endif
 370 u32 i915_get_vblank_counter(struct drm_device *dev, int plane)
 371 {
 372         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
 373         unsigned long high_frame;
 374         unsigned long low_frame;
 375         u32 high1, high2, low, count;
 376         int pipe;
 377
 378         pipe = i915_get_pipe(dev, plane);
 379         high_frame = pipe ? PIPEBFRAMEHIGH : PIPEAFRAMEHIGH;
 380         low_frame = pipe ? PIPEBFRAMEPIXEL : PIPEAFRAMEPIXEL;
 381
 382         if (!i915_pipe_enabled(dev, pipe)) {
 383             printk(KERN_ERR "trying to get vblank count for disabled "
 384                    "pipe %d\n", pipe);
 385             return 0;
 386         }
 387
 388         /*
 389          * High & low register fields aren't synchronized, so make sure
 390          * we get a low value that's stable across two reads of the high
 391          * register.
 392          */
 393         do {
 394                 high1 = ((I915_READ(high_frame) & PIPE_FRAME_HIGH_MASK) >>
 395                          PIPE_FRAME_HIGH_SHIFT);
 396                 low =  ((I915_READ(low_frame) & PIPE_FRAME_LOW_MASK) >>
 397                         PIPE_FRAME_LOW_SHIFT);
 398                 high2 = ((I915_READ(high_frame) & PIPE_FRAME_HIGH_MASK) >>
 399                          PIPE_FRAME_HIGH_SHIFT);
 400         } while (high1 != high2);
 401
 402         count = (high1 << 8) | low;
 403
 404         /*
 405          * If we're in the middle of the vblank period, the
 406          * above regs won't have been updated yet, so return
 407          * an incremented count to stay accurate
 408          */
 409 #if 0
 410         if (i915_in_vblank(dev, pipe))
 411                 count++;
 412 #endif
 413         /* count may be reset by other driver(e.g. 2D driver),
 414            we have no way to know if it is wrapped or resetted
 415            when count is zero. do a rough guess.
 416         */
 417         if (count == 0 && dev->last_vblank[pipe] < dev->max_vblank_count/2)
 418                 dev->last_vblank[pipe] = 0;
 419
 420         return count;
 421 }
 422
 423 #define HOTPLUG_CMD_CRT 1
 424 #define HOTPLUG_CMD_CRT_DIS 2
 425 #define HOTPLUG_CMD_SDVOB 4
 426 #define HOTPLUG_CMD_SDVOC 8
 427
 428 static struct drm_device *hotplug_dev;
 429 static int hotplug_cmd = 0;
 430 static spinlock_t hotplug_lock = SPIN_LOCK_UNLOCKED;
 431
 432 static void i915_hotplug_crt(struct drm_device *dev, bool isconnected)
 433 {
 434         struct drm_output *output;
 435         struct intel_output *iout;
 436
 437         mutex_lock(&dev->mode_config.mutex);
 438
 439         /* find the crt output */
 440         list_for_each_entry(output, &dev->mode_config.output_list, head) {
 441                 iout = output->driver_private;
 442                 if (iout->type == INTEL_OUTPUT_ANALOG)
 443                         break;
 444                 else
 445                         iout = 0;
 446         }
 447
 448         if (iout == 0)
 449                 goto unlock;
 450
 451         drm_hotplug_stage_two(dev, output, isconnected);
 452
 453 unlock:
 454         mutex_unlock(&dev->mode_config.mutex);
 455 }
 456
 457 static void i915_hotplug_sdvo(struct drm_device *dev, int sdvoB)
 458 {
 459         struct drm_output *output = 0;
 460         enum drm_output_status status;
 461
 462         mutex_lock(&dev->mode_config.mutex);
 463
 464         output = intel_sdvo_find(dev, sdvoB);
 465
 466         if (!output)
 467                 goto unlock;
 468
 469         status = output->funcs->detect(output);
 470
 471         if (status != output_status_connected)
 472                 drm_hotplug_stage_two(dev, output, false);
 473         else
 474                 drm_hotplug_stage_two(dev, output, true);
 475
 476         intel_sdvo_set_hotplug(output, 1);
 477
 478 unlock:
 479         mutex_unlock(&dev->mode_config.mutex);
 480 }
 481 /*
 482  * This code is called in a more safe envirmoent to handle the hotplugs.
 483  * Add code here for hotplug love to userspace.
 484  */
 485 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
 486 static void i915_hotplug_work_func(void *work)
 487 #else
 488 static void i915_hotplug_work_func(struct work_struct *work)
 489 #endif
 490 {
 491         struct drm_device *dev = hotplug_dev;
 492         int crt;
 493         int crtDis;
 494         int sdvoB;
 495         int sdvoC;
 496
 497         spin_lock(&hotplug_lock);
 498         crt = hotplug_cmd & HOTPLUG_CMD_CRT;
 499         crtDis = hotplug_cmd & HOTPLUG_CMD_CRT_DIS;
 500         sdvoB = hotplug_cmd & HOTPLUG_CMD_SDVOB;
 501         sdvoC = hotplug_cmd & HOTPLUG_CMD_SDVOC;
 502         hotplug_cmd = 0;
 503         spin_unlock(&hotplug_lock);
 504
 505         if (crt)
 506                 i915_hotplug_crt(dev, true);
 507         if (crtDis)
 508                 i915_hotplug_crt(dev, false);
 509
 510         if (sdvoB)
 511                 i915_hotplug_sdvo(dev, 1);
 512
 513         if (sdvoC)
 514                 i915_hotplug_sdvo(dev, 0);
 515
 516         drm_handle_hotplug(dev);
 517 }
 518
 519 static int i915_run_hotplug_tasklet(struct drm_device *dev, uint32_t stat)
 520 {
 521 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
 522         static DECLARE_WORK(hotplug, i915_hotplug_work_func, NULL);
 523 #else
 524         static DECLARE_WORK(hotplug, i915_hotplug_work_func);
 525 #endif
 526         struct drm_i915_private *dev_priv = dev->dev_private;
 527
 528         hotplug_dev = dev;
 529
 530         if (stat & CRT_HOTPLUG_INT_STATUS) {
 531                 DRM_DEBUG("CRT event\n");
 532
 533                 if (stat & CRT_HOTPLUG_MONITOR_MASK) {
 534                         spin_lock(&hotplug_lock);
 535                         hotplug_cmd |= HOTPLUG_CMD_CRT;
 536                         spin_unlock(&hotplug_lock);
 537                 } else {
 538                         spin_lock(&hotplug_lock);
 539                         hotplug_cmd |= HOTPLUG_CMD_CRT_DIS;
 540                         spin_unlock(&hotplug_lock);
 541                 }
 542         }
 543
 544         if (stat & SDVOB_HOTPLUG_INT_STATUS) {
 545                 DRM_DEBUG("sDVOB event\n");
 546
 547                 spin_lock(&hotplug_lock);
 548                 hotplug_cmd |= HOTPLUG_CMD_SDVOB;
 549                 spin_unlock(&hotplug_lock);
 550         }
 551
 552         if (stat & SDVOC_HOTPLUG_INT_STATUS) {
 553                 DRM_DEBUG("sDVOC event\n");
 554
 555                 spin_lock(&hotplug_lock);
 556                 hotplug_cmd |= HOTPLUG_CMD_SDVOC;
 557                 spin_unlock(&hotplug_lock);
 558         }
 559
 560         queue_work(dev_priv->wq, &hotplug);
 561
 562         return 0;
 563 }
 564
 565 irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
 566 {
 567         struct drm_device *dev = (struct drm_device *) arg;
 568         struct drm_i915_master_private *master_priv;
 569         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
 570         u32 iir;
 571         u32 pipea_stats, pipeb_stats;
 572         int hotplug = 0;
 573         int vblank = 0;
 574
 575         /* On i8xx/i915 hw the IIR and IER are 16bit on i9xx its 32bit */
 576         if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev))
 577                 iir = I915_READ(I915REG_INT_IDENTITY_R);
 578         else
 579                 iir = I915_READ16(I915REG_INT_IDENTITY_R);
 580
 581         iir &= (dev_priv->irq_enable_reg | I915_USER_INTERRUPT);
 582
 583 #if 0
 584         DRM_DEBUG("flag=%08x\n", iir);
 585 #endif
 586         if (iir == 0) {
 587                 DRM_DEBUG ("iir 0x%08x im 0x%08x ie 0x%08x pipea 0x%08x pipeb 0x%08x\n",
 588                            iir,
 589                            I915_READ(I915REG_INT_MASK_R),
 590                            I915_READ(I915REG_INT_ENABLE_R),
 591                            I915_READ(I915REG_PIPEASTAT),
 592                            I915_READ(I915REG_PIPEBSTAT));
 593                 return IRQ_NONE;
 594         }
 595
 596         /*
 597          * Clear the PIPE(A|B)STAT regs before the IIR otherwise
 598          * we may get extra interrupts.
 599          */
 600         if (iir & I915_DISPLAY_PIPE_A_EVENT_INTERRUPT) {
 601                 pipea_stats = I915_READ(I915REG_PIPEASTAT);
 602                 if (pipea_stats & (I915_START_VBLANK_INTERRUPT_STATUS|
 603                                    I915_VBLANK_INTERRUPT_STATUS))
 604                 {
 605                         vblank++;
 606                         drm_handle_vblank(dev, i915_get_plane(dev, 0));
 607                 }
 608
 609                 /* This is a global event, and not a pipe A event */
 610                 if (pipea_stats & I915_HOTPLUG_INTERRUPT_STATUS)
 611                         hotplug = 1;
 612
 613                 I915_WRITE(I915REG_PIPEASTAT, pipea_stats);
 614         }
 615
 616         if (iir & I915_DISPLAY_PIPE_B_EVENT_INTERRUPT) {
 617                 pipeb_stats = I915_READ(I915REG_PIPEBSTAT);
 618                 if (pipeb_stats & (I915_START_VBLANK_INTERRUPT_STATUS|
 619                                    I915_VBLANK_INTERRUPT_STATUS))
 620                 {
 621                         vblank++;
 622                         drm_handle_vblank(dev, i915_get_plane(dev, 1));
 623                 }
 624                 I915_WRITE(I915REG_PIPEBSTAT, pipeb_stats);
 625         }
 626
 627         /* Clear the generated interrupt */
 628         if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev)) {
 629                 I915_WRITE(I915REG_INT_IDENTITY_R, iir);
 630                 (void) I915_READ(I915REG_INT_IDENTITY_R);
 631         } else {
 632                 I915_WRITE16(I915REG_INT_IDENTITY_R, iir);
 633                 (void) I915_READ16(I915REG_INT_IDENTITY_R);
 634         }
 635
 636         if (dev->primary->master) {
 637                 master_priv = dev->primary->master->driver_priv;
 638                 master_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
 639         }
 640
 641         if (iir & I915_USER_INTERRUPT) {
 642                 DRM_WAKEUP(&dev_priv->irq_queue);
 643 #ifdef I915_HAVE_FENCE
 644                 i915_fence_handler(dev);
 645 #endif
 646         }
 647
 648         if (vblank) {
 649                 if (dev_priv->swaps_pending > 0)
 650                         drm_locked_tasklet(dev, i915_vblank_tasklet);
 651         }
 652
 653         if ((iir & I915_DISPLAY_PORT_INTERRUPT) || hotplug) {
 654                 u32 temp2 = 0;
 655
 656                 DRM_INFO("Hotplug event received\n");
 657
 658                 if (!IS_I9XX(dev) || IS_I915G(dev) || IS_I915GM(dev)) {
 659                         temp2 |= SDVOB_HOTPLUG_INT_STATUS |
 660                                  SDVOC_HOTPLUG_INT_STATUS;
 661                 } else {
 662                         temp2 = I915_READ(PORT_HOTPLUG_STAT);
 663
 664                         I915_WRITE(PORT_HOTPLUG_STAT, temp2);
 665                 }
 666                 i915_run_hotplug_tasklet(dev, temp2);
 667         }
 668
 669         return IRQ_HANDLED;
 670 }
 671
 672 int i915_emit_irq(struct drm_device *dev)
 673 {
 674         struct drm_i915_private *dev_priv = dev->dev_private;
 675         RING_LOCALS;
 676
 677         i915_kernel_lost_context(dev);
 678
 679         DRM_DEBUG("\n");
 680
 681         i915_emit_breadcrumb(dev);
 682
 683         BEGIN_LP_RING(2);
 684         OUT_RING(0);
 685         OUT_RING(GFX_OP_USER_INTERRUPT);
 686         ADVANCE_LP_RING();
 687
 688         return dev_priv->counter;
 689 }
 690
 691 void i915_user_irq_on(struct drm_device *dev)
 692 {
 693         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
 694
 695         DRM_SPINLOCK(&dev_priv->user_irq_lock);
 696         if (dev_priv->irq_enabled && (++dev_priv->user_irq_refcount == 1)){
 697                 dev_priv->irq_enable_reg |= I915_USER_INTERRUPT;
 698                 if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev))
 699                         I915_WRITE(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
 700                 else
 701                         I915_WRITE16(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
 702         }
 703         DRM_SPINUNLOCK(&dev_priv->user_irq_lock);
 704
 705 }
 706
 707 void i915_user_irq_off(struct drm_device *dev)
 708 {
 709         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
 710
 711         DRM_SPINLOCK(&dev_priv->user_irq_lock);
 712         if (dev_priv->irq_enabled && (--dev_priv->user_irq_refcount == 0)) {
 713                 //              dev_priv->irq_enable_reg &= ~I915_USER_INTERRUPT;
 714                 //              if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev))
 715                 //                      I915_WRITE(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
 716                 //              else
 717                 //                      I915_WRITE16(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
 718         }
 719         DRM_SPINUNLOCK(&dev_priv->user_irq_lock);
 720 }
 721
 722
 723 static int i915_wait_irq(struct drm_device * dev, int irq_nr)
 724 {
 725         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
 726         struct drm_i915_master_private *master_priv;
 727         int ret = 0;
 728
 729         DRM_DEBUG("irq_nr=%d breadcrumb=%d\n", irq_nr,
 730                   READ_BREADCRUMB(dev_priv));
 731
 732         if (READ_BREADCRUMB(dev_priv) >= irq_nr)
 733                 return 0;
 734
 735         i915_user_irq_on(dev);
 736         DRM_WAIT_ON(ret, dev_priv->irq_queue, 3 * DRM_HZ,
 737                     READ_BREADCRUMB(dev_priv) >= irq_nr);
 738         i915_user_irq_off(dev);
 739
 740         if (ret == -EBUSY) {
 741                 DRM_ERROR("EBUSY -- rec: %d emitted: %d\n",
 742                           READ_BREADCRUMB(dev_priv), (int)dev_priv->counter);
 743         }
 744
 745         if (dev->primary->master) {
 746                 master_priv = dev->primary->master->driver_priv;
 747                 master_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
 748         }
 749
 750         return ret;
 751 }
 752
 753 /* Needs the lock as it touches the ring.
 754  */
 755 int i915_irq_emit(struct drm_device *dev, void *data,
 756                          struct drm_file *file_priv)
 757 {
 758         struct drm_i915_private *dev_priv = dev->dev_private;
 759         struct drm_i915_irq_emit *emit = data;
 760         int result;
 761
 762         LOCK_TEST_WITH_RETURN(dev, file_priv);
 763
 764         if (!dev_priv) {
 765                 DRM_ERROR("called with no initialization\n");
 766                 return -EINVAL;
 767         }
 768
 769         result = i915_emit_irq(dev);
 770
 771         if (DRM_COPY_TO_USER(emit->irq_seq, &result, sizeof(int))) {
 772                 DRM_ERROR("copy_to_user\n");
 773                 return -EFAULT;
 774         }
 775
 776         return 0;
 777 }
 778
 779 /* Doesn't need the hardware lock.
 780  */
 781 int i915_irq_wait(struct drm_device *dev, void *data,
 782                   struct drm_file *file_priv)
 783 {
 784         struct drm_i915_private *dev_priv = dev->dev_private;
 785         struct drm_i915_irq_wait *irqwait = data;
 786
 787         if (!dev_priv) {
 788                 DRM_ERROR("called with no initialization\n");
 789                 return -EINVAL;
 790         }
 791
 792         return i915_wait_irq(dev, irqwait->irq_seq);
 793 }
 794
 795 int i915_enable_vblank(struct drm_device *dev, int plane)
 796 {
 797         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
 798         int pipe = i915_get_pipe(dev, plane);
 799         u32     pipestat_reg = 0;
 800         u32     pipestat;
 801
 802         switch (pipe) {
 803         case 0:
 804                 pipestat_reg = I915REG_PIPEASTAT;
 805                 dev_priv->irq_enable_reg |= I915_DISPLAY_PIPE_A_EVENT_INTERRUPT;
 806                 break;
 807         case 1:
 808                 pipestat_reg = I915REG_PIPEBSTAT;
 809                 dev_priv->irq_enable_reg |= I915_DISPLAY_PIPE_B_EVENT_INTERRUPT;
 810                 break;
 811         default:
 812                 DRM_ERROR("tried to enable vblank on non-existent pipe %d\n",
 813                           pipe);
 814                 break;
 815         }
 816
 817         if (pipestat_reg)
 818         {
 819                 pipestat = I915_READ (pipestat_reg);
 820                 /*
 821                  * Older chips didn't have the start vblank interrupt,
 822                  * but
 823                  */
 824                 if (IS_I965G (dev))
 825                         pipestat |= I915_START_VBLANK_INTERRUPT_ENABLE;
 826                 else
 827                         pipestat |= I915_VBLANK_INTERRUPT_ENABLE;
 828                 /*
 829                  * Clear any pending status
 830                  */
 831                 pipestat |= (I915_START_VBLANK_INTERRUPT_STATUS |
 832                              I915_VBLANK_INTERRUPT_STATUS);
 833                 I915_WRITE(pipestat_reg, pipestat);
 834         }
 835
 836         if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev))
 837                 I915_WRITE(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
 838         else
 839                 I915_WRITE16(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
 840
 841
 842         return 0;
 843 }
 844
 845 void i915_disable_vblank(struct drm_device *dev, int plane)
 846 {
 847         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
 848         int pipe = i915_get_pipe(dev, plane);
 849         u32     pipestat_reg = 0;
 850         u32     pipestat;
 851
 852         switch (pipe) {
 853         case 0:
 854                 pipestat_reg = I915REG_PIPEASTAT;
 855                 dev_priv->irq_enable_reg &= ~I915_DISPLAY_PIPE_A_EVENT_INTERRUPT;
 856                 break;
 857         case 1:
 858                 pipestat_reg = I915REG_PIPEBSTAT;
 859                 dev_priv->irq_enable_reg &= ~I915_DISPLAY_PIPE_B_EVENT_INTERRUPT;
 860                 break;
 861         default:
 862                 DRM_ERROR("tried to disable vblank on non-existent pipe %d\n",
 863                           pipe);
 864                 break;
 865         }
 866
 867         if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev))
 868                 I915_WRITE(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
 869         else
 870                 I915_WRITE16(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
 871
 872         if (pipestat_reg)
 873         {
 874                 pipestat = I915_READ (pipestat_reg);
 875                 pipestat &= ~(I915_START_VBLANK_INTERRUPT_ENABLE |
 876                               I915_VBLANK_INTERRUPT_ENABLE);
 877                 /*
 878                  * Clear any pending status
 879                  */
 880                 pipestat |= (I915_START_VBLANK_INTERRUPT_STATUS |
 881                              I915_VBLANK_INTERRUPT_STATUS);
 882                 I915_WRITE(pipestat_reg, pipestat);
 883         }
 884 }
 885
 886 void i915_enable_interrupt (struct drm_device *dev)
 887 {
 888         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
 889         struct drm_output *o;
 890
 891         dev_priv->irq_enable_reg |= I915_USER_INTERRUPT;
 892
 893         if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev)) {
 894                 if (dev->mode_config.num_output)
 895                         dev_priv->irq_enable_reg |= I915_DISPLAY_PORT_INTERRUPT;
 896         } else {
 897                 if (dev->mode_config.num_output)
 898                         dev_priv->irq_enable_reg |= I915_DISPLAY_PIPE_A_EVENT_INTERRUPT;
 899
 900                 /* Enable global interrupts for hotplug - not a pipeA event */
 901                 I915_WRITE(I915REG_PIPEASTAT, I915_READ(I915REG_PIPEASTAT) | I915_HOTPLUG_INTERRUPT_ENABLE | I915_HOTPLUG_CLEAR);
 902         }
 903
 904         if (dev_priv->irq_enable_reg & (I915_DISPLAY_PORT_INTERRUPT | I915_DISPLAY_PIPE_A_EVENT_INTERRUPT)) {
 905                 u32 temp = 0;
 906
 907                 if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev)) {
 908                         temp = I915_READ(PORT_HOTPLUG_EN);
 909
 910                         /* Activate the CRT */
 911                         temp |= CRT_HOTPLUG_INT_EN;
 912                 }
 913
 914                 if (IS_I9XX(dev)) {
 915                         /* SDVOB */
 916                         o = intel_sdvo_find(dev, 1);
 917                         if (o && intel_sdvo_supports_hotplug(o)) {
 918                                 intel_sdvo_set_hotplug(o, 1);
 919                                 temp |= SDVOB_HOTPLUG_INT_EN;
 920                         }
 921
 922                         /* SDVOC */
 923                         o = intel_sdvo_find(dev, 0);
 924                         if (o && intel_sdvo_supports_hotplug(o)) {
 925                                 intel_sdvo_set_hotplug(o, 1);
 926                                 temp |= SDVOC_HOTPLUG_INT_EN;
 927                         }
 928
 929                         I915_WRITE(SDVOB, I915_READ(SDVOB) | SDVO_INTERRUPT_ENABLE);
 930                         I915_WRITE(SDVOC, I915_READ(SDVOC) | SDVO_INTERRUPT_ENABLE);
 931                 } else {
 932                         /* DVO ???? */
 933                 }
 934
 935                 if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev)) {
 936                         I915_WRITE(PORT_HOTPLUG_EN, temp);
 937
 938                         DRM_DEBUG("HEN %08x\n",I915_READ(PORT_HOTPLUG_EN));
 939                         DRM_DEBUG("HST %08x\n",I915_READ(PORT_HOTPLUG_STAT));
 940
 941                         I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));
 942                 }
 943         }
 944
 945         if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev))
 946                 I915_WRITE(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
 947         else
 948                 I915_WRITE16(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
 949
 950         dev_priv->irq_enabled = 1;
 951 }
 952
 953 /* Set the vblank monitor pipe
 954  */
 955 int i915_vblank_pipe_set(struct drm_device *dev, void *data,
 956                          struct drm_file *file_priv)
 957 {
 958         struct drm_i915_private *dev_priv = dev->dev_private;
 959         struct drm_i915_vblank_pipe *pipe = data;
 960
 961         if (!dev_priv) {
 962                 DRM_ERROR("called with no initialization\n");
 963                 return -EINVAL;
 964         }
 965
 966         if (pipe->pipe & ~(DRM_I915_VBLANK_PIPE_A|DRM_I915_VBLANK_PIPE_B)) {
 967                 DRM_ERROR("called with invalid pipe 0x%x\n", pipe->pipe);
 968                 return -EINVAL;
 969         }
 970
 971         dev_priv->vblank_pipe = pipe->pipe;
 972
 973         return 0;
 974 }
 975
 976 int i915_vblank_pipe_get(struct drm_device *dev, void *data,
 977                          struct drm_file *file_priv)
 978 {
 979         struct drm_i915_private *dev_priv = dev->dev_private;
 980         struct drm_i915_vblank_pipe *pipe = data;
 981         u16 flag;
 982
 983         if (!dev_priv) {
 984                 DRM_ERROR("called with no initialization\n");
 985                 return -EINVAL;
 986         }
 987
 988         if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev))
 989                 flag = I915_READ(I915REG_INT_ENABLE_R);
 990         else
 991                 flag = I915_READ16(I915REG_INT_ENABLE_R);
 992
 993         pipe->pipe = 0;
 994         if (flag & I915_DISPLAY_PIPE_A_EVENT_INTERRUPT)
 995                 pipe->pipe |= DRM_I915_VBLANK_PIPE_A;
 996         if (flag & I915_DISPLAY_PIPE_B_EVENT_INTERRUPT)
 997                 pipe->pipe |= DRM_I915_VBLANK_PIPE_B;
 998
 999         return 0;
1000 }
1001
1002 /**
1003  * Schedule buffer swap at given vertical blank.
1004  */
1005 int i915_vblank_swap(struct drm_device *dev, void *data,
1006                      struct drm_file *file_priv)
1007 {
1008         struct drm_i915_private *dev_priv = dev->dev_private;
1009         struct drm_i915_master_private *master_priv;
1010         struct drm_i915_vblank_swap *swap = data;
1011         struct drm_i915_vbl_swap *vbl_swap;
1012         unsigned int pipe, seqtype, curseq, plane;
1013         unsigned long irqflags;
1014         struct list_head *list;
1015         int ret;
1016
1017         if (!dev_priv) {
1018                 DRM_ERROR("%s called with no initialization\n", __func__);
1019                 return -EINVAL;
1020         }
1021
1022         if (!dev->primary->master)
1023                 return -EINVAL;
1024
1025         master_priv = dev->primary->master->driver_priv;
1026
1027         if (master_priv->sarea_priv->rotation) {
1028                 DRM_DEBUG("Rotation not supported\n");
1029                 return -EINVAL;
1030         }
1031
1032         if (swap->seqtype & ~(_DRM_VBLANK_RELATIVE | _DRM_VBLANK_ABSOLUTE |
1033                              _DRM_VBLANK_SECONDARY | _DRM_VBLANK_NEXTONMISS |
1034                              _DRM_VBLANK_FLIP)) {
1035                 DRM_ERROR("Invalid sequence type 0x%x\n", swap->seqtype);
1036                 return -EINVAL;
1037         }
1038
1039         plane = (swap->seqtype & _DRM_VBLANK_SECONDARY) ? 1 : 0;
1040         pipe = i915_get_pipe(dev, plane);
1041
1042         seqtype = swap->seqtype & (_DRM_VBLANK_RELATIVE | _DRM_VBLANK_ABSOLUTE);
1043
1044         if (!(dev_priv->vblank_pipe & (1 << pipe))) {
1045                 DRM_ERROR("Invalid pipe %d\n", pipe);
1046                 return -EINVAL;
1047         }
1048
1049         DRM_SPINLOCK_IRQSAVE(&dev->drw_lock, irqflags);
1050
1051         /* It makes no sense to schedule a swap for a drawable that doesn't have
1052          * valid information at this point. E.g. this could mean that the X
1053          * server is too old to push drawable information to the DRM, in which
1054          * case all such swaps would become ineffective.
1055          */
1056         if (!drm_get_drawable_info(dev, swap->drawable)) {
1057                 DRM_SPINUNLOCK_IRQRESTORE(&dev->drw_lock, irqflags);
1058                 DRM_DEBUG("Invalid drawable ID %d\n", swap->drawable);
1059                 return -EINVAL;
1060         }
1061
1062         DRM_SPINUNLOCK_IRQRESTORE(&dev->drw_lock, irqflags);
1063
1064         drm_update_vblank_count(dev, pipe);
1065         curseq = drm_vblank_count(dev, pipe);
1066
1067         if (seqtype == _DRM_VBLANK_RELATIVE)
1068                 swap->sequence += curseq;
1069
1070         if ((curseq - swap->sequence) <= (1<<23)) {
1071                 if (swap->seqtype & _DRM_VBLANK_NEXTONMISS) {
1072                         swap->sequence = curseq + 1;
1073                 } else {
1074                         DRM_DEBUG("Missed target sequence\n");
1075                         return -EINVAL;
1076                 }
1077         }
1078
1079         if (swap->seqtype & _DRM_VBLANK_FLIP) {
1080                 swap->sequence--;
1081
1082                 if ((curseq - swap->sequence) <= (1<<23)) {
1083                         struct drm_drawable_info *drw;
1084
1085                         LOCK_TEST_WITH_RETURN(dev, file_priv);
1086
1087                         DRM_SPINLOCK_IRQSAVE(&dev->drw_lock, irqflags);
1088
1089                         drw = drm_get_drawable_info(dev, swap->drawable);
1090
1091                         if (!drw) {
1092                                 DRM_SPINUNLOCK_IRQRESTORE(&dev->drw_lock,
1093                                     irqflags);
1094                                 DRM_DEBUG("Invalid drawable ID %d\n",
1095                                           swap->drawable);
1096                                 return -EINVAL;
1097                         }
1098
1099                         i915_dispatch_vsync_flip(dev, drw, plane);
1100
1101                         DRM_SPINUNLOCK_IRQRESTORE(&dev->drw_lock, irqflags);
1102
1103                         return 0;
1104                 }
1105         }
1106
1107         DRM_SPINLOCK_IRQSAVE(&dev_priv->swaps_lock, irqflags);
1108
1109         list_for_each(list, &dev_priv->vbl_swaps.head) {
1110                 vbl_swap = list_entry(list, struct drm_i915_vbl_swap, head);
1111
1112                 if (vbl_swap->drw_id == swap->drawable &&
1113                     vbl_swap->plane == plane &&
1114                     vbl_swap->sequence == swap->sequence) {
1115                         vbl_swap->flip = (swap->seqtype & _DRM_VBLANK_FLIP);
1116                         DRM_SPINUNLOCK_IRQRESTORE(&dev_priv->swaps_lock, irqflags);
1117                         DRM_DEBUG("Already scheduled\n");
1118                         return 0;
1119                 }
1120         }
1121
1122         DRM_SPINUNLOCK_IRQRESTORE(&dev_priv->swaps_lock, irqflags);
1123
1124         if (dev_priv->swaps_pending >= 100) {
1125                 DRM_DEBUG("Too many swaps queued\n");
1126                 return -EBUSY;
1127         }
1128
1129         vbl_swap = drm_calloc(1, sizeof(*vbl_swap), DRM_MEM_DRIVER);
1130
1131         if (!vbl_swap) {
1132                 DRM_ERROR("Failed to allocate memory to queue swap\n");
1133                 return -ENOMEM;
1134         }
1135
1136         DRM_DEBUG("\n");
1137
1138         ret = drm_vblank_get(dev, pipe);
1139         if (ret) {
1140                 drm_free(vbl_swap, sizeof(*vbl_swap), DRM_MEM_DRIVER);
1141                 return ret;
1142         }
1143
1144         vbl_swap->drw_id = swap->drawable;
1145         vbl_swap->plane = plane;
1146         vbl_swap->sequence = swap->sequence;
1147         vbl_swap->flip = (swap->seqtype & _DRM_VBLANK_FLIP);
1148         vbl_swap->minor = file_priv->minor;
1149
1150         if (vbl_swap->flip)
1151                 swap->sequence++;
1152
1153         DRM_SPINLOCK_IRQSAVE(&dev_priv->swaps_lock, irqflags);
1154
1155         list_add_tail(&vbl_swap->head, &dev_priv->vbl_swaps.head);
1156         dev_priv->swaps_pending++;
1157
1158         DRM_SPINUNLOCK_IRQRESTORE(&dev_priv->swaps_lock, irqflags);
1159
1160         return 0;
1161 }
1162
1163 /* drm_dma.h hooks
1164 */
1165 void i915_driver_irq_preinstall(struct drm_device * dev)
1166 {
1167         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
1168
1169         I915_WRITE16(I915REG_HWSTAM, 0xeffe);
1170         if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev)) {
1171                 I915_WRITE(I915REG_INT_MASK_R, 0x0);
1172                 I915_WRITE(I915REG_INT_ENABLE_R, 0x0);
1173         } else {
1174                 I915_WRITE16(I915REG_INT_MASK_R, 0x0);
1175                 I915_WRITE16(I915REG_INT_ENABLE_R, 0x0);
1176         }
1177
1178 }
1179
1180 int i915_driver_irq_postinstall(struct drm_device * dev)
1181 {
1182         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
1183         int ret, num_pipes = 2;
1184
1185         DRM_SPININIT(&dev_priv->swaps_lock, "swap");
1186         INIT_LIST_HEAD(&dev_priv->vbl_swaps.head);
1187         dev_priv->swaps_pending = 0;
1188
1189         DRM_SPININIT(&dev_priv->user_irq_lock, "userirq");
1190         dev_priv->user_irq_refcount = 0;
1191         dev_priv->irq_enable_reg = 0;
1192
1193         ret = drm_vblank_init(dev, num_pipes);
1194         if (ret)
1195                 return ret;
1196
1197         ret = drm_hotplug_init(dev);
1198         if (ret)
1199                 return ret;
1200
1201         dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
1202
1203         i915_enable_interrupt(dev);
1204         DRM_INIT_WAITQUEUE(&dev_priv->irq_queue);
1205
1206         /*
1207          * Initialize the hardware status page IRQ location.
1208          */
1209
1210         I915_WRITE(I915REG_INSTPM, (1 << 5) | (1 << 21));
1211         return 0;
1212 }
1213
1214 void i915_driver_irq_uninstall(struct drm_device * dev)
1215 {
1216         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
1217         u32 temp;
1218
1219         if (!dev_priv)
1220                 return;
1221
1222         dev_priv->irq_enabled = 0;
1223
1224         temp = I915_READ(I915REG_PIPEASTAT);
1225         I915_WRITE(I915REG_PIPEASTAT, temp);
1226         temp = I915_READ(I915REG_PIPEBSTAT);
1227         I915_WRITE(I915REG_PIPEBSTAT, temp);
1228         if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev)) {
1229                 I915_WRITE(I915REG_HWSTAM, 0xffffffff);
1230                 I915_WRITE(I915REG_INT_MASK_R, 0xffffffff);
1231                 I915_WRITE(I915REG_INT_ENABLE_R, 0x0);
1232
1233                 temp = I915_READ(I915REG_INT_IDENTITY_R);
1234                 I915_WRITE(I915REG_INT_IDENTITY_R, temp);
1235         } else {
1236                 I915_WRITE16(I915REG_HWSTAM, 0xffff);
1237                 I915_WRITE16(I915REG_INT_MASK_R, 0xffff);
1238                 I915_WRITE16(I915REG_INT_ENABLE_R, 0x0);
1239
1240                 temp = I915_READ16(I915REG_INT_IDENTITY_R);
1241                 I915_WRITE16(I915REG_INT_IDENTITY_R, temp);
1242         }
1243 }