1 /* i915_irq.c -- IRQ support for the I915 -*- linux-c -*-
4 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the
9 * "Software"), to deal in the Software without restriction, including
10 * without limitation the rights to use, copy, modify, merge, publish,
11 * distribute, sub license, and/or sell copies of the Software, and to
12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial portions
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
23 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
34 #include "intel_drv.h"
36 #define USER_INT_FLAG (1<<1)
37 #define VSYNC_PIPEB_FLAG (1<<5)
38 #define VSYNC_PIPEA_FLAG (1<<7)
39 #define HOTPLUG_FLAG (1 << 17)
41 #define MAX_NOPID ((u32)~0)
44 * i915_get_pipe - return the the pipe associated with a given plane
46 * @plane: plane to look for
48 * The Intel Mesa & 2D drivers call the vblank routines with a plane number
49 * rather than a pipe number, since they may not always be equal. This routine
50 * maps the given @plane back to a pipe number.
53 i915_get_pipe(struct drm_device *dev, int plane)
55 struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
58 dspcntr = plane ? I915_READ(DSPBCNTR) : I915_READ(DSPACNTR);
60 return dspcntr & DISPPLANE_SEL_PIPE_MASK ? 1 : 0;
64 * i915_get_plane - return the the plane associated with a given pipe
66 * @pipe: pipe to look for
68 * The Intel Mesa & 2D drivers call the vblank routines with a plane number
69 * rather than a plane number, since they may not always be equal. This routine
70 * maps the given @pipe back to a plane number.
73 i915_get_plane(struct drm_device *dev, int pipe)
75 if (i915_get_pipe(dev, 0) == pipe)
81 * i915_pipe_enabled - check if a pipe is enabled
83 * @pipe: pipe to check
85 * Reading certain registers when the pipe is disabled can hang the chip.
86 * Use this routine to make sure the PLL is running and the pipe is active
87 * before reading such registers if unsure.
90 i915_pipe_enabled(struct drm_device *dev, int pipe)
92 struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
93 unsigned long pipeconf = pipe ? PIPEBCONF : PIPEACONF;
95 if (I915_READ(pipeconf) & PIPEACONF_ENABLE)
102 * Emit a synchronous flip.
104 * This function must be called with the drawable spinlock held.
107 i915_dispatch_vsync_flip(struct drm_device *dev, struct drm_drawable_info *drw,
110 struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
111 struct drm_i915_sarea *sarea_priv = master_priv->sarea_priv;
113 int pf_planes = 1 << plane;
115 DRM_SPINLOCK_ASSERT(&dev->drw_lock);
117 /* If the window is visible on the other plane, we have to flip on that
121 x1 = sarea_priv->planeA_x;
122 y1 = sarea_priv->planeA_y;
123 x2 = x1 + sarea_priv->planeA_w;
124 y2 = y1 + sarea_priv->planeA_h;
126 x1 = sarea_priv->planeB_x;
127 y1 = sarea_priv->planeB_y;
128 x2 = x1 + sarea_priv->planeB_w;
129 y2 = y1 + sarea_priv->planeB_h;
132 if (x2 > 0 && y2 > 0) {
133 int i, num_rects = drw->num_rects;
134 struct drm_clip_rect *rect = drw->rects;
136 for (i = 0; i < num_rects; i++)
137 if (!(rect[i].x1 >= x2 || rect[i].y1 >= y2 ||
138 rect[i].x2 <= x1 || rect[i].y2 <= y1)) {
145 i915_dispatch_flip(dev, pf_planes, 1);
149 * Emit blits for scheduled buffer swaps.
151 * This function will be called with the HW lock held.
153 static void i915_vblank_tasklet(struct drm_device *dev)
155 struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
156 struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
157 struct list_head *list, *tmp, hits, *hit;
158 int nhits, nrects, slice[2], upper[2], lower[2], i, num_pages;
160 struct drm_drawable_info *drw;
161 struct drm_i915_sarea *sarea_priv;
162 u32 cpp = dev_priv->cpp, offsets[3];
163 u32 cmd = (cpp == 4) ? (XY_SRC_COPY_BLT_CMD |
164 XY_SRC_COPY_BLT_WRITE_ALPHA |
165 XY_SRC_COPY_BLT_WRITE_RGB)
166 : XY_SRC_COPY_BLT_CMD;
170 counter[0] = drm_vblank_count(dev, 0);
171 counter[1] = drm_vblank_count(dev, 1);
175 INIT_LIST_HEAD(&hits);
179 /* No irqsave/restore necessary. This tasklet may be run in an
180 * interrupt context or normal context, but we don't have to worry
181 * about getting interrupted by something acquiring the lock, because
182 * we are the interrupt context thing that acquires the lock.
184 DRM_SPINLOCK(&dev_priv->swaps_lock);
186 /* Find buffer swaps scheduled for this vertical blank */
187 list_for_each_safe(list, tmp, &dev_priv->vbl_swaps.head) {
188 struct drm_i915_vbl_swap *vbl_swap =
189 list_entry(list, struct drm_i915_vbl_swap, head);
190 int pipe = i915_get_pipe(dev, vbl_swap->plane);
192 if ((counter[pipe] - vbl_swap->sequence) > (1<<23))
195 master_priv = vbl_swap->minor->master->driver_priv;
196 sarea_priv = master_priv->sarea_priv;
198 pitchropcpp = (sarea_priv->pitch * cpp) | (0xcc << 16) |
199 (cpp << 23) | (1 << 24);
202 dev_priv->swaps_pending--;
203 drm_vblank_put(dev, pipe);
205 DRM_SPINUNLOCK(&dev_priv->swaps_lock);
206 DRM_SPINLOCK(&dev->drw_lock);
208 drw = drm_get_drawable_info(dev, vbl_swap->drw_id);
211 DRM_SPINUNLOCK(&dev->drw_lock);
212 drm_free(vbl_swap, sizeof(*vbl_swap), DRM_MEM_DRIVER);
213 DRM_SPINLOCK(&dev_priv->swaps_lock);
217 list_for_each(hit, &hits) {
218 struct drm_i915_vbl_swap *swap_cmp =
219 list_entry(hit, struct drm_i915_vbl_swap, head);
220 struct drm_drawable_info *drw_cmp =
221 drm_get_drawable_info(dev, swap_cmp->drw_id);
224 drw_cmp->rects[0].y1 > drw->rects[0].y1) {
225 list_add_tail(list, hit);
230 DRM_SPINUNLOCK(&dev->drw_lock);
232 /* List of hits was empty, or we reached the end of it */
234 list_add_tail(list, hits.prev);
238 DRM_SPINLOCK(&dev_priv->swaps_lock);
241 DRM_SPINUNLOCK(&dev_priv->swaps_lock);
247 i915_kernel_lost_context(dev);
249 upper[0] = upper[1] = 0;
250 slice[0] = max(sarea_priv->planeA_h / nhits, 1);
251 slice[1] = max(sarea_priv->planeB_h / nhits, 1);
252 lower[0] = sarea_priv->planeA_y + slice[0];
253 lower[1] = sarea_priv->planeB_y + slice[0];
255 offsets[0] = sarea_priv->front_offset;
256 offsets[1] = sarea_priv->back_offset;
257 offsets[2] = sarea_priv->third_offset;
258 num_pages = sarea_priv->third_handle ? 3 : 2;
260 DRM_SPINLOCK(&dev->drw_lock);
262 /* Emit blits for buffer swaps, partitioning both outputs into as many
263 * slices as there are buffer swaps scheduled in order to avoid tearing
264 * (based on the assumption that a single buffer swap would always
265 * complete before scanout starts).
267 for (i = 0; i++ < nhits;
268 upper[0] = lower[0], lower[0] += slice[0],
269 upper[1] = lower[1], lower[1] += slice[1]) {
270 int init_drawrect = 1;
273 lower[0] = lower[1] = sarea_priv->height;
275 list_for_each(hit, &hits) {
276 struct drm_i915_vbl_swap *swap_hit =
277 list_entry(hit, struct drm_i915_vbl_swap, head);
278 struct drm_clip_rect *rect;
279 int num_rects, plane, front, back;
280 unsigned short top, bottom;
282 drw = drm_get_drawable_info(dev, swap_hit->drw_id);
287 plane = swap_hit->plane;
289 if (swap_hit->flip) {
290 i915_dispatch_vsync_flip(dev, drw, plane);
297 OUT_RING(GFX_OP_DRAWRECT_INFO);
300 OUT_RING(sarea_priv->width | sarea_priv->height << 16);
301 OUT_RING(sarea_priv->width | sarea_priv->height << 16);
306 sarea_priv->ctxOwner = DRM_KERNEL_CONTEXT;
313 bottom = lower[plane];
315 front = (master_priv->sarea_priv->pf_current_page >>
317 back = (front + 1) % num_pages;
319 for (num_rects = drw->num_rects; num_rects--; rect++) {
320 int y1 = max(rect->y1, top);
321 int y2 = min(rect->y2, bottom);
329 OUT_RING(pitchropcpp);
330 OUT_RING((y1 << 16) | rect->x1);
331 OUT_RING((y2 << 16) | rect->x2);
332 OUT_RING(offsets[front]);
333 OUT_RING((y1 << 16) | rect->x1);
334 OUT_RING(pitchropcpp & 0xffff);
335 OUT_RING(offsets[back]);
342 DRM_SPINUNLOCK(&dev->drw_lock);
344 list_for_each_safe(hit, tmp, &hits) {
345 struct drm_i915_vbl_swap *swap_hit =
346 list_entry(hit, struct drm_i915_vbl_swap, head);
350 drm_free(swap_hit, sizeof(*swap_hit), DRM_MEM_DRIVER);
354 static int i915_in_vblank(struct drm_device *dev, int pipe)
356 struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
357 unsigned long pipedsl, vblank, vtotal;
358 unsigned long vbl_start, vbl_end, cur_line;
360 pipedsl = pipe ? PIPEBDSL : PIPEADSL;
361 vblank = pipe ? VBLANK_B : VBLANK_A;
362 vtotal = pipe ? VTOTAL_B : VTOTAL_A;
364 vbl_start = I915_READ(vblank) & VBLANK_START_MASK;
365 vbl_end = (I915_READ(vblank) >> VBLANK_END_SHIFT) & VBLANK_END_MASK;
367 cur_line = I915_READ(pipedsl);
369 if (cur_line >= vbl_start)
375 u32 i915_get_vblank_counter(struct drm_device *dev, int plane)
377 struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
378 unsigned long high_frame;
379 unsigned long low_frame;
380 u32 high1, high2, low, count;
383 pipe = i915_get_pipe(dev, plane);
384 high_frame = pipe ? PIPEBFRAMEHIGH : PIPEAFRAMEHIGH;
385 low_frame = pipe ? PIPEBFRAMEPIXEL : PIPEAFRAMEPIXEL;
387 if (!i915_pipe_enabled(dev, pipe)) {
388 printk(KERN_ERR "trying to get vblank count for disabled "
394 * High & low register fields aren't synchronized, so make sure
395 * we get a low value that's stable across two reads of the high
399 high1 = ((I915_READ(high_frame) & PIPE_FRAME_HIGH_MASK) >>
400 PIPE_FRAME_HIGH_SHIFT);
401 low = ((I915_READ(low_frame) & PIPE_FRAME_LOW_MASK) >>
402 PIPE_FRAME_LOW_SHIFT);
403 high2 = ((I915_READ(high_frame) & PIPE_FRAME_HIGH_MASK) >>
404 PIPE_FRAME_HIGH_SHIFT);
405 } while (high1 != high2);
407 count = (high1 << 8) | low;
410 * If we're in the middle of the vblank period, the
411 * above regs won't have been updated yet, so return
412 * an incremented count to stay accurate
415 if (i915_in_vblank(dev, pipe))
418 /* count may be reset by other driver(e.g. 2D driver),
419 we have no way to know if it is wrapped or resetted
420 when count is zero. do a rough guess.
422 if (count == 0 && dev->last_vblank[pipe] < dev->max_vblank_count/2)
423 dev->last_vblank[pipe] = 0;
428 #define HOTPLUG_CMD_CRT 1
429 #define HOTPLUG_CMD_CRT_DIS 2
430 #define HOTPLUG_CMD_SDVOB 4
431 #define HOTPLUG_CMD_SDVOC 8
433 static struct drm_device *hotplug_dev;
434 static int hotplug_cmd = 0;
435 static spinlock_t hotplug_lock = SPIN_LOCK_UNLOCKED;
437 static void i915_hotplug_crt(struct drm_device *dev, bool connected)
439 struct drm_output *output;
440 struct intel_output *iout;
442 mutex_lock(&dev->mode_config.mutex);
444 /* find the crt output */
445 list_for_each_entry(output, &dev->mode_config.output_list, head) {
446 iout = output->driver_private;
447 if (iout->type == INTEL_OUTPUT_ANALOG)
456 drm_hotplug_stage_two(dev, output, connected);
459 mutex_unlock(&dev->mode_config.mutex);
462 static void i915_hotplug_sdvo(struct drm_device *dev, int sdvoB)
464 struct drm_output *output = 0;
465 enum drm_output_status status;
467 mutex_lock(&dev->mode_config.mutex);
469 output = intel_sdvo_find(dev, sdvoB);
472 DRM_ERROR("could not find sdvo%s output\n", sdvoB ? "B" : "C");
476 status = output->funcs->detect(output);
478 if (status != output_status_connected)
479 drm_hotplug_stage_two(dev, output, false);
481 drm_hotplug_stage_two(dev, output, true);
483 /* wierd hw bug, sdvo stop sending interupts */
484 intel_sdvo_set_hotplug(output, 1);
487 mutex_unlock(&dev->mode_config.mutex);
490 * This code is called in a more safe envirmoent to handle the hotplugs.
491 * Add code here for hotplug love to userspace.
493 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
494 static void i915_hotplug_work_func(void *work)
496 static void i915_hotplug_work_func(struct work_struct *work)
499 struct drm_device *dev = hotplug_dev;
505 spin_lock(&hotplug_lock);
506 crt = hotplug_cmd & HOTPLUG_CMD_CRT;
507 crtDis = hotplug_cmd & HOTPLUG_CMD_CRT_DIS;
508 sdvoB = hotplug_cmd & HOTPLUG_CMD_SDVOB;
509 sdvoC = hotplug_cmd & HOTPLUG_CMD_SDVOC;
511 spin_unlock(&hotplug_lock);
514 i915_hotplug_crt(dev, true);
516 i915_hotplug_crt(dev, false);
519 i915_hotplug_sdvo(dev, 1);
522 i915_hotplug_sdvo(dev, 0);
526 static int i915_run_hotplug_tasklet(struct drm_device *dev, uint32_t stat)
528 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
529 static DECLARE_WORK(hotplug, i915_hotplug_work_func, NULL);
531 static DECLARE_WORK(hotplug, i915_hotplug_work_func);
533 struct drm_i915_private *dev_priv = dev->dev_private;
537 if (stat & CRT_HOTPLUG_INT_STATUS) {
538 DRM_DEBUG("CRT event\n");
540 if (stat & CRT_HOTPLUG_MONITOR_MASK) {
541 spin_lock(&hotplug_lock);
542 hotplug_cmd |= HOTPLUG_CMD_CRT;
543 spin_unlock(&hotplug_lock);
545 spin_lock(&hotplug_lock);
546 hotplug_cmd |= HOTPLUG_CMD_CRT_DIS;
547 spin_unlock(&hotplug_lock);
551 if (stat & SDVOB_HOTPLUG_INT_STATUS) {
552 DRM_DEBUG("sDVOB event\n");
554 spin_lock(&hotplug_lock);
555 hotplug_cmd |= HOTPLUG_CMD_SDVOB;
556 spin_unlock(&hotplug_lock);
559 if (stat & SDVOC_HOTPLUG_INT_STATUS) {
560 DRM_DEBUG("sDVOC event\n");
562 spin_lock(&hotplug_lock);
563 hotplug_cmd |= HOTPLUG_CMD_SDVOC;
564 spin_unlock(&hotplug_lock);
567 queue_work(dev_priv->wq, &hotplug);
572 irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
574 struct drm_device *dev = (struct drm_device *) arg;
575 struct drm_i915_master_private *master_priv;
576 struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
579 u32 pipea_stats, pipeb_stats;
581 pipea_stats = I915_READ(I915REG_PIPEASTAT);
582 pipeb_stats = I915_READ(I915REG_PIPEBSTAT);
584 /* On i8xx hw the IIR and IER are 16bit on i9xx its 32bit */
586 temp = I915_READ(I915REG_INT_IDENTITY_R);
588 temp = I915_READ16(I915REG_INT_IDENTITY_R);
591 temp &= (dev_priv->irq_enable_reg | USER_INT_FLAG);
594 /* ugly despamification of pipeb event irq */
595 if (temp & (0xFFFFFFF ^ ((1 << 5) | (1 << 7)))) {
596 DRM_DEBUG("IIR %08x\n", temp2);
597 DRM_DEBUG("MSK %08x\n", dev_priv->irq_enable_reg | USER_INT_FLAG);
598 DRM_DEBUG("M&I %08x\n", temp);
599 DRM_DEBUG("HOT %08x\n", I915_READ(PORT_HOTPLUG_STAT));
603 DRM_DEBUG("flag=%08x\n", temp);
611 I915_WRITE(I915REG_INT_IDENTITY_R, temp);
612 (void) I915_READ(I915REG_INT_IDENTITY_R);
614 I915_WRITE16(I915REG_INT_IDENTITY_R, temp);
615 (void) I915_READ16(I915REG_INT_IDENTITY_R);
619 * Clear the PIPE(A|B)STAT regs before the IIR otherwise
620 * we may get extra interrupts.
622 if (temp & VSYNC_PIPEA_FLAG) {
623 drm_handle_vblank(dev, i915_get_plane(dev, 0));
624 I915_WRITE(I915REG_PIPEASTAT,
625 pipea_stats | I915_VBLANK_INTERRUPT_ENABLE |
629 if (temp & VSYNC_PIPEB_FLAG) {
630 drm_handle_vblank(dev, i915_get_plane(dev, 1));
631 I915_WRITE(I915REG_PIPEBSTAT,
632 pipeb_stats | I915_VBLANK_INTERRUPT_ENABLE |
636 I915_WRITE16(I915REG_INT_IDENTITY_R, temp);
637 (void) I915_READ16(I915REG_INT_IDENTITY_R); /* Flush posted write */
639 DRM_READMEMORYBARRIER();
641 temp &= (dev_priv->irq_enable_reg | USER_INT_FLAG | VSYNC_PIPEA_FLAG |
644 if (dev->primary->master) {
645 master_priv = dev->primary->master->driver_priv;
646 master_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
649 if (temp & USER_INT_FLAG) {
650 DRM_WAKEUP(&dev_priv->irq_queue);
651 #ifdef I915_HAVE_FENCE
652 i915_fence_handler(dev);
656 if (temp & (VSYNC_PIPEA_FLAG | VSYNC_PIPEB_FLAG)) {
657 if (dev_priv->swaps_pending > 0)
658 drm_locked_tasklet(dev, i915_vblank_tasklet);
661 /* for now lest just ack it */
662 if (temp & (1 << 17)) {
663 DRM_DEBUG("Hotplug event received\n");
665 temp2 = I915_READ(PORT_HOTPLUG_STAT);
667 i915_run_hotplug_tasklet(dev, temp2);
669 I915_WRITE(PORT_HOTPLUG_STAT,temp2);
675 int i915_emit_irq(struct drm_device *dev)
677 struct drm_i915_private *dev_priv = dev->dev_private;
680 i915_kernel_lost_context(dev);
684 i915_emit_breadcrumb(dev);
688 OUT_RING(GFX_OP_USER_INTERRUPT);
691 return dev_priv->counter;
694 void i915_user_irq_on(struct drm_i915_private *dev_priv)
696 DRM_SPINLOCK(&dev_priv->user_irq_lock);
697 if (dev_priv->irq_enabled && (++dev_priv->user_irq_refcount == 1)){
698 dev_priv->irq_enable_reg |= USER_INT_FLAG;
699 I915_WRITE16(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
701 DRM_SPINUNLOCK(&dev_priv->user_irq_lock);
705 void i915_user_irq_off(struct drm_i915_private *dev_priv)
707 DRM_SPINLOCK(&dev_priv->user_irq_lock);
708 if (dev_priv->irq_enabled && (--dev_priv->user_irq_refcount == 0)) {
709 // dev_priv->irq_enable_reg &= ~USER_INT_FLAG;
710 // I915_WRITE16(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
712 DRM_SPINUNLOCK(&dev_priv->user_irq_lock);
716 static int i915_wait_irq(struct drm_device * dev, int irq_nr)
718 struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
719 struct drm_i915_master_private *master_priv;
722 DRM_DEBUG("irq_nr=%d breadcrumb=%d\n", irq_nr,
723 READ_BREADCRUMB(dev_priv));
725 if (READ_BREADCRUMB(dev_priv) >= irq_nr)
728 i915_user_irq_on(dev_priv);
729 DRM_WAIT_ON(ret, dev_priv->irq_queue, 3 * DRM_HZ,
730 READ_BREADCRUMB(dev_priv) >= irq_nr);
731 i915_user_irq_off(dev_priv);
734 DRM_ERROR("EBUSY -- rec: %d emitted: %d\n",
735 READ_BREADCRUMB(dev_priv), (int)dev_priv->counter);
738 if (dev->primary->master) {
739 master_priv = dev->primary->master->driver_priv;
740 master_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
746 /* Needs the lock as it touches the ring.
748 int i915_irq_emit(struct drm_device *dev, void *data,
749 struct drm_file *file_priv)
751 struct drm_i915_private *dev_priv = dev->dev_private;
752 struct drm_i915_irq_emit *emit = data;
755 LOCK_TEST_WITH_RETURN(dev, file_priv);
758 DRM_ERROR("called with no initialization\n");
762 result = i915_emit_irq(dev);
764 if (DRM_COPY_TO_USER(emit->irq_seq, &result, sizeof(int))) {
765 DRM_ERROR("copy_to_user\n");
772 /* Doesn't need the hardware lock.
774 int i915_irq_wait(struct drm_device *dev, void *data,
775 struct drm_file *file_priv)
777 struct drm_i915_private *dev_priv = dev->dev_private;
778 struct drm_i915_irq_wait *irqwait = data;
781 DRM_ERROR("called with no initialization\n");
785 return i915_wait_irq(dev, irqwait->irq_seq);
788 int i915_enable_vblank(struct drm_device *dev, int plane)
790 struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
791 int pipe = i915_get_pipe(dev, plane);
795 dev_priv->irq_enable_reg |= VSYNC_PIPEA_FLAG;
798 dev_priv->irq_enable_reg |= VSYNC_PIPEB_FLAG;
801 DRM_ERROR("tried to enable vblank on non-existent pipe %d\n",
806 I915_WRITE16(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
811 void i915_disable_vblank(struct drm_device *dev, int plane)
813 struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
814 int pipe = i915_get_pipe(dev, plane);
818 dev_priv->irq_enable_reg &= ~VSYNC_PIPEA_FLAG;
821 dev_priv->irq_enable_reg &= ~VSYNC_PIPEB_FLAG;
824 DRM_ERROR("tried to disable vblank on non-existent pipe %d\n",
829 I915_WRITE16(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
832 void i915_enable_interrupt (struct drm_device *dev)
834 struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
835 struct drm_output *o;
837 dev_priv->irq_enable_reg |= USER_INT_FLAG;
839 if (IS_I9XX(dev) && dev->mode_config.num_output) {
840 dev_priv->irq_enable_reg |= HOTPLUG_FLAG;
842 /* Activate the CRT */
843 I915_WRITE(PORT_HOTPLUG_EN, CRT_HOTPLUG_INT_EN);
846 o = intel_sdvo_find(dev, 1);
847 if (o && intel_sdvo_supports_hotplug(o)) {
848 intel_sdvo_set_hotplug(o, 1);
849 I915_WRITE(PORT_HOTPLUG_EN, SDVOB_HOTPLUG_INT_EN);
853 o = intel_sdvo_find(dev, 0);
854 if (o && intel_sdvo_supports_hotplug(o)) {
855 intel_sdvo_set_hotplug(o, 1);
856 I915_WRITE(PORT_HOTPLUG_EN, SDVOC_HOTPLUG_INT_EN);
862 I915_WRITE(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
864 I915_WRITE16(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
867 DRM_DEBUG("HEN %08x\n",I915_READ(PORT_HOTPLUG_EN));
868 DRM_DEBUG("HST %08x\n",I915_READ(PORT_HOTPLUG_STAT));
869 DRM_DEBUG("IER %08x\n",I915_READ(I915REG_INT_ENABLE_R));
870 DRM_DEBUG("SDB %08x\n",I915_READ(SDVOB));
872 I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));
874 dev_priv->irq_enabled = 1;
877 /* Set the vblank monitor pipe
879 int i915_vblank_pipe_set(struct drm_device *dev, void *data,
880 struct drm_file *file_priv)
882 struct drm_i915_private *dev_priv = dev->dev_private;
883 struct drm_i915_vblank_pipe *pipe = data;
886 DRM_ERROR("called with no initialization\n");
890 if (pipe->pipe & ~(DRM_I915_VBLANK_PIPE_A|DRM_I915_VBLANK_PIPE_B)) {
891 DRM_ERROR("called with invalid pipe 0x%x\n", pipe->pipe);
895 dev_priv->vblank_pipe = pipe->pipe;
900 int i915_vblank_pipe_get(struct drm_device *dev, void *data,
901 struct drm_file *file_priv)
903 struct drm_i915_private *dev_priv = dev->dev_private;
904 struct drm_i915_vblank_pipe *pipe = data;
908 DRM_ERROR("called with no initialization\n");
912 flag = I915_READ(I915REG_INT_ENABLE_R);
914 if (flag & VSYNC_PIPEA_FLAG)
915 pipe->pipe |= DRM_I915_VBLANK_PIPE_A;
916 if (flag & VSYNC_PIPEB_FLAG)
917 pipe->pipe |= DRM_I915_VBLANK_PIPE_B;
923 * Schedule buffer swap at given vertical blank.
925 int i915_vblank_swap(struct drm_device *dev, void *data,
926 struct drm_file *file_priv)
928 struct drm_i915_private *dev_priv = dev->dev_private;
929 struct drm_i915_master_private *master_priv;
930 struct drm_i915_vblank_swap *swap = data;
931 struct drm_i915_vbl_swap *vbl_swap;
932 unsigned int pipe, seqtype, curseq, plane;
933 unsigned long irqflags;
934 struct list_head *list;
938 DRM_ERROR("%s called with no initialization\n", __func__);
942 if (!dev->primary->master)
945 master_priv = dev->primary->master->driver_priv;
947 if (master_priv->sarea_priv->rotation) {
948 DRM_DEBUG("Rotation not supported\n");
952 if (swap->seqtype & ~(_DRM_VBLANK_RELATIVE | _DRM_VBLANK_ABSOLUTE |
953 _DRM_VBLANK_SECONDARY | _DRM_VBLANK_NEXTONMISS |
955 DRM_ERROR("Invalid sequence type 0x%x\n", swap->seqtype);
959 plane = (swap->seqtype & _DRM_VBLANK_SECONDARY) ? 1 : 0;
960 pipe = i915_get_pipe(dev, plane);
962 seqtype = swap->seqtype & (_DRM_VBLANK_RELATIVE | _DRM_VBLANK_ABSOLUTE);
964 if (!(dev_priv->vblank_pipe & (1 << pipe))) {
965 DRM_ERROR("Invalid pipe %d\n", pipe);
969 DRM_SPINLOCK_IRQSAVE(&dev->drw_lock, irqflags);
971 /* It makes no sense to schedule a swap for a drawable that doesn't have
972 * valid information at this point. E.g. this could mean that the X
973 * server is too old to push drawable information to the DRM, in which
974 * case all such swaps would become ineffective.
976 if (!drm_get_drawable_info(dev, swap->drawable)) {
977 DRM_SPINUNLOCK_IRQRESTORE(&dev->drw_lock, irqflags);
978 DRM_DEBUG("Invalid drawable ID %d\n", swap->drawable);
982 DRM_SPINUNLOCK_IRQRESTORE(&dev->drw_lock, irqflags);
984 drm_update_vblank_count(dev, pipe);
985 curseq = drm_vblank_count(dev, pipe);
987 if (seqtype == _DRM_VBLANK_RELATIVE)
988 swap->sequence += curseq;
990 if ((curseq - swap->sequence) <= (1<<23)) {
991 if (swap->seqtype & _DRM_VBLANK_NEXTONMISS) {
992 swap->sequence = curseq + 1;
994 DRM_DEBUG("Missed target sequence\n");
999 if (swap->seqtype & _DRM_VBLANK_FLIP) {
1002 if ((curseq - swap->sequence) <= (1<<23)) {
1003 struct drm_drawable_info *drw;
1005 LOCK_TEST_WITH_RETURN(dev, file_priv);
1007 DRM_SPINLOCK_IRQSAVE(&dev->drw_lock, irqflags);
1009 drw = drm_get_drawable_info(dev, swap->drawable);
1012 DRM_SPINUNLOCK_IRQRESTORE(&dev->drw_lock,
1014 DRM_DEBUG("Invalid drawable ID %d\n",
1019 i915_dispatch_vsync_flip(dev, drw, plane);
1021 DRM_SPINUNLOCK_IRQRESTORE(&dev->drw_lock, irqflags);
1027 DRM_SPINLOCK_IRQSAVE(&dev_priv->swaps_lock, irqflags);
1029 list_for_each(list, &dev_priv->vbl_swaps.head) {
1030 vbl_swap = list_entry(list, struct drm_i915_vbl_swap, head);
1032 if (vbl_swap->drw_id == swap->drawable &&
1033 vbl_swap->plane == plane &&
1034 vbl_swap->sequence == swap->sequence) {
1035 vbl_swap->flip = (swap->seqtype & _DRM_VBLANK_FLIP);
1036 DRM_SPINUNLOCK_IRQRESTORE(&dev_priv->swaps_lock, irqflags);
1037 DRM_DEBUG("Already scheduled\n");
1042 DRM_SPINUNLOCK_IRQRESTORE(&dev_priv->swaps_lock, irqflags);
1044 if (dev_priv->swaps_pending >= 100) {
1045 DRM_DEBUG("Too many swaps queued\n");
1049 vbl_swap = drm_calloc(1, sizeof(*vbl_swap), DRM_MEM_DRIVER);
1052 DRM_ERROR("Failed to allocate memory to queue swap\n");
1058 ret = drm_vblank_get(dev, pipe);
1060 drm_free(vbl_swap, sizeof(*vbl_swap), DRM_MEM_DRIVER);
1064 vbl_swap->drw_id = swap->drawable;
1065 vbl_swap->plane = plane;
1066 vbl_swap->sequence = swap->sequence;
1067 vbl_swap->flip = (swap->seqtype & _DRM_VBLANK_FLIP);
1068 vbl_swap->minor = file_priv->minor;
1073 DRM_SPINLOCK_IRQSAVE(&dev_priv->swaps_lock, irqflags);
1075 list_add_tail(&vbl_swap->head, &dev_priv->vbl_swaps.head);
1076 dev_priv->swaps_pending++;
1078 DRM_SPINUNLOCK_IRQRESTORE(&dev_priv->swaps_lock, irqflags);
1085 void i915_driver_irq_preinstall(struct drm_device * dev)
1087 struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
1089 I915_WRITE16(I915REG_HWSTAM, 0xeffe);
1091 I915_WRITE(I915REG_INT_MASK_R, 0x0);
1092 I915_WRITE(I915REG_INT_ENABLE_R, 0x0);
1094 I915_WRITE16(I915REG_INT_MASK_R, 0x0);
1095 I915_WRITE16(I915REG_INT_ENABLE_R, 0x0);
1100 int i915_driver_irq_postinstall(struct drm_device * dev)
1102 struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
1103 int ret, num_pipes = 2;
1105 DRM_SPININIT(&dev_priv->swaps_lock, "swap");
1106 INIT_LIST_HEAD(&dev_priv->vbl_swaps.head);
1107 dev_priv->swaps_pending = 0;
1109 DRM_SPININIT(&dev_priv->user_irq_lock, "userirq");
1110 dev_priv->user_irq_refcount = 0;
1111 dev_priv->irq_enable_reg = 0;
1113 ret = drm_vblank_init(dev, num_pipes);
1117 dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
1119 i915_enable_interrupt(dev);
1120 DRM_INIT_WAITQUEUE(&dev_priv->irq_queue);
1123 * Initialize the hardware status page IRQ location.
1126 I915_WRITE(I915REG_INSTPM, (1 << 5) | (1 << 21));
1130 void i915_driver_irq_uninstall(struct drm_device * dev)
1132 struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
1138 dev_priv->irq_enabled = 0;
1142 I915_WRITE(I915REG_HWSTAM, 0xffffffff);
1143 I915_WRITE(I915REG_INT_MASK_R, 0xffffffff);
1144 I915_WRITE(I915REG_INT_ENABLE_R, 0x0);
1146 temp = I915_READ(I915REG_INT_IDENTITY_R);
1147 I915_WRITE(I915REG_INT_IDENTITY_R, temp);
1149 I915_WRITE16(I915REG_HWSTAM, 0xffff);
1150 I915_WRITE16(I915REG_INT_MASK_R, 0xffff);
1151 I915_WRITE16(I915REG_INT_ENABLE_R, 0x0);
1153 temp = I915_READ16(I915REG_INT_IDENTITY_R);
1154 I915_WRITE16(I915REG_INT_IDENTITY_R, temp);