shared-core/i915_irq.c

   1 /* i915_irq.c -- IRQ support for the I915 -*- linux-c -*-
   2  */
   3 /*
   4  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   5  * All Rights Reserved.
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a
   8  * copy of this software and associated documentation files (the
   9  * "Software"), to deal in the Software without restriction, including
  10  * without limitation the rights to use, copy, modify, merge, publish,
  11  * distribute, sub license, and/or sell copies of the Software, and to
  12  * permit persons to whom the Software is furnished to do so, subject to
  13  * the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the
  16  * next paragraph) shall be included in all copies or substantial portions
  17  * of the Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  20  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  21  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  22  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  23  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  24  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  25  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  26  *
  27  */
  28
  29 #include "drmP.h"
  30 #include "drm.h"
  31 #include "i915_drm.h"
  32 #include "i915_drv.h"
  33 #include "intel_drv.h"
  34 #include "drm_crtc_helper.h"
  35
  36 #define MAX_NOPID ((u32)~0)
  37
  38 /*
  39  * These are the interrupts used by the driver
  40  */
  41 #define I915_INTERRUPT_ENABLE_MASK (I915_USER_INTERRUPT | \
  42                                     I915_DISPLAY_PIPE_A_EVENT_INTERRUPT | \
  43                                     I915_DISPLAY_PIPE_B_EVENT_INTERRUPT)
  44
  45 static inline void
  46 i915_enable_irq(struct drm_i915_private *dev_priv, uint32_t mask)
  47 {
  48         if ((dev_priv->irq_mask_reg & mask) != 0) {
  49                 dev_priv->irq_mask_reg &= ~mask;
  50                 I915_WRITE(IMR, dev_priv->irq_mask_reg);
  51                 (void) I915_READ(IMR);
  52         }
  53 }
  54
  55 static inline void
  56 i915_disable_irq(struct drm_i915_private *dev_priv, uint32_t mask)
  57 {
  58         if ((dev_priv->irq_mask_reg & mask) != mask) {
  59                 dev_priv->irq_mask_reg |= mask;
  60                 I915_WRITE(IMR, dev_priv->irq_mask_reg);
  61                 (void) I915_READ(IMR);
  62         }
  63 }
  64
  65 /**
  66  * i915_get_pipe - return the the pipe associated with a given plane
  67  * @dev: DRM device
  68  * @plane: plane to look for
  69  *
  70  * The Intel Mesa & 2D drivers call the vblank routines with a plane number
  71  * rather than a pipe number, since they may not always be equal.  This routine
  72  * maps the given @plane back to a pipe number.
  73  */
  74 static int
  75 i915_get_pipe(struct drm_device *dev, int plane)
  76 {
  77         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
  78         u32 dspcntr;
  79
  80         dspcntr = plane ? I915_READ(DSPBCNTR) : I915_READ(DSPACNTR);
  81
  82         return dspcntr & DISPPLANE_SEL_PIPE_MASK ? 1 : 0;
  83 }
  84
  85 /**
  86  * i915_get_plane - return the the plane associated with a given pipe
  87  * @dev: DRM device
  88  * @pipe: pipe to look for
  89  *
  90  * The Intel Mesa & 2D drivers call the vblank routines with a plane number
  91  * rather than a plane number, since they may not always be equal.  This routine
  92  * maps the given @pipe back to a plane number.
  93  */
  94 static int
  95 i915_get_plane(struct drm_device *dev, int pipe)
  96 {
  97         if (i915_get_pipe(dev, 0) == pipe)
  98                 return 0;
  99         return 1;
 100 }
 101
 102 /**
 103  * i915_pipe_enabled - check if a pipe is enabled
 104  * @dev: DRM device
 105  * @pipe: pipe to check
 106  *
 107  * Reading certain registers when the pipe is disabled can hang the chip.
 108  * Use this routine to make sure the PLL is running and the pipe is active
 109  * before reading such registers if unsure.
 110  */
 111 static int
 112 i915_pipe_enabled(struct drm_device *dev, int pipe)
 113 {
 114         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
 115         unsigned long pipeconf = pipe ? PIPEBCONF : PIPEACONF;
 116
 117         if (I915_READ(pipeconf) & PIPEACONF_ENABLE)
 118                 return 1;
 119
 120         return 0;
 121 }
 122
 123 /**
 124  * Emit a synchronous flip.
 125  *
 126  * This function must be called with the drawable spinlock held.
 127  */
 128 static void
 129 i915_dispatch_vsync_flip(struct drm_device *dev, struct drm_drawable_info *drw,
 130                          int plane)
 131 {
 132         struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
 133         struct drm_i915_sarea *sarea_priv = master_priv->sarea_priv;
 134         u16 x1, y1, x2, y2;
 135         int pf_planes = 1 << plane;
 136
 137         DRM_SPINLOCK_ASSERT(&dev->drw_lock);
 138
 139         /* If the window is visible on the other plane, we have to flip on that
 140          * plane as well.
 141          */
 142         if (plane == 1) {
 143                 x1 = sarea_priv->planeA_x;
 144                 y1 = sarea_priv->planeA_y;
 145                 x2 = x1 + sarea_priv->planeA_w;
 146                 y2 = y1 + sarea_priv->planeA_h;
 147         } else {
 148                 x1 = sarea_priv->planeB_x;
 149                 y1 = sarea_priv->planeB_y;
 150                 x2 = x1 + sarea_priv->planeB_w;
 151                 y2 = y1 + sarea_priv->planeB_h;
 152         }
 153
 154         if (x2 > 0 && y2 > 0) {
 155                 int i, num_rects = drw->num_rects;
 156                 struct drm_clip_rect *rect = drw->rects;
 157
 158                 for (i = 0; i < num_rects; i++)
 159                         if (!(rect[i].x1 >= x2 || rect[i].y1 >= y2 ||
 160                               rect[i].x2 <= x1 || rect[i].y2 <= y1)) {
 161                                 pf_planes = 0x3;
 162
 163                                 break;
 164                         }
 165         }
 166
 167         i915_dispatch_flip(dev, pf_planes, 1);
 168 }
 169
 170 /**
 171  * Emit blits for scheduled buffer swaps.
 172  *
 173  * This function will be called with the HW lock held.
 174  */
 175 static void i915_vblank_tasklet(struct drm_device *dev)
 176 {
 177         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
 178         struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
 179         struct list_head *list, *tmp, hits, *hit;
 180         int nhits, nrects, slice[2], upper[2], lower[2], i, num_pages;
 181         unsigned counter[2];
 182         struct drm_drawable_info *drw;
 183         struct drm_i915_sarea *sarea_priv = master_priv->sarea_priv;
 184         u32 cpp = dev_priv->cpp,  offsets[3];
 185         u32 cmd = (cpp == 4) ? (XY_SRC_COPY_BLT_CMD |
 186                                 XY_SRC_COPY_BLT_WRITE_ALPHA |
 187                                 XY_SRC_COPY_BLT_WRITE_RGB)
 188                              : XY_SRC_COPY_BLT_CMD;
 189         u32 src_pitch = sarea_priv->pitch * cpp;
 190         u32 dst_pitch = sarea_priv->pitch * cpp;
 191         /* COPY rop (0xcc), map cpp to magic color depth constants */
 192         u32 ropcpp = (0xcc << 16) | ((cpp - 1) << 24);
 193         RING_LOCALS;
 194
 195         if (IS_I965G(dev) && sarea_priv->front_tiled) {
 196                 cmd |= XY_SRC_COPY_BLT_DST_TILED;
 197                 dst_pitch >>= 2;
 198         }
 199         if (IS_I965G(dev) && sarea_priv->back_tiled) {
 200                 cmd |= XY_SRC_COPY_BLT_SRC_TILED;
 201                 src_pitch >>= 2;
 202         }
 203
 204         counter[0] = drm_vblank_count(dev, 0);
 205         counter[1] = drm_vblank_count(dev, 1);
 206
 207         DRM_DEBUG("\n");
 208
 209         INIT_LIST_HEAD(&hits);
 210
 211         nhits = nrects = 0;
 212
 213         /* No irqsave/restore necessary.  This tasklet may be run in an
 214          * interrupt context or normal context, but we don't have to worry
 215          * about getting interrupted by something acquiring the lock, because
 216          * we are the interrupt context thing that acquires the lock.
 217          */
 218         DRM_SPINLOCK(&dev_priv->swaps_lock);
 219
 220         /* Find buffer swaps scheduled for this vertical blank */
 221         list_for_each_safe(list, tmp, &dev_priv->vbl_swaps.head) {
 222                 struct drm_i915_vbl_swap *vbl_swap =
 223                         list_entry(list, struct drm_i915_vbl_swap, head);
 224                 int pipe = i915_get_pipe(dev, vbl_swap->plane);
 225
 226                 if ((counter[pipe] - vbl_swap->sequence) > (1<<23))
 227                         continue;
 228
 229                 master_priv = vbl_swap->minor->master->driver_priv;
 230                 sarea_priv = master_priv->sarea_priv;
 231
 232                 list_del(list);
 233                 dev_priv->swaps_pending--;
 234                 drm_vblank_put(dev, pipe);
 235
 236                 DRM_SPINUNLOCK(&dev_priv->swaps_lock);
 237                 DRM_SPINLOCK(&dev->drw_lock);
 238
 239                 drw = drm_get_drawable_info(dev, vbl_swap->drw_id);
 240
 241                 if (!drw) {
 242                         DRM_SPINUNLOCK(&dev->drw_lock);
 243                         drm_free(vbl_swap, sizeof(*vbl_swap), DRM_MEM_DRIVER);
 244                         DRM_SPINLOCK(&dev_priv->swaps_lock);
 245                         continue;
 246                 }
 247
 248                 list_for_each(hit, &hits) {
 249                         struct drm_i915_vbl_swap *swap_cmp =
 250                                 list_entry(hit, struct drm_i915_vbl_swap, head);
 251                         struct drm_drawable_info *drw_cmp =
 252                                 drm_get_drawable_info(dev, swap_cmp->drw_id);
 253
 254                         if (drw_cmp &&
 255                             drw_cmp->rects[0].y1 > drw->rects[0].y1) {
 256                                 list_add_tail(list, hit);
 257                                 break;
 258                         }
 259                 }
 260
 261                 DRM_SPINUNLOCK(&dev->drw_lock);
 262
 263                 /* List of hits was empty, or we reached the end of it */
 264                 if (hit == &hits)
 265                         list_add_tail(list, hits.prev);
 266
 267                 nhits++;
 268
 269                 DRM_SPINLOCK(&dev_priv->swaps_lock);
 270         }
 271
 272         DRM_SPINUNLOCK(&dev_priv->swaps_lock);
 273
 274         if (nhits == 0) {
 275                 return;
 276         }
 277
 278         i915_kernel_lost_context(dev);
 279
 280         upper[0] = upper[1] = 0;
 281         slice[0] = max(sarea_priv->planeA_h / nhits, 1);
 282         slice[1] = max(sarea_priv->planeB_h / nhits, 1);
 283         lower[0] = sarea_priv->planeA_y + slice[0];
 284         lower[1] = sarea_priv->planeB_y + slice[0];
 285
 286         offsets[0] = sarea_priv->front_offset;
 287         offsets[1] = sarea_priv->back_offset;
 288         offsets[2] = sarea_priv->third_offset;
 289         num_pages = sarea_priv->third_handle ? 3 : 2;
 290
 291         DRM_SPINLOCK(&dev->drw_lock);
 292
 293         /* Emit blits for buffer swaps, partitioning both outputs into as many
 294          * slices as there are buffer swaps scheduled in order to avoid tearing
 295          * (based on the assumption that a single buffer swap would always
 296          * complete before scanout starts).
 297          */
 298         for (i = 0; i++ < nhits;
 299              upper[0] = lower[0], lower[0] += slice[0],
 300              upper[1] = lower[1], lower[1] += slice[1]) {
 301                 int init_drawrect = 1;
 302
 303                 if (i == nhits)
 304                         lower[0] = lower[1] = sarea_priv->height;
 305
 306                 list_for_each(hit, &hits) {
 307                         struct drm_i915_vbl_swap *swap_hit =
 308                                 list_entry(hit, struct drm_i915_vbl_swap, head);
 309                         struct drm_clip_rect *rect;
 310                         int num_rects, plane, front, back;
 311                         unsigned short top, bottom;
 312
 313                         drw = drm_get_drawable_info(dev, swap_hit->drw_id);
 314
 315                         if (!drw)
 316                                 continue;
 317
 318                         plane = swap_hit->plane;
 319
 320                         if (swap_hit->flip) {
 321                                 i915_dispatch_vsync_flip(dev, drw, plane);
 322                                 continue;
 323                         }
 324
 325                         if (init_drawrect) {
 326                                 int width  = sarea_priv->width;
 327                                 int height = sarea_priv->height;
 328                                 if (IS_I965G(dev)) {
 329                                         BEGIN_LP_RING(4);
 330
 331                                         OUT_RING(GFX_OP_DRAWRECT_INFO_I965);
 332                                         OUT_RING(0);
 333                                         OUT_RING(((width - 1) & 0xffff) | ((height - 1) << 16));
 334                                         OUT_RING(0);
 335
 336                                         ADVANCE_LP_RING();
 337                                 } else {
 338                                         BEGIN_LP_RING(6);
 339
 340                                         OUT_RING(GFX_OP_DRAWRECT_INFO);
 341                                         OUT_RING(0);
 342                                         OUT_RING(0);
 343                                         OUT_RING(((width - 1) & 0xffff) | ((height - 1) << 16));
 344                                         OUT_RING(0);
 345                                         OUT_RING(0);
 346
 347                                         ADVANCE_LP_RING();
 348                                 }
 349
 350                                 sarea_priv->ctxOwner = DRM_KERNEL_CONTEXT;
 351
 352                                 init_drawrect = 0;
 353                         }
 354
 355                         rect = drw->rects;
 356                         top = upper[plane];
 357                         bottom = lower[plane];
 358
 359                         front = (master_priv->sarea_priv->pf_current_page >>
 360                                  (2 * plane)) & 0x3;
 361                         back = (front + 1) % num_pages;
 362
 363                         for (num_rects = drw->num_rects; num_rects--; rect++) {
 364                                 int y1 = max(rect->y1, top);
 365                                 int y2 = min(rect->y2, bottom);
 366
 367                                 if (y1 >= y2)
 368                                         continue;
 369
 370                                 BEGIN_LP_RING(8);
 371
 372                                 OUT_RING(cmd);
 373                                 OUT_RING(ropcpp | dst_pitch);
 374                                 OUT_RING((y1 << 16) | rect->x1);
 375                                 OUT_RING((y2 << 16) | rect->x2);
 376                                 OUT_RING(offsets[front]);
 377                                 OUT_RING((y1 << 16) | rect->x1);
 378                                 OUT_RING(src_pitch);
 379                                 OUT_RING(offsets[back]);
 380
 381                                 ADVANCE_LP_RING();
 382                         }
 383                 }
 384         }
 385
 386         DRM_SPINUNLOCK(&dev->drw_lock);
 387
 388         list_for_each_safe(hit, tmp, &hits) {
 389                 struct drm_i915_vbl_swap *swap_hit =
 390                         list_entry(hit, struct drm_i915_vbl_swap, head);
 391
 392                 list_del(hit);
 393
 394                 drm_free(swap_hit, sizeof(*swap_hit), DRM_MEM_DRIVER);
 395         }
 396 }
 397
 398 u32 i915_get_vblank_counter(struct drm_device *dev, int plane)
 399 {
 400         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
 401         unsigned long high_frame;
 402         unsigned long low_frame;
 403         u32 high1, high2, low, count;
 404         int pipe;
 405
 406         pipe = i915_get_pipe(dev, plane);
 407         high_frame = pipe ? PIPEBFRAMEHIGH : PIPEAFRAMEHIGH;
 408         low_frame = pipe ? PIPEBFRAMEPIXEL : PIPEAFRAMEPIXEL;
 409
 410         if (!i915_pipe_enabled(dev, pipe)) {
 411             DRM_ERROR("trying to get vblank count for disabled pipe %d\n", pipe);
 412             return 0;
 413         }
 414
 415         /*
 416          * High & low register fields aren't synchronized, so make sure
 417          * we get a low value that's stable across two reads of the high
 418          * register.
 419          */
 420         do {
 421                 high1 = ((I915_READ(high_frame) & PIPE_FRAME_HIGH_MASK) >>
 422                          PIPE_FRAME_HIGH_SHIFT);
 423                 low =  ((I915_READ(low_frame) & PIPE_FRAME_LOW_MASK) >>
 424                         PIPE_FRAME_LOW_SHIFT);
 425                 high2 = ((I915_READ(high_frame) & PIPE_FRAME_HIGH_MASK) >>
 426                          PIPE_FRAME_HIGH_SHIFT);
 427         } while (high1 != high2);
 428
 429         count = (high1 << 8) | low;
 430
 431         return count;
 432 }
 433
 434 static struct drm_device *hotplug_dev;
 435
 436 /**
 437  * Handler for user interrupts in process context (able to sleep, do VFS
 438  * operations, etc.
 439  *
 440  * If another IRQ comes in while we're in this handler, it will still get put
 441  * on the queue again to be rerun when we finish.
 442  */
 443 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
 444 static void i915_hotplug_work_func(void *work)
 445 #else
 446 static void i915_hotplug_work_func(struct work_struct *work)
 447 #endif
 448 {
 449         struct drm_device *dev = hotplug_dev;
 450
 451         drm_helper_hotplug_stage_two(dev);
 452         drm_handle_hotplug(dev);
 453 }
 454
 455 static int i915_run_hotplug_tasklet(struct drm_device *dev, uint32_t stat)
 456 {
 457 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
 458         static DECLARE_WORK(hotplug, i915_hotplug_work_func, NULL);
 459 #else
 460         static DECLARE_WORK(hotplug, i915_hotplug_work_func);
 461 #endif
 462         struct drm_i915_private *dev_priv = dev->dev_private;
 463
 464         hotplug_dev = dev;
 465
 466         if (stat & TV_HOTPLUG_INT_STATUS) {
 467                 DRM_DEBUG("TV event\n");
 468         }
 469
 470         if (stat & CRT_HOTPLUG_INT_STATUS) {
 471                 DRM_DEBUG("CRT event\n");
 472         }
 473
 474         if (stat & SDVOB_HOTPLUG_INT_STATUS) {
 475                 DRM_DEBUG("sDVOB event\n");
 476         }
 477
 478         if (stat & SDVOC_HOTPLUG_INT_STATUS) {
 479                 DRM_DEBUG("sDVOC event\n");
 480         }
 481         queue_work(dev_priv->wq, &hotplug);
 482
 483         return 0;
 484 }
 485
 486 irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
 487 {
 488         struct drm_device *dev = (struct drm_device *) arg;
 489         struct drm_i915_master_private *master_priv;
 490         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
 491         u32 iir;
 492         u32 pipea_stats = 0, pipeb_stats = 0, tvdac;
 493         int hotplug = 0;
 494         int vblank = 0;
 495
 496         if (dev->pdev->msi_enabled)
 497                 I915_WRITE(IMR, ~0);
 498         iir = I915_READ(IIR);
 499         atomic_inc(&dev_priv->irq_received);
 500         if (iir == 0) {
 501                 if (dev->pdev->msi_enabled) {
 502                         I915_WRITE(IMR, dev_priv->irq_mask_reg);
 503                         (void) I915_READ(IMR);
 504                 }
 505                 return IRQ_NONE;
 506         }
 507
 508         /*
 509          * Clear the PIPE(A|B)STAT regs before the IIR otherwise
 510          * we may get extra interrupts.
 511          */
 512         if (iir & I915_DISPLAY_PIPE_A_EVENT_INTERRUPT) {
 513                 pipea_stats = I915_READ(PIPEASTAT);
 514                 I915_WRITE(PIPEASTAT, pipea_stats);
 515         }
 516
 517         if (iir & I915_DISPLAY_PIPE_B_EVENT_INTERRUPT) {
 518                 pipeb_stats = I915_READ(PIPEBSTAT);
 519                 I915_WRITE(PIPEBSTAT, pipeb_stats);
 520         }
 521
 522         I915_WRITE(IIR, iir);
 523         if (dev->pdev->msi_enabled)
 524                 I915_WRITE(IMR, dev_priv->irq_mask_reg);
 525         (void) I915_READ(IIR); /* Flush posted writes */
 526
 527         /* This is a global event, and not a pipe A event */
 528         if (pipea_stats & PIPE_HOTPLUG_INTERRUPT_STATUS)
 529                 hotplug = 1;
 530
 531         if (pipea_stats & PIPE_HOTPLUG_TV_INTERRUPT_STATUS) {
 532                 hotplug = 1;
 533                 /* Toggle hotplug detection to clear hotplug status */
 534                 tvdac = I915_READ(TV_DAC);
 535                 I915_WRITE(TV_DAC, tvdac & ~TVDAC_STATE_CHG_EN);
 536                 I915_WRITE(TV_DAC, tvdac | TVDAC_STATE_CHG_EN);
 537         }
 538
 539         if (dev->primary->master) {
 540                 master_priv = dev->primary->master->driver_priv;
 541                 master_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
 542         }
 543
 544 #ifdef __linux__
 545 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,25)
 546         if ((iir & I915_DISPLAY_PIPE_B_EVENT_INTERRUPT) &&
 547             (pipeb_stats & I915_LEGACY_BLC_EVENT_ENABLE))
 548                 opregion_asle_intr(dev);
 549         if (iir & I915_ASLE_INTERRUPT)
 550                 opregion_asle_intr(dev);
 551 #endif
 552 #endif
 553
 554         if (iir & I915_USER_INTERRUPT) {
 555                 dev_priv->mm.irq_gem_seqno = i915_get_gem_seqno(dev);
 556                 DRM_WAKEUP(&dev_priv->irq_queue);
 557 #ifdef I915_HAVE_FENCE
 558                 i915_fence_handler(dev);
 559 #endif
 560         }
 561
 562         if (pipea_stats & (PIPE_START_VBLANK_INTERRUPT_STATUS|
 563                            PIPE_VBLANK_INTERRUPT_STATUS)) {
 564                 vblank++;
 565                 drm_handle_vblank(dev, i915_get_plane(dev, 0));
 566         }
 567
 568         /* The vblank interrupt gets enabled even if we didn't ask for
 569            it, so make sure it's shut down again */
 570         if (!(dev_priv->vblank_pipe & DRM_I915_VBLANK_PIPE_B))
 571                 pipeb_stats &= ~(I915_VBLANK_INTERRUPT_ENABLE);
 572
 573         if (pipeb_stats & (PIPE_START_VBLANK_INTERRUPT_STATUS|
 574                            PIPE_VBLANK_INTERRUPT_STATUS)) {
 575                 vblank++;
 576                 drm_handle_vblank(dev, i915_get_plane(dev, 1));
 577         }
 578
 579         if (vblank) {
 580                 if (dev_priv->swaps_pending > 0)
 581                         drm_locked_tasklet(dev, i915_vblank_tasklet);
 582         }
 583
 584         if ((iir & I915_DISPLAY_PORT_INTERRUPT) || hotplug) {
 585                 u32 temp2 = 0;
 586
 587                 DRM_INFO("Hotplug event received\n");
 588
 589                 if (!IS_I9XX(dev) || IS_I915G(dev) || IS_I915GM(dev)) {
 590                         if (pipea_stats & PIPE_HOTPLUG_INTERRUPT_STATUS)
 591                                 temp2 |= SDVOB_HOTPLUG_INT_STATUS |
 592                                         SDVOC_HOTPLUG_INT_STATUS;
 593                         if (pipea_stats & PIPE_HOTPLUG_TV_INTERRUPT_STATUS)
 594                                 temp2 |= TV_HOTPLUG_INT_STATUS;
 595                 } else {
 596                         temp2 = I915_READ(PORT_HOTPLUG_STAT);
 597
 598                         I915_WRITE(PORT_HOTPLUG_STAT, temp2);
 599                 }
 600                 i915_run_hotplug_tasklet(dev, temp2);
 601         }
 602
 603         return IRQ_HANDLED;
 604 }
 605
 606 int i915_emit_irq(struct drm_device *dev)
 607 {
 608         struct drm_i915_private *dev_priv = dev->dev_private;
 609         RING_LOCALS;
 610
 611         i915_kernel_lost_context(dev);
 612
 613         DRM_DEBUG("\n");
 614
 615         i915_emit_breadcrumb(dev);
 616
 617         BEGIN_LP_RING(2);
 618         OUT_RING(0);
 619         OUT_RING(MI_USER_INTERRUPT);
 620         ADVANCE_LP_RING();
 621
 622         return dev_priv->counter;
 623 }
 624
 625 void i915_user_irq_on(struct drm_device *dev)
 626 {
 627         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
 628
 629         DRM_SPINLOCK(&dev_priv->user_irq_lock);
 630         if (dev_priv->irq_enabled && (++dev_priv->user_irq_refcount == 1))
 631                 i915_enable_irq(dev_priv, I915_USER_INTERRUPT);
 632         DRM_SPINUNLOCK(&dev_priv->user_irq_lock);
 633 }
 634
 635 void i915_user_irq_off(struct drm_device *dev)
 636 {
 637         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
 638
 639         DRM_SPINLOCK(&dev_priv->user_irq_lock);
 640         BUG_ON(dev_priv->irq_enabled && dev_priv->user_irq_refcount <= 0);
 641         if (dev_priv->irq_enabled && (--dev_priv->user_irq_refcount == 0))
 642                 i915_disable_irq(dev_priv, I915_USER_INTERRUPT);
 643         DRM_SPINUNLOCK(&dev_priv->user_irq_lock);
 644 }
 645
 646
 647 int i915_wait_irq(struct drm_device * dev, int irq_nr)
 648 {
 649         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
 650         struct drm_i915_master_private *master_priv;
 651         int ret = 0;
 652
 653         if (!dev_priv) {
 654                 DRM_ERROR("called with no initialization\n");
 655                 return -EINVAL;
 656         }
 657
 658         DRM_DEBUG("irq_nr=%d breadcrumb=%d\n", irq_nr,
 659                   READ_BREADCRUMB(dev_priv));
 660
 661         master_priv = dev->primary->master->driver_priv;
 662
 663         if (!master_priv) {
 664                 DRM_ERROR("no master priv?\n");
 665                 return -EINVAL;
 666         }
 667
 668         if (READ_BREADCRUMB(dev_priv) >= irq_nr) {
 669                 master_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
 670                 return 0;
 671         }
 672
 673         i915_user_irq_on(dev);
 674         DRM_WAIT_ON(ret, dev_priv->irq_queue, 3 * DRM_HZ,
 675                     READ_BREADCRUMB(dev_priv) >= irq_nr);
 676         i915_user_irq_off(dev);
 677
 678         if (ret == -EBUSY) {
 679                 DRM_ERROR("EBUSY -- rec: %d emitted: %d\n",
 680                           READ_BREADCRUMB(dev_priv), (int)dev_priv->counter);
 681         }
 682
 683         if (READ_BREADCRUMB(dev_priv) >= irq_nr)
 684                 master_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
 685
 686         return ret;
 687 }
 688
 689 /* Needs the lock as it touches the ring.
 690  */
 691 int i915_irq_emit(struct drm_device *dev, void *data,
 692                          struct drm_file *file_priv)
 693 {
 694         struct drm_i915_private *dev_priv = dev->dev_private;
 695         struct drm_i915_irq_emit *emit = data;
 696         int result;
 697
 698         LOCK_TEST_WITH_RETURN(dev, file_priv);
 699
 700         if (!dev_priv) {
 701                 DRM_ERROR("called with no initialization\n");
 702                 return -EINVAL;
 703         }
 704
 705         result = i915_emit_irq(dev);
 706
 707         if (DRM_COPY_TO_USER(emit->irq_seq, &result, sizeof(int))) {
 708                 DRM_ERROR("copy_to_user\n");
 709                 return -EFAULT;
 710         }
 711
 712         return 0;
 713 }
 714
 715 /* Doesn't need the hardware lock.
 716  */
 717 int i915_irq_wait(struct drm_device *dev, void *data,
 718                   struct drm_file *file_priv)
 719 {
 720         struct drm_i915_private *dev_priv = dev->dev_private;
 721         struct drm_i915_irq_wait *irqwait = data;
 722
 723         if (!dev_priv) {
 724                 DRM_ERROR("called with no initialization\n");
 725                 return -EINVAL;
 726         }
 727
 728         return i915_wait_irq(dev, irqwait->irq_seq);
 729 }
 730
 731 int i915_enable_vblank(struct drm_device *dev, int plane)
 732 {
 733         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
 734         int pipe = i915_get_pipe(dev, plane);
 735         u32     pipestat_reg = 0;
 736         u32     mask_reg = 0;
 737         u32     pipestat;
 738
 739         switch (pipe) {
 740         case 0:
 741                 pipestat_reg = PIPEASTAT;
 742                 mask_reg |= I915_DISPLAY_PIPE_A_EVENT_INTERRUPT;
 743                 break;
 744         case 1:
 745                 pipestat_reg = PIPEBSTAT;
 746                 mask_reg |= I915_DISPLAY_PIPE_B_EVENT_INTERRUPT;
 747                 break;
 748         default:
 749                 DRM_ERROR("tried to enable vblank on non-existent pipe %d\n",
 750                           pipe);
 751                 break;
 752         }
 753
 754         if (pipestat_reg)
 755         {
 756                 pipestat = I915_READ (pipestat_reg);
 757                 /*
 758                  * Older chips didn't have the start vblank interrupt,
 759                  * but
 760                  */
 761                 if (IS_I965G (dev))
 762                         pipestat |= PIPE_START_VBLANK_INTERRUPT_ENABLE;
 763                 else
 764                         pipestat |= PIPE_VBLANK_INTERRUPT_ENABLE;
 765                 /*
 766                  * Clear any pending status
 767                  */
 768                 pipestat |= (PIPE_START_VBLANK_INTERRUPT_STATUS |
 769                              PIPE_VBLANK_INTERRUPT_STATUS);
 770                 I915_WRITE(pipestat_reg, pipestat);
 771         }
 772         DRM_SPINLOCK(&dev_priv->user_irq_lock);
 773         i915_enable_irq(dev_priv, mask_reg);
 774         DRM_SPINUNLOCK(&dev_priv->user_irq_lock);
 775
 776         return 0;
 777 }
 778
 779 void i915_disable_vblank(struct drm_device *dev, int plane)
 780 {
 781         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
 782         int pipe = i915_get_pipe(dev, plane);
 783         u32     pipestat_reg = 0;
 784         u32     mask_reg = 0;
 785         u32     pipestat;
 786
 787         switch (pipe) {
 788         case 0:
 789                 pipestat_reg = PIPEASTAT;
 790                 mask_reg |= I915_DISPLAY_PIPE_A_EVENT_INTERRUPT;
 791                 break;
 792         case 1:
 793                 pipestat_reg = PIPEBSTAT;
 794                 mask_reg |= I915_DISPLAY_PIPE_B_EVENT_INTERRUPT;
 795                 break;
 796         default:
 797                 DRM_ERROR("tried to disable vblank on non-existent pipe %d\n",
 798                           pipe);
 799                 break;
 800         }
 801
 802         DRM_SPINLOCK(&dev_priv->user_irq_lock);
 803         i915_disable_irq(dev_priv, mask_reg);
 804         DRM_SPINUNLOCK(&dev_priv->user_irq_lock);
 805
 806         if (pipestat_reg) {
 807                 pipestat = I915_READ (pipestat_reg);
 808                 pipestat &= ~(PIPE_START_VBLANK_INTERRUPT_ENABLE |
 809                               PIPE_VBLANK_INTERRUPT_ENABLE);
 810                 /*
 811                  * Clear any pending status
 812                  */
 813                 pipestat |= (PIPE_START_VBLANK_INTERRUPT_STATUS |
 814                              PIPE_VBLANK_INTERRUPT_STATUS);
 815                 I915_WRITE(pipestat_reg, pipestat);
 816                 (void) I915_READ(pipestat_reg);
 817         }
 818 }
 819
 820 void i915_enable_interrupt (struct drm_device *dev)
 821 {
 822         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
 823         struct drm_connector *o;
 824
 825         dev_priv->irq_mask_reg &= ~0;
 826
 827         if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev)) {
 828                 if (dev->mode_config.num_connector)
 829                         dev_priv->irq_mask_reg &= ~I915_DISPLAY_PORT_INTERRUPT;
 830         } else {
 831                 if (dev->mode_config.num_connector)
 832                         dev_priv->irq_mask_reg &= ~I915_DISPLAY_PIPE_A_EVENT_INTERRUPT;
 833
 834                 /* Enable global interrupts for hotplug - not a pipeA event */
 835                 I915_WRITE(PIPEASTAT, I915_READ(PIPEASTAT) |
 836                            PIPE_HOTPLUG_INTERRUPT_ENABLE |
 837                            PIPE_HOTPLUG_TV_INTERRUPT_ENABLE |
 838                            PIPE_HOTPLUG_TV_INTERRUPT_STATUS |
 839                            PIPE_HOTPLUG_INTERRUPT_STATUS);
 840         }
 841
 842         if (!(dev_priv->irq_mask_reg & I915_DISPLAY_PORT_INTERRUPT) ||
 843             !(dev_priv->irq_mask_reg & I915_DISPLAY_PIPE_A_EVENT_INTERRUPT)) {
 844                 u32 temp = 0;
 845
 846                 if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev)) {
 847                         temp = I915_READ(PORT_HOTPLUG_EN);
 848
 849                         /* Activate the CRT */
 850                         temp |= CRT_HOTPLUG_INT_EN;
 851                 }
 852
 853                 if (IS_I9XX(dev)) {
 854                         /* SDVOB */
 855                         o = intel_sdvo_find(dev, 1);
 856                         if (o && intel_sdvo_supports_hotplug(o)) {
 857                                 intel_sdvo_set_hotplug(o, 1);
 858                                 temp |= SDVOB_HOTPLUG_INT_EN;
 859                         }
 860
 861                         /* SDVOC */
 862                         o = intel_sdvo_find(dev, 0);
 863                         if (o && intel_sdvo_supports_hotplug(o)) {
 864                                 intel_sdvo_set_hotplug(o, 1);
 865                                 temp |= SDVOC_HOTPLUG_INT_EN;
 866                         }
 867
 868                         I915_WRITE(SDVOB, I915_READ(SDVOB) | SDVO_INTERRUPT_ENABLE);
 869                         I915_WRITE(SDVOC, I915_READ(SDVOC) | SDVO_INTERRUPT_ENABLE);
 870
 871                         /* TV */
 872                         I915_WRITE(TV_DAC, I915_READ(TV_DAC) | TVDAC_STATE_CHG_EN);
 873                 } else {
 874                         /* DVO ???? */
 875                 }
 876
 877                 if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev)) {
 878                         I915_WRITE(PORT_HOTPLUG_EN, temp);
 879
 880                         DRM_DEBUG("HEN %08x\n",I915_READ(PORT_HOTPLUG_EN));
 881                         DRM_DEBUG("HST %08x\n",I915_READ(PORT_HOTPLUG_STAT));
 882
 883                         I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));
 884                 }
 885         }
 886
 887 #ifdef __linux__
 888 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,25)
 889         opregion_enable_asle(dev);
 890 #endif
 891 #endif
 892         dev_priv->irq_enabled = 1;
 893 }
 894
 895 /* Set the vblank monitor pipe
 896  */
 897 int i915_vblank_pipe_set(struct drm_device *dev, void *data,
 898                          struct drm_file *file_priv)
 899 {
 900         struct drm_i915_private *dev_priv = dev->dev_private;
 901
 902         if (!dev_priv) {
 903                 DRM_ERROR("called with no initialization\n");
 904                 return -EINVAL;
 905         }
 906
 907         return 0;
 908 }
 909
 910 int i915_vblank_pipe_get(struct drm_device *dev, void *data,
 911                          struct drm_file *file_priv)
 912 {
 913         struct drm_i915_private *dev_priv = dev->dev_private;
 914         struct drm_i915_vblank_pipe *pipe = data;
 915         u32 flag = 0;
 916
 917         if (!dev_priv) {
 918                 DRM_ERROR("called with no initialization\n");
 919                 return -EINVAL;
 920         }
 921
 922         if (dev_priv->irq_enabled)
 923             flag = ~dev_priv->irq_mask_reg;
 924
 925         pipe->pipe = 0;
 926         if (flag & I915_DISPLAY_PIPE_A_EVENT_INTERRUPT)
 927                 pipe->pipe |= DRM_I915_VBLANK_PIPE_A;
 928         if (flag & I915_DISPLAY_PIPE_B_EVENT_INTERRUPT)
 929                 pipe->pipe |= DRM_I915_VBLANK_PIPE_B;
 930
 931         return 0;
 932 }
 933
 934 /**
 935  * Schedule buffer swap at given vertical blank.
 936  */
 937 int i915_vblank_swap(struct drm_device *dev, void *data,
 938                      struct drm_file *file_priv)
 939 {
 940         struct drm_i915_private *dev_priv = dev->dev_private;
 941         struct drm_i915_master_private *master_priv;
 942         struct drm_i915_vblank_swap *swap = data;
 943         struct drm_i915_vbl_swap *vbl_swap;
 944         unsigned int pipe, seqtype, curseq, plane;
 945         unsigned long irqflags;
 946         struct list_head *list;
 947         int ret;
 948
 949         if (!dev_priv) {
 950                 DRM_ERROR("%s called with no initialization\n", __func__);
 951                 return -EINVAL;
 952         }
 953
 954         if (!dev->primary->master)
 955                 return -EINVAL;
 956
 957         master_priv = dev->primary->master->driver_priv;
 958
 959         if (master_priv->sarea_priv->rotation) {
 960                 DRM_DEBUG("Rotation not supported\n");
 961                 return -EINVAL;
 962         }
 963
 964         if (swap->seqtype & ~(_DRM_VBLANK_RELATIVE | _DRM_VBLANK_ABSOLUTE |
 965                              _DRM_VBLANK_SECONDARY | _DRM_VBLANK_NEXTONMISS |
 966                              _DRM_VBLANK_FLIP)) {
 967                 DRM_ERROR("Invalid sequence type 0x%x\n", swap->seqtype);
 968                 return -EINVAL;
 969         }
 970
 971         plane = (swap->seqtype & _DRM_VBLANK_SECONDARY) ? 1 : 0;
 972         pipe = i915_get_pipe(dev, plane);
 973
 974         seqtype = swap->seqtype & (_DRM_VBLANK_RELATIVE | _DRM_VBLANK_ABSOLUTE);
 975
 976         if (!(dev_priv->vblank_pipe & (1 << pipe))) {
 977                 DRM_ERROR("Invalid pipe %d\n", pipe);
 978                 return -EINVAL;
 979         }
 980
 981         DRM_SPINLOCK_IRQSAVE(&dev->drw_lock, irqflags);
 982
 983         /* It makes no sense to schedule a swap for a drawable that doesn't have
 984          * valid information at this point. E.g. this could mean that the X
 985          * server is too old to push drawable information to the DRM, in which
 986          * case all such swaps would become ineffective.
 987          */
 988         if (!drm_get_drawable_info(dev, swap->drawable)) {
 989                 DRM_SPINUNLOCK_IRQRESTORE(&dev->drw_lock, irqflags);
 990                 DRM_DEBUG("Invalid drawable ID %d\n", swap->drawable);
 991                 return -EINVAL;
 992         }
 993
 994         DRM_SPINUNLOCK_IRQRESTORE(&dev->drw_lock, irqflags);
 995
 996         /*
 997          * We take the ref here and put it when the swap actually completes
 998          * in the tasklet.
 999          */
1000         ret = drm_vblank_get(dev, pipe);
1001         if (ret)
1002                 return ret;
1003         curseq = drm_vblank_count(dev, pipe);
1004
1005         if (seqtype == _DRM_VBLANK_RELATIVE)
1006                 swap->sequence += curseq;
1007
1008         if ((curseq - swap->sequence) <= (1<<23)) {
1009                 if (swap->seqtype & _DRM_VBLANK_NEXTONMISS) {
1010                         swap->sequence = curseq + 1;
1011                 } else {
1012                         DRM_DEBUG("Missed target sequence\n");
1013                         drm_vblank_put(dev, pipe);
1014                         return -EINVAL;
1015                 }
1016         }
1017
1018         if (swap->seqtype & _DRM_VBLANK_FLIP) {
1019                 swap->sequence--;
1020
1021                 if ((curseq - swap->sequence) <= (1<<23)) {
1022                         struct drm_drawable_info *drw;
1023
1024                         LOCK_TEST_WITH_RETURN(dev, file_priv);
1025
1026                         DRM_SPINLOCK_IRQSAVE(&dev->drw_lock, irqflags);
1027
1028                         drw = drm_get_drawable_info(dev, swap->drawable);
1029
1030                         if (!drw) {
1031                                 DRM_SPINUNLOCK_IRQRESTORE(&dev->drw_lock,
1032                                     irqflags);
1033                                 DRM_DEBUG("Invalid drawable ID %d\n",
1034                                           swap->drawable);
1035                                 drm_vblank_put(dev, pipe);
1036                                 return -EINVAL;
1037                         }
1038
1039                         i915_dispatch_vsync_flip(dev, drw, plane);
1040
1041                         DRM_SPINUNLOCK_IRQRESTORE(&dev->drw_lock, irqflags);
1042
1043                         drm_vblank_put(dev, pipe);
1044                         return 0;
1045                 }
1046         }
1047
1048         DRM_SPINLOCK_IRQSAVE(&dev_priv->swaps_lock, irqflags);
1049
1050         list_for_each(list, &dev_priv->vbl_swaps.head) {
1051                 vbl_swap = list_entry(list, struct drm_i915_vbl_swap, head);
1052
1053                 if (vbl_swap->drw_id == swap->drawable &&
1054                     vbl_swap->plane == plane &&
1055                     vbl_swap->sequence == swap->sequence) {
1056                         vbl_swap->flip = (swap->seqtype & _DRM_VBLANK_FLIP);
1057                         DRM_SPINUNLOCK_IRQRESTORE(&dev_priv->swaps_lock, irqflags);
1058                         DRM_DEBUG("Already scheduled\n");
1059                         return 0;
1060                 }
1061         }
1062
1063         DRM_SPINUNLOCK_IRQRESTORE(&dev_priv->swaps_lock, irqflags);
1064
1065         if (dev_priv->swaps_pending >= 100) {
1066                 DRM_DEBUG("Too many swaps queued\n");
1067                 drm_vblank_put(dev, pipe);
1068                 return -EBUSY;
1069         }
1070
1071         vbl_swap = drm_calloc(1, sizeof(*vbl_swap), DRM_MEM_DRIVER);
1072
1073         if (!vbl_swap) {
1074                 DRM_ERROR("Failed to allocate memory to queue swap\n");
1075                 drm_vblank_put(dev, pipe);
1076                 return -ENOMEM;
1077         }
1078
1079         DRM_DEBUG("\n");
1080
1081         vbl_swap->drw_id = swap->drawable;
1082         vbl_swap->plane = plane;
1083         vbl_swap->sequence = swap->sequence;
1084         vbl_swap->flip = (swap->seqtype & _DRM_VBLANK_FLIP);
1085         vbl_swap->minor = file_priv->minor;
1086
1087         if (vbl_swap->flip)
1088                 swap->sequence++;
1089
1090         DRM_SPINLOCK_IRQSAVE(&dev_priv->swaps_lock, irqflags);
1091
1092         list_add_tail(&vbl_swap->head, &dev_priv->vbl_swaps.head);
1093         dev_priv->swaps_pending++;
1094
1095         DRM_SPINUNLOCK_IRQRESTORE(&dev_priv->swaps_lock, irqflags);
1096
1097         return 0;
1098 }
1099
1100 /* drm_dma.h hooks
1101 */
1102 void i915_driver_irq_preinstall(struct drm_device * dev)
1103 {
1104         struct drm_i915_private *dev_priv = dev->dev_private;
1105
1106         I915_WRITE16(HWSTAM, 0xeffe);
1107         I915_WRITE16(IMR, 0x0);
1108         I915_WRITE16(IER, 0x0);
1109 }
1110
1111 int i915_driver_irq_postinstall(struct drm_device * dev)
1112 {
1113         struct drm_i915_private *dev_priv = dev->dev_private;
1114         int ret, num_pipes = 2;
1115
1116         DRM_SPININIT(&dev_priv->swaps_lock, "swap");
1117         INIT_LIST_HEAD(&dev_priv->vbl_swaps.head);
1118         dev_priv->swaps_pending = 0;
1119
1120         DRM_SPININIT(&dev_priv->user_irq_lock, "userirq");
1121         dev_priv->user_irq_refcount = 0;
1122         dev_priv->irq_mask_reg = ~0;
1123
1124         ret = drm_vblank_init(dev, num_pipes);
1125         if (ret)
1126                 return ret;
1127
1128         dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B;
1129         dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
1130
1131         i915_enable_interrupt(dev);
1132         DRM_INIT_WAITQUEUE(&dev_priv->irq_queue);
1133
1134         /*
1135          * Initialize the hardware status page IRQ location.
1136          */
1137
1138         I915_WRITE(INSTPM, (1 << 5) | (1 << 21));
1139         return 0;
1140 }
1141
1142 void i915_driver_irq_uninstall(struct drm_device * dev)
1143 {
1144         struct drm_i915_private *dev_priv = dev->dev_private;
1145         u32 temp;
1146
1147         if (!dev_priv)
1148                 return;
1149
1150         dev_priv->vblank_pipe = 0;
1151
1152         dev_priv->irq_enabled = 0;
1153         I915_WRITE(HWSTAM, 0xffffffff);
1154         I915_WRITE(IMR, 0xffffffff);
1155         I915_WRITE(IER, 0x0);
1156
1157         temp = I915_READ(PIPEASTAT);
1158         I915_WRITE(PIPEASTAT, temp);
1159         temp = I915_READ(PIPEBSTAT);
1160         I915_WRITE(PIPEBSTAT, temp);
1161         temp = I915_READ(IIR);
1162         I915_WRITE(IIR, temp);
1163 }