shared-core/i915_irq.c

   1 /* i915_irq.c -- IRQ support for the I915 -*- linux-c -*-
   2  */
   3 /*
   4  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   5  * All Rights Reserved.
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a
   8  * copy of this software and associated documentation files (the
   9  * "Software"), to deal in the Software without restriction, including
  10  * without limitation the rights to use, copy, modify, merge, publish,
  11  * distribute, sub license, and/or sell copies of the Software, and to
  12  * permit persons to whom the Software is furnished to do so, subject to
  13  * the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the
  16  * next paragraph) shall be included in all copies or substantial portions
  17  * of the Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  20  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  21  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  22  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  23  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  24  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  25  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  26  *
  27  */
  28
  29 #include "drmP.h"
  30 #include "drm.h"
  31 #include "i915_drm.h"
  32 #include "i915_drv.h"
  33
  34 #include "intel_drv.h"
  35
  36 #define USER_INT_FLAG (1<<1)
  37 #define VSYNC_PIPEB_FLAG (1<<5)
  38 #define VSYNC_PIPEA_FLAG (1<<7)
  39 #define HOTPLUG_FLAG (1 << 17)
  40
  41 #define MAX_NOPID ((u32)~0)
  42
  43 /**
  44  * i915_get_pipe - return the the pipe associated with a given plane
  45  * @dev: DRM device
  46  * @plane: plane to look for
  47  *
  48  * The Intel Mesa & 2D drivers call the vblank routines with a plane number
  49  * rather than a pipe number, since they may not always be equal.  This routine
  50  * maps the given @plane back to a pipe number.
  51  */
  52 static int
  53 i915_get_pipe(struct drm_device *dev, int plane)
  54 {
  55         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
  56         u32 dspcntr;
  57
  58         dspcntr = plane ? I915_READ(DSPBCNTR) : I915_READ(DSPACNTR);
  59
  60         return dspcntr & DISPPLANE_SEL_PIPE_MASK ? 1 : 0;
  61 }
  62
  63 /**
  64  * i915_get_plane - return the the plane associated with a given pipe
  65  * @dev: DRM device
  66  * @pipe: pipe to look for
  67  *
  68  * The Intel Mesa & 2D drivers call the vblank routines with a plane number
  69  * rather than a plane number, since they may not always be equal.  This routine
  70  * maps the given @pipe back to a plane number.
  71  */
  72 static int
  73 i915_get_plane(struct drm_device *dev, int pipe)
  74 {
  75         if (i915_get_pipe(dev, 0) == pipe)
  76                 return 0;
  77         return 1;
  78 }
  79
  80 /**
  81  * i915_pipe_enabled - check if a pipe is enabled
  82  * @dev: DRM device
  83  * @pipe: pipe to check
  84  *
  85  * Reading certain registers when the pipe is disabled can hang the chip.
  86  * Use this routine to make sure the PLL is running and the pipe is active
  87  * before reading such registers if unsure.
  88  */
  89 static int
  90 i915_pipe_enabled(struct drm_device *dev, int pipe)
  91 {
  92         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
  93         unsigned long pipeconf = pipe ? PIPEBCONF : PIPEACONF;
  94
  95         if (I915_READ(pipeconf) & PIPEACONF_ENABLE)
  96                 return 1;
  97
  98         return 0;
  99 }
 100
 101 /**
 102  * Emit a synchronous flip.
 103  *
 104  * This function must be called with the drawable spinlock held.
 105  */
 106 static void
 107 i915_dispatch_vsync_flip(struct drm_device *dev, struct drm_drawable_info *drw,
 108                          int plane)
 109 {
 110         struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
 111         struct drm_i915_sarea *sarea_priv = master_priv->sarea_priv;
 112         u16 x1, y1, x2, y2;
 113         int pf_planes = 1 << plane;
 114
 115         DRM_SPINLOCK_ASSERT(&dev->drw_lock);
 116
 117         /* If the window is visible on the other plane, we have to flip on that
 118          * plane as well.
 119          */
 120         if (plane == 1) {
 121                 x1 = sarea_priv->planeA_x;
 122                 y1 = sarea_priv->planeA_y;
 123                 x2 = x1 + sarea_priv->planeA_w;
 124                 y2 = y1 + sarea_priv->planeA_h;
 125         } else {
 126                 x1 = sarea_priv->planeB_x;
 127                 y1 = sarea_priv->planeB_y;
 128                 x2 = x1 + sarea_priv->planeB_w;
 129                 y2 = y1 + sarea_priv->planeB_h;
 130         }
 131
 132         if (x2 > 0 && y2 > 0) {
 133                 int i, num_rects = drw->num_rects;
 134                 struct drm_clip_rect *rect = drw->rects;
 135
 136                 for (i = 0; i < num_rects; i++)
 137                         if (!(rect[i].x1 >= x2 || rect[i].y1 >= y2 ||
 138                               rect[i].x2 <= x1 || rect[i].y2 <= y1)) {
 139                                 pf_planes = 0x3;
 140
 141                                 break;
 142                         }
 143         }
 144
 145         i915_dispatch_flip(dev, pf_planes, 1);
 146 }
 147
 148 /**
 149  * Emit blits for scheduled buffer swaps.
 150  *
 151  * This function will be called with the HW lock held.
 152  */
 153 static void i915_vblank_tasklet(struct drm_device *dev)
 154 {
 155         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
 156         struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
 157         struct list_head *list, *tmp, hits, *hit;
 158         int nhits, nrects, slice[2], upper[2], lower[2], i, num_pages;
 159         unsigned counter[2];
 160         struct drm_drawable_info *drw;
 161         struct drm_i915_sarea *sarea_priv;
 162         u32 cpp = dev_priv->cpp,  offsets[3];
 163         u32 cmd = (cpp == 4) ? (XY_SRC_COPY_BLT_CMD |
 164                                 XY_SRC_COPY_BLT_WRITE_ALPHA |
 165                                 XY_SRC_COPY_BLT_WRITE_RGB)
 166                              : XY_SRC_COPY_BLT_CMD;
 167         u32 pitchropcpp;
 168         RING_LOCALS;
 169
 170         counter[0] = drm_vblank_count(dev, 0);
 171         counter[1] = drm_vblank_count(dev, 1);
 172
 173         DRM_DEBUG("\n");
 174
 175         INIT_LIST_HEAD(&hits);
 176
 177         nhits = nrects = 0;
 178
 179         /* No irqsave/restore necessary.  This tasklet may be run in an
 180          * interrupt context or normal context, but we don't have to worry
 181          * about getting interrupted by something acquiring the lock, because
 182          * we are the interrupt context thing that acquires the lock.
 183          */
 184         DRM_SPINLOCK(&dev_priv->swaps_lock);
 185
 186         /* Find buffer swaps scheduled for this vertical blank */
 187         list_for_each_safe(list, tmp, &dev_priv->vbl_swaps.head) {
 188                 struct drm_i915_vbl_swap *vbl_swap =
 189                         list_entry(list, struct drm_i915_vbl_swap, head);
 190                 int pipe = i915_get_pipe(dev, vbl_swap->plane);
 191
 192                 if ((counter[pipe] - vbl_swap->sequence) > (1<<23))
 193                         continue;
 194
 195                 master_priv = vbl_swap->minor->master->driver_priv;
 196                 sarea_priv = master_priv->sarea_priv;
 197
 198                 pitchropcpp = (sarea_priv->pitch * cpp) | (0xcc << 16) |
 199                         (cpp << 23) | (1 << 24);
 200
 201                 list_del(list);
 202                 dev_priv->swaps_pending--;
 203                 drm_vblank_put(dev, pipe);
 204
 205                 DRM_SPINUNLOCK(&dev_priv->swaps_lock);
 206                 DRM_SPINLOCK(&dev->drw_lock);
 207
 208                 drw = drm_get_drawable_info(dev, vbl_swap->drw_id);
 209
 210                 if (!drw) {
 211                         DRM_SPINUNLOCK(&dev->drw_lock);
 212                         drm_free(vbl_swap, sizeof(*vbl_swap), DRM_MEM_DRIVER);
 213                         DRM_SPINLOCK(&dev_priv->swaps_lock);
 214                         continue;
 215                 }
 216
 217                 list_for_each(hit, &hits) {
 218                         struct drm_i915_vbl_swap *swap_cmp =
 219                                 list_entry(hit, struct drm_i915_vbl_swap, head);
 220                         struct drm_drawable_info *drw_cmp =
 221                                 drm_get_drawable_info(dev, swap_cmp->drw_id);
 222
 223                         if (drw_cmp &&
 224                             drw_cmp->rects[0].y1 > drw->rects[0].y1) {
 225                                 list_add_tail(list, hit);
 226                                 break;
 227                         }
 228                 }
 229
 230                 DRM_SPINUNLOCK(&dev->drw_lock);
 231
 232                 /* List of hits was empty, or we reached the end of it */
 233                 if (hit == &hits)
 234                         list_add_tail(list, hits.prev);
 235
 236                 nhits++;
 237
 238                 DRM_SPINLOCK(&dev_priv->swaps_lock);
 239         }
 240
 241         DRM_SPINUNLOCK(&dev_priv->swaps_lock);
 242
 243         if (nhits == 0) {
 244                 return;
 245         }
 246
 247         i915_kernel_lost_context(dev);
 248
 249         upper[0] = upper[1] = 0;
 250         slice[0] = max(sarea_priv->planeA_h / nhits, 1);
 251         slice[1] = max(sarea_priv->planeB_h / nhits, 1);
 252         lower[0] = sarea_priv->planeA_y + slice[0];
 253         lower[1] = sarea_priv->planeB_y + slice[0];
 254
 255         offsets[0] = sarea_priv->front_offset;
 256         offsets[1] = sarea_priv->back_offset;
 257         offsets[2] = sarea_priv->third_offset;
 258         num_pages = sarea_priv->third_handle ? 3 : 2;
 259
 260         DRM_SPINLOCK(&dev->drw_lock);
 261
 262         /* Emit blits for buffer swaps, partitioning both outputs into as many
 263          * slices as there are buffer swaps scheduled in order to avoid tearing
 264          * (based on the assumption that a single buffer swap would always
 265          * complete before scanout starts).
 266          */
 267         for (i = 0; i++ < nhits;
 268              upper[0] = lower[0], lower[0] += slice[0],
 269              upper[1] = lower[1], lower[1] += slice[1]) {
 270                 int init_drawrect = 1;
 271
 272                 if (i == nhits)
 273                         lower[0] = lower[1] = sarea_priv->height;
 274
 275                 list_for_each(hit, &hits) {
 276                         struct drm_i915_vbl_swap *swap_hit =
 277                                 list_entry(hit, struct drm_i915_vbl_swap, head);
 278                         struct drm_clip_rect *rect;
 279                         int num_rects, plane, front, back;
 280                         unsigned short top, bottom;
 281
 282                         drw = drm_get_drawable_info(dev, swap_hit->drw_id);
 283
 284                         if (!drw)
 285                                 continue;
 286
 287                         plane = swap_hit->plane;
 288
 289                         if (swap_hit->flip) {
 290                                 i915_dispatch_vsync_flip(dev, drw, plane);
 291                                 continue;
 292                         }
 293
 294                         if (init_drawrect) {
 295                                 BEGIN_LP_RING(6);
 296
 297                                 OUT_RING(GFX_OP_DRAWRECT_INFO);
 298                                 OUT_RING(0);
 299                                 OUT_RING(0);
 300                                 OUT_RING(sarea_priv->width | sarea_priv->height << 16);
 301                                 OUT_RING(sarea_priv->width | sarea_priv->height << 16);
 302                                 OUT_RING(0);
 303
 304                                 ADVANCE_LP_RING();
 305
 306                                 sarea_priv->ctxOwner = DRM_KERNEL_CONTEXT;
 307
 308                                 init_drawrect = 0;
 309                         }
 310
 311                         rect = drw->rects;
 312                         top = upper[plane];
 313                         bottom = lower[plane];
 314
 315                         front = (master_priv->sarea_priv->pf_current_page >>
 316                                  (2 * plane)) & 0x3;
 317                         back = (front + 1) % num_pages;
 318
 319                         for (num_rects = drw->num_rects; num_rects--; rect++) {
 320                                 int y1 = max(rect->y1, top);
 321                                 int y2 = min(rect->y2, bottom);
 322
 323                                 if (y1 >= y2)
 324                                         continue;
 325
 326                                 BEGIN_LP_RING(8);
 327
 328                                 OUT_RING(cmd);
 329                                 OUT_RING(pitchropcpp);
 330                                 OUT_RING((y1 << 16) | rect->x1);
 331                                 OUT_RING((y2 << 16) | rect->x2);
 332                                 OUT_RING(offsets[front]);
 333                                 OUT_RING((y1 << 16) | rect->x1);
 334                                 OUT_RING(pitchropcpp & 0xffff);
 335                                 OUT_RING(offsets[back]);
 336
 337                                 ADVANCE_LP_RING();
 338                         }
 339                 }
 340         }
 341
 342         DRM_SPINUNLOCK(&dev->drw_lock);
 343
 344         list_for_each_safe(hit, tmp, &hits) {
 345                 struct drm_i915_vbl_swap *swap_hit =
 346                         list_entry(hit, struct drm_i915_vbl_swap, head);
 347
 348                 list_del(hit);
 349
 350                 drm_free(swap_hit, sizeof(*swap_hit), DRM_MEM_DRIVER);
 351         }
 352 }
 353 #if 0
 354 static int i915_in_vblank(struct drm_device *dev, int pipe)
 355 {
 356         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
 357         unsigned long pipedsl, vblank, vtotal;
 358         unsigned long vbl_start, vbl_end, cur_line;
 359
 360         pipedsl = pipe ? PIPEBDSL : PIPEADSL;
 361         vblank = pipe ? VBLANK_B : VBLANK_A;
 362         vtotal = pipe ? VTOTAL_B : VTOTAL_A;
 363
 364         vbl_start = I915_READ(vblank) & VBLANK_START_MASK;
 365         vbl_end = (I915_READ(vblank) >> VBLANK_END_SHIFT) & VBLANK_END_MASK;
 366
 367         cur_line = I915_READ(pipedsl);
 368
 369         if (cur_line >= vbl_start)
 370                 return 1;
 371
 372         return 0;
 373 }
 374 #endif
 375 u32 i915_get_vblank_counter(struct drm_device *dev, int plane)
 376 {
 377         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
 378         unsigned long high_frame;
 379         unsigned long low_frame;
 380         u32 high1, high2, low, count;
 381         int pipe;
 382
 383         pipe = i915_get_pipe(dev, plane);
 384         high_frame = pipe ? PIPEBFRAMEHIGH : PIPEAFRAMEHIGH;
 385         low_frame = pipe ? PIPEBFRAMEPIXEL : PIPEAFRAMEPIXEL;
 386
 387         if (!i915_pipe_enabled(dev, pipe)) {
 388             printk(KERN_ERR "trying to get vblank count for disabled "
 389                    "pipe %d\n", pipe);
 390             return 0;
 391         }
 392
 393         /*
 394          * High & low register fields aren't synchronized, so make sure
 395          * we get a low value that's stable across two reads of the high
 396          * register.
 397          */
 398         do {
 399                 high1 = ((I915_READ(high_frame) & PIPE_FRAME_HIGH_MASK) >>
 400                          PIPE_FRAME_HIGH_SHIFT);
 401                 low =  ((I915_READ(low_frame) & PIPE_FRAME_LOW_MASK) >>
 402                         PIPE_FRAME_LOW_SHIFT);
 403                 high2 = ((I915_READ(high_frame) & PIPE_FRAME_HIGH_MASK) >>
 404                          PIPE_FRAME_HIGH_SHIFT);
 405         } while (high1 != high2);
 406
 407         count = (high1 << 8) | low;
 408
 409         /*
 410          * If we're in the middle of the vblank period, the
 411          * above regs won't have been updated yet, so return
 412          * an incremented count to stay accurate
 413          */
 414 #if 0
 415         if (i915_in_vblank(dev, pipe))
 416                 count++;
 417 #endif
 418         /* count may be reset by other driver(e.g. 2D driver),
 419            we have no way to know if it is wrapped or resetted
 420            when count is zero. do a rough guess.
 421         */
 422         if (count == 0 && dev->last_vblank[pipe] < dev->max_vblank_count/2)
 423                 dev->last_vblank[pipe] = 0;
 424
 425         return count;
 426 }
 427
 428 #define HOTPLUG_CMD_CRT 1
 429 #define HOTPLUG_CMD_CRT_DIS 2
 430 #define HOTPLUG_CMD_SDVOB 4
 431 #define HOTPLUG_CMD_SDVOC 8
 432
 433 static struct drm_device *hotplug_dev;
 434 static int hotplug_cmd = 0;
 435 static spinlock_t hotplug_lock = SPIN_LOCK_UNLOCKED;
 436
 437 static void i915_hotplug_crt(struct drm_device *dev, bool connected)
 438 {
 439         struct drm_output *output;
 440         struct intel_output *iout;
 441
 442         mutex_lock(&dev->mode_config.mutex);
 443
 444         /* find the crt output */
 445         list_for_each_entry(output, &dev->mode_config.output_list, head) {
 446                 iout = output->driver_private;
 447                 if (iout->type == INTEL_OUTPUT_ANALOG)
 448                         break;
 449                 else
 450                         iout = 0;
 451         }
 452
 453         if (iout == 0)
 454                 goto unlock;
 455
 456         drm_hotplug_stage_two(dev, output, connected);
 457
 458 unlock:
 459         mutex_unlock(&dev->mode_config.mutex);
 460 }
 461
 462 static void i915_hotplug_sdvo(struct drm_device *dev, int sdvoB)
 463 {
 464         struct drm_output *output = 0;
 465         enum drm_output_status status;
 466
 467         mutex_lock(&dev->mode_config.mutex);
 468
 469         output = intel_sdvo_find(dev, sdvoB);
 470
 471         if (!output) {
 472                 DRM_ERROR("could not find sdvo%s output\n", sdvoB ? "B" : "C");
 473                 goto unlock;
 474         }
 475
 476         status = output->funcs->detect(output);
 477
 478         if (status != output_status_connected)
 479                 drm_hotplug_stage_two(dev, output, false);
 480         else
 481                 drm_hotplug_stage_two(dev, output, true);
 482
 483         /* wierd hw bug, sdvo stop sending interupts */
 484         intel_sdvo_set_hotplug(output, 1);
 485
 486 unlock:
 487         mutex_unlock(&dev->mode_config.mutex);
 488 }
 489 /*
 490  * This code is called in a more safe envirmoent to handle the hotplugs.
 491  * Add code here for hotplug love to userspace.
 492  */
 493 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
 494 static void i915_hotplug_work_func(void *work)
 495 #else
 496 static void i915_hotplug_work_func(struct work_struct *work)
 497 #endif
 498 {
 499         struct drm_device *dev = hotplug_dev;
 500         int crt;
 501         int crtDis;
 502         int sdvoB;
 503         int sdvoC;
 504
 505         spin_lock(&hotplug_lock);
 506         crt = hotplug_cmd & HOTPLUG_CMD_CRT;
 507         crtDis = hotplug_cmd & HOTPLUG_CMD_CRT_DIS;
 508         sdvoB = hotplug_cmd & HOTPLUG_CMD_SDVOB;
 509         sdvoC = hotplug_cmd & HOTPLUG_CMD_SDVOC;
 510         hotplug_cmd = 0;
 511         spin_unlock(&hotplug_lock);
 512
 513         if (crt)
 514                 i915_hotplug_crt(dev, true);
 515         if (crtDis)
 516                 i915_hotplug_crt(dev, false);
 517
 518         if (sdvoB)
 519                 i915_hotplug_sdvo(dev, 1);
 520
 521         if (sdvoC)
 522                 i915_hotplug_sdvo(dev, 0);
 523
 524 }
 525
 526 static int i915_run_hotplug_tasklet(struct drm_device *dev, uint32_t stat)
 527 {
 528 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
 529         static DECLARE_WORK(hotplug, i915_hotplug_work_func, NULL);
 530 #else
 531         static DECLARE_WORK(hotplug, i915_hotplug_work_func);
 532 #endif
 533         struct drm_i915_private *dev_priv = dev->dev_private;
 534
 535         hotplug_dev = dev;
 536
 537         if (stat & CRT_HOTPLUG_INT_STATUS) {
 538                 DRM_DEBUG("CRT event\n");
 539
 540                 if (stat & CRT_HOTPLUG_MONITOR_MASK) {
 541                         spin_lock(&hotplug_lock);
 542                         hotplug_cmd |= HOTPLUG_CMD_CRT;
 543                         spin_unlock(&hotplug_lock);
 544                 } else {
 545                         spin_lock(&hotplug_lock);
 546                         hotplug_cmd |= HOTPLUG_CMD_CRT_DIS;
 547                         spin_unlock(&hotplug_lock);
 548                 }
 549         }
 550
 551         if (stat & SDVOB_HOTPLUG_INT_STATUS) {
 552                 DRM_DEBUG("sDVOB event\n");
 553
 554                 spin_lock(&hotplug_lock);
 555                 hotplug_cmd |= HOTPLUG_CMD_SDVOB;
 556                 spin_unlock(&hotplug_lock);
 557         }
 558
 559         if (stat & SDVOC_HOTPLUG_INT_STATUS) {
 560                 DRM_DEBUG("sDVOC event\n");
 561
 562                 spin_lock(&hotplug_lock);
 563                 hotplug_cmd |= HOTPLUG_CMD_SDVOC;
 564                 spin_unlock(&hotplug_lock);
 565         }
 566
 567         queue_work(dev_priv->wq, &hotplug);
 568
 569         return 0;
 570 }
 571
 572 irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
 573 {
 574         struct drm_device *dev = (struct drm_device *) arg;
 575         struct drm_i915_master_private *master_priv;
 576         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
 577         u32 temp = 0;
 578         u32 temp2;
 579         u32 pipea_stats, pipeb_stats;
 580
 581         pipea_stats = I915_READ(I915REG_PIPEASTAT);
 582         pipeb_stats = I915_READ(I915REG_PIPEBSTAT);
 583
 584         /* On i8xx hw the IIR and IER are 16bit on i9xx its 32bit */
 585         if (IS_I9XX(dev))
 586                 temp = I915_READ(I915REG_INT_IDENTITY_R);
 587         else
 588                 temp = I915_READ16(I915REG_INT_IDENTITY_R);
 589
 590         temp2 = temp;
 591         temp &= (dev_priv->irq_enable_reg | USER_INT_FLAG);
 592
 593 #if 0
 594         /* ugly despamification of pipeb event irq */
 595         if (temp & (0xFFFFFFF ^ ((1 << 5) | (1 << 7)))) {
 596                 DRM_DEBUG("IIR %08x\n", temp2);
 597                 DRM_DEBUG("MSK %08x\n", dev_priv->irq_enable_reg | USER_INT_FLAG);
 598                 DRM_DEBUG("M&I %08x\n", temp);
 599                 DRM_DEBUG("HOT %08x\n", I915_READ(PORT_HOTPLUG_STAT));
 600         }
 601 #else
 602 #if 0
 603         DRM_DEBUG("flag=%08x\n", temp);
 604 #endif
 605 #endif
 606
 607         if (temp == 0)
 608                 return IRQ_NONE;
 609
 610         if (IS_I9XX(dev)) {
 611                 I915_WRITE(I915REG_INT_IDENTITY_R, temp);
 612                 (void) I915_READ(I915REG_INT_IDENTITY_R);
 613         } else {
 614                 I915_WRITE16(I915REG_INT_IDENTITY_R, temp);
 615                 (void) I915_READ16(I915REG_INT_IDENTITY_R);
 616         }
 617
 618         /*
 619          * Clear the PIPE(A|B)STAT regs before the IIR otherwise
 620          * we may get extra interrupts.
 621          */
 622         if (temp & VSYNC_PIPEA_FLAG) {
 623                 drm_handle_vblank(dev, i915_get_plane(dev, 0));
 624                 I915_WRITE(I915REG_PIPEASTAT,
 625                            pipea_stats | I915_VBLANK_INTERRUPT_ENABLE |
 626                            I915_VBLANK_CLEAR);
 627         }
 628
 629         if (temp & VSYNC_PIPEB_FLAG) {
 630                 drm_handle_vblank(dev, i915_get_plane(dev, 1));
 631                 I915_WRITE(I915REG_PIPEBSTAT,
 632                            pipeb_stats | I915_VBLANK_INTERRUPT_ENABLE |
 633                            I915_VBLANK_CLEAR);
 634         }
 635
 636         I915_WRITE16(I915REG_INT_IDENTITY_R, temp);
 637         (void) I915_READ16(I915REG_INT_IDENTITY_R); /* Flush posted write */
 638
 639         DRM_READMEMORYBARRIER();
 640
 641         temp &= (dev_priv->irq_enable_reg | USER_INT_FLAG | VSYNC_PIPEA_FLAG |
 642                  VSYNC_PIPEB_FLAG);
 643
 644         if (dev->primary->master) {
 645                 master_priv = dev->primary->master->driver_priv;
 646                 master_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
 647         }
 648
 649         if (temp & USER_INT_FLAG) {
 650                 DRM_WAKEUP(&dev_priv->irq_queue);
 651 #ifdef I915_HAVE_FENCE
 652                 i915_fence_handler(dev);
 653 #endif
 654         }
 655
 656         if (temp & (VSYNC_PIPEA_FLAG | VSYNC_PIPEB_FLAG)) {
 657                 if (dev_priv->swaps_pending > 0)
 658                         drm_locked_tasklet(dev, i915_vblank_tasklet);
 659         }
 660
 661         /* for now lest just ack it */
 662         if (temp & (1 << 17)) {
 663                 DRM_DEBUG("Hotplug event received\n");
 664
 665                 temp2 = I915_READ(PORT_HOTPLUG_STAT);
 666
 667                 i915_run_hotplug_tasklet(dev, temp2);
 668
 669                 I915_WRITE(PORT_HOTPLUG_STAT,temp2);
 670         }
 671
 672         return IRQ_HANDLED;
 673 }
 674
 675 int i915_emit_irq(struct drm_device *dev)
 676 {
 677         struct drm_i915_private *dev_priv = dev->dev_private;
 678         RING_LOCALS;
 679
 680         i915_kernel_lost_context(dev);
 681
 682         DRM_DEBUG("\n");
 683
 684         i915_emit_breadcrumb(dev);
 685
 686         BEGIN_LP_RING(2);
 687         OUT_RING(0);
 688         OUT_RING(GFX_OP_USER_INTERRUPT);
 689         ADVANCE_LP_RING();
 690
 691         return dev_priv->counter;
 692 }
 693
 694 void i915_user_irq_on(struct drm_i915_private *dev_priv)
 695 {
 696         DRM_SPINLOCK(&dev_priv->user_irq_lock);
 697         if (dev_priv->irq_enabled && (++dev_priv->user_irq_refcount == 1)){
 698                 dev_priv->irq_enable_reg |= USER_INT_FLAG;
 699                 I915_WRITE16(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
 700         }
 701         DRM_SPINUNLOCK(&dev_priv->user_irq_lock);
 702
 703 }
 704
 705 void i915_user_irq_off(struct drm_i915_private *dev_priv)
 706 {
 707         DRM_SPINLOCK(&dev_priv->user_irq_lock);
 708         if (dev_priv->irq_enabled && (--dev_priv->user_irq_refcount == 0)) {
 709                 //              dev_priv->irq_enable_reg &= ~USER_INT_FLAG;
 710                 //              I915_WRITE16(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
 711         }
 712         DRM_SPINUNLOCK(&dev_priv->user_irq_lock);
 713 }
 714
 715
 716 static int i915_wait_irq(struct drm_device * dev, int irq_nr)
 717 {
 718         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
 719         struct drm_i915_master_private *master_priv;
 720         int ret = 0;
 721
 722         DRM_DEBUG("irq_nr=%d breadcrumb=%d\n", irq_nr,
 723                   READ_BREADCRUMB(dev_priv));
 724
 725         if (READ_BREADCRUMB(dev_priv) >= irq_nr)
 726                 return 0;
 727
 728         i915_user_irq_on(dev_priv);
 729         DRM_WAIT_ON(ret, dev_priv->irq_queue, 3 * DRM_HZ,
 730                     READ_BREADCRUMB(dev_priv) >= irq_nr);
 731         i915_user_irq_off(dev_priv);
 732
 733         if (ret == -EBUSY) {
 734                 DRM_ERROR("EBUSY -- rec: %d emitted: %d\n",
 735                           READ_BREADCRUMB(dev_priv), (int)dev_priv->counter);
 736         }
 737
 738         if (dev->primary->master) {
 739                 master_priv = dev->primary->master->driver_priv;
 740                 master_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
 741         }
 742
 743         return ret;
 744 }
 745
 746 /* Needs the lock as it touches the ring.
 747  */
 748 int i915_irq_emit(struct drm_device *dev, void *data,
 749                          struct drm_file *file_priv)
 750 {
 751         struct drm_i915_private *dev_priv = dev->dev_private;
 752         struct drm_i915_irq_emit *emit = data;
 753         int result;
 754
 755         LOCK_TEST_WITH_RETURN(dev, file_priv);
 756
 757         if (!dev_priv) {
 758                 DRM_ERROR("called with no initialization\n");
 759                 return -EINVAL;
 760         }
 761
 762         result = i915_emit_irq(dev);
 763
 764         if (DRM_COPY_TO_USER(emit->irq_seq, &result, sizeof(int))) {
 765                 DRM_ERROR("copy_to_user\n");
 766                 return -EFAULT;
 767         }
 768
 769         return 0;
 770 }
 771
 772 /* Doesn't need the hardware lock.
 773  */
 774 int i915_irq_wait(struct drm_device *dev, void *data,
 775                   struct drm_file *file_priv)
 776 {
 777         struct drm_i915_private *dev_priv = dev->dev_private;
 778         struct drm_i915_irq_wait *irqwait = data;
 779
 780         if (!dev_priv) {
 781                 DRM_ERROR("called with no initialization\n");
 782                 return -EINVAL;
 783         }
 784
 785         return i915_wait_irq(dev, irqwait->irq_seq);
 786 }
 787
 788 int i915_enable_vblank(struct drm_device *dev, int plane)
 789 {
 790         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
 791         int pipe = i915_get_pipe(dev, plane);
 792
 793         switch (pipe) {
 794         case 0:
 795                 dev_priv->irq_enable_reg |= VSYNC_PIPEA_FLAG;
 796                 break;
 797         case 1:
 798                 dev_priv->irq_enable_reg |= VSYNC_PIPEB_FLAG;
 799                 break;
 800         default:
 801                 DRM_ERROR("tried to enable vblank on non-existent pipe %d\n",
 802                           pipe);
 803                 break;
 804         }
 805
 806         I915_WRITE16(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
 807
 808         return 0;
 809 }
 810
 811 void i915_disable_vblank(struct drm_device *dev, int plane)
 812 {
 813         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
 814         int pipe = i915_get_pipe(dev, plane);
 815
 816         switch (pipe) {
 817         case 0:
 818                 dev_priv->irq_enable_reg &= ~VSYNC_PIPEA_FLAG;
 819                 break;
 820         case 1:
 821                 dev_priv->irq_enable_reg &= ~VSYNC_PIPEB_FLAG;
 822                 break;
 823         default:
 824                 DRM_ERROR("tried to disable vblank on non-existent pipe %d\n",
 825                           pipe);
 826                 break;
 827         }
 828
 829         I915_WRITE16(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
 830 }
 831
 832 void i915_enable_interrupt (struct drm_device *dev)
 833 {
 834         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
 835         struct drm_output *o;
 836
 837         dev_priv->irq_enable_reg |= USER_INT_FLAG;
 838
 839         if (IS_I9XX(dev) && dev->mode_config.num_output) {
 840                 dev_priv->irq_enable_reg |= HOTPLUG_FLAG;
 841
 842                 /* Activate the CRT */
 843                 I915_WRITE(PORT_HOTPLUG_EN, CRT_HOTPLUG_INT_EN);
 844
 845                 /* SDVOB */
 846                 o = intel_sdvo_find(dev, 1);
 847                 if (o && intel_sdvo_supports_hotplug(o)) {
 848                         intel_sdvo_set_hotplug(o, 1);
 849                         I915_WRITE(PORT_HOTPLUG_EN, SDVOB_HOTPLUG_INT_EN);
 850                 }
 851
 852                 /* SDVOC */
 853                 o = intel_sdvo_find(dev, 0);
 854                 if (o && intel_sdvo_supports_hotplug(o)) {
 855                         intel_sdvo_set_hotplug(o, 1);
 856                         I915_WRITE(PORT_HOTPLUG_EN, SDVOC_HOTPLUG_INT_EN);
 857                 }
 858
 859         }
 860
 861         if (IS_I9XX(dev)) {
 862                 I915_WRITE(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
 863         } else {
 864                 I915_WRITE16(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
 865         }
 866
 867         DRM_DEBUG("HEN %08x\n",I915_READ(PORT_HOTPLUG_EN));
 868         DRM_DEBUG("HST %08x\n",I915_READ(PORT_HOTPLUG_STAT));
 869         DRM_DEBUG("IER %08x\n",I915_READ(I915REG_INT_ENABLE_R));
 870         DRM_DEBUG("SDB %08x\n",I915_READ(SDVOB));
 871
 872         I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));
 873
 874         dev_priv->irq_enabled = 1;
 875 }
 876
 877 /* Set the vblank monitor pipe
 878  */
 879 int i915_vblank_pipe_set(struct drm_device *dev, void *data,
 880                          struct drm_file *file_priv)
 881 {
 882         struct drm_i915_private *dev_priv = dev->dev_private;
 883         struct drm_i915_vblank_pipe *pipe = data;
 884
 885         if (!dev_priv) {
 886                 DRM_ERROR("called with no initialization\n");
 887                 return -EINVAL;
 888         }
 889
 890         if (pipe->pipe & ~(DRM_I915_VBLANK_PIPE_A|DRM_I915_VBLANK_PIPE_B)) {
 891                 DRM_ERROR("called with invalid pipe 0x%x\n", pipe->pipe);
 892                 return -EINVAL;
 893         }
 894
 895         dev_priv->vblank_pipe = pipe->pipe;
 896
 897         return 0;
 898 }
 899
 900 int i915_vblank_pipe_get(struct drm_device *dev, void *data,
 901                          struct drm_file *file_priv)
 902 {
 903         struct drm_i915_private *dev_priv = dev->dev_private;
 904         struct drm_i915_vblank_pipe *pipe = data;
 905         u16 flag;
 906
 907         if (!dev_priv) {
 908                 DRM_ERROR("called with no initialization\n");
 909                 return -EINVAL;
 910         }
 911
 912         flag = I915_READ(I915REG_INT_ENABLE_R);
 913         pipe->pipe = 0;
 914         if (flag & VSYNC_PIPEA_FLAG)
 915                 pipe->pipe |= DRM_I915_VBLANK_PIPE_A;
 916         if (flag & VSYNC_PIPEB_FLAG)
 917                 pipe->pipe |= DRM_I915_VBLANK_PIPE_B;
 918
 919         return 0;
 920 }
 921
 922 /**
 923  * Schedule buffer swap at given vertical blank.
 924  */
 925 int i915_vblank_swap(struct drm_device *dev, void *data,
 926                      struct drm_file *file_priv)
 927 {
 928         struct drm_i915_private *dev_priv = dev->dev_private;
 929         struct drm_i915_master_private *master_priv;
 930         struct drm_i915_vblank_swap *swap = data;
 931         struct drm_i915_vbl_swap *vbl_swap;
 932         unsigned int pipe, seqtype, curseq, plane;
 933         unsigned long irqflags;
 934         struct list_head *list;
 935         int ret;
 936
 937         if (!dev_priv) {
 938                 DRM_ERROR("%s called with no initialization\n", __func__);
 939                 return -EINVAL;
 940         }
 941
 942         if (!dev->primary->master)
 943                 return -EINVAL;
 944
 945         master_priv = dev->primary->master->driver_priv;
 946
 947         if (master_priv->sarea_priv->rotation) {
 948                 DRM_DEBUG("Rotation not supported\n");
 949                 return -EINVAL;
 950         }
 951
 952         if (swap->seqtype & ~(_DRM_VBLANK_RELATIVE | _DRM_VBLANK_ABSOLUTE |
 953                              _DRM_VBLANK_SECONDARY | _DRM_VBLANK_NEXTONMISS |
 954                              _DRM_VBLANK_FLIP)) {
 955                 DRM_ERROR("Invalid sequence type 0x%x\n", swap->seqtype);
 956                 return -EINVAL;
 957         }
 958
 959         plane = (swap->seqtype & _DRM_VBLANK_SECONDARY) ? 1 : 0;
 960         pipe = i915_get_pipe(dev, plane);
 961
 962         seqtype = swap->seqtype & (_DRM_VBLANK_RELATIVE | _DRM_VBLANK_ABSOLUTE);
 963
 964         if (!(dev_priv->vblank_pipe & (1 << pipe))) {
 965                 DRM_ERROR("Invalid pipe %d\n", pipe);
 966                 return -EINVAL;
 967         }
 968
 969         DRM_SPINLOCK_IRQSAVE(&dev->drw_lock, irqflags);
 970
 971         /* It makes no sense to schedule a swap for a drawable that doesn't have
 972          * valid information at this point. E.g. this could mean that the X
 973          * server is too old to push drawable information to the DRM, in which
 974          * case all such swaps would become ineffective.
 975          */
 976         if (!drm_get_drawable_info(dev, swap->drawable)) {
 977                 DRM_SPINUNLOCK_IRQRESTORE(&dev->drw_lock, irqflags);
 978                 DRM_DEBUG("Invalid drawable ID %d\n", swap->drawable);
 979                 return -EINVAL;
 980         }
 981
 982         DRM_SPINUNLOCK_IRQRESTORE(&dev->drw_lock, irqflags);
 983
 984         drm_update_vblank_count(dev, pipe);
 985         curseq = drm_vblank_count(dev, pipe);
 986
 987         if (seqtype == _DRM_VBLANK_RELATIVE)
 988                 swap->sequence += curseq;
 989
 990         if ((curseq - swap->sequence) <= (1<<23)) {
 991                 if (swap->seqtype & _DRM_VBLANK_NEXTONMISS) {
 992                         swap->sequence = curseq + 1;
 993                 } else {
 994                         DRM_DEBUG("Missed target sequence\n");
 995                         return -EINVAL;
 996                 }
 997         }
 998
 999         if (swap->seqtype & _DRM_VBLANK_FLIP) {
1000                 swap->sequence--;
1001
1002                 if ((curseq - swap->sequence) <= (1<<23)) {
1003                         struct drm_drawable_info *drw;
1004
1005                         LOCK_TEST_WITH_RETURN(dev, file_priv);
1006
1007                         DRM_SPINLOCK_IRQSAVE(&dev->drw_lock, irqflags);
1008
1009                         drw = drm_get_drawable_info(dev, swap->drawable);
1010
1011                         if (!drw) {
1012                                 DRM_SPINUNLOCK_IRQRESTORE(&dev->drw_lock,
1013                                     irqflags);
1014                                 DRM_DEBUG("Invalid drawable ID %d\n",
1015                                           swap->drawable);
1016                                 return -EINVAL;
1017                         }
1018
1019                         i915_dispatch_vsync_flip(dev, drw, plane);
1020
1021                         DRM_SPINUNLOCK_IRQRESTORE(&dev->drw_lock, irqflags);
1022
1023                         return 0;
1024                 }
1025         }
1026
1027         DRM_SPINLOCK_IRQSAVE(&dev_priv->swaps_lock, irqflags);
1028
1029         list_for_each(list, &dev_priv->vbl_swaps.head) {
1030                 vbl_swap = list_entry(list, struct drm_i915_vbl_swap, head);
1031
1032                 if (vbl_swap->drw_id == swap->drawable &&
1033                     vbl_swap->plane == plane &&
1034                     vbl_swap->sequence == swap->sequence) {
1035                         vbl_swap->flip = (swap->seqtype & _DRM_VBLANK_FLIP);
1036                         DRM_SPINUNLOCK_IRQRESTORE(&dev_priv->swaps_lock, irqflags);
1037                         DRM_DEBUG("Already scheduled\n");
1038                         return 0;
1039                 }
1040         }
1041
1042         DRM_SPINUNLOCK_IRQRESTORE(&dev_priv->swaps_lock, irqflags);
1043
1044         if (dev_priv->swaps_pending >= 100) {
1045                 DRM_DEBUG("Too many swaps queued\n");
1046                 return -EBUSY;
1047         }
1048
1049         vbl_swap = drm_calloc(1, sizeof(*vbl_swap), DRM_MEM_DRIVER);
1050
1051         if (!vbl_swap) {
1052                 DRM_ERROR("Failed to allocate memory to queue swap\n");
1053                 return -ENOMEM;
1054         }
1055
1056         DRM_DEBUG("\n");
1057
1058         ret = drm_vblank_get(dev, pipe);
1059         if (ret) {
1060                 drm_free(vbl_swap, sizeof(*vbl_swap), DRM_MEM_DRIVER);
1061                 return ret;
1062         }
1063
1064         vbl_swap->drw_id = swap->drawable;
1065         vbl_swap->plane = plane;
1066         vbl_swap->sequence = swap->sequence;
1067         vbl_swap->flip = (swap->seqtype & _DRM_VBLANK_FLIP);
1068         vbl_swap->minor = file_priv->minor;
1069
1070         if (vbl_swap->flip)
1071                 swap->sequence++;
1072
1073         DRM_SPINLOCK_IRQSAVE(&dev_priv->swaps_lock, irqflags);
1074
1075         list_add_tail(&vbl_swap->head, &dev_priv->vbl_swaps.head);
1076         dev_priv->swaps_pending++;
1077
1078         DRM_SPINUNLOCK_IRQRESTORE(&dev_priv->swaps_lock, irqflags);
1079
1080         return 0;
1081 }
1082
1083 /* drm_dma.h hooks
1084 */
1085 void i915_driver_irq_preinstall(struct drm_device * dev)
1086 {
1087         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
1088
1089         I915_WRITE16(I915REG_HWSTAM, 0xeffe);
1090         if (IS_I9XX(dev)) {
1091                 I915_WRITE(I915REG_INT_MASK_R, 0x0);
1092                 I915_WRITE(I915REG_INT_ENABLE_R, 0x0);
1093         } else {
1094                 I915_WRITE16(I915REG_INT_MASK_R, 0x0);
1095                 I915_WRITE16(I915REG_INT_ENABLE_R, 0x0);
1096         }
1097
1098 }
1099
1100 int i915_driver_irq_postinstall(struct drm_device * dev)
1101 {
1102         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
1103         int ret, num_pipes = 2;
1104
1105         DRM_SPININIT(&dev_priv->swaps_lock, "swap");
1106         INIT_LIST_HEAD(&dev_priv->vbl_swaps.head);
1107         dev_priv->swaps_pending = 0;
1108
1109         DRM_SPININIT(&dev_priv->user_irq_lock, "userirq");
1110         dev_priv->user_irq_refcount = 0;
1111         dev_priv->irq_enable_reg = 0;
1112
1113         ret = drm_vblank_init(dev, num_pipes);
1114         if (ret)
1115                 return ret;
1116
1117         dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
1118
1119         i915_enable_interrupt(dev);
1120         DRM_INIT_WAITQUEUE(&dev_priv->irq_queue);
1121
1122         /*
1123          * Initialize the hardware status page IRQ location.
1124          */
1125
1126         I915_WRITE(I915REG_INSTPM, (1 << 5) | (1 << 21));
1127         return 0;
1128 }
1129
1130 void i915_driver_irq_uninstall(struct drm_device * dev)
1131 {
1132         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
1133         u32 temp;
1134
1135         if (!dev_priv)
1136                 return;
1137
1138         dev_priv->irq_enabled = 0;
1139
1140
1141         if(IS_I9XX(dev)) {
1142                 I915_WRITE(I915REG_HWSTAM, 0xffffffff);
1143                 I915_WRITE(I915REG_INT_MASK_R, 0xffffffff);
1144                 I915_WRITE(I915REG_INT_ENABLE_R, 0x0);
1145
1146                 temp = I915_READ(I915REG_INT_IDENTITY_R);
1147                 I915_WRITE(I915REG_INT_IDENTITY_R, temp);
1148         } else {
1149                 I915_WRITE16(I915REG_HWSTAM, 0xffff);
1150                 I915_WRITE16(I915REG_INT_MASK_R, 0xffff);
1151                 I915_WRITE16(I915REG_INT_ENABLE_R, 0x0);
1152
1153                 temp = I915_READ16(I915REG_INT_IDENTITY_R);
1154                 I915_WRITE16(I915REG_INT_IDENTITY_R, temp);
1155         }
1156 }