shared-core/savage_drv.h

   1 /* savage_drv.h -- Private header for the savage driver
   2  *
   3  * Copyright 2004  Felix Kuehling
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sub license,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the
  14  * next paragraph) shall be included in all copies or substantial portions
  15  * of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  20  * NON-INFRINGEMENT. IN NO EVENT SHALL FELIX KUEHLING BE LIABLE FOR
  21  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
  22  * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  23  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24  */
  25
  26 #ifndef __SAVAGE_DRV_H__
  27 #define __SAVAGE_DRV_H__
  28
  29 #define DRIVER_AUTHOR   "Felix Kuehling"
  30
  31 #define DRIVER_NAME     "savage"
  32 #define DRIVER_DESC     "Savage3D/MX/IX, Savage4, SuperSavage, Twister, ProSavage[DDR]"
  33 #define DRIVER_DATE     "20050110"
  34
  35 #define DRIVER_MAJOR            2
  36 #define DRIVER_MINOR            1
  37 #define DRIVER_PATCHLEVEL       2
  38 /* Interface history:
  39  *
  40  * 1.x   The DRM driver from the VIA/S3 code drop, basically a dummy
  41  * 2.0   The first real DRM
  42  * 2.1   Scissors registers managed by the DRM, 3D operations clipped by
  43  *       cliprects of the cmdbuf ioctl
  44  */
  45
  46 typedef struct drm_savage_age {
  47         uint16_t event;
  48         unsigned int wrap;
  49 } drm_savage_age_t;
  50
  51 typedef struct drm_savage_buf_priv {
  52         struct drm_savage_buf_priv *next;
  53         struct drm_savage_buf_priv *prev;
  54         drm_savage_age_t age;
  55         drm_buf_t *buf;
  56 } drm_savage_buf_priv_t;
  57
  58 /* interesting bits of hardware state that are saved in dev_priv */
  59 typedef union {
  60         struct drm_savage_common_state {
  61                 uint32_t vbaddr;
  62         } common;
  63         struct {
  64                 unsigned char pad[sizeof(struct drm_savage_common_state)];
  65                 uint32_t texctrl, texaddr;
  66                 uint32_t scstart, new_scstart;
  67                 uint32_t scend, new_scend;
  68         } s3d;
  69         struct {
  70                 unsigned char pad[sizeof(struct drm_savage_common_state)];
  71                 uint32_t texdescr, texaddr0, texaddr1;
  72                 uint32_t drawctrl0, new_drawctrl0;
  73                 uint32_t drawctrl1, new_drawctrl1;
  74         } s4;
  75 } drm_savage_state_t;
  76
  77 /* these chip tags should match the ones in the 2D driver in savage_regs.h. */
  78 enum savage_family {
  79         S3_UNKNOWN = 0,
  80         S3_SAVAGE3D,
  81         S3_SAVAGE_MX,
  82         S3_SAVAGE4,
  83         S3_PROSAVAGE,
  84         S3_TWISTER,
  85         S3_PROSAVAGEDDR,
  86         S3_SUPERSAVAGE,
  87         S3_SAVAGE2000,
  88         S3_LAST
  89 };
  90
  91 #define S3_SAVAGE3D_SERIES(chip)  ((chip>=S3_SAVAGE3D) && (chip<=S3_SAVAGE_MX))
  92
  93 #define S3_SAVAGE4_SERIES(chip)  ((chip==S3_SAVAGE4)            \
  94                                   || (chip==S3_PROSAVAGE)       \
  95                                   || (chip==S3_TWISTER)         \
  96                                   || (chip==S3_PROSAVAGEDDR))
  97
  98 #define S3_SAVAGE_MOBILE_SERIES(chip)   ((chip==S3_SAVAGE_MX) || (chip==S3_SUPERSAVAGE))
  99
 100 #define S3_SAVAGE_SERIES(chip)    ((chip>=S3_SAVAGE3D) && (chip<=S3_SAVAGE2000))
 101
 102 #define S3_MOBILE_TWISTER_SERIES(chip)   ((chip==S3_TWISTER)    \
 103                                           ||(chip==S3_PROSAVAGEDDR))
 104
 105 /* flags */
 106 #define SAVAGE_IS_AGP 1
 107
 108 typedef struct drm_savage_private {
 109         drm_savage_sarea_t *sarea_priv;
 110
 111         drm_savage_buf_priv_t head, tail;
 112
 113         /* who am I? */
 114         enum savage_family chipset;
 115
 116         unsigned int cob_size;
 117         unsigned int bci_threshold_lo, bci_threshold_hi;
 118         unsigned int dma_type;
 119
 120         /* frame buffer layout */
 121         unsigned int fb_bpp;
 122         unsigned int front_offset, front_pitch;
 123         unsigned int back_offset, back_pitch;
 124         unsigned int depth_bpp;
 125         unsigned int depth_offset, depth_pitch;
 126
 127         /* bitmap descriptors for swap and clear */
 128         unsigned int front_bd, back_bd, depth_bd;
 129
 130         /* local textures */
 131         unsigned int texture_offset;
 132         unsigned int texture_size;
 133
 134         /* memory regions in physical memory */
 135         drm_local_map_t *sarea;
 136         drm_local_map_t *mmio;
 137         drm_local_map_t *fb;
 138         drm_local_map_t *aperture;
 139         drm_local_map_t *status;
 140         drm_local_map_t *agp_textures;
 141         drm_local_map_t *cmd_dma;
 142
 143         struct {
 144                 int handle;
 145                 unsigned long base, size;
 146         } mtrr[3];
 147
 148         /* BCI and status-related stuff */
 149         volatile uint32_t *status_ptr, *bci_ptr;
 150         uint32_t status_used_mask;
 151         uint16_t event_counter;
 152         unsigned int event_wrap;
 153
 154         /* saved hw state for global/local check on S3D */
 155         uint32_t hw_draw_ctrl, hw_zbuf_ctrl;
 156         /* and for scissors (global, so don't emit if not changed) */
 157         uint32_t hw_scissors_start, hw_scissors_end;
 158
 159         drm_savage_state_t state;
 160
 161         /* after emitting a wait cmd Savage3D needs 63 nops before next DMA */
 162         unsigned int waiting;
 163
 164         /* config/hardware-dependent function pointers */
 165         int (*wait_fifo)(struct drm_savage_private *dev_priv, unsigned int n);
 166         int (*wait_evnt)(struct drm_savage_private *dev_priv, uint16_t e);
 167         /* Err, there is a macro wait_event in include/linux/wait.h.
 168          * Avoid unwanted macro expansion. */
 169         void (*emit_clip_rect)(struct drm_savage_private *dev_priv,
 170                                drm_clip_rect_t *pbox);
 171 } drm_savage_private_t;
 172
 173 /* ioctls */
 174 extern int savage_bci_init(DRM_IOCTL_ARGS);
 175 extern int savage_bci_cmdbuf(DRM_IOCTL_ARGS);
 176 extern int savage_bci_event_emit(DRM_IOCTL_ARGS);
 177 extern int savage_bci_event_wait(DRM_IOCTL_ARGS);
 178 extern int savage_bci_buffers(DRM_IOCTL_ARGS);
 179
 180 /* BCI functions */
 181 extern uint16_t savage_bci_emit_event(drm_savage_private_t *dev_priv,
 182                                       unsigned int flags);
 183 extern void savage_freelist_put(drm_device_t *dev, drm_buf_t *buf);
 184 extern int savage_preinit(drm_device_t *dev, unsigned long chipset);
 185 extern int savage_postcleanup(drm_device_t *dev);
 186 extern int savage_do_cleanup_bci(drm_device_t *dev);
 187 extern void savage_reclaim_buffers(drm_device_t *dev, DRMFILE filp);
 188
 189 /* state functions */
 190 extern void savage_emit_clip_rect_s3d(drm_savage_private_t *dev_priv,
 191                                       drm_clip_rect_t *pbox);
 192 extern void savage_emit_clip_rect_s4(drm_savage_private_t *dev_priv,
 193                                      drm_clip_rect_t *pbox);
 194
 195 #define SAVAGE_FB_SIZE_S3       0x01000000      /*  16MB */
 196 #define SAVAGE_FB_SIZE_S4       0x02000000      /*  32MB */
 197 #define SAVAGE_MMIO_SIZE        0x00080000      /* 512kB */
 198 #define SAVAGE_APERTURE_OFFSET  0x02000000      /*  32MB */
 199 #define SAVAGE_APERTURE_SIZE    0x05000000      /* 5 tiled surfaces, 16MB each */
 200
 201 #define SAVAGE_BCI_OFFSET       0x00010000      /* offset of the BCI region
 202                                                  * inside the MMIO region */
 203 #define SAVAGE_BCI_FIFO_SIZE    32              /* number of entries in on-chip
 204                                                  * BCI FIFO */
 205
 206 /*
 207  * MMIO registers
 208  */
 209 #define SAVAGE_STATUS_WORD0             0x48C00
 210 #define SAVAGE_STATUS_WORD1             0x48C04
 211 #define SAVAGE_ALT_STATUS_WORD0         0x48C60
 212
 213 #define SAVAGE_FIFO_USED_MASK_S3D       0x0001ffff
 214 #define SAVAGE_FIFO_USED_MASK_S4        0x001fffff
 215
 216 /* Copied from savage_bci.h in the 2D driver with some renaming. */
 217
 218 /* Bitmap descriptors */
 219 #define SAVAGE_BD_STRIDE_SHIFT 0
 220 #define SAVAGE_BD_BPP_SHIFT   16
 221 #define SAVAGE_BD_TILE_SHIFT  24
 222 #define SAVAGE_BD_BW_DISABLE  (1<<28)
 223 /* common: */
 224 #define SAVAGE_BD_TILE_LINEAR           0
 225 /* savage4, MX, IX, 3D */
 226 #define SAVAGE_BD_TILE_16BPP            2
 227 #define SAVAGE_BD_TILE_32BPP            3
 228 /* twister, prosavage, DDR, supersavage, 2000 */
 229 #define SAVAGE_BD_TILE_DEST             1
 230 #define SAVAGE_BD_TILE_TEXTURE          2
 231 /* GBD - BCI enable */
 232 /* savage4, MX, IX, 3D */
 233 #define SAVAGE_GBD_BCI_ENABLE                    8
 234 /* twister, prosavage, DDR, supersavage, 2000 */
 235 #define SAVAGE_GBD_BCI_ENABLE_TWISTER            0
 236
 237 #define SAVAGE_GBD_BIG_ENDIAN                    4
 238 #define SAVAGE_GBD_LITTLE_ENDIAN                 0
 239 #define SAVAGE_GBD_64                            1
 240
 241 /*  Global Bitmap Descriptor */
 242 #define SAVAGE_BCI_GLB_BD_LOW             0x8168
 243 #define SAVAGE_BCI_GLB_BD_HIGH            0x816C
 244
 245 /*
 246  * BCI registers
 247  */
 248 /* Savage4/Twister/ProSavage 3D registers */
 249 #define SAVAGE_DRAWLOCALCTRL_S4         0x1e
 250 #define SAVAGE_TEXPALADDR_S4            0x1f
 251 #define SAVAGE_TEXCTRL0_S4              0x20
 252 #define SAVAGE_TEXCTRL1_S4              0x21
 253 #define SAVAGE_TEXADDR0_S4              0x22
 254 #define SAVAGE_TEXADDR1_S4              0x23
 255 #define SAVAGE_TEXBLEND0_S4             0x24
 256 #define SAVAGE_TEXBLEND1_S4             0x25
 257 #define SAVAGE_TEXXPRCLR_S4             0x26 /* never used */
 258 #define SAVAGE_TEXDESCR_S4              0x27
 259 #define SAVAGE_FOGTABLE_S4              0x28
 260 #define SAVAGE_FOGCTRL_S4               0x30
 261 #define SAVAGE_STENCILCTRL_S4           0x31
 262 #define SAVAGE_ZBUFCTRL_S4              0x32
 263 #define SAVAGE_ZBUFOFF_S4               0x33
 264 #define SAVAGE_DESTCTRL_S4              0x34
 265 #define SAVAGE_DRAWCTRL0_S4             0x35
 266 #define SAVAGE_DRAWCTRL1_S4             0x36
 267 #define SAVAGE_ZWATERMARK_S4            0x37
 268 #define SAVAGE_DESTTEXRWWATERMARK_S4    0x38
 269 #define SAVAGE_TEXBLENDCOLOR_S4         0x39
 270 /* Savage3D/MX/IX 3D registers */
 271 #define SAVAGE_TEXPALADDR_S3D           0x18
 272 #define SAVAGE_TEXXPRCLR_S3D            0x19 /* never used */
 273 #define SAVAGE_TEXADDR_S3D              0x1A
 274 #define SAVAGE_TEXDESCR_S3D             0x1B
 275 #define SAVAGE_TEXCTRL_S3D              0x1C
 276 #define SAVAGE_FOGTABLE_S3D             0x20
 277 #define SAVAGE_FOGCTRL_S3D              0x30
 278 #define SAVAGE_DRAWCTRL_S3D             0x31
 279 #define SAVAGE_ZBUFCTRL_S3D             0x32
 280 #define SAVAGE_ZBUFOFF_S3D              0x33
 281 #define SAVAGE_DESTCTRL_S3D             0x34
 282 #define SAVAGE_SCSTART_S3D              0x35
 283 #define SAVAGE_SCEND_S3D                0x36
 284 #define SAVAGE_ZWATERMARK_S3D           0x37
 285 #define SAVAGE_DESTTEXRWWATERMARK_S3D   0x38
 286 /* common stuff */
 287 #define SAVAGE_VERTBUFADDR              0x3e
 288 #define SAVAGE_BITPLANEWTMASK           0xd7
 289
 290 /* texture enable bits (needed for tex addr checking) */
 291 #define SAVAGE_TEXCTRL_TEXEN_MASK       0x00010000 /* S3D */
 292 #define SAVAGE_TEXDESCR_TEX0EN_MASK     0x02000000 /* S4 */
 293 #define SAVAGE_TEXDESCR_TEX1EN_MASK     0x04000000 /* S4 */
 294
 295 /* Global fields in Savage4/Twister/ProSavage 3D registers:
 296  *
 297  * All texture registers and DrawLocalCtrl are local. All other
 298  * registers are global. */
 299
 300 /* Global fields in Savage3D/MX/IX 3D registers:
 301  *
 302  * All texture registers are local. DrawCtrl and ZBufCtrl are
 303  * partially local. All other registers are global.
 304  *
 305  * DrawCtrl global fields: cullMode, alphaTestCmpFunc, alphaTestEn, alphaRefVal
 306  * ZBufCtrl global fields: zCmpFunc, zBufEn
 307  */
 308 #define SAVAGE_DRAWCTRL_S3D_GLOBAL      0x03f3c00c
 309 #define SAVAGE_ZBUFCTRL_S3D_GLOBAL      0x00000027
 310
 311 /* Masks for scissor bits (drawCtrl[01] on s4, scissorStart/End on s3d)
 312  */
 313 #define SAVAGE_SCISSOR_MASK_S4          0x00fff7ff
 314 #define SAVAGE_SCISSOR_MASK_S3D         0x07ff07ff
 315
 316 /*
 317  * BCI commands
 318  */
 319 #define BCI_CMD_NOP                  0x40000000
 320 #define BCI_CMD_RECT                 0x48000000
 321 #define BCI_CMD_RECT_XP              0x01000000
 322 #define BCI_CMD_RECT_YP              0x02000000
 323 #define BCI_CMD_SCANLINE             0x50000000
 324 #define BCI_CMD_LINE                 0x5C000000
 325 #define BCI_CMD_LINE_LAST_PIXEL      0x58000000
 326 #define BCI_CMD_BYTE_TEXT            0x63000000
 327 #define BCI_CMD_NT_BYTE_TEXT         0x67000000
 328 #define BCI_CMD_BIT_TEXT             0x6C000000
 329 #define BCI_CMD_GET_ROP(cmd)         (((cmd) >> 16) & 0xFF)
 330 #define BCI_CMD_SET_ROP(cmd, rop)    ((cmd) |= ((rop & 0xFF) << 16))
 331 #define BCI_CMD_SEND_COLOR           0x00008000
 332
 333 #define BCI_CMD_CLIP_NONE            0x00000000
 334 #define BCI_CMD_CLIP_CURRENT         0x00002000
 335 #define BCI_CMD_CLIP_LR              0x00004000
 336 #define BCI_CMD_CLIP_NEW             0x00006000
 337
 338 #define BCI_CMD_DEST_GBD             0x00000000
 339 #define BCI_CMD_DEST_PBD             0x00000800
 340 #define BCI_CMD_DEST_PBD_NEW         0x00000C00
 341 #define BCI_CMD_DEST_SBD             0x00001000
 342 #define BCI_CMD_DEST_SBD_NEW         0x00001400
 343
 344 #define BCI_CMD_SRC_TRANSPARENT      0x00000200
 345 #define BCI_CMD_SRC_SOLID            0x00000000
 346 #define BCI_CMD_SRC_GBD              0x00000020
 347 #define BCI_CMD_SRC_COLOR            0x00000040
 348 #define BCI_CMD_SRC_MONO             0x00000060
 349 #define BCI_CMD_SRC_PBD_COLOR        0x00000080
 350 #define BCI_CMD_SRC_PBD_MONO         0x000000A0
 351 #define BCI_CMD_SRC_PBD_COLOR_NEW    0x000000C0
 352 #define BCI_CMD_SRC_PBD_MONO_NEW     0x000000E0
 353 #define BCI_CMD_SRC_SBD_COLOR        0x00000100
 354 #define BCI_CMD_SRC_SBD_MONO         0x00000120
 355 #define BCI_CMD_SRC_SBD_COLOR_NEW    0x00000140
 356 #define BCI_CMD_SRC_SBD_MONO_NEW     0x00000160
 357
 358 #define BCI_CMD_PAT_TRANSPARENT      0x00000010
 359 #define BCI_CMD_PAT_NONE             0x00000000
 360 #define BCI_CMD_PAT_COLOR            0x00000002
 361 #define BCI_CMD_PAT_MONO             0x00000003
 362 #define BCI_CMD_PAT_PBD_COLOR        0x00000004
 363 #define BCI_CMD_PAT_PBD_MONO         0x00000005
 364 #define BCI_CMD_PAT_PBD_COLOR_NEW    0x00000006
 365 #define BCI_CMD_PAT_PBD_MONO_NEW     0x00000007
 366 #define BCI_CMD_PAT_SBD_COLOR        0x00000008
 367 #define BCI_CMD_PAT_SBD_MONO         0x00000009
 368 #define BCI_CMD_PAT_SBD_COLOR_NEW    0x0000000A
 369 #define BCI_CMD_PAT_SBD_MONO_NEW     0x0000000B
 370
 371 #define BCI_BD_BW_DISABLE            0x10000000
 372 #define BCI_BD_TILE_MASK             0x03000000
 373 #define BCI_BD_TILE_NONE             0x00000000
 374 #define BCI_BD_TILE_16               0x02000000
 375 #define BCI_BD_TILE_32               0x03000000
 376 #define BCI_BD_GET_BPP(bd)           (((bd) >> 16) & 0xFF)
 377 #define BCI_BD_SET_BPP(bd, bpp)      ((bd) |= (((bpp) & 0xFF) << 16))
 378 #define BCI_BD_GET_STRIDE(bd)        ((bd) & 0xFFFF)
 379 #define BCI_BD_SET_STRIDE(bd, st)    ((bd) |= ((st) & 0xFFFF))
 380
 381 #define BCI_CMD_SET_REGISTER            0x96000000
 382
 383 #define BCI_CMD_WAIT                    0xC0000000
 384 #define BCI_CMD_WAIT_3D                 0x00010000
 385 #define BCI_CMD_WAIT_2D                 0x00020000
 386
 387 #define BCI_CMD_UPDATE_EVENT_TAG        0x98000000
 388
 389 #define BCI_CMD_DRAW_PRIM               0x80000000
 390 #define BCI_CMD_DRAW_INDEXED_PRIM       0x88000000
 391 #define BCI_CMD_DRAW_CONT               0x01000000
 392 #define BCI_CMD_DRAW_TRILIST            0x00000000
 393 #define BCI_CMD_DRAW_TRISTRIP           0x02000000
 394 #define BCI_CMD_DRAW_TRIFAN             0x04000000
 395 #define BCI_CMD_DRAW_SKIPFLAGS          0x000000ff
 396 #define BCI_CMD_DRAW_NO_Z               0x00000001
 397 #define BCI_CMD_DRAW_NO_W               0x00000002
 398 #define BCI_CMD_DRAW_NO_CD              0x00000004
 399 #define BCI_CMD_DRAW_NO_CS              0x00000008
 400 #define BCI_CMD_DRAW_NO_U0              0x00000010
 401 #define BCI_CMD_DRAW_NO_V0              0x00000020
 402 #define BCI_CMD_DRAW_NO_UV0             0x00000030
 403 #define BCI_CMD_DRAW_NO_U1              0x00000040
 404 #define BCI_CMD_DRAW_NO_V1              0x00000080
 405 #define BCI_CMD_DRAW_NO_UV1             0x000000c0
 406
 407 #define BCI_W_H(w, h)                ((((h) << 16) | (w)) & 0x0FFF0FFF)
 408 #define BCI_X_Y(x, y)                ((((y) << 16) | (x)) & 0x0FFF0FFF)
 409 #define BCI_X_W(x, y)                ((((w) << 16) | (x)) & 0x0FFF0FFF)
 410 #define BCI_CLIP_LR(l, r)            ((((r) << 16) | (l)) & 0x0FFF0FFF)
 411 #define BCI_CLIP_TL(t, l)            ((((t) << 16) | (l)) & 0x0FFF0FFF)
 412 #define BCI_CLIP_BR(b, r)            ((((b) << 16) | (r)) & 0x0FFF0FFF)
 413
 414 #define BCI_LINE_X_Y(x, y)           (((y) << 16) | ((x) & 0xFFFF))
 415 #define BCI_LINE_STEPS(diag, axi)    (((axi) << 16) | ((diag) & 0xFFFF))
 416 #define BCI_LINE_MISC(maj, ym, xp, yp, err) \
 417         (((maj) & 0x1FFF) | \
 418         ((ym) ? 1<<13 : 0) | \
 419         ((xp) ? 1<<14 : 0) | \
 420         ((yp) ? 1<<15 : 0) | \
 421         ((err) << 16))
 422
 423 /*
 424  * common commands
 425  */
 426 #define BCI_SET_REGISTERS( first, n )                   \
 427         BCI_WRITE(BCI_CMD_SET_REGISTER |                \
 428                   ((uint32_t)(n) & 0xff) << 16 |        \
 429                   ((uint32_t)(first) & 0xffff))
 430
 431 #define BCI_DRAW_PRIMITIVE(n, type, skip)         \
 432         BCI_WRITE(BCI_CMD_DRAW_PRIM | (type) | (skip) | \
 433                   ((n) << 16))
 434
 435 #define BCI_DRAW_INDICES_S3D(n, type, i0)         \
 436         BCI_WRITE(BCI_CMD_DRAW_INDEXED_PRIM | (type) |  \
 437                   ((n) << 16) | (i0))
 438
 439 #define BCI_DRAW_INDICES_S4(n, type, skip)        \
 440         BCI_WRITE(BCI_CMD_DRAW_INDEXED_PRIM | (type) |  \
 441                   (skip) | ((n) << 16))
 442
 443 /*
 444  * access to MMIO
 445  */
 446 #define SAVAGE_READ(reg)        DRM_READ32(  dev_priv->mmio, (reg) )
 447 #define SAVAGE_WRITE(reg)       DRM_WRITE32( dev_priv->mmio, (reg) )
 448
 449 /*
 450  * access to the burst command interface (BCI)
 451  */
 452 #define SAVAGE_BCI_DEBUG 1
 453
 454 #define BCI_LOCALS    volatile uint32_t *bci_ptr;
 455
 456 #define BEGIN_BCI( n ) do {                     \
 457         dev_priv->wait_fifo(dev_priv, (n));     \
 458         bci_ptr = dev_priv->bci_ptr;            \
 459 } while(0)
 460
 461 #define BCI_WRITE( val ) *bci_ptr++ = (uint32_t)(val)
 462
 463 #define BCI_COPY_FROM_USER(src,n) do {                          \
 464     unsigned int i;                                             \
 465     for (i = 0; i < n; ++i) {                                   \
 466         uint32_t val;                                           \
 467         DRM_GET_USER_UNCHECKED(val, &((uint32_t*)(src))[i]);    \
 468         BCI_WRITE(val);                                         \
 469     }                                                           \
 470 } while(0)
 471
 472 /* Buffer aging via event tag
 473  */
 474
 475 #define UPDATE_EVENT_COUNTER( ) do {                    \
 476         if (dev_priv->status_ptr) {                     \
 477                 uint16_t count;                         \
 478                 /* coordinate with Xserver */           \
 479                 count = dev_priv->status_ptr[1023];     \
 480                 if (count < dev_priv->event_counter)    \
 481                         dev_priv->event_wrap++;         \
 482                 dev_priv->event_counter = count;        \
 483         }                                               \
 484 } while(0)
 485
 486 #define SET_AGE( age, e, w ) do {       \
 487         (age)->event = e;               \
 488         (age)->wrap = w;                \
 489 } while(0)
 490
 491 #define TEST_AGE( age, e, w )                                           \
 492         ( (age)->wrap+1 < (w) ||                                        \
 493           ( (age)->wrap+1 == (w) && (e) <= dev_priv->event_counter ) || \
 494           (age)->event <= (e) )
 495
 496 #endif /* __SAVAGE_DRV_H__ */