1 /* Simulator instruction semantics for thumb.
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 Copyright (C) 2000-2009 Red Hat, Inc.
7 This file is part of the Red Hat simulators.
15 using namespace arm7f; // FIXME: namespace organization still wip
17 #define GET_ATTR(name) GET_ATTR_##name ()
21 arm7f_cpu::thumb_pbb_run ()
23 arm7f_cpu* current_cpu = this;
25 // These two are used to pass data from cti insns to the cti-chain insn.
27 branch_status pbb_br_status;
31 static const struct sem_labels
33 enum thumb_insn_type insn;
38 { THUMB_INSN_X_AFTER, && case_INSN_X_AFTER },
39 { THUMB_INSN_X_BEFORE, && case_INSN_X_BEFORE },
40 { THUMB_INSN_X_CTI_CHAIN, && case_INSN_X_CTI_CHAIN },
41 { THUMB_INSN_X_CHAIN, && case_INSN_X_CHAIN },
42 { THUMB_INSN_X_BEGIN, && case_INSN_X_BEGIN },
43 { THUMB_INSN_X_INVALID, && case_INSN_X_INVALID },
44 { THUMB_INSN_LSL, && case_INSN_LSL },
45 { THUMB_INSN_LSR, && case_INSN_LSR },
46 { THUMB_INSN_ASR, && case_INSN_ASR },
47 { THUMB_INSN_ADD, && case_INSN_ADD },
48 { THUMB_INSN_ADDI, && case_INSN_ADDI },
49 { THUMB_INSN_SUB, && case_INSN_SUB },
50 { THUMB_INSN_SUBI, && case_INSN_SUBI },
51 { THUMB_INSN_MOV, && case_INSN_MOV },
52 { THUMB_INSN_CMP, && case_INSN_CMP },
53 { THUMB_INSN_ADDI8, && case_INSN_ADDI8 },
54 { THUMB_INSN_SUBI8, && case_INSN_SUBI8 },
55 { THUMB_INSN_ALU_AND, && case_INSN_ALU_AND },
56 { THUMB_INSN_ALU_EOR, && case_INSN_ALU_EOR },
57 { THUMB_INSN_ALU_LSL, && case_INSN_ALU_LSL },
58 { THUMB_INSN_ALU_LSR, && case_INSN_ALU_LSR },
59 { THUMB_INSN_ALU_ASR, && case_INSN_ALU_ASR },
60 { THUMB_INSN_ALU_ROR, && case_INSN_ALU_ROR },
61 { THUMB_INSN_ALU_ADC, && case_INSN_ALU_ADC },
62 { THUMB_INSN_ALU_SBC, && case_INSN_ALU_SBC },
63 { THUMB_INSN_ALU_TST, && case_INSN_ALU_TST },
64 { THUMB_INSN_ALU_NEG, && case_INSN_ALU_NEG },
65 { THUMB_INSN_ALU_CMP, && case_INSN_ALU_CMP },
66 { THUMB_INSN_ALU_CMN, && case_INSN_ALU_CMN },
67 { THUMB_INSN_ALU_ORR, && case_INSN_ALU_ORR },
68 { THUMB_INSN_ALU_MUL, && case_INSN_ALU_MUL },
69 { THUMB_INSN_ALU_BIC, && case_INSN_ALU_BIC },
70 { THUMB_INSN_ALU_MVN, && case_INSN_ALU_MVN },
71 { THUMB_INSN_ADD_RD_HS, && case_INSN_ADD_RD_HS },
72 { THUMB_INSN_ADD_HD_RS, && case_INSN_ADD_HD_RS },
73 { THUMB_INSN_ADD_HD_HS, && case_INSN_ADD_HD_HS },
74 { THUMB_INSN_CMP_RD_HS, && case_INSN_CMP_RD_HS },
75 { THUMB_INSN_CMP_HD_RS, && case_INSN_CMP_HD_RS },
76 { THUMB_INSN_CMP_HD_HS, && case_INSN_CMP_HD_HS },
77 { THUMB_INSN_MOV_RD_HS, && case_INSN_MOV_RD_HS },
78 { THUMB_INSN_MOV_HD_RS, && case_INSN_MOV_HD_RS },
79 { THUMB_INSN_MOV_HD_HS, && case_INSN_MOV_HD_HS },
80 { THUMB_INSN_BX_RS, && case_INSN_BX_RS },
81 { THUMB_INSN_BX_HS, && case_INSN_BX_HS },
82 { THUMB_INSN_LDR_PC, && case_INSN_LDR_PC },
83 { THUMB_INSN_STR, && case_INSN_STR },
84 { THUMB_INSN_STRB, && case_INSN_STRB },
85 { THUMB_INSN_LDR, && case_INSN_LDR },
86 { THUMB_INSN_LDRB, && case_INSN_LDRB },
87 { THUMB_INSN_STRH, && case_INSN_STRH },
88 { THUMB_INSN_LDRH, && case_INSN_LDRH },
89 { THUMB_INSN_LDSB, && case_INSN_LDSB },
90 { THUMB_INSN_LDSH, && case_INSN_LDSH },
91 { THUMB_INSN_STR_IMM, && case_INSN_STR_IMM },
92 { THUMB_INSN_LDR_IMM, && case_INSN_LDR_IMM },
93 { THUMB_INSN_STRB_IMM, && case_INSN_STRB_IMM },
94 { THUMB_INSN_LDRB_IMM, && case_INSN_LDRB_IMM },
95 { THUMB_INSN_STRH_IMM, && case_INSN_STRH_IMM },
96 { THUMB_INSN_LDRH_IMM, && case_INSN_LDRH_IMM },
97 { THUMB_INSN_STR_SPREL, && case_INSN_STR_SPREL },
98 { THUMB_INSN_LDR_SPREL, && case_INSN_LDR_SPREL },
99 { THUMB_INSN_LDA_PC, && case_INSN_LDA_PC },
100 { THUMB_INSN_LDA_SP, && case_INSN_LDA_SP },
101 { THUMB_INSN_ADD_SP, && case_INSN_ADD_SP },
102 { THUMB_INSN_SUB_SP, && case_INSN_SUB_SP },
103 { THUMB_INSN_PUSH, && case_INSN_PUSH },
104 { THUMB_INSN_PUSH_LR, && case_INSN_PUSH_LR },
105 { THUMB_INSN_POP, && case_INSN_POP },
106 { THUMB_INSN_POP_PC, && case_INSN_POP_PC },
107 { THUMB_INSN_STMIA, && case_INSN_STMIA },
108 { THUMB_INSN_LDMIA, && case_INSN_LDMIA },
109 { THUMB_INSN_BEQ, && case_INSN_BEQ },
110 { THUMB_INSN_BNE, && case_INSN_BNE },
111 { THUMB_INSN_BCS, && case_INSN_BCS },
112 { THUMB_INSN_BCC, && case_INSN_BCC },
113 { THUMB_INSN_BMI, && case_INSN_BMI },
114 { THUMB_INSN_BPL, && case_INSN_BPL },
115 { THUMB_INSN_BVS, && case_INSN_BVS },
116 { THUMB_INSN_BVC, && case_INSN_BVC },
117 { THUMB_INSN_BHI, && case_INSN_BHI },
118 { THUMB_INSN_BLS, && case_INSN_BLS },
119 { THUMB_INSN_BGE, && case_INSN_BGE },
120 { THUMB_INSN_BLT, && case_INSN_BLT },
121 { THUMB_INSN_BGT, && case_INSN_BGT },
122 { THUMB_INSN_BLE, && case_INSN_BLE },
123 { THUMB_INSN_SWI, && case_INSN_SWI },
124 { THUMB_INSN_B, && case_INSN_B },
125 { THUMB_INSN_BL_HI, && case_INSN_BL_HI },
126 { THUMB_INSN_BL_LO, && case_INSN_BL_LO },
127 { (thumb_insn_type) 0, 0 }
130 if (! thumb_idesc::idesc_table_initialized_p)
132 for (int i=0; labels[i].label != 0; i++)
133 thumb_idesc::idesc_table[labels[i].insn].cgoto.label = labels[i].label;
135 // confirm that table is all filled up
136 for (int i = 0; i <= THUMB_INSN_BL_LO; i++)
137 assert (thumb_idesc::idesc_table[i].cgoto.label != 0);
139 // Initialize the compiler virtual insn.
140 current_cpu->thumb_engine.compile_begin_insn (current_cpu);
142 thumb_idesc::idesc_table_initialized_p = true;
148 #define CASE(X) case_##X
149 // Branch to next handler without going around main loop.
150 #define NEXT(vpc) goto * vpc->execute.cgoto.label;
151 // Break out of threaded interpreter and return to "main loop".
152 #define BREAK(vpc) goto end_switch
154 #define CASE(X) case THUMB_##X
155 #define NEXT(vpc) goto restart
156 #define BREAK(vpc) break
159 // Get next insn to execute.
160 vpc = current_cpu->thumb_engine.get_next_vpc (current_cpu->h_pc_get ());
164 goto * vpc->execute.cgoto.label;
166 switch (vpc->idesc->sem_index)
170 // ********** --after--
174 thumb_scache* abuf = vpc;
175 #define FLD(f) abuf->fields.fmt_empty.f
176 PCADDR pc = abuf->addr;
180 current_cpu->thumb_engine.pbb_after (current_cpu, abuf);
187 // ********** --before--
189 CASE (INSN_X_BEFORE):
191 thumb_scache* abuf = vpc;
192 #define FLD(f) abuf->fields.fmt_empty.f
193 PCADDR pc = abuf->addr;
197 current_cpu->thumb_engine.pbb_before (current_cpu, abuf);
204 // ********** --cti-chain--
206 CASE (INSN_X_CTI_CHAIN):
208 thumb_scache* abuf = vpc;
209 #define FLD(f) abuf->fields.fmt_empty.f
210 PCADDR pc = abuf->addr;
214 vpc = current_cpu->thumb_engine.pbb_cti_chain (current_cpu, abuf, pbb_br_status, pbb_br_npc);
215 // If we don't have to give up control, don't.
216 // Note that we may overrun step_insn_count since we do the test at the
217 // end of the block. This is defined to be ok.
218 if (UNLIKELY(current_cpu->stop_after_insns_p (abuf->fields.chain.insn_count)))
226 // ********** --chain--
230 thumb_scache* abuf = vpc;
231 #define FLD(f) abuf->fields.fmt_empty.f
232 PCADDR pc = abuf->addr;
236 vpc = current_cpu->thumb_engine.pbb_chain (current_cpu, abuf);
237 // If we don't have to give up control, don't.
238 // Note that we may overrun step_insn_count since we do the test at the
239 // end of the block. This is defined to be ok.
240 if (UNLIKELY(current_cpu->stop_after_insns_p (abuf->fields.chain.insn_count)))
248 // ********** --begin--
252 thumb_scache* abuf = vpc;
253 #define FLD(f) abuf->fields.fmt_empty.f
254 PCADDR pc = abuf->addr;
258 vpc = current_cpu->thumb_pbb_begin (current_cpu->h_pc_get ());
265 // ********** --invalid--
267 CASE (INSN_X_INVALID):
269 thumb_scache* abuf = vpc;
270 #define FLD(f) abuf->fields.fmt_empty.f
271 PCADDR pc = abuf->addr;
275 current_cpu->invalid_insn (pc);
284 // ********** lsl $rd,$rs,#$offset5
288 thumb_scache* abuf = vpc;
289 #define FLD(f) abuf->fields.sfmt_lsl.f
290 PCADDR pc = abuf->addr;
292 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
296 tmp_carry_out = current_cpu->compute_carry_out_immshift (current_cpu->thumb_h_gr_t_get (FLD (f_rs)), SHIFT_TYPE_LSL, FLD (f_offset5), current_cpu->hardware.h_cbit);
297 current_cpu->thumb_h_gr_t_set (FLD (f_rd), SLLSI (current_cpu->thumb_h_gr_t_get (FLD (f_rs)), FLD (f_offset5)));
300 current_cpu->hardware.h_zbit = EQSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), 0);
301 current_cpu->hardware.h_nbit = LTSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), 0);
303 current_cpu->hardware.h_cbit = tmp_carry_out;
311 // ********** lsr $rd,$rs,#$offset5
315 thumb_scache* abuf = vpc;
316 #define FLD(f) abuf->fields.sfmt_lsl.f
317 PCADDR pc = abuf->addr;
319 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
323 tmp_carry_out = current_cpu->compute_carry_out_immshift (current_cpu->thumb_h_gr_t_get (FLD (f_rs)), SHIFT_TYPE_LSR, FLD (f_offset5), current_cpu->hardware.h_cbit);
324 current_cpu->thumb_h_gr_t_set (FLD (f_rd), SRLSI (current_cpu->thumb_h_gr_t_get (FLD (f_rs)), FLD (f_offset5)));
327 current_cpu->hardware.h_zbit = EQSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), 0);
328 current_cpu->hardware.h_nbit = LTSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), 0);
330 current_cpu->hardware.h_cbit = tmp_carry_out;
338 // ********** asr $rd,$rs,#$offset5
342 thumb_scache* abuf = vpc;
343 #define FLD(f) abuf->fields.sfmt_lsl.f
344 PCADDR pc = abuf->addr;
346 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
350 tmp_carry_out = current_cpu->compute_carry_out_immshift (current_cpu->thumb_h_gr_t_get (FLD (f_rs)), SHIFT_TYPE_ASR, FLD (f_offset5), current_cpu->hardware.h_cbit);
351 current_cpu->thumb_h_gr_t_set (FLD (f_rd), SRASI (current_cpu->thumb_h_gr_t_get (FLD (f_rs)), FLD (f_offset5)));
354 current_cpu->hardware.h_zbit = EQSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), 0);
355 current_cpu->hardware.h_nbit = LTSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), 0);
357 current_cpu->hardware.h_cbit = tmp_carry_out;
365 // ********** add $rd,$rs,$rn
369 thumb_scache* abuf = vpc;
370 #define FLD(f) abuf->fields.sfmt_add.f
371 PCADDR pc = abuf->addr;
373 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
378 tmp_result = ADDCSI (current_cpu->thumb_h_gr_t_get (FLD (f_rs)), current_cpu->thumb_h_gr_t_get (FLD (f_rn)), 0);
380 current_cpu->hardware.h_zbit = EQSI (tmp_result, 0);
381 current_cpu->hardware.h_nbit = LTSI (tmp_result, 0);
383 current_cpu->hardware.h_cbit = ADDCFSI (current_cpu->thumb_h_gr_t_get (FLD (f_rs)), current_cpu->thumb_h_gr_t_get (FLD (f_rn)), 0);
384 current_cpu->hardware.h_vbit = ADDOFSI (current_cpu->thumb_h_gr_t_get (FLD (f_rs)), current_cpu->thumb_h_gr_t_get (FLD (f_rn)), 0);
386 current_cpu->thumb_h_gr_t_set (FLD (f_rd), ADDSI (current_cpu->thumb_h_gr_t_get (FLD (f_rs)), current_cpu->thumb_h_gr_t_get (FLD (f_rn))));
393 // ********** add $rd,$rs,#$offset3
397 thumb_scache* abuf = vpc;
398 #define FLD(f) abuf->fields.sfmt_addi.f
399 PCADDR pc = abuf->addr;
401 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
406 tmp_result = ADDCSI (current_cpu->thumb_h_gr_t_get (FLD (f_rs)), FLD (f_offset3), 0);
408 current_cpu->hardware.h_zbit = EQSI (tmp_result, 0);
409 current_cpu->hardware.h_nbit = LTSI (tmp_result, 0);
411 current_cpu->hardware.h_cbit = ADDCFSI (current_cpu->thumb_h_gr_t_get (FLD (f_rs)), FLD (f_offset3), 0);
412 current_cpu->hardware.h_vbit = ADDOFSI (current_cpu->thumb_h_gr_t_get (FLD (f_rs)), FLD (f_offset3), 0);
414 current_cpu->thumb_h_gr_t_set (FLD (f_rd), ADDSI (current_cpu->thumb_h_gr_t_get (FLD (f_rs)), FLD (f_offset3)));
421 // ********** sub $rd,$rs,$rn
425 thumb_scache* abuf = vpc;
426 #define FLD(f) abuf->fields.sfmt_add.f
427 PCADDR pc = abuf->addr;
429 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
434 tmp_result = SUBCSI (current_cpu->thumb_h_gr_t_get (FLD (f_rs)), current_cpu->thumb_h_gr_t_get (FLD (f_rn)), 0);
436 current_cpu->hardware.h_zbit = EQSI (tmp_result, 0);
437 current_cpu->hardware.h_nbit = LTSI (tmp_result, 0);
439 current_cpu->hardware.h_cbit = NOTBI (SUBCFSI (current_cpu->thumb_h_gr_t_get (FLD (f_rs)), current_cpu->thumb_h_gr_t_get (FLD (f_rn)), 0));
440 current_cpu->hardware.h_vbit = SUBOFSI (current_cpu->thumb_h_gr_t_get (FLD (f_rs)), current_cpu->thumb_h_gr_t_get (FLD (f_rn)), 0);
442 current_cpu->thumb_h_gr_t_set (FLD (f_rd), SUBSI (current_cpu->thumb_h_gr_t_get (FLD (f_rs)), current_cpu->thumb_h_gr_t_get (FLD (f_rn))));
449 // ********** sub $rd,$rs,#$offset3
453 thumb_scache* abuf = vpc;
454 #define FLD(f) abuf->fields.sfmt_addi.f
455 PCADDR pc = abuf->addr;
457 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
462 tmp_result = SUBCSI (current_cpu->thumb_h_gr_t_get (FLD (f_rs)), FLD (f_offset3), 0);
464 current_cpu->hardware.h_zbit = EQSI (tmp_result, 0);
465 current_cpu->hardware.h_nbit = LTSI (tmp_result, 0);
467 current_cpu->hardware.h_cbit = NOTBI (SUBCFSI (current_cpu->thumb_h_gr_t_get (FLD (f_rs)), FLD (f_offset3), 0));
468 current_cpu->hardware.h_vbit = SUBOFSI (current_cpu->thumb_h_gr_t_get (FLD (f_rs)), FLD (f_offset3), 0);
470 current_cpu->thumb_h_gr_t_set (FLD (f_rd), SUBSI (current_cpu->thumb_h_gr_t_get (FLD (f_rs)), FLD (f_offset3)));
477 // ********** mov ${bit10-rd},#$offset8
481 thumb_scache* abuf = vpc;
482 #define FLD(f) abuf->fields.sfmt_mov.f
483 PCADDR pc = abuf->addr;
485 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
488 current_cpu->thumb_h_gr_t_set (FLD (f_bit10_rd), FLD (f_offset8));
490 current_cpu->hardware.h_zbit = EQSI (current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rd)), 0);
491 current_cpu->hardware.h_nbit = LTSI (current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rd)), 0);
499 // ********** cmp ${bit10-rd},#$offset8
503 thumb_scache* abuf = vpc;
504 #define FLD(f) abuf->fields.sfmt_mov.f
505 PCADDR pc = abuf->addr;
507 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
511 tmp_result = SUBCSI (current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rd)), FLD (f_offset8), 0);
513 current_cpu->hardware.h_zbit = EQSI (tmp_result, 0);
514 current_cpu->hardware.h_nbit = LTSI (tmp_result, 0);
516 current_cpu->hardware.h_cbit = NOTBI (SUBCFSI (current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rd)), FLD (f_offset8), 0));
517 current_cpu->hardware.h_vbit = SUBOFSI (current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rd)), FLD (f_offset8), 0);
524 // ********** add ${bit10-rd},#$offset8
528 thumb_scache* abuf = vpc;
529 #define FLD(f) abuf->fields.sfmt_mov.f
530 PCADDR pc = abuf->addr;
532 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
537 tmp_result = ADDCSI (current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rd)), FLD (f_offset8), 0);
539 current_cpu->hardware.h_zbit = EQSI (tmp_result, 0);
540 current_cpu->hardware.h_nbit = LTSI (tmp_result, 0);
542 current_cpu->hardware.h_cbit = ADDCFSI (current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rd)), FLD (f_offset8), 0);
543 current_cpu->hardware.h_vbit = ADDOFSI (current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rd)), FLD (f_offset8), 0);
545 current_cpu->thumb_h_gr_t_set (FLD (f_bit10_rd), ADDSI (current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rd)), FLD (f_offset8)));
552 // ********** sub ${bit10-rd},#$offset8
556 thumb_scache* abuf = vpc;
557 #define FLD(f) abuf->fields.sfmt_mov.f
558 PCADDR pc = abuf->addr;
560 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
565 tmp_result = SUBCSI (current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rd)), FLD (f_offset8), 0);
567 current_cpu->hardware.h_zbit = EQSI (tmp_result, 0);
568 current_cpu->hardware.h_nbit = LTSI (tmp_result, 0);
570 current_cpu->hardware.h_cbit = NOTBI (SUBCFSI (current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rd)), FLD (f_offset8), 0));
571 current_cpu->hardware.h_vbit = SUBOFSI (current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rd)), FLD (f_offset8), 0);
573 current_cpu->thumb_h_gr_t_set (FLD (f_bit10_rd), SUBSI (current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rd)), FLD (f_offset8)));
580 // ********** and $rd,$rs
584 thumb_scache* abuf = vpc;
585 #define FLD(f) abuf->fields.sfmt_addi.f
586 PCADDR pc = abuf->addr;
588 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
591 current_cpu->thumb_h_gr_t_set (FLD (f_rd), ANDSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), current_cpu->thumb_h_gr_t_get (FLD (f_rs))));
593 current_cpu->hardware.h_zbit = EQSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), 0);
594 current_cpu->hardware.h_nbit = LTSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), 0);
602 // ********** eor $rd,$rs
606 thumb_scache* abuf = vpc;
607 #define FLD(f) abuf->fields.sfmt_addi.f
608 PCADDR pc = abuf->addr;
610 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
613 current_cpu->thumb_h_gr_t_set (FLD (f_rd), XORSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), current_cpu->thumb_h_gr_t_get (FLD (f_rs))));
615 current_cpu->hardware.h_zbit = EQSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), 0);
616 current_cpu->hardware.h_nbit = LTSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), 0);
624 // ********** lsl $rd,$rs
628 thumb_scache* abuf = vpc;
629 #define FLD(f) abuf->fields.sfmt_addi.f
630 PCADDR pc = abuf->addr;
632 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
637 tmp_carry_out = current_cpu->compute_carry_out_regshift (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), SHIFT_TYPE_LSL, current_cpu->thumb_h_gr_t_get (FLD (f_rs)), current_cpu->hardware.h_cbit);
638 tmp_result = SLLSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), current_cpu->thumb_h_gr_t_get (FLD (f_rs)));
639 current_cpu->thumb_h_gr_t_set (FLD (f_rd), tmp_result);
642 current_cpu->hardware.h_zbit = EQSI (tmp_result, 0);
643 current_cpu->hardware.h_nbit = LTSI (tmp_result, 0);
645 current_cpu->hardware.h_cbit = tmp_carry_out;
653 // ********** lsr $rd,$rs
657 thumb_scache* abuf = vpc;
658 #define FLD(f) abuf->fields.sfmt_addi.f
659 PCADDR pc = abuf->addr;
661 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
666 tmp_carry_out = current_cpu->compute_carry_out_regshift (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), SHIFT_TYPE_LSR, current_cpu->thumb_h_gr_t_get (FLD (f_rs)), current_cpu->hardware.h_cbit);
667 tmp_result = SRLSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), current_cpu->thumb_h_gr_t_get (FLD (f_rs)));
668 current_cpu->thumb_h_gr_t_set (FLD (f_rd), tmp_result);
671 current_cpu->hardware.h_zbit = EQSI (tmp_result, 0);
672 current_cpu->hardware.h_nbit = LTSI (tmp_result, 0);
674 current_cpu->hardware.h_cbit = tmp_carry_out;
682 // ********** asr $rd,$rs
686 thumb_scache* abuf = vpc;
687 #define FLD(f) abuf->fields.sfmt_addi.f
688 PCADDR pc = abuf->addr;
690 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
695 tmp_carry_out = current_cpu->compute_carry_out_regshift (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), SHIFT_TYPE_ASR, current_cpu->thumb_h_gr_t_get (FLD (f_rs)), current_cpu->hardware.h_cbit);
696 tmp_result = SRASI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), current_cpu->thumb_h_gr_t_get (FLD (f_rs)));
697 current_cpu->thumb_h_gr_t_set (FLD (f_rd), tmp_result);
700 current_cpu->hardware.h_zbit = EQSI (tmp_result, 0);
701 current_cpu->hardware.h_nbit = LTSI (tmp_result, 0);
703 current_cpu->hardware.h_cbit = tmp_carry_out;
711 // ********** ror $rd,$rs
715 thumb_scache* abuf = vpc;
716 #define FLD(f) abuf->fields.sfmt_addi.f
717 PCADDR pc = abuf->addr;
719 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
724 tmp_carry_out = current_cpu->compute_carry_out_regshift (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), SHIFT_TYPE_ROR, current_cpu->thumb_h_gr_t_get (FLD (f_rs)), current_cpu->hardware.h_cbit);
725 tmp_result = RORSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), current_cpu->thumb_h_gr_t_get (FLD (f_rs)));
726 current_cpu->thumb_h_gr_t_set (FLD (f_rd), tmp_result);
729 current_cpu->hardware.h_zbit = EQSI (tmp_result, 0);
730 current_cpu->hardware.h_nbit = LTSI (tmp_result, 0);
732 current_cpu->hardware.h_cbit = tmp_carry_out;
740 // ********** adc $rd,$rs
744 thumb_scache* abuf = vpc;
745 #define FLD(f) abuf->fields.sfmt_addi.f
746 PCADDR pc = abuf->addr;
748 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
752 tmp_result = ADDCSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), current_cpu->thumb_h_gr_t_get (FLD (f_rs)), current_cpu->hardware.h_cbit);
755 tmp_result = ADDCSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), current_cpu->thumb_h_gr_t_get (FLD (f_rs)), current_cpu->hardware.h_cbit);
757 current_cpu->hardware.h_zbit = EQSI (tmp_result, 0);
758 current_cpu->hardware.h_nbit = LTSI (tmp_result, 0);
760 current_cpu->hardware.h_cbit = ADDCFSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), current_cpu->thumb_h_gr_t_get (FLD (f_rs)), current_cpu->hardware.h_cbit);
761 current_cpu->hardware.h_vbit = ADDOFSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), current_cpu->thumb_h_gr_t_get (FLD (f_rs)), current_cpu->hardware.h_cbit);
763 current_cpu->thumb_h_gr_t_set (FLD (f_rd), tmp_result);
770 // ********** sbc $rd,$rs
774 thumb_scache* abuf = vpc;
775 #define FLD(f) abuf->fields.sfmt_addi.f
776 PCADDR pc = abuf->addr;
778 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
782 tmp_result = SUBCSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), current_cpu->thumb_h_gr_t_get (FLD (f_rs)), NOTBI (current_cpu->hardware.h_cbit));
785 tmp_result = SUBCSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), current_cpu->thumb_h_gr_t_get (FLD (f_rs)), NOTBI (current_cpu->hardware.h_cbit));
787 current_cpu->hardware.h_zbit = EQSI (tmp_result, 0);
788 current_cpu->hardware.h_nbit = LTSI (tmp_result, 0);
790 current_cpu->hardware.h_cbit = NOTBI (SUBCFSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), current_cpu->thumb_h_gr_t_get (FLD (f_rs)), NOTBI (current_cpu->hardware.h_cbit)));
791 current_cpu->hardware.h_vbit = SUBOFSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), current_cpu->thumb_h_gr_t_get (FLD (f_rs)), NOTBI (current_cpu->hardware.h_cbit));
793 current_cpu->thumb_h_gr_t_set (FLD (f_rd), tmp_result);
800 // ********** tst $rd,$rs
804 thumb_scache* abuf = vpc;
805 #define FLD(f) abuf->fields.sfmt_addi.f
806 PCADDR pc = abuf->addr;
808 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
812 tmp_x = ANDSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), current_cpu->thumb_h_gr_t_get (FLD (f_rs)));
814 current_cpu->hardware.h_zbit = EQSI (tmp_x, 0);
815 current_cpu->hardware.h_nbit = LTSI (tmp_x, 0);
823 // ********** neg $rd,$rs
827 thumb_scache* abuf = vpc;
828 #define FLD(f) abuf->fields.sfmt_addi.f
829 PCADDR pc = abuf->addr;
831 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
835 tmp_result = NEGSI (current_cpu->thumb_h_gr_t_get (FLD (f_rs)));
838 tmp_result = SUBCSI (0, current_cpu->thumb_h_gr_t_get (FLD (f_rs)), 0);
840 current_cpu->hardware.h_zbit = EQSI (tmp_result, 0);
841 current_cpu->hardware.h_nbit = LTSI (tmp_result, 0);
843 current_cpu->hardware.h_cbit = NOTBI (SUBCFSI (0, current_cpu->thumb_h_gr_t_get (FLD (f_rs)), 0));
844 current_cpu->hardware.h_vbit = SUBOFSI (0, current_cpu->thumb_h_gr_t_get (FLD (f_rs)), 0);
846 current_cpu->thumb_h_gr_t_set (FLD (f_rd), tmp_result);
853 // ********** cmp $rd,$rs
857 thumb_scache* abuf = vpc;
858 #define FLD(f) abuf->fields.sfmt_addi.f
859 PCADDR pc = abuf->addr;
861 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
865 tmp_result = SUBCSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), current_cpu->thumb_h_gr_t_get (FLD (f_rs)), 0);
867 current_cpu->hardware.h_zbit = EQSI (tmp_result, 0);
868 current_cpu->hardware.h_nbit = LTSI (tmp_result, 0);
870 current_cpu->hardware.h_cbit = NOTBI (SUBCFSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), current_cpu->thumb_h_gr_t_get (FLD (f_rs)), 0));
871 current_cpu->hardware.h_vbit = SUBOFSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), current_cpu->thumb_h_gr_t_get (FLD (f_rs)), 0);
878 // ********** cmn $rd,$rs
882 thumb_scache* abuf = vpc;
883 #define FLD(f) abuf->fields.sfmt_addi.f
884 PCADDR pc = abuf->addr;
886 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
890 tmp_result = ADDCSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), current_cpu->thumb_h_gr_t_get (FLD (f_rs)), 0);
892 current_cpu->hardware.h_zbit = EQSI (tmp_result, 0);
893 current_cpu->hardware.h_nbit = LTSI (tmp_result, 0);
895 current_cpu->hardware.h_cbit = ADDCFSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), current_cpu->thumb_h_gr_t_get (FLD (f_rs)), 0);
896 current_cpu->hardware.h_vbit = ADDOFSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), current_cpu->thumb_h_gr_t_get (FLD (f_rs)), 0);
903 // ********** orr $rd,$rs
907 thumb_scache* abuf = vpc;
908 #define FLD(f) abuf->fields.sfmt_addi.f
909 PCADDR pc = abuf->addr;
911 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
914 current_cpu->thumb_h_gr_t_set (FLD (f_rd), ORSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), current_cpu->thumb_h_gr_t_get (FLD (f_rs))));
916 current_cpu->hardware.h_zbit = EQSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), 0);
917 current_cpu->hardware.h_nbit = LTSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), 0);
925 // ********** mul $rd,$rs
929 thumb_scache* abuf = vpc;
930 #define FLD(f) abuf->fields.sfmt_addi.f
931 PCADDR pc = abuf->addr;
933 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
936 current_cpu->thumb_h_gr_t_set (FLD (f_rd), MULSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), current_cpu->thumb_h_gr_t_get (FLD (f_rs))));
938 current_cpu->hardware.h_zbit = EQSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), 0);
939 current_cpu->hardware.h_nbit = LTSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), 0);
947 // ********** bic $rd,$rs
951 thumb_scache* abuf = vpc;
952 #define FLD(f) abuf->fields.sfmt_addi.f
953 PCADDR pc = abuf->addr;
955 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
958 current_cpu->thumb_h_gr_t_set (FLD (f_rd), ANDSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), INVSI (current_cpu->thumb_h_gr_t_get (FLD (f_rs)))));
960 current_cpu->hardware.h_zbit = EQSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), 0);
961 current_cpu->hardware.h_nbit = LTSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), 0);
969 // ********** mvn $rd,$rs
973 thumb_scache* abuf = vpc;
974 #define FLD(f) abuf->fields.sfmt_addi.f
975 PCADDR pc = abuf->addr;
977 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
980 current_cpu->thumb_h_gr_t_set (FLD (f_rd), INVSI (current_cpu->thumb_h_gr_t_get (FLD (f_rs))));
982 current_cpu->hardware.h_zbit = EQSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), 0);
983 current_cpu->hardware.h_nbit = LTSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), 0);
991 // ********** add $rd,$hs
993 CASE (INSN_ADD_RD_HS):
995 thumb_scache* abuf = vpc;
996 #define FLD(f) abuf->fields.sfmt_addi.f
997 PCADDR pc = abuf->addr;
999 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
1001 current_cpu->thumb_h_gr_t_set (FLD (f_rd), ADDSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), current_cpu->thumb_h_hiregs_get (FLD (f_rs))));
1007 // ********** add $hd,$rs
1009 CASE (INSN_ADD_HD_RS):
1011 thumb_scache* abuf = vpc;
1012 #define FLD(f) abuf->fields.sfmt_addi.f
1013 PCADDR pc = abuf->addr;
1015 branch_status br_status = BRANCH_UNTAKEN;
1017 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
1019 if (EQSI (FLD (f_rd), 7)) {
1020 npc = ADDSI (current_cpu->thumb_h_hiregs_get (FLD (f_rd)), current_cpu->thumb_h_gr_t_get (FLD (f_rs))); br_status = BRANCH_UNCACHEABLE;
1022 current_cpu->thumb_h_hiregs_set (FLD (f_rd), ADDSI (current_cpu->thumb_h_hiregs_get (FLD (f_rd)), current_cpu->thumb_h_gr_t_get (FLD (f_rs))));
1026 pbb_br_status = br_status;
1031 // ********** add $hd,$hs
1033 CASE (INSN_ADD_HD_HS):
1035 thumb_scache* abuf = vpc;
1036 #define FLD(f) abuf->fields.sfmt_addi.f
1037 PCADDR pc = abuf->addr;
1039 branch_status br_status = BRANCH_UNTAKEN;
1041 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
1043 if (EQSI (FLD (f_rd), 7)) {
1044 npc = ADDSI (current_cpu->thumb_h_hiregs_get (FLD (f_rd)), current_cpu->thumb_h_hiregs_get (FLD (f_rs))); br_status = BRANCH_UNCACHEABLE;
1046 current_cpu->thumb_h_hiregs_set (FLD (f_rd), ADDSI (current_cpu->thumb_h_hiregs_get (FLD (f_rd)), current_cpu->thumb_h_hiregs_get (FLD (f_rs))));
1050 pbb_br_status = br_status;
1055 // ********** cmp $rd,$hs
1057 CASE (INSN_CMP_RD_HS):
1059 thumb_scache* abuf = vpc;
1060 #define FLD(f) abuf->fields.sfmt_addi.f
1061 PCADDR pc = abuf->addr;
1063 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
1067 tmp_result = SUBCSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), current_cpu->thumb_h_hiregs_get (FLD (f_rs)), 0);
1069 current_cpu->hardware.h_zbit = EQSI (tmp_result, 0);
1070 current_cpu->hardware.h_nbit = LTSI (tmp_result, 0);
1072 current_cpu->hardware.h_cbit = NOTBI (SUBCFSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), current_cpu->thumb_h_hiregs_get (FLD (f_rs)), 0));
1073 current_cpu->hardware.h_vbit = SUBOFSI (current_cpu->thumb_h_gr_t_get (FLD (f_rd)), current_cpu->thumb_h_hiregs_get (FLD (f_rs)), 0);
1080 // ********** cmp $hd,$rs
1082 CASE (INSN_CMP_HD_RS):
1084 thumb_scache* abuf = vpc;
1085 #define FLD(f) abuf->fields.sfmt_addi.f
1086 PCADDR pc = abuf->addr;
1088 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
1092 tmp_result = SUBCSI (current_cpu->thumb_h_hiregs_get (FLD (f_rd)), current_cpu->thumb_h_gr_t_get (FLD (f_rs)), 0);
1094 current_cpu->hardware.h_zbit = EQSI (tmp_result, 0);
1095 current_cpu->hardware.h_nbit = LTSI (tmp_result, 0);
1097 current_cpu->hardware.h_cbit = NOTBI (SUBCFSI (current_cpu->thumb_h_hiregs_get (FLD (f_rd)), current_cpu->thumb_h_gr_t_get (FLD (f_rs)), 0));
1098 current_cpu->hardware.h_vbit = SUBOFSI (current_cpu->thumb_h_hiregs_get (FLD (f_rd)), current_cpu->thumb_h_gr_t_get (FLD (f_rs)), 0);
1105 // ********** cmp $hd,$hs
1107 CASE (INSN_CMP_HD_HS):
1109 thumb_scache* abuf = vpc;
1110 #define FLD(f) abuf->fields.sfmt_addi.f
1111 PCADDR pc = abuf->addr;
1113 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
1117 tmp_result = SUBCSI (current_cpu->thumb_h_hiregs_get (FLD (f_rd)), current_cpu->thumb_h_hiregs_get (FLD (f_rs)), 0);
1119 current_cpu->hardware.h_zbit = EQSI (tmp_result, 0);
1120 current_cpu->hardware.h_nbit = LTSI (tmp_result, 0);
1122 current_cpu->hardware.h_cbit = NOTBI (SUBCFSI (current_cpu->thumb_h_hiregs_get (FLD (f_rd)), current_cpu->thumb_h_hiregs_get (FLD (f_rs)), 0));
1123 current_cpu->hardware.h_vbit = SUBOFSI (current_cpu->thumb_h_hiregs_get (FLD (f_rd)), current_cpu->thumb_h_hiregs_get (FLD (f_rs)), 0);
1130 // ********** mov $rd,$hs
1132 CASE (INSN_MOV_RD_HS):
1134 thumb_scache* abuf = vpc;
1135 #define FLD(f) abuf->fields.sfmt_addi.f
1136 PCADDR pc = abuf->addr;
1138 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
1140 current_cpu->thumb_h_gr_t_set (FLD (f_rd), current_cpu->thumb_h_hiregs_get (FLD (f_rs)));
1146 // ********** mov $hd,$rs
1148 CASE (INSN_MOV_HD_RS):
1150 thumb_scache* abuf = vpc;
1151 #define FLD(f) abuf->fields.sfmt_addi.f
1152 PCADDR pc = abuf->addr;
1154 branch_status br_status = BRANCH_UNTAKEN;
1156 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
1158 if (EQSI (FLD (f_rd), 7)) {
1159 npc = current_cpu->thumb_h_gr_t_get (FLD (f_rs)); br_status = BRANCH_UNCACHEABLE;
1161 current_cpu->thumb_h_hiregs_set (FLD (f_rd), current_cpu->thumb_h_gr_t_get (FLD (f_rs)));
1165 pbb_br_status = br_status;
1170 // ********** mov $hd,$hs
1172 CASE (INSN_MOV_HD_HS):
1174 thumb_scache* abuf = vpc;
1175 #define FLD(f) abuf->fields.sfmt_addi.f
1176 PCADDR pc = abuf->addr;
1178 branch_status br_status = BRANCH_UNTAKEN;
1180 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
1182 if (EQSI (FLD (f_rd), 7)) {
1183 npc = current_cpu->thumb_h_hiregs_get (FLD (f_rs)); br_status = BRANCH_UNCACHEABLE;
1185 current_cpu->thumb_h_hiregs_set (FLD (f_rd), current_cpu->thumb_h_hiregs_get (FLD (f_rs)));
1189 pbb_br_status = br_status;
1194 // ********** bx $rs
1198 thumb_scache* abuf = vpc;
1199 #define FLD(f) abuf->fields.sfmt_addi.f
1200 PCADDR pc = abuf->addr;
1202 branch_status br_status = BRANCH_UNTAKEN;
1204 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
1207 npc = current_cpu->thumb_h_gr_t_get (FLD (f_rs)); br_status = BRANCH_UNCACHEABLE;
1208 if (NOTSI (ANDSI (current_cpu->thumb_h_gr_t_get (FLD (f_rs)), 1))) {
1209 current_cpu->h_tbit_set (0);
1214 pbb_br_status = br_status;
1219 // ********** bx $hs
1223 thumb_scache* abuf = vpc;
1224 #define FLD(f) abuf->fields.sfmt_addi.f
1225 PCADDR pc = abuf->addr;
1227 branch_status br_status = BRANCH_UNTAKEN;
1229 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
1232 npc = current_cpu->thumb_h_hiregs_get (FLD (f_rs)); br_status = BRANCH_UNCACHEABLE;
1233 if (NOTSI (ANDSI (current_cpu->thumb_h_hiregs_get (FLD (f_rs)), 1))) {
1234 current_cpu->h_tbit_set (0);
1239 pbb_br_status = br_status;
1244 // ********** ldr ${bit10-rd},[pc,#$word8]
1248 thumb_scache* abuf = vpc;
1249 #define FLD(f) abuf->fields.sfmt_ldr_pc.f
1250 PCADDR pc = abuf->addr;
1252 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
1254 current_cpu->thumb_h_gr_t_set (FLD (f_bit10_rd), current_cpu->GETMEMSI (pc, ADDSI (ANDSI (ADDSI (pc, 4), -4), FLD (f_word8))));
1260 // ********** str $rd,[$rb,$ro]
1264 thumb_scache* abuf = vpc;
1265 #define FLD(f) abuf->fields.sfmt_str.f
1266 PCADDR pc = abuf->addr;
1268 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
1270 current_cpu->SETMEMSI (pc, ADDSI (current_cpu->thumb_h_gr_t_get (FLD (f_rb)), current_cpu->thumb_h_gr_t_get (FLD (f_ro))), current_cpu->thumb_h_gr_t_get (FLD (f_rd)));
1276 // ********** strb $rd,[$rb,$ro]
1280 thumb_scache* abuf = vpc;
1281 #define FLD(f) abuf->fields.sfmt_str.f
1282 PCADDR pc = abuf->addr;
1284 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
1286 current_cpu->SETMEMQI (pc, ADDSI (current_cpu->thumb_h_gr_t_get (FLD (f_rb)), current_cpu->thumb_h_gr_t_get (FLD (f_ro))), current_cpu->thumb_h_gr_t_get (FLD (f_rd)));
1292 // ********** ldr $rd,[$rb,$ro]
1296 thumb_scache* abuf = vpc;
1297 #define FLD(f) abuf->fields.sfmt_str.f
1298 PCADDR pc = abuf->addr;
1300 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
1302 current_cpu->thumb_h_gr_t_set (FLD (f_rd), current_cpu->GETMEMSI (pc, ADDSI (current_cpu->thumb_h_gr_t_get (FLD (f_rb)), current_cpu->thumb_h_gr_t_get (FLD (f_ro)))));
1308 // ********** ldrb $rd,[$rb,$ro]
1312 thumb_scache* abuf = vpc;
1313 #define FLD(f) abuf->fields.sfmt_str.f
1314 PCADDR pc = abuf->addr;
1316 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
1318 current_cpu->thumb_h_gr_t_set (FLD (f_rd), ZEXTQISI (current_cpu->GETMEMQI (pc, ADDSI (current_cpu->thumb_h_gr_t_get (FLD (f_rb)), current_cpu->thumb_h_gr_t_get (FLD (f_ro))))));
1324 // ********** strh $rd,[$rb,$ro]
1328 thumb_scache* abuf = vpc;
1329 #define FLD(f) abuf->fields.sfmt_str.f
1330 PCADDR pc = abuf->addr;
1332 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
1334 current_cpu->SETMEMHI (pc, ADDSI (current_cpu->thumb_h_gr_t_get (FLD (f_rb)), current_cpu->thumb_h_gr_t_get (FLD (f_ro))), current_cpu->thumb_h_gr_t_get (FLD (f_rd)));
1340 // ********** ldrh $rd,[$rb,$ro]
1344 thumb_scache* abuf = vpc;
1345 #define FLD(f) abuf->fields.sfmt_str.f
1346 PCADDR pc = abuf->addr;
1348 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
1350 current_cpu->thumb_h_gr_t_set (FLD (f_rd), ZEXTHISI (current_cpu->GETMEMHI (pc, ADDSI (current_cpu->thumb_h_gr_t_get (FLD (f_rb)), current_cpu->thumb_h_gr_t_get (FLD (f_ro))))));
1356 // ********** ldsb $rd,[$rb,$ro]
1360 thumb_scache* abuf = vpc;
1361 #define FLD(f) abuf->fields.sfmt_str.f
1362 PCADDR pc = abuf->addr;
1364 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
1366 current_cpu->thumb_h_gr_t_set (FLD (f_rd), EXTQISI (current_cpu->GETMEMQI (pc, ADDSI (current_cpu->thumb_h_gr_t_get (FLD (f_rb)), current_cpu->thumb_h_gr_t_get (FLD (f_ro))))));
1372 // ********** ldsh $rd,[$rb,$ro]
1376 thumb_scache* abuf = vpc;
1377 #define FLD(f) abuf->fields.sfmt_str.f
1378 PCADDR pc = abuf->addr;
1380 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
1382 current_cpu->thumb_h_gr_t_set (FLD (f_rd), EXTHISI (current_cpu->GETMEMHI (pc, ADDSI (current_cpu->thumb_h_gr_t_get (FLD (f_rb)), current_cpu->thumb_h_gr_t_get (FLD (f_ro))))));
1388 // ********** str $rd,[$rb,#${offset5-7}]
1390 CASE (INSN_STR_IMM):
1392 thumb_scache* abuf = vpc;
1393 #define FLD(f) abuf->fields.sfmt_str_imm.f
1394 PCADDR pc = abuf->addr;
1396 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
1398 current_cpu->SETMEMSI (pc, ADDSI (current_cpu->thumb_h_gr_t_get (FLD (f_rb)), FLD (f_offset5_7)), current_cpu->thumb_h_gr_t_get (FLD (f_rd)));
1404 // ********** ldr $rd,[$rb,#${offset5-7}]
1406 CASE (INSN_LDR_IMM):
1408 thumb_scache* abuf = vpc;
1409 #define FLD(f) abuf->fields.sfmt_str_imm.f
1410 PCADDR pc = abuf->addr;
1412 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
1414 current_cpu->thumb_h_gr_t_set (FLD (f_rd), current_cpu->GETMEMSI (pc, ADDSI (current_cpu->thumb_h_gr_t_get (FLD (f_rb)), FLD (f_offset5_7))));
1420 // ********** strb $rd,[$rb,#$offset5]
1422 CASE (INSN_STRB_IMM):
1424 thumb_scache* abuf = vpc;
1425 #define FLD(f) abuf->fields.sfmt_strb_imm.f
1426 PCADDR pc = abuf->addr;
1428 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
1430 current_cpu->SETMEMQI (pc, ADDSI (current_cpu->thumb_h_gr_t_get (FLD (f_rb)), FLD (f_offset5)), current_cpu->thumb_h_gr_t_get (FLD (f_rd)));
1436 // ********** ldrb $rd,[$rb,#$offset5]
1438 CASE (INSN_LDRB_IMM):
1440 thumb_scache* abuf = vpc;
1441 #define FLD(f) abuf->fields.sfmt_strb_imm.f
1442 PCADDR pc = abuf->addr;
1444 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
1446 current_cpu->thumb_h_gr_t_set (FLD (f_rd), ZEXTQISI (current_cpu->GETMEMQI (pc, ADDSI (current_cpu->thumb_h_gr_t_get (FLD (f_rb)), FLD (f_offset5)))));
1452 // ********** strh $rd,[$rb,#${offset5-6}]
1454 CASE (INSN_STRH_IMM):
1456 thumb_scache* abuf = vpc;
1457 #define FLD(f) abuf->fields.sfmt_strh_imm.f
1458 PCADDR pc = abuf->addr;
1460 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
1462 current_cpu->SETMEMHI (pc, ADDSI (current_cpu->thumb_h_gr_t_get (FLD (f_rb)), FLD (f_offset5_6)), current_cpu->thumb_h_gr_t_get (FLD (f_rd)));
1468 // ********** ldrh $rd,[$rb,#${offset5-6}]
1470 CASE (INSN_LDRH_IMM):
1472 thumb_scache* abuf = vpc;
1473 #define FLD(f) abuf->fields.sfmt_strh_imm.f
1474 PCADDR pc = abuf->addr;
1476 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
1478 current_cpu->thumb_h_gr_t_set (FLD (f_rd), ZEXTHISI (current_cpu->GETMEMHI (pc, ADDSI (current_cpu->thumb_h_gr_t_get (FLD (f_rb)), FLD (f_offset5_6)))));
1484 // ********** str ${bit10-rd},[sp,#$word8]
1486 CASE (INSN_STR_SPREL):
1488 thumb_scache* abuf = vpc;
1489 #define FLD(f) abuf->fields.sfmt_ldr_pc.f
1490 PCADDR pc = abuf->addr;
1492 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
1494 current_cpu->SETMEMSI (pc, ADDSI (current_cpu->thumb_h_sp_t_get (), FLD (f_word8)), current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rd)));
1500 // ********** ldr ${bit10-rd},[sp,#$word8]
1502 CASE (INSN_LDR_SPREL):
1504 thumb_scache* abuf = vpc;
1505 #define FLD(f) abuf->fields.sfmt_ldr_pc.f
1506 PCADDR pc = abuf->addr;
1508 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
1510 current_cpu->thumb_h_gr_t_set (FLD (f_bit10_rd), current_cpu->GETMEMSI (pc, ADDSI (current_cpu->thumb_h_sp_t_get (), FLD (f_word8))));
1516 // ********** add ${bit10-rd},pc,$word8
1520 thumb_scache* abuf = vpc;
1521 #define FLD(f) abuf->fields.sfmt_ldr_pc.f
1522 PCADDR pc = abuf->addr;
1524 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
1526 current_cpu->thumb_h_gr_t_set (FLD (f_bit10_rd), ADDSI (ANDSI (ADDSI (pc, 4), -4), FLD (f_word8)));
1532 // ********** add ${bit10-rd},sp,$word8
1536 thumb_scache* abuf = vpc;
1537 #define FLD(f) abuf->fields.sfmt_ldr_pc.f
1538 PCADDR pc = abuf->addr;
1540 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
1542 current_cpu->thumb_h_gr_t_set (FLD (f_bit10_rd), ADDSI (current_cpu->thumb_h_sp_t_get (), FLD (f_word8)));
1548 // ********** add sp,#$sword7
1552 thumb_scache* abuf = vpc;
1553 #define FLD(f) abuf->fields.sfmt_add_sp.f
1554 PCADDR pc = abuf->addr;
1556 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
1558 current_cpu->thumb_h_sp_t_set (ADDSI (current_cpu->thumb_h_sp_t_get (), FLD (f_sword7)));
1564 // ********** add sp,#-$sword7
1568 thumb_scache* abuf = vpc;
1569 #define FLD(f) abuf->fields.sfmt_add_sp.f
1570 PCADDR pc = abuf->addr;
1572 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
1574 current_cpu->thumb_h_sp_t_set (SUBSI (current_cpu->thumb_h_sp_t_get (), FLD (f_sword7)));
1580 // ********** push {$rlist}
1584 thumb_scache* abuf = vpc;
1585 #define FLD(f) abuf->fields.sfmt_stmia.f
1586 PCADDR pc = abuf->addr;
1588 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
1591 if (ANDSI (FLD (f_rlist), SLLSI (1, 7))) {
1593 current_cpu->thumb_h_sp_t_set (SUBSI (current_cpu->thumb_h_sp_t_get (), 4));
1594 current_cpu->SETMEMSI (pc, current_cpu->thumb_h_sp_t_get (), current_cpu->thumb_h_gr_t_get (((UINT) 7)));
1597 if (ANDSI (FLD (f_rlist), SLLSI (1, 6))) {
1599 current_cpu->thumb_h_sp_t_set (SUBSI (current_cpu->thumb_h_sp_t_get (), 4));
1600 current_cpu->SETMEMSI (pc, current_cpu->thumb_h_sp_t_get (), current_cpu->thumb_h_gr_t_get (((UINT) 6)));
1603 if (ANDSI (FLD (f_rlist), SLLSI (1, 5))) {
1605 current_cpu->thumb_h_sp_t_set (SUBSI (current_cpu->thumb_h_sp_t_get (), 4));
1606 current_cpu->SETMEMSI (pc, current_cpu->thumb_h_sp_t_get (), current_cpu->thumb_h_gr_t_get (((UINT) 5)));
1609 if (ANDSI (FLD (f_rlist), SLLSI (1, 4))) {
1611 current_cpu->thumb_h_sp_t_set (SUBSI (current_cpu->thumb_h_sp_t_get (), 4));
1612 current_cpu->SETMEMSI (pc, current_cpu->thumb_h_sp_t_get (), current_cpu->thumb_h_gr_t_get (((UINT) 4)));
1615 if (ANDSI (FLD (f_rlist), SLLSI (1, 3))) {
1617 current_cpu->thumb_h_sp_t_set (SUBSI (current_cpu->thumb_h_sp_t_get (), 4));
1618 current_cpu->SETMEMSI (pc, current_cpu->thumb_h_sp_t_get (), current_cpu->thumb_h_gr_t_get (((UINT) 3)));
1621 if (ANDSI (FLD (f_rlist), SLLSI (1, 2))) {
1623 current_cpu->thumb_h_sp_t_set (SUBSI (current_cpu->thumb_h_sp_t_get (), 4));
1624 current_cpu->SETMEMSI (pc, current_cpu->thumb_h_sp_t_get (), current_cpu->thumb_h_gr_t_get (((UINT) 2)));
1627 if (ANDSI (FLD (f_rlist), SLLSI (1, 1))) {
1629 current_cpu->thumb_h_sp_t_set (SUBSI (current_cpu->thumb_h_sp_t_get (), 4));
1630 current_cpu->SETMEMSI (pc, current_cpu->thumb_h_sp_t_get (), current_cpu->thumb_h_gr_t_get (((UINT) 1)));
1633 if (ANDSI (FLD (f_rlist), SLLSI (1, 0))) {
1635 current_cpu->thumb_h_sp_t_set (SUBSI (current_cpu->thumb_h_sp_t_get (), 4));
1636 current_cpu->SETMEMSI (pc, current_cpu->thumb_h_sp_t_get (), current_cpu->thumb_h_gr_t_get (((UINT) 0)));
1645 // ********** push {${rlist-lr}}
1647 CASE (INSN_PUSH_LR):
1649 thumb_scache* abuf = vpc;
1650 #define FLD(f) abuf->fields.sfmt_stmia.f
1651 PCADDR pc = abuf->addr;
1653 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
1656 current_cpu->thumb_h_sp_t_set (SUBSI (current_cpu->thumb_h_sp_t_get (), 4));
1657 current_cpu->SETMEMSI (pc, current_cpu->thumb_h_sp_t_get (), current_cpu->thumb_h_lr_t_get ());
1658 if (ANDSI (FLD (f_rlist), SLLSI (1, 7))) {
1660 current_cpu->thumb_h_sp_t_set (SUBSI (current_cpu->thumb_h_sp_t_get (), 4));
1661 current_cpu->SETMEMSI (pc, current_cpu->thumb_h_sp_t_get (), current_cpu->thumb_h_gr_t_get (((UINT) 7)));
1664 if (ANDSI (FLD (f_rlist), SLLSI (1, 6))) {
1666 current_cpu->thumb_h_sp_t_set (SUBSI (current_cpu->thumb_h_sp_t_get (), 4));
1667 current_cpu->SETMEMSI (pc, current_cpu->thumb_h_sp_t_get (), current_cpu->thumb_h_gr_t_get (((UINT) 6)));
1670 if (ANDSI (FLD (f_rlist), SLLSI (1, 5))) {
1672 current_cpu->thumb_h_sp_t_set (SUBSI (current_cpu->thumb_h_sp_t_get (), 4));
1673 current_cpu->SETMEMSI (pc, current_cpu->thumb_h_sp_t_get (), current_cpu->thumb_h_gr_t_get (((UINT) 5)));
1676 if (ANDSI (FLD (f_rlist), SLLSI (1, 4))) {
1678 current_cpu->thumb_h_sp_t_set (SUBSI (current_cpu->thumb_h_sp_t_get (), 4));
1679 current_cpu->SETMEMSI (pc, current_cpu->thumb_h_sp_t_get (), current_cpu->thumb_h_gr_t_get (((UINT) 4)));
1682 if (ANDSI (FLD (f_rlist), SLLSI (1, 3))) {
1684 current_cpu->thumb_h_sp_t_set (SUBSI (current_cpu->thumb_h_sp_t_get (), 4));
1685 current_cpu->SETMEMSI (pc, current_cpu->thumb_h_sp_t_get (), current_cpu->thumb_h_gr_t_get (((UINT) 3)));
1688 if (ANDSI (FLD (f_rlist), SLLSI (1, 2))) {
1690 current_cpu->thumb_h_sp_t_set (SUBSI (current_cpu->thumb_h_sp_t_get (), 4));
1691 current_cpu->SETMEMSI (pc, current_cpu->thumb_h_sp_t_get (), current_cpu->thumb_h_gr_t_get (((UINT) 2)));
1694 if (ANDSI (FLD (f_rlist), SLLSI (1, 1))) {
1696 current_cpu->thumb_h_sp_t_set (SUBSI (current_cpu->thumb_h_sp_t_get (), 4));
1697 current_cpu->SETMEMSI (pc, current_cpu->thumb_h_sp_t_get (), current_cpu->thumb_h_gr_t_get (((UINT) 1)));
1700 if (ANDSI (FLD (f_rlist), SLLSI (1, 0))) {
1702 current_cpu->thumb_h_sp_t_set (SUBSI (current_cpu->thumb_h_sp_t_get (), 4));
1703 current_cpu->SETMEMSI (pc, current_cpu->thumb_h_sp_t_get (), current_cpu->thumb_h_gr_t_get (((UINT) 0)));
1712 // ********** pop {$rlist}
1716 thumb_scache* abuf = vpc;
1717 #define FLD(f) abuf->fields.sfmt_stmia.f
1718 PCADDR pc = abuf->addr;
1720 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
1723 if (ANDSI (FLD (f_rlist), SLLSI (1, 0))) {
1725 current_cpu->thumb_h_gr_t_set (((UINT) 0), current_cpu->GETMEMSI (pc, current_cpu->thumb_h_sp_t_get ()));
1726 current_cpu->thumb_h_sp_t_set (ADDSI (current_cpu->thumb_h_sp_t_get (), 4));
1729 if (ANDSI (FLD (f_rlist), SLLSI (1, 1))) {
1731 current_cpu->thumb_h_gr_t_set (((UINT) 1), current_cpu->GETMEMSI (pc, current_cpu->thumb_h_sp_t_get ()));
1732 current_cpu->thumb_h_sp_t_set (ADDSI (current_cpu->thumb_h_sp_t_get (), 4));
1735 if (ANDSI (FLD (f_rlist), SLLSI (1, 2))) {
1737 current_cpu->thumb_h_gr_t_set (((UINT) 2), current_cpu->GETMEMSI (pc, current_cpu->thumb_h_sp_t_get ()));
1738 current_cpu->thumb_h_sp_t_set (ADDSI (current_cpu->thumb_h_sp_t_get (), 4));
1741 if (ANDSI (FLD (f_rlist), SLLSI (1, 3))) {
1743 current_cpu->thumb_h_gr_t_set (((UINT) 3), current_cpu->GETMEMSI (pc, current_cpu->thumb_h_sp_t_get ()));
1744 current_cpu->thumb_h_sp_t_set (ADDSI (current_cpu->thumb_h_sp_t_get (), 4));
1747 if (ANDSI (FLD (f_rlist), SLLSI (1, 4))) {
1749 current_cpu->thumb_h_gr_t_set (((UINT) 4), current_cpu->GETMEMSI (pc, current_cpu->thumb_h_sp_t_get ()));
1750 current_cpu->thumb_h_sp_t_set (ADDSI (current_cpu->thumb_h_sp_t_get (), 4));
1753 if (ANDSI (FLD (f_rlist), SLLSI (1, 5))) {
1755 current_cpu->thumb_h_gr_t_set (((UINT) 5), current_cpu->GETMEMSI (pc, current_cpu->thumb_h_sp_t_get ()));
1756 current_cpu->thumb_h_sp_t_set (ADDSI (current_cpu->thumb_h_sp_t_get (), 4));
1759 if (ANDSI (FLD (f_rlist), SLLSI (1, 6))) {
1761 current_cpu->thumb_h_gr_t_set (((UINT) 6), current_cpu->GETMEMSI (pc, current_cpu->thumb_h_sp_t_get ()));
1762 current_cpu->thumb_h_sp_t_set (ADDSI (current_cpu->thumb_h_sp_t_get (), 4));
1765 if (ANDSI (FLD (f_rlist), SLLSI (1, 7))) {
1767 current_cpu->thumb_h_gr_t_set (((UINT) 7), current_cpu->GETMEMSI (pc, current_cpu->thumb_h_sp_t_get ()));
1768 current_cpu->thumb_h_sp_t_set (ADDSI (current_cpu->thumb_h_sp_t_get (), 4));
1777 // ********** pop {${rlist-pc}}
1781 thumb_scache* abuf = vpc;
1782 #define FLD(f) abuf->fields.sfmt_stmia.f
1783 PCADDR pc = abuf->addr;
1785 branch_status br_status = BRANCH_UNTAKEN;
1787 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
1790 if (ANDSI (FLD (f_rlist), SLLSI (1, 0))) {
1792 current_cpu->thumb_h_gr_t_set (((UINT) 0), current_cpu->GETMEMSI (pc, current_cpu->thumb_h_sp_t_get ()));
1793 current_cpu->thumb_h_sp_t_set (ADDSI (current_cpu->thumb_h_sp_t_get (), 4));
1796 if (ANDSI (FLD (f_rlist), SLLSI (1, 1))) {
1798 current_cpu->thumb_h_gr_t_set (((UINT) 1), current_cpu->GETMEMSI (pc, current_cpu->thumb_h_sp_t_get ()));
1799 current_cpu->thumb_h_sp_t_set (ADDSI (current_cpu->thumb_h_sp_t_get (), 4));
1802 if (ANDSI (FLD (f_rlist), SLLSI (1, 2))) {
1804 current_cpu->thumb_h_gr_t_set (((UINT) 2), current_cpu->GETMEMSI (pc, current_cpu->thumb_h_sp_t_get ()));
1805 current_cpu->thumb_h_sp_t_set (ADDSI (current_cpu->thumb_h_sp_t_get (), 4));
1808 if (ANDSI (FLD (f_rlist), SLLSI (1, 3))) {
1810 current_cpu->thumb_h_gr_t_set (((UINT) 3), current_cpu->GETMEMSI (pc, current_cpu->thumb_h_sp_t_get ()));
1811 current_cpu->thumb_h_sp_t_set (ADDSI (current_cpu->thumb_h_sp_t_get (), 4));
1814 if (ANDSI (FLD (f_rlist), SLLSI (1, 4))) {
1816 current_cpu->thumb_h_gr_t_set (((UINT) 4), current_cpu->GETMEMSI (pc, current_cpu->thumb_h_sp_t_get ()));
1817 current_cpu->thumb_h_sp_t_set (ADDSI (current_cpu->thumb_h_sp_t_get (), 4));
1820 if (ANDSI (FLD (f_rlist), SLLSI (1, 5))) {
1822 current_cpu->thumb_h_gr_t_set (((UINT) 5), current_cpu->GETMEMSI (pc, current_cpu->thumb_h_sp_t_get ()));
1823 current_cpu->thumb_h_sp_t_set (ADDSI (current_cpu->thumb_h_sp_t_get (), 4));
1826 if (ANDSI (FLD (f_rlist), SLLSI (1, 6))) {
1828 current_cpu->thumb_h_gr_t_set (((UINT) 6), current_cpu->GETMEMSI (pc, current_cpu->thumb_h_sp_t_get ()));
1829 current_cpu->thumb_h_sp_t_set (ADDSI (current_cpu->thumb_h_sp_t_get (), 4));
1832 if (ANDSI (FLD (f_rlist), SLLSI (1, 7))) {
1834 current_cpu->thumb_h_gr_t_set (((UINT) 7), current_cpu->GETMEMSI (pc, current_cpu->thumb_h_sp_t_get ()));
1835 current_cpu->thumb_h_sp_t_set (ADDSI (current_cpu->thumb_h_sp_t_get (), 4));
1838 npc = current_cpu->GETMEMSI (pc, current_cpu->thumb_h_sp_t_get ()); br_status = BRANCH_UNCACHEABLE;
1839 current_cpu->thumb_h_sp_t_set (ADDSI (current_cpu->thumb_h_sp_t_get (), 4));
1843 pbb_br_status = br_status;
1848 // ********** stmia $rb!,{$rlist}
1852 thumb_scache* abuf = vpc;
1853 #define FLD(f) abuf->fields.sfmt_stmia.f
1854 PCADDR pc = abuf->addr;
1856 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
1859 if (ANDSI (FLD (f_rlist), SLLSI (1, 0))) {
1861 current_cpu->SETMEMSI (pc, current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rb)), current_cpu->thumb_h_gr_t_get (((UINT) 0)));
1862 current_cpu->thumb_h_gr_t_set (FLD (f_bit10_rb), ADDSI (current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rb)), 4));
1865 if (ANDSI (FLD (f_rlist), SLLSI (1, 1))) {
1867 current_cpu->SETMEMSI (pc, current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rb)), current_cpu->thumb_h_gr_t_get (((UINT) 1)));
1868 current_cpu->thumb_h_gr_t_set (FLD (f_bit10_rb), ADDSI (current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rb)), 4));
1871 if (ANDSI (FLD (f_rlist), SLLSI (1, 2))) {
1873 current_cpu->SETMEMSI (pc, current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rb)), current_cpu->thumb_h_gr_t_get (((UINT) 2)));
1874 current_cpu->thumb_h_gr_t_set (FLD (f_bit10_rb), ADDSI (current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rb)), 4));
1877 if (ANDSI (FLD (f_rlist), SLLSI (1, 3))) {
1879 current_cpu->SETMEMSI (pc, current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rb)), current_cpu->thumb_h_gr_t_get (((UINT) 3)));
1880 current_cpu->thumb_h_gr_t_set (FLD (f_bit10_rb), ADDSI (current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rb)), 4));
1883 if (ANDSI (FLD (f_rlist), SLLSI (1, 4))) {
1885 current_cpu->SETMEMSI (pc, current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rb)), current_cpu->thumb_h_gr_t_get (((UINT) 4)));
1886 current_cpu->thumb_h_gr_t_set (FLD (f_bit10_rb), ADDSI (current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rb)), 4));
1889 if (ANDSI (FLD (f_rlist), SLLSI (1, 5))) {
1891 current_cpu->SETMEMSI (pc, current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rb)), current_cpu->thumb_h_gr_t_get (((UINT) 5)));
1892 current_cpu->thumb_h_gr_t_set (FLD (f_bit10_rb), ADDSI (current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rb)), 4));
1895 if (ANDSI (FLD (f_rlist), SLLSI (1, 6))) {
1897 current_cpu->SETMEMSI (pc, current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rb)), current_cpu->thumb_h_gr_t_get (((UINT) 6)));
1898 current_cpu->thumb_h_gr_t_set (FLD (f_bit10_rb), ADDSI (current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rb)), 4));
1901 if (ANDSI (FLD (f_rlist), SLLSI (1, 7))) {
1903 current_cpu->SETMEMSI (pc, current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rb)), current_cpu->thumb_h_gr_t_get (((UINT) 7)));
1904 current_cpu->thumb_h_gr_t_set (FLD (f_bit10_rb), ADDSI (current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rb)), 4));
1913 // ********** ldmia $rb!,{$rlist}
1917 thumb_scache* abuf = vpc;
1918 #define FLD(f) abuf->fields.sfmt_stmia.f
1919 PCADDR pc = abuf->addr;
1921 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
1924 if (ANDSI (FLD (f_rlist), SLLSI (1, 0))) {
1926 current_cpu->thumb_h_gr_t_set (((UINT) 0), current_cpu->GETMEMSI (pc, current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rb))));
1927 current_cpu->thumb_h_gr_t_set (FLD (f_bit10_rb), ADDSI (current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rb)), 4));
1930 if (ANDSI (FLD (f_rlist), SLLSI (1, 1))) {
1932 current_cpu->thumb_h_gr_t_set (((UINT) 1), current_cpu->GETMEMSI (pc, current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rb))));
1933 current_cpu->thumb_h_gr_t_set (FLD (f_bit10_rb), ADDSI (current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rb)), 4));
1936 if (ANDSI (FLD (f_rlist), SLLSI (1, 2))) {
1938 current_cpu->thumb_h_gr_t_set (((UINT) 2), current_cpu->GETMEMSI (pc, current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rb))));
1939 current_cpu->thumb_h_gr_t_set (FLD (f_bit10_rb), ADDSI (current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rb)), 4));
1942 if (ANDSI (FLD (f_rlist), SLLSI (1, 3))) {
1944 current_cpu->thumb_h_gr_t_set (((UINT) 3), current_cpu->GETMEMSI (pc, current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rb))));
1945 current_cpu->thumb_h_gr_t_set (FLD (f_bit10_rb), ADDSI (current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rb)), 4));
1948 if (ANDSI (FLD (f_rlist), SLLSI (1, 4))) {
1950 current_cpu->thumb_h_gr_t_set (((UINT) 4), current_cpu->GETMEMSI (pc, current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rb))));
1951 current_cpu->thumb_h_gr_t_set (FLD (f_bit10_rb), ADDSI (current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rb)), 4));
1954 if (ANDSI (FLD (f_rlist), SLLSI (1, 5))) {
1956 current_cpu->thumb_h_gr_t_set (((UINT) 5), current_cpu->GETMEMSI (pc, current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rb))));
1957 current_cpu->thumb_h_gr_t_set (FLD (f_bit10_rb), ADDSI (current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rb)), 4));
1960 if (ANDSI (FLD (f_rlist), SLLSI (1, 6))) {
1962 current_cpu->thumb_h_gr_t_set (((UINT) 6), current_cpu->GETMEMSI (pc, current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rb))));
1963 current_cpu->thumb_h_gr_t_set (FLD (f_bit10_rb), ADDSI (current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rb)), 4));
1966 if (ANDSI (FLD (f_rlist), SLLSI (1, 7))) {
1968 current_cpu->thumb_h_gr_t_set (((UINT) 7), current_cpu->GETMEMSI (pc, current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rb))));
1969 current_cpu->thumb_h_gr_t_set (FLD (f_bit10_rb), ADDSI (current_cpu->thumb_h_gr_t_get (FLD (f_bit10_rb)), 4));
1978 // ********** beq $soffset8
1982 thumb_scache* abuf = vpc;
1983 #define FLD(f) abuf->fields.sfmt_beq.f
1984 PCADDR pc = abuf->addr;
1986 branch_status br_status = BRANCH_UNTAKEN;
1988 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
1990 if (current_cpu->hardware.h_zbit) {
1991 npc = FLD (i_soffset8); br_status = BRANCH_CACHEABLE;
1995 pbb_br_status = br_status;
2000 // ********** bne $soffset8
2004 thumb_scache* abuf = vpc;
2005 #define FLD(f) abuf->fields.sfmt_beq.f
2006 PCADDR pc = abuf->addr;
2008 branch_status br_status = BRANCH_UNTAKEN;
2010 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
2012 if (NOTBI (current_cpu->hardware.h_zbit)) {
2013 npc = FLD (i_soffset8); br_status = BRANCH_CACHEABLE;
2017 pbb_br_status = br_status;
2022 // ********** bcs $soffset8
2026 thumb_scache* abuf = vpc;
2027 #define FLD(f) abuf->fields.sfmt_beq.f
2028 PCADDR pc = abuf->addr;
2030 branch_status br_status = BRANCH_UNTAKEN;
2032 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
2034 if (current_cpu->hardware.h_cbit) {
2035 npc = FLD (i_soffset8); br_status = BRANCH_CACHEABLE;
2039 pbb_br_status = br_status;
2044 // ********** bcc $soffset8
2048 thumb_scache* abuf = vpc;
2049 #define FLD(f) abuf->fields.sfmt_beq.f
2050 PCADDR pc = abuf->addr;
2052 branch_status br_status = BRANCH_UNTAKEN;
2054 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
2056 if (NOTBI (current_cpu->hardware.h_cbit)) {
2057 npc = FLD (i_soffset8); br_status = BRANCH_CACHEABLE;
2061 pbb_br_status = br_status;
2066 // ********** bmi $soffset8
2070 thumb_scache* abuf = vpc;
2071 #define FLD(f) abuf->fields.sfmt_beq.f
2072 PCADDR pc = abuf->addr;
2074 branch_status br_status = BRANCH_UNTAKEN;
2076 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
2078 if (current_cpu->hardware.h_nbit) {
2079 npc = FLD (i_soffset8); br_status = BRANCH_CACHEABLE;
2083 pbb_br_status = br_status;
2088 // ********** bpl $soffset8
2092 thumb_scache* abuf = vpc;
2093 #define FLD(f) abuf->fields.sfmt_beq.f
2094 PCADDR pc = abuf->addr;
2096 branch_status br_status = BRANCH_UNTAKEN;
2098 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
2100 if (NOTBI (current_cpu->hardware.h_nbit)) {
2101 npc = FLD (i_soffset8); br_status = BRANCH_CACHEABLE;
2105 pbb_br_status = br_status;
2110 // ********** bvs $soffset8
2114 thumb_scache* abuf = vpc;
2115 #define FLD(f) abuf->fields.sfmt_beq.f
2116 PCADDR pc = abuf->addr;
2118 branch_status br_status = BRANCH_UNTAKEN;
2120 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
2122 if (current_cpu->hardware.h_vbit) {
2123 npc = FLD (i_soffset8); br_status = BRANCH_CACHEABLE;
2127 pbb_br_status = br_status;
2132 // ********** bvc $soffset8
2136 thumb_scache* abuf = vpc;
2137 #define FLD(f) abuf->fields.sfmt_beq.f
2138 PCADDR pc = abuf->addr;
2140 branch_status br_status = BRANCH_UNTAKEN;
2142 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
2144 if (NOTBI (current_cpu->hardware.h_vbit)) {
2145 npc = FLD (i_soffset8); br_status = BRANCH_CACHEABLE;
2149 pbb_br_status = br_status;
2154 // ********** bhi $soffset8
2158 thumb_scache* abuf = vpc;
2159 #define FLD(f) abuf->fields.sfmt_beq.f
2160 PCADDR pc = abuf->addr;
2162 branch_status br_status = BRANCH_UNTAKEN;
2164 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
2166 if (ANDBI (current_cpu->hardware.h_cbit, NOTBI (current_cpu->hardware.h_zbit))) {
2167 npc = FLD (i_soffset8); br_status = BRANCH_CACHEABLE;
2171 pbb_br_status = br_status;
2176 // ********** bls $soffset8
2180 thumb_scache* abuf = vpc;
2181 #define FLD(f) abuf->fields.sfmt_beq.f
2182 PCADDR pc = abuf->addr;
2184 branch_status br_status = BRANCH_UNTAKEN;
2186 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
2188 if (ORBI (NOTBI (current_cpu->hardware.h_cbit), current_cpu->hardware.h_zbit)) {
2189 npc = FLD (i_soffset8); br_status = BRANCH_CACHEABLE;
2193 pbb_br_status = br_status;
2198 // ********** bge $soffset8
2202 thumb_scache* abuf = vpc;
2203 #define FLD(f) abuf->fields.sfmt_beq.f
2204 PCADDR pc = abuf->addr;
2206 branch_status br_status = BRANCH_UNTAKEN;
2208 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
2210 if (NOTBI (XORBI (current_cpu->hardware.h_nbit, current_cpu->hardware.h_vbit))) {
2211 npc = FLD (i_soffset8); br_status = BRANCH_CACHEABLE;
2215 pbb_br_status = br_status;
2220 // ********** blt $soffset8
2224 thumb_scache* abuf = vpc;
2225 #define FLD(f) abuf->fields.sfmt_beq.f
2226 PCADDR pc = abuf->addr;
2228 branch_status br_status = BRANCH_UNTAKEN;
2230 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
2232 if (XORBI (current_cpu->hardware.h_nbit, current_cpu->hardware.h_vbit)) {
2233 npc = FLD (i_soffset8); br_status = BRANCH_CACHEABLE;
2237 pbb_br_status = br_status;
2242 // ********** bgt $soffset8
2246 thumb_scache* abuf = vpc;
2247 #define FLD(f) abuf->fields.sfmt_beq.f
2248 PCADDR pc = abuf->addr;
2250 branch_status br_status = BRANCH_UNTAKEN;
2252 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
2254 if (NOTBI (ORBI (current_cpu->hardware.h_zbit, XORBI (current_cpu->hardware.h_nbit, current_cpu->hardware.h_vbit)))) {
2255 npc = FLD (i_soffset8); br_status = BRANCH_CACHEABLE;
2259 pbb_br_status = br_status;
2264 // ********** ble $soffset8
2268 thumb_scache* abuf = vpc;
2269 #define FLD(f) abuf->fields.sfmt_beq.f
2270 PCADDR pc = abuf->addr;
2272 branch_status br_status = BRANCH_UNTAKEN;
2274 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
2276 if (ORBI (current_cpu->hardware.h_zbit, XORBI (current_cpu->hardware.h_nbit, current_cpu->hardware.h_vbit))) {
2277 npc = FLD (i_soffset8); br_status = BRANCH_CACHEABLE;
2281 pbb_br_status = br_status;
2286 // ********** swi $value8
2290 thumb_scache* abuf = vpc;
2291 #define FLD(f) abuf->fields.sfmt_swi.f
2292 PCADDR pc = abuf->addr;
2294 branch_status br_status = BRANCH_UNTAKEN;
2296 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
2298 npc = current_cpu->thumb_swi (pc, FLD (f_value8)); br_status = BRANCH_UNCACHEABLE;
2301 pbb_br_status = br_status;
2306 // ********** b $offset11
2310 thumb_scache* abuf = vpc;
2311 #define FLD(f) abuf->fields.sfmt_b.f
2312 PCADDR pc = abuf->addr;
2314 branch_status br_status = BRANCH_UNTAKEN;
2316 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
2318 npc = FLD (i_offset11); br_status = BRANCH_CACHEABLE;
2321 pbb_br_status = br_status;
2326 // ********** bl-hi ${lbwl-hi}
2330 thumb_scache* abuf = vpc;
2331 #define FLD(f) abuf->fields.sfmt_bl_hi.f
2332 PCADDR pc = abuf->addr;
2334 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
2336 current_cpu->thumb_h_lr_t_set (ADDSI (ADDSI (pc, 4), SLLSI (FLD (f_lbwl_hi), 12)));
2342 // ********** bl-lo ${lbwl-lo}
2346 thumb_scache* abuf = vpc;
2347 #define FLD(f) abuf->fields.sfmt_bl_lo.f
2348 PCADDR pc = abuf->addr;
2350 branch_status br_status = BRANCH_UNTAKEN;
2352 current_cpu->hardware.h_gr[((UINT) 15)] = ADDSI (pc, 4);
2357 npc = ADDSI (current_cpu->thumb_h_lr_t_get (), SLLSI (FLD (f_lbwl_lo), 1)); br_status = BRANCH_UNCACHEABLE;
2358 current_cpu->thumb_h_lr_t_set (ORSI (ADDSI (tmp_cur_pc, 2), 1));
2362 pbb_br_status = br_status;
2375 // Save vpc for next time.
2376 current_cpu->thumb_engine.set_next_vpc (vpc);