1 /* Misc. entries in the mep description file.
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 Copyright (C) 2000-2009 Red Hat, Inc.
7 This file is part of the Red Hat simulators.
15 #include "cgen/bitset.h"
21 /* Enum declaration for major opcodes. */
23 MAJ_0, MAJ_1, MAJ_2, MAJ_3
24 , MAJ_4, MAJ_5, MAJ_6, MAJ_7
25 , MAJ_8, MAJ_9, MAJ_10, MAJ_11
26 , MAJ_12, MAJ_13, MAJ_14, MAJ_15
29 // Insn attribute indices.
31 /* Enum declaration for cgen_insn attrs. */
32 typedef enum cgen_insn_attr {
33 CGEN_INSN_ALIAS, CGEN_INSN_VIRTUAL, CGEN_INSN_UNCOND_CTI, CGEN_INSN_COND_CTI
34 , CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAXED
35 , CGEN_INSN_NO_DIS, CGEN_INSN_PBB, CGEN_INSN_OPTIONAL_BIT_INSN, CGEN_INSN_OPTIONAL_MUL_INSN
36 , CGEN_INSN_OPTIONAL_DIV_INSN, CGEN_INSN_OPTIONAL_DEBUG_INSN, CGEN_INSN_OPTIONAL_LDZ_INSN, CGEN_INSN_OPTIONAL_ABS_INSN
37 , CGEN_INSN_OPTIONAL_AVE_INSN, CGEN_INSN_OPTIONAL_MINMAX_INSN, CGEN_INSN_OPTIONAL_CLIP_INSN, CGEN_INSN_OPTIONAL_SAT_INSN
38 , CGEN_INSN_OPTIONAL_UCI_INSN, CGEN_INSN_OPTIONAL_DSP_INSN, CGEN_INSN_OPTIONAL_CP_INSN, CGEN_INSN_OPTIONAL_CP64_INSN
39 , CGEN_INSN_OPTIONAL_VLIW64, CGEN_INSN_MAY_TRAP, CGEN_INSN_VLIW_ALONE, CGEN_INSN_VLIW_NO_CORE_NOP
40 , CGEN_INSN_VLIW_NO_COP_NOP, CGEN_INSN_VLIW64_NO_MATCHING_NOP, CGEN_INSN_VLIW32_NO_MATCHING_NOP, CGEN_INSN_VOLATILE
41 , CGEN_INSN_END_BOOLS, CGEN_INSN_START_NBOOLS = 31, CGEN_INSN_MACH, CGEN_INSN_ISA
42 , CGEN_INSN_CPTYPE, CGEN_INSN_CRET, CGEN_INSN_LATENCY, CGEN_INSN_CONFIG
43 , CGEN_INSN_SLOTS, CGEN_INSN_END_NBOOLS
46 /* Number of non-boolean elements in cgen_insn_attr. */
47 #define CGEN_INSN_NBOOL_ATTRS (CGEN_INSN_END_NBOOLS - CGEN_INSN_START_NBOOLS - 1)
51 /* Enum declaration for machine type selection. */
52 typedef enum mach_attr {
53 MACH_BASE, MACH_MEP, MACH_H1, MACH_C5
57 /* Enum declaration for instruction set selection. */
58 typedef enum isa_attr {
59 ISA_MEP, ISA_EXT_CORE1, ISA_EXT_COP1_16, ISA_EXT_COP1_32
60 , ISA_EXT_COP1_48, ISA_EXT_COP1_64, ISA_MAX
63 /* Enum declaration for datatype to use for C intrinsics mapping. */
64 typedef enum cdata_attr {
65 CDATA_LABEL, CDATA_REGNUM, CDATA_FMAX_FLOAT, CDATA_FMAX_INT
66 , CDATA_POINTER, CDATA_LONG, CDATA_ULONG, CDATA_SHORT
67 , CDATA_USHORT, CDATA_CHAR, CDATA_UCHAR, CDATA_CP_DATA_BUS_INT
70 /* Enum declaration for datatype to use for coprocessor values. */
71 typedef enum cptype_attr {
72 CPTYPE_CP_DATA_BUS_INT, CPTYPE_VECT, CPTYPE_V2SI, CPTYPE_V4HI
73 , CPTYPE_V8QI, CPTYPE_V2USI, CPTYPE_V4UHI, CPTYPE_V8UQI
76 /* Enum declaration for Insn's intrinsic returns void, or the first argument rather than (or in addition to) passing it.. */
77 typedef enum cret_attr {
78 CRET_VOID, CRET_FIRST, CRET_FIRSTCOPY
81 /* Enum declaration for . */
82 typedef enum config_attr {
83 CONFIG_NONE, CONFIG_DEFAULT
86 /* Enum declaration for slots for which this opcode is valid - c3, p0s, p0, p1. */
87 typedef enum slots_attr {
88 SLOTS_CORE, SLOTS_C3, SLOTS_P0S, SLOTS_P0
94 struct mep_insn_attr {
98 enum cptype_attr cptype;
101 enum config_attr config;
103 inline unsigned int get_mach_attr () { return mach; }
104 inline CGEN_BITSET get_isa_attr () { return isa; }
105 inline enum cptype_attr get_cptype_attr () { return cptype; }
106 inline enum cret_attr get_cret_attr () { return cret; }
107 inline int get_latency_attr () { return latency; }
108 inline enum config_attr get_config_attr () { return config; }
109 inline unsigned int get_slots_attr () { return slots; }
110 inline int get_alias_attr () { return (bools & (1<<CGEN_INSN_ALIAS)) != 0; }
111 inline int get_virtual_attr () { return (bools & (1<<CGEN_INSN_VIRTUAL)) != 0; }
112 inline int get_uncond_cti_attr () { return (bools & (1<<CGEN_INSN_UNCOND_CTI)) != 0; }
113 inline int get_cond_cti_attr () { return (bools & (1<<CGEN_INSN_COND_CTI)) != 0; }
114 inline int get_skip_cti_attr () { return (bools & (1<<CGEN_INSN_SKIP_CTI)) != 0; }
115 inline int get_delay_slot_attr () { return (bools & (1<<CGEN_INSN_DELAY_SLOT)) != 0; }
116 inline int get_relaxable_attr () { return (bools & (1<<CGEN_INSN_RELAXABLE)) != 0; }
117 inline int get_relaxed_attr () { return (bools & (1<<CGEN_INSN_RELAXED)) != 0; }
118 inline int get_no_dis_attr () { return (bools & (1<<CGEN_INSN_NO_DIS)) != 0; }
119 inline int get_pbb_attr () { return (bools & (1<<CGEN_INSN_PBB)) != 0; }
120 inline int get_optional_bit_insn_attr () { return (bools & (1<<CGEN_INSN_OPTIONAL_BIT_INSN)) != 0; }
121 inline int get_optional_mul_insn_attr () { return (bools & (1<<CGEN_INSN_OPTIONAL_MUL_INSN)) != 0; }
122 inline int get_optional_div_insn_attr () { return (bools & (1<<CGEN_INSN_OPTIONAL_DIV_INSN)) != 0; }
123 inline int get_optional_debug_insn_attr () { return (bools & (1<<CGEN_INSN_OPTIONAL_DEBUG_INSN)) != 0; }
124 inline int get_optional_ldz_insn_attr () { return (bools & (1<<CGEN_INSN_OPTIONAL_LDZ_INSN)) != 0; }
125 inline int get_optional_abs_insn_attr () { return (bools & (1<<CGEN_INSN_OPTIONAL_ABS_INSN)) != 0; }
126 inline int get_optional_ave_insn_attr () { return (bools & (1<<CGEN_INSN_OPTIONAL_AVE_INSN)) != 0; }
127 inline int get_optional_minmax_insn_attr () { return (bools & (1<<CGEN_INSN_OPTIONAL_MINMAX_INSN)) != 0; }
128 inline int get_optional_clip_insn_attr () { return (bools & (1<<CGEN_INSN_OPTIONAL_CLIP_INSN)) != 0; }
129 inline int get_optional_sat_insn_attr () { return (bools & (1<<CGEN_INSN_OPTIONAL_SAT_INSN)) != 0; }
130 inline int get_optional_uci_insn_attr () { return (bools & (1<<CGEN_INSN_OPTIONAL_UCI_INSN)) != 0; }
131 inline int get_optional_dsp_insn_attr () { return (bools & (1<<CGEN_INSN_OPTIONAL_DSP_INSN)) != 0; }
132 inline int get_optional_cp_insn_attr () { return (bools & (1<<CGEN_INSN_OPTIONAL_CP_INSN)) != 0; }
133 inline int get_optional_cp64_insn_attr () { return (bools & (1<<CGEN_INSN_OPTIONAL_CP64_INSN)) != 0; }
134 inline int get_optional_vliw64_attr () { return (bools & (1<<CGEN_INSN_OPTIONAL_VLIW64)) != 0; }
135 inline int get_may_trap_attr () { return (bools & (1<<CGEN_INSN_MAY_TRAP)) != 0; }
136 inline int get_vliw_alone_attr () { return (bools & (1<<CGEN_INSN_VLIW_ALONE)) != 0; }
137 inline int get_vliw_no_core_nop_attr () { return (bools & (1<<CGEN_INSN_VLIW_NO_CORE_NOP)) != 0; }
138 inline int get_vliw_no_cop_nop_attr () { return (bools & (1<<CGEN_INSN_VLIW_NO_COP_NOP)) != 0; }
139 inline int get_vliw64_no_matching_nop_attr () { return (bools & (1<<CGEN_INSN_VLIW64_NO_MATCHING_NOP)) != 0; }
140 inline int get_vliw32_no_matching_nop_attr () { return (bools & (1<<CGEN_INSN_VLIW32_NO_MATCHING_NOP)) != 0; }
141 inline int get_volatile_attr () { return (bools & (1<<CGEN_INSN_VOLATILE)) != 0; }
144 #define MACH_C5_INSN_CHUNK_BITSIZE 16
146 } // end mep namespace
148 #endif /* DESC_MEP_H */