sid/component/testsuite/sidcomp.cgen-cpu.mep/intc_level.intc

   1 # mach: all
   2 # configfile(): INTC.conf
   3
   4         .include "testutils.inc"
   5         .include "interrupt.inc"
   6         start
   7
   8         .global         main
   9 main:
  10         mov     $0,0x0
  11         stc     $0,$psw         # psw,cfg Initialize
  12         stc     $0,$cfg
  13         mov     $10,0x0         # interrupt counter
  14         mov     $11,0x3         # number of interrupts desired
  15         mov     $13,0x0         # check code
  16
  17         cancel_hw_interrupt
  18         set_level_triggered 0
  19         set_interrupt_mask_level 0
  20         set_interrupt_priority 0 1
  21         set_umc
  22
  23         # case 1: enable everything then trigger interrupt
  24         # should interrupt $11 times and then continue.
  25         ei
  26         enable_hie
  27         enable_interrupt_channel 0
  28         save_label_to_reg interrupt_addr_1, $12
  29         raise_hw_interrupt
  30 interrupt_addr_1:
  31         assert $10, $11
  32         mov $10, 0x0
  33         disable_interrupt_channel 0
  34         disable_hie
  35         di
  36
  37
  38
  39         # case 2: raise the interrupt and then enable things
  40         # should interrupt $11 times and then continue
  41         save_label_to_reg interrupt_addr_2, $12
  42         raise_hw_interrupt
  43         enable_interrupt_channel 0
  44         enable_hie
  45         ei
  46 interrupt_addr_2:
  47         assert $10, $11
  48         mov $10, 0x0
  49         disable_interrupt_channel 0
  50         disable_hie
  51         di
  52
  53 okay:
  54         pass
  55 wrong:
  56         fail
  57
  58
  59 EntryINT00:
  60 EntryINT01:
  61 EntryINT02:
  62 EntryINT03:
  63 EntryINT04:
  64 EntryINT05:
  65 EntryINT06:
  66 EntryINT07:
  67 EntryINT08:
  68 EntryINT09:
  69 EntryINT10:
  70 EntryINT11:
  71 EntryINT12:
  72 EntryINT13:
  73 EntryINT14:
  74 EntryINT15:
  75 EntryINT16:
  76 EntryINT17:
  77 EntryINT18:
  78 EntryINT19:
  79 EntryINT20:
  80 EntryINT21:
  81 EntryINT22:
  82 EntryINT23:
  83 EntryINT24:
  84 EntryINT25:
  85 EntryINT26:
  86 EntryINT27:
  87 EntryINT28:
  88 EntryINT29:
  89 EntryINT30:
  90 EntryINT31:
  91         check_interrupt_entry_from $12
  92         add $10, 1
  93         mov $3, $11
  94         sub $3, $10
  95         bnez $3, return_from_interrupt
  96         cancel_hw_interrupt
  97 return_from_interrupt:
  98         reti
  99
 100
 101
 102 # and finally, setting up the interrupt vectors:
 103
 104         standard_interrupt_vectors