1 /* fr30 exception, interrupt, and trap (EIT) support
2 Copyright (C) 1998, 1999 Free Software Foundation, Inc.
3 Contributed by Cygnus Solutions.
5 This file is part of the GNU simulators.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License along
18 with this program; if not, write to the Free Software Foundation, Inc.,
19 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
22 #include "targ-vals.h"
23 #include "cgen-engine.h"
25 /* The semantic code invokes this for invalid (unrecognized) instructions. */
28 sim_engine_invalid_insn (SIM_CPU *current_cpu, IADDR cia, SEM_PC vpc)
30 SIM_DESC sd = CPU_STATE (current_cpu);
33 if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT)
35 h_bsm_set (current_cpu, h_sm_get (current_cpu));
36 h_bie_set (current_cpu, h_ie_get (current_cpu));
37 h_bcond_set (current_cpu, h_cond_get (current_cpu));
39 h_ie_set (current_cpu, 0);
40 h_cond_set (current_cpu, 0);
42 h_bpc_set (current_cpu, cia);
44 sim_engine_restart (CPU_STATE (current_cpu), current_cpu, NULL,
49 sim_engine_halt (sd, current_cpu, NULL, cia, sim_stopped, SIM_SIGILL);
53 /* Process an address exception. */
56 fr30_core_signal (SIM_DESC sd, SIM_CPU *current_cpu, sim_cia cia,
57 unsigned int map, int nr_bytes, address_word addr,
58 transfer_type transfer, sim_core_signals sig)
61 if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT)
63 h_bsm_set (current_cpu, h_sm_get (current_cpu));
64 h_bie_set (current_cpu, h_ie_get (current_cpu));
65 h_bcond_set (current_cpu, h_cond_get (current_cpu));
67 h_ie_set (current_cpu, 0);
68 h_cond_set (current_cpu, 0);
70 h_bpc_set (current_cpu, cia);
72 sim_engine_restart (CPU_STATE (current_cpu), current_cpu, NULL,
77 sim_core_signal (sd, current_cpu, cia, map, nr_bytes, addr,
81 /* Read/write functions for system call interface. */
84 syscall_read_mem (host_callback *cb, struct cb_syscall *sc,
85 unsigned long taddr, char *buf, int bytes)
87 SIM_DESC sd = (SIM_DESC) sc->p1;
88 SIM_CPU *cpu = (SIM_CPU *) sc->p2;
90 return sim_core_read_buffer (sd, cpu, read_map, buf, taddr, bytes);
94 syscall_write_mem (host_callback *cb, struct cb_syscall *sc,
95 unsigned long taddr, const char *buf, int bytes)
97 SIM_DESC sd = (SIM_DESC) sc->p1;
98 SIM_CPU *cpu = (SIM_CPU *) sc->p2;
100 return sim_core_write_buffer (sd, cpu, write_map, buf, taddr, bytes);
103 /* Subroutine of fr30_int to save the PS and PC and setup for INT and INTE. */
106 setup_int (SIM_CPU *current_cpu, PCADDR pc)
108 USI ssp = fr30bf_h_dr_get (current_cpu, H_DR_SSP);
109 USI ps = fr30bf_h_ps_get (current_cpu);
112 SETMEMSI (current_cpu, pc, ssp, ps);
114 SETMEMSI (current_cpu, pc, ssp, pc + 2);
115 fr30bf_h_dr_set (current_cpu, H_DR_SSP, ssp);
116 fr30bf_h_sbit_set (current_cpu, 0);
120 The result is the pc address to continue at.
121 Preprocessing like saving the various registers has already been done. */
124 fr30_int (SIM_CPU *current_cpu, PCADDR pc, int num)
126 SIM_DESC sd = CPU_STATE (current_cpu);
127 host_callback *cb = STATE_CALLBACK (sd);
129 #ifdef SIM_HAVE_BREAKPOINTS
130 /* Check for breakpoints "owned" by the simulator first, regardless
132 if (num == TRAP_BREAKPOINT)
134 /* First try sim-break.c. If it's a breakpoint the simulator "owns"
135 it doesn't return. Otherwise it returns and let's us try. */
136 sim_handle_breakpoint (sd, current_cpu, pc);
141 if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT)
143 /* The new pc is the trap vector entry.
144 We assume there's a branch there to some handler. */
146 setup_int (current_cpu, pc);
147 fr30bf_h_ibit_set (current_cpu, 0);
148 new_pc = GETMEMSI (current_cpu, pc,
149 fr30bf_h_dr_get (current_cpu, H_DR_TBR)
150 + 1024 - ((num + 1) * 4));
158 /* TODO: find out what the ABI for this is */
161 CB_SYSCALL_INIT (&s);
162 s.func = fr30bf_h_gr_get (current_cpu, 0);
163 s.arg1 = fr30bf_h_gr_get (current_cpu, 4);
164 s.arg2 = fr30bf_h_gr_get (current_cpu, 5);
165 s.arg3 = fr30bf_h_gr_get (current_cpu, 6);
167 if (s.func == TARGET_SYS_exit)
169 sim_engine_halt (sd, current_cpu, NULL, pc, sim_exited, s.arg1);
173 s.p2 = (PTR) current_cpu;
174 s.read_mem = syscall_read_mem;
175 s.write_mem = syscall_write_mem;
177 fr30bf_h_gr_set (current_cpu, 2, s.errcode); /* TODO: check this one */
178 fr30bf_h_gr_set (current_cpu, 4, s.result);
179 fr30bf_h_gr_set (current_cpu, 1, s.result2); /* TODO: check this one */
183 case TRAP_BREAKPOINT:
184 sim_engine_halt (sd, current_cpu, NULL, pc,
185 sim_stopped, SIM_SIGTRAP);
191 setup_int (current_cpu, pc);
192 fr30bf_h_ibit_set (current_cpu, 0);
193 new_pc = GETMEMSI (current_cpu, pc,
194 fr30bf_h_dr_get (current_cpu, H_DR_TBR)
195 + 1024 - ((num + 1) * 4));
200 /* Fake an "reti" insn.
201 Since we didn't push anything to stack, all we need to do is
207 fr30_inte (SIM_CPU *current_cpu, PCADDR pc, int num)
209 /* The new pc is the trap #9 vector entry.
210 We assume there's a branch there to some handler. */
212 setup_int (current_cpu, pc);
213 fr30bf_h_ilm_set (current_cpu, 4);
214 new_pc = GETMEMSI (current_cpu, pc,
215 fr30bf_h_dr_get (current_cpu, H_DR_TBR)
216 + 1024 - ((9 + 1) * 4));