1 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
3 * configure: Regenerate.
5 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
7 * config.in: Regenerate.
10 * configure: Regenerate.
12 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
14 * configure: Regenerate to track ../common/common.m4 changes.
17 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
18 Daniel Jacobowitz <dan@codesourcery.com>
19 Joseph Myers <joseph@codesourcery.com>
21 * configure: Regenerate.
23 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
25 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
26 that unconditionally allows fmt_ps.
27 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
28 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
29 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
30 filter from 64,f to 32,f.
31 (PREFX): Change filter from 64 to 32.
32 (LDXC1, LUXC1): Provide separate mips32r2 implementations
33 that use do_load_double instead of do_load. Make both LUXC1
34 versions unpredictable if SizeFGR () != 64.
35 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
36 instead of do_store. Remove unused variable. Make both SUXC1
37 versions unpredictable if SizeFGR () != 64.
39 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
41 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
42 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
45 2007-09-04 Nick Clifton <nickc@redhat.com>
47 * interp.c (options enum): Add OPTION_INFO_MEMORY.
48 (display_mem_info): New static variable.
49 (mips_option_handler): Handle OPTION_INFO_MEMORY.
50 (mips_options): Add info-memory and memory-info.
51 (sim_open): After processing the command line and board
52 specification, check display_mem_info. If it is set then
53 call the real handler for the --memory-info command line
56 2007-08-24 Joel Brobecker <brobecker@adacore.com>
58 * configure.ac: Change license of multi-run.c to GPL version 3.
59 * configure: Regenerate.
61 2007-06-28 Richard Sandiford <richard@codesourcery.com>
63 * configure.ac, configure: Revert last patch.
65 2007-06-26 Richard Sandiford <richard@codesourcery.com>
67 * configure.ac (sim_mipsisa3264_configs): New variable.
68 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
69 every configuration support all four targets, using the triplet to
70 determine the default.
71 * configure: Regenerate.
73 2007-06-25 Richard Sandiford <richard@codesourcery.com>
75 * Makefile.in (m16run.o): New rule.
77 2007-05-15 Thiemo Seufer <ths@mips.com>
79 * mips3264r2.igen (DSHD): Fix compile warning.
81 2007-05-14 Thiemo Seufer <ths@mips.com>
83 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
84 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
85 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
86 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
89 2007-03-01 Thiemo Seufer <ths@mips.com>
91 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
94 2007-02-20 Thiemo Seufer <ths@mips.com>
96 * dsp.igen: Update copyright notice.
97 * dsp2.igen: Fix copyright notice.
99 2007-02-20 Thiemo Seufer <ths@mips.com>
100 Chao-Ying Fu <fu@mips.com>
102 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
103 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
104 Add dsp2 to sim_igen_machine.
105 * configure: Regenerate.
106 * dsp.igen (do_ph_op): Add MUL support when op = 2.
107 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
108 (mulq_rs.ph): Use do_ph_mulq.
109 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
110 * mips.igen: Add dsp2 model and include dsp2.igen.
111 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
112 for *mips32r2, *mips64r2, *dsp.
113 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
114 for *mips32r2, *mips64r2, *dsp2.
115 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
117 2007-02-19 Thiemo Seufer <ths@mips.com>
118 Nigel Stephens <nigel@mips.com>
120 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
121 jumps with hazard barrier.
123 2007-02-19 Thiemo Seufer <ths@mips.com>
124 Nigel Stephens <nigel@mips.com>
126 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
127 after each call to sim_io_write.
129 2007-02-19 Thiemo Seufer <ths@mips.com>
130 Nigel Stephens <nigel@mips.com>
132 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
133 supported by this simulator.
134 (decode_coproc): Recognise additional CP0 Config registers
137 2007-02-19 Thiemo Seufer <ths@mips.com>
138 Nigel Stephens <nigel@mips.com>
139 David Ung <davidu@mips.com>
141 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
142 uninterpreted formats. If fmt is one of the uninterpreted types
143 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
144 fmt_word, and fmt_uninterpreted_64 like fmt_long.
145 (store_fpr): When writing an invalid odd register, set the
146 matching even register to fmt_unknown, not the following register.
147 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
148 the the memory window at offset 0 set by --memory-size command
150 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
152 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
154 (sim_monitor): When returning the memory size to the MIPS
155 application, use the value in STATE_MEM_SIZE, not an arbitrary
157 (cop_lw): Don' mess around with FPR_STATE, just pass
158 fmt_uninterpreted_32 to StoreFPR.
160 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
162 * mips.igen (not_word_value): Single version for mips32, mips64
165 2007-02-19 Thiemo Seufer <ths@mips.com>
166 Nigel Stephens <nigel@mips.com>
168 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
171 2007-02-17 Thiemo Seufer <ths@mips.com>
173 * configure.ac (mips*-sde-elf*): Move in front of generic machine
175 * configure: Regenerate.
177 2007-02-17 Thiemo Seufer <ths@mips.com>
179 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
180 Add mdmx to sim_igen_machine.
181 (mipsisa64*-*-*): Likewise. Remove dsp.
182 (mipsisa32*-*-*): Remove dsp.
183 * configure: Regenerate.
185 2007-02-13 Thiemo Seufer <ths@mips.com>
187 * configure.ac: Add mips*-sde-elf* target.
188 * configure: Regenerate.
190 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
192 * acconfig.h: Remove.
193 * config.in, configure: Regenerate.
195 2006-11-07 Thiemo Seufer <ths@mips.com>
197 * dsp.igen (do_w_op): Fix compiler warning.
199 2006-08-29 Thiemo Seufer <ths@mips.com>
200 David Ung <davidu@mips.com>
202 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
204 * configure: Regenerate.
205 * mips.igen (model): Add smartmips.
206 (MADDU): Increment ACX if carry.
207 (do_mult): Clear ACX.
208 (ROR,RORV): Add smartmips.
209 (include): Include smartmips.igen.
210 * sim-main.h (ACX): Set to REGISTERS[89].
211 * smartmips.igen: New file.
213 2006-08-29 Thiemo Seufer <ths@mips.com>
214 David Ung <davidu@mips.com>
216 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
217 mips3264r2.igen. Add missing dependency rules.
218 * m16e.igen: Support for mips16e save/restore instructions.
220 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
222 * configure: Regenerated.
224 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
226 * configure: Regenerated.
228 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
230 * configure: Regenerated.
232 2006-05-15 Chao-ying Fu <fu@mips.com>
234 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
236 2006-04-18 Nick Clifton <nickc@redhat.com>
238 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
241 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
243 * configure: Regenerate.
245 2005-12-14 Chao-ying Fu <fu@mips.com>
247 * Makefile.in (SIM_OBJS): Add dsp.o.
248 (dsp.o): New dependency.
249 (IGEN_INCLUDE): Add dsp.igen.
250 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
251 mipsisa64*-*-*): Add dsp to sim_igen_machine.
252 * configure: Regenerate.
253 * mips.igen: Add dsp model and include dsp.igen.
254 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
255 because these instructions are extended in DSP ASE.
256 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
257 adding 6 DSP accumulator registers and 1 DSP control register.
258 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
259 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
260 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
261 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
262 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
263 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
264 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
265 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
266 DSPCR_CCOND_SMASK): New define.
267 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
268 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
270 2005-07-08 Ian Lance Taylor <ian@airs.com>
272 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
274 2005-06-16 David Ung <davidu@mips.com>
275 Nigel Stephens <nigel@mips.com>
277 * mips.igen: New mips16e model and include m16e.igen.
278 (check_u64): Add mips16e tag.
279 * m16e.igen: New file for MIPS16e instructions.
280 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
281 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
283 * configure: Regenerate.
285 2005-05-26 David Ung <davidu@mips.com>
287 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
288 tags to all instructions which are applicable to the new ISAs.
289 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
291 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
293 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
295 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
296 * configure: Regenerate.
298 2005-03-23 Mark Kettenis <kettenis@gnu.org>
300 * configure: Regenerate.
302 2005-01-14 Andrew Cagney <cagney@gnu.org>
304 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
305 explicit call to AC_CONFIG_HEADER.
306 * configure: Regenerate.
308 2005-01-12 Andrew Cagney <cagney@gnu.org>
310 * configure.ac: Update to use ../common/common.m4.
311 * configure: Re-generate.
313 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
315 * configure: Regenerated to track ../common/aclocal.m4 changes.
317 2005-01-07 Andrew Cagney <cagney@gnu.org>
319 * configure.ac: Rename configure.in, require autoconf 2.59.
320 * configure: Re-generate.
322 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
324 * configure: Regenerate for ../common/aclocal.m4 update.
326 2004-09-24 Monika Chaddha <monika@acmet.com>
328 Committed by Andrew Cagney.
329 * m16.igen (CMP, CMPI): Fix assembler.
331 2004-08-18 Chris Demetriou <cgd@broadcom.com>
333 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
334 * configure: Regenerate.
336 2004-06-25 Chris Demetriou <cgd@broadcom.com>
338 * configure.in (sim_m16_machine): Include mipsIII.
339 * configure: Regenerate.
341 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
343 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
345 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
347 2004-04-10 Chris Demetriou <cgd@broadcom.com>
349 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
351 2004-04-09 Chris Demetriou <cgd@broadcom.com>
353 * mips.igen (check_fmt): Remove.
354 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
355 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
356 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
357 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
358 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
359 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
360 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
361 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
362 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
363 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
365 2004-04-09 Chris Demetriou <cgd@broadcom.com>
367 * sb1.igen (check_sbx): New function.
368 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
370 2004-03-29 Chris Demetriou <cgd@broadcom.com>
371 Richard Sandiford <rsandifo@redhat.com>
373 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
374 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
375 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
376 separate implementations for mipsIV and mipsV. Use new macros to
377 determine whether the restrictions apply.
379 2004-01-19 Chris Demetriou <cgd@broadcom.com>
381 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
382 (check_mult_hilo): Improve comments.
383 (check_div_hilo): Likewise. Also, fork off a new version
384 to handle mips32/mips64 (since there are no hazards to check
387 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
389 * mips.igen (do_dmultx): Fix check for negative operands.
391 2003-05-16 Ian Lance Taylor <ian@airs.com>
393 * Makefile.in (SHELL): Make sure this is defined.
394 (various): Use $(SHELL) whenever we invoke move-if-change.
396 2003-05-03 Chris Demetriou <cgd@broadcom.com>
398 * cp1.c: Tweak attribution slightly.
401 * mdmx.igen: Likewise.
402 * mips3d.igen: Likewise.
403 * sb1.igen: Likewise.
405 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
407 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
410 2003-02-27 Andrew Cagney <cagney@redhat.com>
412 * interp.c (sim_open): Rename _bfd to bfd.
413 (sim_create_inferior): Ditto.
415 2003-01-14 Chris Demetriou <cgd@broadcom.com>
417 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
419 2003-01-14 Chris Demetriou <cgd@broadcom.com>
421 * mips.igen (EI, DI): Remove.
423 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
425 * Makefile.in (tmp-run-multi): Fix mips16 filter.
427 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
428 Andrew Cagney <ac131313@redhat.com>
429 Gavin Romig-Koch <gavin@redhat.com>
430 Graydon Hoare <graydon@redhat.com>
431 Aldy Hernandez <aldyh@redhat.com>
432 Dave Brolley <brolley@redhat.com>
433 Chris Demetriou <cgd@broadcom.com>
435 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
436 (sim_mach_default): New variable.
437 (mips64vr-*-*, mips64vrel-*-*): New configurations.
438 Add a new simulator generator, MULTI.
439 * configure: Regenerate.
440 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
441 (multi-run.o): New dependency.
442 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
443 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
444 (tmp-multi): Combine them.
445 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
446 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
447 (distclean-extra): New rule.
448 * sim-main.h: Include bfd.h.
449 (MIPS_MACH): New macro.
450 * mips.igen (vr4120, vr5400, vr5500): New models.
451 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
452 * vr.igen: Replace with new version.
454 2003-01-04 Chris Demetriou <cgd@broadcom.com>
456 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
457 * configure: Regenerate.
459 2002-12-31 Chris Demetriou <cgd@broadcom.com>
461 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
462 * mips.igen: Remove all invocations of check_branch_bug and
465 2002-12-16 Chris Demetriou <cgd@broadcom.com>
467 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
469 2002-07-30 Chris Demetriou <cgd@broadcom.com>
471 * mips.igen (do_load_double, do_store_double): New functions.
472 (LDC1, SDC1): Rename to...
473 (LDC1b, SDC1b): respectively.
474 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
476 2002-07-29 Michael Snyder <msnyder@redhat.com>
478 * cp1.c (fp_recip2): Modify initialization expression so that
479 GCC will recognize it as constant.
481 2002-06-18 Chris Demetriou <cgd@broadcom.com>
483 * mdmx.c (SD_): Delete.
484 (Unpredictable): Re-define, for now, to directly invoke
485 unpredictable_action().
486 (mdmx_acc_op): Fix error in .ob immediate handling.
488 2002-06-18 Andrew Cagney <cagney@redhat.com>
490 * interp.c (sim_firmware_command): Initialize `address'.
492 2002-06-16 Andrew Cagney <ac131313@redhat.com>
494 * configure: Regenerated to track ../common/aclocal.m4 changes.
496 2002-06-14 Chris Demetriou <cgd@broadcom.com>
497 Ed Satterthwaite <ehs@broadcom.com>
499 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
500 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
501 * mips.igen: Include mips3d.igen.
502 (mips3d): New model name for MIPS-3D ASE instructions.
503 (CVT.W.fmt): Don't use this instruction for word (source) format
505 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
506 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
507 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
508 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
509 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
510 (RSquareRoot1, RSquareRoot2): New macros.
511 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
512 (fp_rsqrt2): New functions.
513 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
514 * configure: Regenerate.
516 2002-06-13 Chris Demetriou <cgd@broadcom.com>
517 Ed Satterthwaite <ehs@broadcom.com>
519 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
520 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
521 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
522 (convert): Note that this function is not used for paired-single
524 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
525 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
526 (check_fmt_p): Enable paired-single support.
527 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
528 (PUU.PS): New instructions.
529 (CVT.S.fmt): Don't use this instruction for paired-single format
531 * sim-main.h (FP_formats): New value 'fmt_ps.'
532 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
533 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
535 2002-06-12 Chris Demetriou <cgd@broadcom.com>
537 * mips.igen: Fix formatting of function calls in
540 2002-06-12 Chris Demetriou <cgd@broadcom.com>
542 * mips.igen (MOVN, MOVZ): Trace result.
543 (TNEI): Print "tnei" as the opcode name in traces.
544 (CEIL.W): Add disassembly string for traces.
545 (RSQRT.fmt): Make location of disassembly string consistent
546 with other instructions.
548 2002-06-12 Chris Demetriou <cgd@broadcom.com>
550 * mips.igen (X): Delete unused function.
552 2002-06-08 Andrew Cagney <cagney@redhat.com>
554 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
556 2002-06-07 Chris Demetriou <cgd@broadcom.com>
557 Ed Satterthwaite <ehs@broadcom.com>
559 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
560 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
561 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
562 (fp_nmsub): New prototypes.
563 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
564 (NegMultiplySub): New defines.
565 * mips.igen (RSQRT.fmt): Use RSquareRoot().
566 (MADD.D, MADD.S): Replace with...
567 (MADD.fmt): New instruction.
568 (MSUB.D, MSUB.S): Replace with...
569 (MSUB.fmt): New instruction.
570 (NMADD.D, NMADD.S): Replace with...
571 (NMADD.fmt): New instruction.
572 (NMSUB.D, MSUB.S): Replace with...
573 (NMSUB.fmt): New instruction.
575 2002-06-07 Chris Demetriou <cgd@broadcom.com>
576 Ed Satterthwaite <ehs@broadcom.com>
578 * cp1.c: Fix more comment spelling and formatting.
579 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
580 (denorm_mode): New function.
581 (fpu_unary, fpu_binary): Round results after operation, collect
582 status from rounding operations, and update the FCSR.
583 (convert): Collect status from integer conversions and rounding
584 operations, and update the FCSR. Adjust NaN values that result
585 from conversions. Convert to use sim_io_eprintf rather than
586 fprintf, and remove some debugging code.
587 * cp1.h (fenr_FS): New define.
589 2002-06-07 Chris Demetriou <cgd@broadcom.com>
591 * cp1.c (convert): Remove unusable debugging code, and move MIPS
592 rounding mode to sim FP rounding mode flag conversion code into...
593 (rounding_mode): New function.
595 2002-06-07 Chris Demetriou <cgd@broadcom.com>
597 * cp1.c: Clean up formatting of a few comments.
598 (value_fpr): Reformat switch statement.
600 2002-06-06 Chris Demetriou <cgd@broadcom.com>
601 Ed Satterthwaite <ehs@broadcom.com>
604 * sim-main.h: Include cp1.h.
605 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
606 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
607 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
608 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
609 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
610 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
611 * cp1.c: Don't include sim-fpu.h; already included by
612 sim-main.h. Clean up formatting of some comments.
613 (NaN, Equal, Less): Remove.
614 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
615 (fp_cmp): New functions.
616 * mips.igen (do_c_cond_fmt): Remove.
617 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
618 Compare. Add result tracing.
619 (CxC1): Remove, replace with...
620 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
621 (DMxC1): Remove, replace with...
622 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
623 (MxC1): Remove, replace with...
624 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
626 2002-06-04 Chris Demetriou <cgd@broadcom.com>
628 * sim-main.h (FGRIDX): Remove, replace all uses with...
629 (FGR_BASE): New macro.
630 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
631 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
632 (NR_FGR, FGR): Likewise.
633 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
634 * mips.igen: Likewise.
636 2002-06-04 Chris Demetriou <cgd@broadcom.com>
638 * cp1.c: Add an FSF Copyright notice to this file.
640 2002-06-04 Chris Demetriou <cgd@broadcom.com>
641 Ed Satterthwaite <ehs@broadcom.com>
643 * cp1.c (Infinity): Remove.
644 * sim-main.h (Infinity): Likewise.
646 * cp1.c (fp_unary, fp_binary): New functions.
647 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
648 (fp_sqrt): New functions, implemented in terms of the above.
649 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
650 (Recip, SquareRoot): Remove (replaced by functions above).
651 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
652 (fp_recip, fp_sqrt): New prototypes.
653 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
654 (Recip, SquareRoot): Replace prototypes with #defines which
655 invoke the functions above.
657 2002-06-03 Chris Demetriou <cgd@broadcom.com>
659 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
660 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
661 file, remove PARAMS from prototypes.
662 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
663 simulator state arguments.
664 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
665 pass simulator state arguments.
666 * cp1.c (SD): Redefine as CPU_STATE(cpu).
667 (store_fpr, convert): Remove 'sd' argument.
668 (value_fpr): Likewise. Convert to use 'SD' instead.
670 2002-06-03 Chris Demetriou <cgd@broadcom.com>
672 * cp1.c (Min, Max): Remove #if 0'd functions.
673 * sim-main.h (Min, Max): Remove.
675 2002-06-03 Chris Demetriou <cgd@broadcom.com>
677 * cp1.c: fix formatting of switch case and default labels.
678 * interp.c: Likewise.
679 * sim-main.c: Likewise.
681 2002-06-03 Chris Demetriou <cgd@broadcom.com>
683 * cp1.c: Clean up comments which describe FP formats.
684 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
686 2002-06-03 Chris Demetriou <cgd@broadcom.com>
687 Ed Satterthwaite <ehs@broadcom.com>
689 * configure.in (mipsisa64sb1*-*-*): New target for supporting
690 Broadcom SiByte SB-1 processor configurations.
691 * configure: Regenerate.
692 * sb1.igen: New file.
693 * mips.igen: Include sb1.igen.
695 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
696 * mdmx.igen: Add "sb1" model to all appropriate functions and
698 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
699 (ob_func, ob_acc): Reference the above.
700 (qh_acc): Adjust to keep the same size as ob_acc.
701 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
702 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
704 2002-06-03 Chris Demetriou <cgd@broadcom.com>
706 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
708 2002-06-02 Chris Demetriou <cgd@broadcom.com>
709 Ed Satterthwaite <ehs@broadcom.com>
711 * mips.igen (mdmx): New (pseudo-)model.
712 * mdmx.c, mdmx.igen: New files.
713 * Makefile.in (SIM_OBJS): Add mdmx.o.
714 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
716 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
717 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
718 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
719 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
720 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
721 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
722 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
723 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
724 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
725 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
726 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
727 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
728 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
729 (qh_fmtsel): New macros.
730 (_sim_cpu): New member "acc".
731 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
732 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
734 2002-05-01 Chris Demetriou <cgd@broadcom.com>
736 * interp.c: Use 'deprecated' rather than 'depreciated.'
737 * sim-main.h: Likewise.
739 2002-05-01 Chris Demetriou <cgd@broadcom.com>
741 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
742 which wouldn't compile anyway.
743 * sim-main.h (unpredictable_action): New function prototype.
744 (Unpredictable): Define to call igen function unpredictable().
745 (NotWordValue): New macro to call igen function not_word_value().
746 (UndefinedResult): Remove.
747 * interp.c (undefined_result): Remove.
748 (unpredictable_action): New function.
749 * mips.igen (not_word_value, unpredictable): New functions.
750 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
751 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
752 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
753 NotWordValue() to check for unpredictable inputs, then
754 Unpredictable() to handle them.
756 2002-02-24 Chris Demetriou <cgd@broadcom.com>
758 * mips.igen: Fix formatting of calls to Unpredictable().
760 2002-04-20 Andrew Cagney <ac131313@redhat.com>
762 * interp.c (sim_open): Revert previous change.
764 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
766 * interp.c (sim_open): Disable chunk of code that wrote code in
767 vector table entries.
769 2002-03-19 Chris Demetriou <cgd@broadcom.com>
771 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
772 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
775 2002-03-19 Chris Demetriou <cgd@broadcom.com>
777 * cp1.c: Fix many formatting issues.
779 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
781 * cp1.c (fpu_format_name): New function to replace...
782 (DOFMT): This. Delete, and update all callers.
783 (fpu_rounding_mode_name): New function to replace...
784 (RMMODE): This. Delete, and update all callers.
786 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
788 * interp.c: Move FPU support routines from here to...
789 * cp1.c: Here. New file.
790 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
793 2002-03-12 Chris Demetriou <cgd@broadcom.com>
795 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
796 * mips.igen (mips32, mips64): New models, add to all instructions
797 and functions as appropriate.
798 (loadstore_ea, check_u64): New variant for model mips64.
799 (check_fmt_p): New variant for models mipsV and mips64, remove
800 mipsV model marking fro other variant.
803 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
804 for mips32 and mips64.
805 (DCLO, DCLZ): New instructions for mips64.
807 2002-03-07 Chris Demetriou <cgd@broadcom.com>
809 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
810 immediate or code as a hex value with the "%#lx" format.
811 (ANDI): Likewise, and fix printed instruction name.
813 2002-03-05 Chris Demetriou <cgd@broadcom.com>
815 * sim-main.h (UndefinedResult, Unpredictable): New macros
816 which currently do nothing.
818 2002-03-05 Chris Demetriou <cgd@broadcom.com>
820 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
821 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
822 (status_CU3): New definitions.
824 * sim-main.h (ExceptionCause): Add new values for MIPS32
825 and MIPS64: MDMX, MCheck, CacheErr. Update comments
826 for DebugBreakPoint and NMIReset to note their status in
828 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
829 (SignalExceptionCacheErr): New exception macros.
831 2002-03-05 Chris Demetriou <cgd@broadcom.com>
833 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
834 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
836 (SignalExceptionCoProcessorUnusable): Take as argument the
837 unusable coprocessor number.
839 2002-03-05 Chris Demetriou <cgd@broadcom.com>
841 * mips.igen: Fix formatting of all SignalException calls.
843 2002-03-05 Chris Demetriou <cgd@broadcom.com>
845 * sim-main.h (SIGNEXTEND): Remove.
847 2002-03-04 Chris Demetriou <cgd@broadcom.com>
849 * mips.igen: Remove gencode comment from top of file, fix
850 spelling in another comment.
852 2002-03-04 Chris Demetriou <cgd@broadcom.com>
854 * mips.igen (check_fmt, check_fmt_p): New functions to check
855 whether specific floating point formats are usable.
856 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
857 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
858 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
859 Use the new functions.
860 (do_c_cond_fmt): Remove format checks...
861 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
863 2002-03-03 Chris Demetriou <cgd@broadcom.com>
865 * mips.igen: Fix formatting of check_fpu calls.
867 2002-03-03 Chris Demetriou <cgd@broadcom.com>
869 * mips.igen (FLOOR.L.fmt): Store correct destination register.
871 2002-03-03 Chris Demetriou <cgd@broadcom.com>
873 * mips.igen: Remove whitespace at end of lines.
875 2002-03-02 Chris Demetriou <cgd@broadcom.com>
877 * mips.igen (loadstore_ea): New function to do effective
878 address calculations.
879 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
880 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
881 CACHE): Use loadstore_ea to do effective address computations.
883 2002-03-02 Chris Demetriou <cgd@broadcom.com>
885 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
886 * mips.igen (LL, CxC1, MxC1): Likewise.
888 2002-03-02 Chris Demetriou <cgd@broadcom.com>
890 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
891 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
892 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
893 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
894 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
895 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
896 Don't split opcode fields by hand, use the opcode field values
899 2002-03-01 Chris Demetriou <cgd@broadcom.com>
901 * mips.igen (do_divu): Fix spacing.
903 * mips.igen (do_dsllv): Move to be right before DSLLV,
904 to match the rest of the do_<shift> functions.
906 2002-03-01 Chris Demetriou <cgd@broadcom.com>
908 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
909 DSRL32, do_dsrlv): Trace inputs and results.
911 2002-03-01 Chris Demetriou <cgd@broadcom.com>
913 * mips.igen (CACHE): Provide instruction-printing string.
915 * interp.c (signal_exception): Comment tokens after #endif.
917 2002-02-28 Chris Demetriou <cgd@broadcom.com>
919 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
920 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
921 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
922 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
923 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
924 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
925 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
926 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
928 2002-02-28 Chris Demetriou <cgd@broadcom.com>
930 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
931 instruction-printing string.
932 (LWU): Use '64' as the filter flag.
934 2002-02-28 Chris Demetriou <cgd@broadcom.com>
936 * mips.igen (SDXC1): Fix instruction-printing string.
938 2002-02-28 Chris Demetriou <cgd@broadcom.com>
940 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
943 2002-02-27 Chris Demetriou <cgd@broadcom.com>
945 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
948 2002-02-27 Chris Demetriou <cgd@broadcom.com>
950 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
951 add a comma) so that it more closely match the MIPS ISA
952 documentation opcode partitioning.
953 (PREF): Put useful names on opcode fields, and include
954 instruction-printing string.
956 2002-02-27 Chris Demetriou <cgd@broadcom.com>
958 * mips.igen (check_u64): New function which in the future will
959 check whether 64-bit instructions are usable and signal an
960 exception if not. Currently a no-op.
961 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
962 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
963 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
964 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
966 * mips.igen (check_fpu): New function which in the future will
967 check whether FPU instructions are usable and signal an exception
968 if not. Currently a no-op.
969 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
970 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
971 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
972 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
973 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
974 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
975 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
976 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
978 2002-02-27 Chris Demetriou <cgd@broadcom.com>
980 * mips.igen (do_load_left, do_load_right): Move to be immediately
982 (do_store_left, do_store_right): Move to be immediately following
985 2002-02-27 Chris Demetriou <cgd@broadcom.com>
987 * mips.igen (mipsV): New model name. Also, add it to
988 all instructions and functions where it is appropriate.
990 2002-02-18 Chris Demetriou <cgd@broadcom.com>
992 * mips.igen: For all functions and instructions, list model
993 names that support that instruction one per line.
995 2002-02-11 Chris Demetriou <cgd@broadcom.com>
997 * mips.igen: Add some additional comments about supported
998 models, and about which instructions go where.
999 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1000 order as is used in the rest of the file.
1002 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1004 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1005 indicating that ALU32_END or ALU64_END are there to check
1007 (DADD): Likewise, but also remove previous comment about
1010 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1012 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1013 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1014 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1015 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1016 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1017 fields (i.e., add and move commas) so that they more closely
1018 match the MIPS ISA documentation opcode partitioning.
1020 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1022 * mips.igen (ADDI): Print immediate value.
1023 (BREAK): Print code.
1024 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1025 (SLL): Print "nop" specially, and don't run the code
1026 that does the shift for the "nop" case.
1028 2001-11-17 Fred Fish <fnf@redhat.com>
1030 * sim-main.h (float_operation): Move enum declaration outside
1031 of _sim_cpu struct declaration.
1033 2001-04-12 Jim Blandy <jimb@redhat.com>
1035 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1036 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1038 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1039 PENDING_FILL, and you can get the intended effect gracefully by
1040 calling PENDING_SCHED directly.
1042 2001-02-23 Ben Elliston <bje@redhat.com>
1044 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1045 already defined elsewhere.
1047 2001-02-19 Ben Elliston <bje@redhat.com>
1049 * sim-main.h (sim_monitor): Return an int.
1050 * interp.c (sim_monitor): Add return values.
1051 (signal_exception): Handle error conditions from sim_monitor.
1053 2001-02-08 Ben Elliston <bje@redhat.com>
1055 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1056 (store_memory): Likewise, pass cia to sim_core_write*.
1058 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1060 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1061 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1063 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1065 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1066 * Makefile.in: Don't delete *.igen when cleaning directory.
1068 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1070 * m16.igen (break): Call SignalException not sim_engine_halt.
1072 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1074 From Jason Eckhardt:
1075 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1077 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1079 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1081 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1083 * mips.igen (do_dmultx): Fix typo.
1085 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1087 * configure: Regenerated to track ../common/aclocal.m4 changes.
1089 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1091 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1093 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1095 * sim-main.h (GPR_CLEAR): Define macro.
1097 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1099 * interp.c (decode_coproc): Output long using %lx and not %s.
1101 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1103 * interp.c (sim_open): Sort & extend dummy memory regions for
1104 --board=jmr3904 for eCos.
1106 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1108 * configure: Regenerated.
1110 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1112 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1113 calls, conditional on the simulator being in verbose mode.
1115 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1117 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1118 cache don't get ReservedInstruction traps.
1120 1999-11-29 Mark Salter <msalter@cygnus.com>
1122 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1123 to clear status bits in sdisr register. This is how the hardware works.
1125 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1126 being used by cygmon.
1128 1999-11-11 Andrew Haley <aph@cygnus.com>
1130 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1133 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1135 * mips.igen (MULT): Correct previous mis-applied patch.
1137 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1139 * mips.igen (delayslot32): Handle sequence like
1140 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1141 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1142 (MULT): Actually pass the third register...
1144 1999-09-03 Mark Salter <msalter@cygnus.com>
1146 * interp.c (sim_open): Added more memory aliases for additional
1147 hardware being touched by cygmon on jmr3904 board.
1149 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1151 * configure: Regenerated to track ../common/aclocal.m4 changes.
1153 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1155 * interp.c (sim_store_register): Handle case where client - GDB -
1156 specifies that a 4 byte register is 8 bytes in size.
1157 (sim_fetch_register): Ditto.
1159 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1161 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1162 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1163 (idt_monitor_base): Base address for IDT monitor traps.
1164 (pmon_monitor_base): Ditto for PMON.
1165 (lsipmon_monitor_base): Ditto for LSI PMON.
1166 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1167 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1168 (sim_firmware_command): New function.
1169 (mips_option_handler): Call it for OPTION_FIRMWARE.
1170 (sim_open): Allocate memory for idt_monitor region. If "--board"
1171 option was given, add no monitor by default. Add BREAK hooks only if
1172 monitors are also there.
1174 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1176 * interp.c (sim_monitor): Flush output before reading input.
1178 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1180 * tconfig.in (SIM_HANDLES_LMA): Always define.
1182 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1184 From Mark Salter <msalter@cygnus.com>:
1185 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1186 (sim_open): Add setup for BSP board.
1188 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1190 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1191 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1192 them as unimplemented.
1194 1999-05-08 Felix Lee <flee@cygnus.com>
1196 * configure: Regenerated to track ../common/aclocal.m4 changes.
1198 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1200 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1202 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1204 * configure.in: Any mips64vr5*-*-* target should have
1205 -DTARGET_ENABLE_FR=1.
1206 (default_endian): Any mips64vr*el-*-* target should default to
1208 * configure: Re-generate.
1210 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1212 * mips.igen (ldl): Extend from _16_, not 32.
1214 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
1216 * interp.c (sim_store_register): Force registers written to by GDB
1217 into an un-interpreted state.
1219 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
1221 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1222 CPU, start periodic background I/O polls.
1223 (tx3904sio_poll): New function: periodic I/O poller.
1225 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
1227 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1229 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
1231 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1234 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
1236 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1237 (load_word): Call SIM_CORE_SIGNAL hook on error.
1238 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1239 starting. For exception dispatching, pass PC instead of NULL_CIA.
1240 (decode_coproc): Use COP0_BADVADDR to store faulting address.
1241 * sim-main.h (COP0_BADVADDR): Define.
1242 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1243 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1244 (_sim_cpu): Add exc_* fields to store register value snapshots.
1245 * mips.igen (*): Replace memory-related SignalException* calls
1246 with references to SIM_CORE_SIGNAL hook.
1248 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1250 * sim-main.c (*): Minor warning cleanups.
1252 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
1254 * m16.igen (DADDIU5): Correct type-o.
1256 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
1258 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1261 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
1263 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1265 (interp.o): Add dependency on itable.h
1266 (oengine.c, gencode): Delete remaining references.
1267 (BUILT_SRC_FROM_GEN): Clean up.
1269 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
1272 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1273 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1274 tmp-run-hack) : New.
1275 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1276 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1277 Drop the "64" qualifier to get the HACK generator working.
1278 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
1279 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1280 qualifier to get the hack generator working.
1281 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1282 (DSLL): Use do_dsll.
1283 (DSLLV): Use do_dsllv.
1284 (DSRA): Use do_dsra.
1285 (DSRL): Use do_dsrl.
1286 (DSRLV): Use do_dsrlv.
1287 (BC1): Move *vr4100 to get the HACK generator working.
1288 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1289 get the HACK generator working.
1290 (MACC) Rename to get the HACK generator working.
1291 (DMACC,MACCS,DMACCS): Add the 64.
1293 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
1295 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1296 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1298 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
1300 * mips/interp.c (DEBUG): Cleanups.
1302 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
1304 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1305 (tx3904sio_tickle): fflush after a stdout character output.
1307 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
1309 * interp.c (sim_close): Uninstall modules.
1311 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
1313 * sim-main.h, interp.c (sim_monitor): Change to global
1316 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1318 * configure.in (vr4100): Only include vr4100 instructions in
1320 * configure: Re-generate.
1321 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1323 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1325 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1326 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1329 * configure.in (sim_default_gen, sim_use_gen): Replace with
1331 (--enable-sim-igen): Delete config option. Always using IGEN.
1332 * configure: Re-generate.
1334 * Makefile.in (gencode): Kill, kill, kill.
1337 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1339 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1340 bit mips16 igen simulator.
1341 * configure: Re-generate.
1343 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1344 as part of vr4100 ISA.
1345 * vr.igen: Mark all instructions as 64 bit only.
1347 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1349 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1352 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
1354 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1355 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
1356 * configure: Re-generate.
1358 * m16.igen (BREAK): Define breakpoint instruction.
1359 (JALX32): Mark instruction as mips16 and not r3900.
1360 * mips.igen (C.cond.fmt): Fix typo in instruction format.
1362 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1364 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1366 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1367 insn as a debug breakpoint.
1369 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1371 (PENDING_SCHED): Clean up trace statement.
1372 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1373 (PENDING_FILL): Delay write by only one cycle.
1374 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1376 * sim-main.c (pending_tick): Clean up trace statements. Add trace
1378 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1380 (pending_tick): Move incrementing of index to FOR statement.
1381 (pending_tick): Only update PENDING_OUT after a write has occured.
1383 * configure.in: Add explicit mips-lsi-* target. Use gencode to
1385 * configure: Re-generate.
1387 * interp.c (sim_engine_run OLD): Delete explicit call to
1388 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1390 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
1392 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1393 interrupt level number to match changed SignalExceptionInterrupt
1396 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
1398 * interp.c: #include "itable.h" if WITH_IGEN.
1399 (get_insn_name): New function.
1400 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1401 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1403 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
1405 * configure: Rebuilt to inhale new common/aclocal.m4.
1407 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
1409 * dv-tx3904sio.c: Include sim-assert.h.
1411 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
1413 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1414 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1415 Reorganize target-specific sim-hardware checks.
1416 * configure: rebuilt.
1417 * interp.c (sim_open): For tx39 target boards, set
1418 OPERATING_ENVIRONMENT, add tx3904sio devices.
1419 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1420 ROM executables. Install dv-sockser into sim-modules list.
1422 * dv-tx3904irc.c: Compiler warning clean-up.
1423 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
1424 frequent hw-trace messages.
1426 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
1428 * vr.igen (MulAcc): Identify as a vr4100 specific function.
1430 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1432 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1434 * vr.igen: New file.
1435 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1436 * mips.igen: Define vr4100 model. Include vr.igen.
1437 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
1439 * mips.igen (check_mf_hilo): Correct check.
1441 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1443 * sim-main.h (interrupt_event): Add prototype.
1445 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1446 register_ptr, register_value.
1447 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1449 * sim-main.h (tracefh): Make extern.
1451 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
1453 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1454 Reduce unnecessarily high timer event frequency.
1455 * dv-tx3904cpu.c: Ditto for interrupt event.
1457 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
1459 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1461 (interrupt_event): Made non-static.
1463 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1464 interchange of configuration values for external vs. internal
1467 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
1469 * mips.igen (BREAK): Moved code to here for
1470 simulator-reserved break instructions.
1471 * gencode.c (build_instruction): Ditto.
1472 * interp.c (signal_exception): Code moved from here. Non-
1473 reserved instructions now use exception vector, rather
1475 * sim-main.h: Moved magic constants to here.
1477 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
1479 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1480 register upon non-zero interrupt event level, clear upon zero
1482 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1483 by passing zero event value.
1484 (*_io_{read,write}_buffer): Endianness fixes.
1485 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1486 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1488 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1489 serial I/O and timer module at base address 0xFFFF0000.
1491 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
1493 * mips.igen (SWC1) : Correct the handling of ReverseEndian
1496 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
1498 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1500 * configure: Update.
1502 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
1504 * dv-tx3904tmr.c: New file - implements tx3904 timer.
1505 * dv-tx3904{irc,cpu}.c: Mild reformatting.
1506 * configure.in: Include tx3904tmr in hw_device list.
1507 * configure: Rebuilt.
1508 * interp.c (sim_open): Instantiate three timer instances.
1509 Fix address typo of tx3904irc instance.
1511 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
1513 * interp.c (signal_exception): SystemCall exception now uses
1514 the exception vector.
1516 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
1518 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1521 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1523 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1525 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
1527 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1529 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1530 sim-main.h. Declare a struct hw_descriptor instead of struct
1531 hw_device_descriptor.
1533 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1535 * mips.igen (do_store_left, do_load_left): Compute nr of left and
1536 right bits and then re-align left hand bytes to correct byte
1537 lanes. Fix incorrect computation in do_store_left when loading
1538 bytes from second word.
1540 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1542 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1543 * interp.c (sim_open): Only create a device tree when HW is
1546 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1547 * interp.c (signal_exception): Ditto.
1549 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
1551 * gencode.c: Mark BEGEZALL as LIKELY.
1553 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
1555 * sim-main.h (ALU32_END): Sign extend 32 bit results.
1556 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1558 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
1560 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1561 modules. Recognize TX39 target with "mips*tx39" pattern.
1562 * configure: Rebuilt.
1563 * sim-main.h (*): Added many macros defining bits in
1564 TX39 control registers.
1565 (SignalInterrupt): Send actual PC instead of NULL.
1566 (SignalNMIReset): New exception type.
1567 * interp.c (board): New variable for future use to identify
1568 a particular board being simulated.
1569 (mips_option_handler,mips_options): Added "--board" option.
1570 (interrupt_event): Send actual PC.
1571 (sim_open): Make memory layout conditional on board setting.
1572 (signal_exception): Initial implementation of hardware interrupt
1573 handling. Accept another break instruction variant for simulator
1575 (decode_coproc): Implement RFE instruction for TX39.
1576 (mips.igen): Decode RFE instruction as such.
1577 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1578 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1579 bbegin to implement memory map.
1580 * dv-tx3904cpu.c: New file.
1581 * dv-tx3904irc.c: New file.
1583 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
1585 * mips.igen (check_mt_hilo): Create a separate r3900 version.
1587 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
1589 * tx.igen (madd,maddu): Replace calls to check_op_hilo
1590 with calls to check_div_hilo.
1592 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
1594 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1595 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1596 Add special r3900 version of do_mult_hilo.
1597 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1598 with calls to check_mult_hilo.
1599 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1600 with calls to check_div_hilo.
1602 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
1604 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
1605 Document a replacement.
1607 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
1609 * interp.c (sim_monitor): Make mon_printf work.
1611 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
1613 * sim-main.h (INSN_NAME): New arg `cpu'.
1615 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
1617 * configure: Regenerated to track ../common/aclocal.m4 changes.
1619 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
1621 * configure: Regenerated to track ../common/aclocal.m4 changes.
1624 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
1626 * acconfig.h: New file.
1627 * configure.in: Reverted change of Apr 24; use sinclude again.
1629 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
1631 * configure: Regenerated to track ../common/aclocal.m4 changes.
1634 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
1636 * configure.in: Don't call sinclude.
1638 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
1640 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
1642 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1644 * mips.igen (ERET): Implement.
1646 * interp.c (decode_coproc): Return sign-extended EPC.
1648 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
1650 * interp.c (signal_exception): Do not ignore Trap.
1651 (signal_exception): On TRAP, restart at exception address.
1652 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
1653 (signal_exception): Update.
1654 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
1655 so that TRAP instructions are caught.
1657 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
1659 * sim-main.h (struct hilo_access, struct hilo_history): Define,
1660 contains HI/LO access history.
1661 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
1662 (HIACCESS, LOACCESS): Delete, replace with
1663 (HIHISTORY, LOHISTORY): New macros.
1664 (CHECKHILO): Delete all, moved to mips.igen
1666 * gencode.c (build_instruction): Do not generate checks for
1667 correct HI/LO register usage.
1669 * interp.c (old_engine_run): Delete checks for correct HI/LO
1672 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
1673 check_mf_cycles): New functions.
1674 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
1675 do_divu, domultx, do_mult, do_multu): Use.
1677 * tx.igen ("madd", "maddu"): Use.
1679 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
1681 * mips.igen (DSRAV): Use function do_dsrav.
1682 (SRAV): Use new function do_srav.
1684 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
1685 (B): Sign extend 11 bit immediate.
1686 (EXT-B*): Shift 16 bit immediate left by 1.
1687 (ADDIU*): Don't sign extend immediate value.
1689 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
1691 * m16run.c (sim_engine_run): Restore CIA after handling an event.
1693 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
1696 * mips.igen (delayslot32, nullify_next_insn): New functions.
1697 (m16.igen): Always include.
1698 (do_*): Add more tracing.
1700 * m16.igen (delayslot16): Add NIA argument, could be called by a
1701 32 bit MIPS16 instruction.
1703 * interp.c (ifetch16): Move function from here.
1704 * sim-main.c (ifetch16): To here.
1706 * sim-main.c (ifetch16, ifetch32): Update to match current
1707 implementations of LH, LW.
1708 (signal_exception): Don't print out incorrect hex value of illegal
1711 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1713 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
1716 * m16.igen: Implement MIPS16 instructions.
1718 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
1719 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
1720 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
1721 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
1722 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
1723 bodies of corresponding code from 32 bit insn to these. Also used
1724 by MIPS16 versions of functions.
1726 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
1727 (IMEM16): Drop NR argument from macro.
1729 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1731 * Makefile.in (SIM_OBJS): Add sim-main.o.
1733 * sim-main.h (address_translation, load_memory, store_memory,
1734 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
1736 (pr_addr, pr_uword64): Declare.
1737 (sim-main.c): Include when H_REVEALS_MODULE_P.
1739 * interp.c (address_translation, load_memory, store_memory,
1740 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
1742 * sim-main.c: To here. Fix compilation problems.
1744 * configure.in: Enable inlining.
1745 * configure: Re-config.
1747 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1749 * configure: Regenerated to track ../common/aclocal.m4 changes.
1751 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
1753 * mips.igen: Include tx.igen.
1754 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
1755 * tx.igen: New file, contains MADD and MADDU.
1757 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
1758 the hardwired constant `7'.
1759 (store_memory): Ditto.
1760 (LOADDRMASK): Move definition to sim-main.h.
1762 mips.igen (MTC0): Enable for r3900.
1765 mips.igen (do_load_byte): Delete.
1766 (do_load, do_store, do_load_left, do_load_write, do_store_left,
1767 do_store_right): New functions.
1768 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
1770 configure.in: Let the tx39 use igen again.
1773 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1775 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
1776 not an address sized quantity. Return zero for cache sizes.
1778 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
1780 * mips.igen (r3900): r3900 does not support 64 bit integer
1783 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
1785 * configure.in (mipstx39*-*-*): Use gencode simulator rather
1787 * configure : Rebuild.
1789 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
1791 * configure: Regenerated to track ../common/aclocal.m4 changes.
1793 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1795 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
1797 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
1799 * configure: Regenerated to track ../common/aclocal.m4 changes.
1800 * config.in: Regenerated to track ../common/aclocal.m4 changes.
1802 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
1804 * configure: Regenerated to track ../common/aclocal.m4 changes.
1806 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
1808 * interp.c (Max, Min): Comment out functions. Not yet used.
1810 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
1812 * configure: Regenerated to track ../common/aclocal.m4 changes.
1814 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
1816 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
1817 configurable settings for stand-alone simulator.
1819 * configure.in: Added X11 search, just in case.
1821 * configure: Regenerated.
1823 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
1825 * interp.c (sim_write, sim_read, load_memory, store_memory):
1826 Replace sim_core_*_map with read_map, write_map, exec_map resp.
1828 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
1830 * sim-main.h (GETFCC): Return an unsigned value.
1832 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1834 * mips.igen (DIV): Fix check for -1 / MIN_INT.
1835 (DADD): Result destination is RD not RT.
1837 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1839 * sim-main.h (HIACCESS, LOACCESS): Always define.
1841 * mdmx.igen (Maxi, Mini): Rename Max, Min.
1843 * interp.c (sim_info): Delete.
1845 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
1847 * interp.c (DECLARE_OPTION_HANDLER): Use it.
1848 (mips_option_handler): New argument `cpu'.
1849 (sim_open): Update call to sim_add_option_table.
1851 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
1853 * mips.igen (CxC1): Add tracing.
1855 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
1857 * sim-main.h (Max, Min): Declare.
1859 * interp.c (Max, Min): New functions.
1861 * mips.igen (BC1): Add tracing.
1863 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
1865 * interp.c Added memory map for stack in vr4100
1867 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
1869 * interp.c (load_memory): Add missing "break"'s.
1871 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
1873 * interp.c (sim_store_register, sim_fetch_register): Pass in
1874 length parameter. Return -1.
1876 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
1878 * interp.c: Added hardware init hook, fixed warnings.
1880 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1882 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
1884 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
1886 * interp.c (ifetch16): New function.
1888 * sim-main.h (IMEM32): Rename IMEM.
1889 (IMEM16_IMMED): Define.
1891 (DELAY_SLOT): Update.
1893 * m16run.c (sim_engine_run): New file.
1895 * m16.igen: All instructions except LB.
1896 (LB): Call do_load_byte.
1897 * mips.igen (do_load_byte): New function.
1898 (LB): Call do_load_byte.
1900 * mips.igen: Move spec for insn bit size and high bit from here.
1901 * Makefile.in (tmp-igen, tmp-m16): To here.
1903 * m16.dc: New file, decode mips16 instructions.
1905 * Makefile.in (SIM_NO_ALL): Define.
1906 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
1908 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
1910 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
1911 point unit to 32 bit registers.
1912 * configure: Re-generate.
1914 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1916 * configure.in (sim_use_gen): Make IGEN the default simulator
1917 generator for generic 32 and 64 bit mips targets.
1918 * configure: Re-generate.
1920 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1922 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
1925 * interp.c (sim_fetch_register, sim_store_register): Read/write
1926 FGR from correct location.
1927 (sim_open): Set size of FGR's according to
1928 WITH_TARGET_FLOATING_POINT_BITSIZE.
1930 * sim-main.h (FGR): Store floating point registers in a separate
1933 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
1935 * configure: Regenerated to track ../common/aclocal.m4 changes.
1937 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1939 * interp.c (ColdReset): Call PENDING_INVALIDATE.
1941 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
1943 * interp.c (pending_tick): New function. Deliver pending writes.
1945 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
1946 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
1947 it can handle mixed sized quantites and single bits.
1949 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
1951 * interp.c (oengine.h): Do not include when building with IGEN.
1952 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
1953 (sim_info): Ditto for PROCESSOR_64BIT.
1954 (sim_monitor): Replace ut_reg with unsigned_word.
1955 (*): Ditto for t_reg.
1956 (LOADDRMASK): Define.
1957 (sim_open): Remove defunct check that host FP is IEEE compliant,
1958 using software to emulate floating point.
1959 (value_fpr, ...): Always compile, was conditional on HASFPU.
1961 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
1963 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
1966 * interp.c (SD, CPU): Define.
1967 (mips_option_handler): Set flags in each CPU.
1968 (interrupt_event): Assume CPU 0 is the one being iterrupted.
1969 (sim_close): Do not clear STATE, deleted anyway.
1970 (sim_write, sim_read): Assume CPU zero's vm should be used for
1972 (sim_create_inferior): Set the PC for all processors.
1973 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
1975 (mips16_entry): Pass correct nr of args to store_word, load_word.
1976 (ColdReset): Cold reset all cpu's.
1977 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
1978 (sim_monitor, load_memory, store_memory, signal_exception): Use
1979 `CPU' instead of STATE_CPU.
1982 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
1985 * sim-main.h (signal_exception): Add sim_cpu arg.
1986 (SignalException*): Pass both SD and CPU to signal_exception.
1987 * interp.c (signal_exception): Update.
1989 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
1991 (sync_operation, prefetch, cache_op, store_memory, load_memory,
1992 address_translation): Ditto
1993 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
1995 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
1997 * configure: Regenerated to track ../common/aclocal.m4 changes.
1999 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2001 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2003 * mips.igen (model): Map processor names onto BFD name.
2005 * sim-main.h (CPU_CIA): Delete.
2006 (SET_CIA, GET_CIA): Define
2008 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2010 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2013 * configure.in (default_endian): Configure a big-endian simulator
2015 * configure: Re-generate.
2017 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2019 * configure: Regenerated to track ../common/aclocal.m4 changes.
2021 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2023 * interp.c (sim_monitor): Handle Densan monitor outbyte
2024 and inbyte functions.
2026 1997-12-29 Felix Lee <flee@cygnus.com>
2028 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2030 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2032 * Makefile.in (tmp-igen): Arrange for $zero to always be
2033 reset to zero after every instruction.
2035 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2037 * configure: Regenerated to track ../common/aclocal.m4 changes.
2040 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2042 * mips.igen (MSUB): Fix to work like MADD.
2043 * gencode.c (MSUB): Similarly.
2045 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2047 * configure: Regenerated to track ../common/aclocal.m4 changes.
2049 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2051 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2053 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2055 * sim-main.h (sim-fpu.h): Include.
2057 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2058 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2059 using host independant sim_fpu module.
2061 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2063 * interp.c (signal_exception): Report internal errors with SIGABRT
2066 * sim-main.h (C0_CONFIG): New register.
2067 (signal.h): No longer include.
2069 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2071 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2073 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2075 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2077 * mips.igen: Tag vr5000 instructions.
2078 (ANDI): Was missing mipsIV model, fix assembler syntax.
2079 (do_c_cond_fmt): New function.
2080 (C.cond.fmt): Handle mips I-III which do not support CC field
2082 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2083 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2085 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2086 vr5000 which saves LO in a GPR separatly.
2088 * configure.in (enable-sim-igen): For vr5000, select vr5000
2089 specific instructions.
2090 * configure: Re-generate.
2092 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2094 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2096 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2097 fmt_uninterpreted_64 bit cases to switch. Convert to
2100 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2102 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2103 as specified in IV3.2 spec.
2104 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2106 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2108 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2109 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2110 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2111 PENDING_FILL versions of instructions. Simplify.
2113 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2115 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2117 (MTHI, MFHI): Disable code checking HI-LO.
2119 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2121 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2123 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2125 * gencode.c (build_mips16_operands): Replace IPC with cia.
2127 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2128 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2130 (UndefinedResult): Replace function with macro/function
2132 (sim_engine_run): Don't save PC in IPC.
2134 * sim-main.h (IPC): Delete.
2137 * interp.c (signal_exception, store_word, load_word,
2138 address_translation, load_memory, store_memory, cache_op,
2139 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2140 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2141 current instruction address - cia - argument.
2142 (sim_read, sim_write): Call address_translation directly.
2143 (sim_engine_run): Rename variable vaddr to cia.
2144 (signal_exception): Pass cia to sim_monitor
2146 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2147 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2148 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2150 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2151 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2154 * interp.c (signal_exception): Pass restart address to
2157 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2158 idecode.o): Add dependency.
2160 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2162 (DELAY_SLOT): Update NIA not PC with branch address.
2163 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2165 * mips.igen: Use CIA not PC in branch calculations.
2166 (illegal): Call SignalException.
2167 (BEQ, ADDIU): Fix assembler.
2169 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2171 * m16.igen (JALX): Was missing.
2173 * configure.in (enable-sim-igen): New configuration option.
2174 * configure: Re-generate.
2176 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2178 * interp.c (load_memory, store_memory): Delete parameter RAW.
2179 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2180 bypassing {load,store}_memory.
2182 * sim-main.h (ByteSwapMem): Delete definition.
2184 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2186 * interp.c (sim_do_command, sim_commands): Delete mips specific
2187 commands. Handled by module sim-options.
2189 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2190 (WITH_MODULO_MEMORY): Define.
2192 * interp.c (sim_info): Delete code printing memory size.
2194 * interp.c (mips_size): Nee sim_size, delete function.
2196 (monitor, monitor_base, monitor_size): Delete global variables.
2197 (sim_open, sim_close): Delete code creating monitor and other
2198 memory regions. Use sim-memopts module, via sim_do_commandf, to
2199 manage memory regions.
2200 (load_memory, store_memory): Use sim-core for memory model.
2202 * interp.c (address_translation): Delete all memory map code
2203 except line forcing 32 bit addresses.
2205 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2207 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2210 * interp.c (logfh, logfile): Delete globals.
2211 (sim_open, sim_close): Delete code opening & closing log file.
2212 (mips_option_handler): Delete -l and -n options.
2213 (OPTION mips_options): Ditto.
2215 * interp.c (OPTION mips_options): Rename option trace to dinero.
2216 (mips_option_handler): Update.
2218 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2220 * interp.c (fetch_str): New function.
2221 (sim_monitor): Rewrite using sim_read & sim_write.
2222 (sim_open): Check magic number.
2223 (sim_open): Write monitor vectors into memory using sim_write.
2224 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2225 (sim_read, sim_write): Simplify - transfer data one byte at a
2227 (load_memory, store_memory): Clarify meaning of parameter RAW.
2229 * sim-main.h (isHOST): Defete definition.
2230 (isTARGET): Mark as depreciated.
2231 (address_translation): Delete parameter HOST.
2233 * interp.c (address_translation): Delete parameter HOST.
2235 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2239 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2240 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2242 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
2244 * mips.igen: Add model filter field to records.
2246 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2248 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
2250 interp.c (sim_engine_run): Do not compile function sim_engine_run
2251 when WITH_IGEN == 1.
2253 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2254 target architecture.
2256 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2257 igen. Replace with configuration variables sim_igen_flags /
2260 * m16.igen: New file. Copy mips16 insns here.
2261 * mips.igen: From here.
2263 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2265 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2267 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2269 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
2271 * gencode.c (build_instruction): Follow sim_write's lead in using
2272 BigEndianMem instead of !ByteSwapMem.
2274 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
2276 * configure.in (sim_gen): Dependent on target, select type of
2277 generator. Always select old style generator.
2279 configure: Re-generate.
2281 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2283 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2284 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2285 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2286 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2287 SIM_@sim_gen@_*, set by autoconf.
2289 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2291 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2293 * interp.c (ColdReset): Remove #ifdef HASFPU, check
2294 CURRENT_FLOATING_POINT instead.
2296 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2297 (address_translation): Raise exception InstructionFetch when
2298 translation fails and isINSTRUCTION.
2300 * interp.c (sim_open, sim_write, sim_monitor, store_word,
2301 sim_engine_run): Change type of of vaddr and paddr to
2303 (address_translation, prefetch, load_memory, store_memory,
2304 cache_op): Change type of vAddr and pAddr to address_word.
2306 * gencode.c (build_instruction): Change type of vaddr and paddr to
2309 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
2311 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2312 macro to obtain result of ALU op.
2314 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2316 * interp.c (sim_info): Call profile_print.
2318 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2320 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2322 * sim-main.h (WITH_PROFILE): Do not define, defined in
2323 common/sim-config.h. Use sim-profile module.
2324 (simPROFILE): Delete defintion.
2326 * interp.c (PROFILE): Delete definition.
2327 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2328 (sim_close): Delete code writing profile histogram.
2329 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2331 (sim_engine_run): Delete code profiling the PC.
2333 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2335 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2337 * interp.c (sim_monitor): Make register pointers of type
2340 * sim-main.h: Make registers of type unsigned_word not
2343 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2345 * interp.c (sync_operation): Rename from SyncOperation, make
2346 global, add SD argument.
2347 (prefetch): Rename from Prefetch, make global, add SD argument.
2348 (decode_coproc): Make global.
2350 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2352 * gencode.c (build_instruction): Generate DecodeCoproc not
2353 decode_coproc calls.
2355 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2356 (SizeFGR): Move to sim-main.h
2357 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2358 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2359 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2361 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2362 FP_RM_TOMINF, GETRM): Move to sim-main.h.
2363 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2364 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2365 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2366 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2368 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2370 (sim-alu.h): Include.
2371 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2372 (sim_cia): Typedef to instruction_address.
2374 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
2376 * Makefile.in (interp.o): Rename generated file engine.c to
2381 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
2383 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2385 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2387 * gencode.c (build_instruction): For "FPSQRT", output correct
2388 number of arguments to Recip.
2390 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
2392 * Makefile.in (interp.o): Depends on sim-main.h
2394 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2396 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2397 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2398 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2399 STATE, DSSTATE): Define
2400 (GPR, FGRIDX, ..): Define.
2402 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2403 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2404 (GPR, FGRIDX, ...): Delete macros.
2406 * interp.c: Update names to match defines from sim-main.h
2408 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
2410 * interp.c (sim_monitor): Add SD argument.
2411 (sim_warning): Delete. Replace calls with calls to
2413 (sim_error): Delete. Replace calls with sim_io_error.
2414 (open_trace, writeout32, writeout16, getnum): Add SD argument.
2415 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2416 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2418 (mips_size): Rename from sim_size. Add SD argument.
2420 * interp.c (simulator): Delete global variable.
2421 (callback): Delete global variable.
2422 (mips_option_handler, sim_open, sim_write, sim_read,
2423 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2424 sim_size,sim_monitor): Use sim_io_* not callback->*.
2425 (sim_open): ZALLOC simulator struct.
2426 (PROFILE): Do not define.
2428 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2430 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2431 support.h with corresponding code.
2433 * sim-main.h (word64, uword64), support.h: Move definition to
2435 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2438 * Makefile.in: Update dependencies
2439 * interp.c: Do not include.
2441 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2443 * interp.c (address_translation, load_memory, store_memory,
2444 cache_op): Rename to from AddressTranslation et.al., make global,
2447 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2450 * interp.c (SignalException): Rename to signal_exception, make
2453 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2455 * sim-main.h (SignalException, SignalExceptionInterrupt,
2456 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2457 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2458 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2461 * interp.c, support.h: Use.
2463 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2465 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2466 to value_fpr / store_fpr. Add SD argument.
2467 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2468 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2470 * sim-main.h (ValueFPR, StoreFPR): Define.
2472 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
2474 * interp.c (sim_engine_run): Check consistency between configure
2475 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2478 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2479 (mips_fpu): Configure WITH_FLOATING_POINT.
2480 (mips_endian): Configure WITH_TARGET_ENDIAN.
2481 * configure: Update.
2483 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2485 * configure: Regenerated to track ../common/aclocal.m4 changes.
2487 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
2489 * configure: Regenerated.
2491 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
2493 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2495 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2497 * gencode.c (print_igen_insn_models): Assume certain architectures
2498 include all mips* instructions.
2499 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2502 * Makefile.in (tmp.igen): Add target. Generate igen input from
2505 * gencode.c (FEATURE_IGEN): Define.
2506 (main): Add --igen option. Generate output in igen format.
2507 (process_instructions): Format output according to igen option.
2508 (print_igen_insn_format): New function.
2509 (print_igen_insn_models): New function.
2510 (process_instructions): Only issue warnings and ignore
2511 instructions when no FEATURE_IGEN.
2513 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2515 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2518 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2520 * configure: Regenerated to track ../common/aclocal.m4 changes.
2522 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
2524 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2525 SIM_RESERVED_BITS): Delete, moved to common.
2526 (SIM_EXTRA_CFLAGS): Update.
2528 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2530 * configure.in: Configure non-strict memory alignment.
2531 * configure: Regenerated to track ../common/aclocal.m4 changes.
2533 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
2535 * configure: Regenerated to track ../common/aclocal.m4 changes.
2537 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
2539 * gencode.c (SDBBP,DERET): Added (3900) insns.
2540 (RFE): Turn on for 3900.
2541 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2542 (dsstate): Made global.
2543 (SUBTARGET_R3900): Added.
2544 (CANCELDELAYSLOT): New.
2545 (SignalException): Ignore SystemCall rather than ignore and
2546 terminate. Add DebugBreakPoint handling.
2547 (decode_coproc): New insns RFE, DERET; and new registers Debug
2548 and DEPC protected by SUBTARGET_R3900.
2549 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2551 * Makefile.in,configure.in: Add mips subtarget option.
2552 * configure: Update.
2554 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
2556 * gencode.c: Add r3900 (tx39).
2559 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
2561 * gencode.c (build_instruction): Don't need to subtract 4 for
2564 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
2566 * interp.c: Correct some HASFPU problems.
2568 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
2570 * configure: Regenerated to track ../common/aclocal.m4 changes.
2572 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2574 * interp.c (mips_options): Fix samples option short form, should
2577 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
2579 * interp.c (sim_info): Enable info code. Was just returning.
2581 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2583 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2586 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
2588 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2590 (build_instruction): Ditto for LL.
2592 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
2594 * configure: Regenerated to track ../common/aclocal.m4 changes.
2596 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2598 * configure: Regenerated to track ../common/aclocal.m4 changes.
2601 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
2603 * interp.c (sim_open): Add call to sim_analyze_program, update
2606 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
2608 * interp.c (sim_kill): Delete.
2609 (sim_create_inferior): Add ABFD argument. Set PC from same.
2610 (sim_load): Move code initializing trap handlers from here.
2611 (sim_open): To here.
2612 (sim_load): Delete, use sim-hload.c.
2614 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
2616 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2618 * configure: Regenerated to track ../common/aclocal.m4 changes.
2621 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2623 * interp.c (sim_open): Add ABFD argument.
2624 (sim_load): Move call to sim_config from here.
2625 (sim_open): To here. Check return status.
2627 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
2629 * gencode.c (build_instruction): Two arg MADD should
2630 not assign result to $0.
2632 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
2634 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2635 * sim/mips/configure.in: Regenerate.
2637 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
2639 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
2640 signed8, unsigned8 et.al. types.
2642 * interp.c (SUB_REG_FETCH): Handle both little and big endian
2643 hosts when selecting subreg.
2645 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
2647 * interp.c (sim_engine_run): Reset the ZERO register to zero
2648 regardless of FEATURE_WARN_ZERO.
2649 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
2651 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2653 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
2654 (SignalException): For BreakPoints ignore any mode bits and just
2656 (SignalException): Always set the CAUSE register.
2658 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
2660 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
2661 exception has been taken.
2663 * interp.c: Implement the ERET and mt/f sr instructions.
2665 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
2667 * interp.c (SignalException): Don't bother restarting an
2670 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2672 * interp.c (SignalException): Really take an interrupt.
2673 (interrupt_event): Only deliver interrupts when enabled.
2675 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2677 * interp.c (sim_info): Only print info when verbose.
2678 (sim_info) Use sim_io_printf for output.
2680 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2682 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
2685 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2687 * interp.c (sim_do_command): Check for common commands if a
2688 simulator specific command fails.
2690 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
2692 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
2693 and simBE when DEBUG is defined.
2695 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
2697 * interp.c (interrupt_event): New function. Pass exception event
2698 onto exception handler.
2700 * configure.in: Check for stdlib.h.
2701 * configure: Regenerate.
2703 * gencode.c (build_instruction): Add UNUSED attribute to tempS
2704 variable declaration.
2705 (build_instruction): Initialize memval1.
2706 (build_instruction): Add UNUSED attribute to byte, bigend,
2708 (build_operands): Ditto.
2710 * interp.c: Fix GCC warnings.
2711 (sim_get_quit_code): Delete.
2713 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
2714 * Makefile.in: Ditto.
2715 * configure: Re-generate.
2717 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
2719 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2721 * interp.c (mips_option_handler): New function parse argumes using
2723 (myname): Replace with STATE_MY_NAME.
2724 (sim_open): Delete check for host endianness - performed by
2726 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
2727 (sim_open): Move much of the initialization from here.
2728 (sim_load): To here. After the image has been loaded and
2730 (sim_open): Move ColdReset from here.
2731 (sim_create_inferior): To here.
2732 (sim_open): Make FP check less dependant on host endianness.
2734 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
2736 * interp.c (sim_set_callbacks): Delete.
2738 * interp.c (membank, membank_base, membank_size): Replace with
2739 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
2740 (sim_open): Remove call to callback->init. gdb/run do this.
2744 * sim-main.h (SIM_HAVE_FLATMEM): Define.
2746 * interp.c (big_endian_p): Delete, replaced by
2747 current_target_byte_order.
2749 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2751 * interp.c (host_read_long, host_read_word, host_swap_word,
2752 host_swap_long): Delete. Using common sim-endian.
2753 (sim_fetch_register, sim_store_register): Use H2T.
2754 (pipeline_ticks): Delete. Handled by sim-events.
2756 (sim_engine_run): Update.
2758 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
2760 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
2762 (SignalException): To here. Signal using sim_engine_halt.
2763 (sim_stop_reason): Delete, moved to common.
2765 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
2767 * interp.c (sim_open): Add callback argument.
2768 (sim_set_callbacks): Delete SIM_DESC argument.
2771 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2773 * Makefile.in (SIM_OBJS): Add common modules.
2775 * interp.c (sim_set_callbacks): Also set SD callback.
2776 (set_endianness, xfer_*, swap_*): Delete.
2777 (host_read_word, host_read_long, host_swap_word, host_swap_long):
2778 Change to functions using sim-endian macros.
2779 (control_c, sim_stop): Delete, use common version.
2780 (simulate): Convert into.
2781 (sim_engine_run): This function.
2782 (sim_resume): Delete.
2784 * interp.c (simulation): New variable - the simulator object.
2785 (sim_kind): Delete global - merged into simulation.
2786 (sim_load): Cleanup. Move PC assignment from here.
2787 (sim_create_inferior): To here.
2789 * sim-main.h: New file.
2790 * interp.c (sim-main.h): Include.
2792 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
2794 * configure: Regenerated to track ../common/aclocal.m4 changes.
2796 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
2798 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
2800 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
2802 * gencode.c (build_instruction): DIV instructions: check
2803 for division by zero and integer overflow before using
2804 host's division operation.
2806 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
2808 * Makefile.in (SIM_OBJS): Add sim-load.o.
2809 * interp.c: #include bfd.h.
2810 (target_byte_order): Delete.
2811 (sim_kind, myname, big_endian_p): New static locals.
2812 (sim_open): Set sim_kind, myname. Move call to set_endianness to
2813 after argument parsing. Recognize -E arg, set endianness accordingly.
2814 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
2815 load file into simulator. Set PC from bfd.
2816 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
2817 (set_endianness): Use big_endian_p instead of target_byte_order.
2819 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
2821 * interp.c (sim_size): Delete prototype - conflicts with
2822 definition in remote-sim.h. Correct definition.
2824 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2826 * configure: Regenerated to track ../common/aclocal.m4 changes.
2829 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
2831 * interp.c (sim_open): New arg `kind'.
2833 * configure: Regenerated to track ../common/aclocal.m4 changes.
2835 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2837 * configure: Regenerated to track ../common/aclocal.m4 changes.
2839 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
2841 * interp.c (sim_open): Set optind to 0 before calling getopt.
2843 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2845 * configure: Regenerated to track ../common/aclocal.m4 changes.
2847 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
2849 * interp.c : Replace uses of pr_addr with pr_uword64
2850 where the bit length is always 64 independent of SIM_ADDR.
2851 (pr_uword64) : added.
2853 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2855 * configure: Re-generate.
2857 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
2859 * configure: Regenerate to track ../common/aclocal.m4 changes.
2861 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
2863 * interp.c (sim_open): New SIM_DESC result. Argument is now
2865 (other sim_*): New SIM_DESC argument.
2867 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
2869 * interp.c: Fix printing of addresses for non-64-bit targets.
2870 (pr_addr): Add function to print address based on size.
2872 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
2874 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
2876 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
2878 * gencode.c (build_mips16_operands): Correct computation of base
2879 address for extended PC relative instruction.
2881 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
2883 * interp.c (mips16_entry): Add support for floating point cases.
2884 (SignalException): Pass floating point cases to mips16_entry.
2885 (ValueFPR): Don't restrict fmt_single and fmt_word to even
2887 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
2889 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
2890 and then set the state to fmt_uninterpreted.
2891 (COP_SW): Temporarily set the state to fmt_word while calling
2894 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
2896 * gencode.c (build_instruction): The high order may be set in the
2897 comparison flags at any ISA level, not just ISA 4.
2899 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
2901 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
2902 COMMON_{PRE,POST}_CONFIG_FRAG instead.
2903 * configure.in: sinclude ../common/aclocal.m4.
2904 * configure: Regenerated.
2906 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
2908 * configure: Rebuild after change to aclocal.m4.
2910 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
2912 * configure configure.in Makefile.in: Update to new configure
2913 scheme which is more compatible with WinGDB builds.
2914 * configure.in: Improve comment on how to run autoconf.
2915 * configure: Re-run autoconf to get new ../common/aclocal.m4.
2916 * Makefile.in: Use autoconf substitution to install common
2919 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
2921 * gencode.c (build_instruction): Use BigEndianCPU instead of
2924 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
2926 * interp.c (sim_monitor): Make output to stdout visible in
2927 wingdb's I/O log window.
2929 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
2931 * support.h: Undo previous change to SIGTRAP
2934 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
2936 * interp.c (store_word, load_word): New static functions.
2937 (mips16_entry): New static function.
2938 (SignalException): Look for mips16 entry and exit instructions.
2939 (simulate): Use the correct index when setting fpr_state after
2940 doing a pending move.
2942 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
2944 * interp.c: Fix byte-swapping code throughout to work on
2945 both little- and big-endian hosts.
2947 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
2949 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
2950 with gdb/config/i386/xm-windows.h.
2952 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
2954 * gencode.c (build_instruction): Work around MSVC++ code gen bug
2955 that messes up arithmetic shifts.
2957 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
2959 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
2960 SIGTRAP and SIGQUIT for _WIN32.
2962 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
2964 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
2965 force a 64 bit multiplication.
2966 (build_instruction) [OR]: In mips16 mode, don't do anything if the
2967 destination register is 0, since that is the default mips16 nop
2970 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
2972 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
2973 (build_endian_shift): Don't check proc64.
2974 (build_instruction): Always set memval to uword64. Cast op2 to
2975 uword64 when shifting it left in memory instructions. Always use
2976 the same code for stores--don't special case proc64.
2978 * gencode.c (build_mips16_operands): Fix base PC value for PC
2980 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
2982 * interp.c (simJALDELAYSLOT): Define.
2983 (JALDELAYSLOT): Define.
2984 (INDELAYSLOT, INJALDELAYSLOT): Define.
2985 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
2987 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
2989 * interp.c (sim_open): add flush_cache as a PMON routine
2990 (sim_monitor): handle flush_cache by ignoring it
2992 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
2994 * gencode.c (build_instruction): Use !ByteSwapMem instead of
2996 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
2997 (BigEndianMem): Rename to ByteSwapMem and change sense.
2998 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
2999 BigEndianMem references to !ByteSwapMem.
3000 (set_endianness): New function, with prototype.
3001 (sim_open): Call set_endianness.
3002 (sim_info): Use simBE instead of BigEndianMem.
3003 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3004 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3005 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3006 ifdefs, keeping the prototype declaration.
3007 (swap_word): Rewrite correctly.
3008 (ColdReset): Delete references to CONFIG. Delete endianness related
3009 code; moved to set_endianness.
3011 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3013 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3014 * interp.c (CHECKHILO): Define away.
3015 (simSIGINT): New macro.
3016 (membank_size): Increase from 1MB to 2MB.
3017 (control_c): New function.
3018 (sim_resume): Rename parameter signal to signal_number. Add local
3019 variable prev. Call signal before and after simulate.
3020 (sim_stop_reason): Add simSIGINT support.
3021 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3023 (sim_warning): Delete call to SignalException. Do call printf_filtered
3025 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3026 a call to sim_warning.
3028 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3030 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3031 16 bit instructions.
3033 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3035 Add support for mips16 (16 bit MIPS implementation):
3036 * gencode.c (inst_type): Add mips16 instruction encoding types.
3037 (GETDATASIZEINSN): Define.
3038 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3039 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3041 (MIPS16_DECODE): New table, for mips16 instructions.
3042 (bitmap_val): New static function.
3043 (struct mips16_op): Define.
3044 (mips16_op_table): New table, for mips16 operands.
3045 (build_mips16_operands): New static function.
3046 (process_instructions): If PC is odd, decode a mips16
3047 instruction. Break out instruction handling into new
3048 build_instruction function.
3049 (build_instruction): New static function, broken out of
3050 process_instructions. Check modifiers rather than flags for SHIFT
3051 bit count and m[ft]{hi,lo} direction.
3052 (usage): Pass program name to fprintf.
3053 (main): Remove unused variable this_option_optind. Change
3054 ``*loptarg++'' to ``loptarg++''.
3055 (my_strtoul): Parenthesize && within ||.
3056 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3057 (simulate): If PC is odd, fetch a 16 bit instruction, and
3058 increment PC by 2 rather than 4.
3059 * configure.in: Add case for mips16*-*-*.
3060 * configure: Rebuild.
3062 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3064 * interp.c: Allow -t to enable tracing in standalone simulator.
3065 Fix garbage output in trace file and error messages.
3067 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3069 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3070 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3071 * configure.in: Simplify using macros in ../common/aclocal.m4.
3072 * configure: Regenerated.
3073 * tconfig.in: New file.
3075 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3077 * interp.c: Fix bugs in 64-bit port.
3078 Use ansi function declarations for msvc compiler.
3079 Initialize and test file pointer in trace code.
3080 Prevent duplicate definition of LAST_EMED_REGNUM.
3082 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3084 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3086 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3088 * interp.c (SignalException): Check for explicit terminating
3090 * gencode.c: Pass instruction value through SignalException()
3091 calls for Trap, Breakpoint and Syscall.
3093 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3095 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3096 only used on those hosts that provide it.
3097 * configure.in: Add sqrt() to list of functions to be checked for.
3098 * config.in: Re-generated.
3099 * configure: Re-generated.
3101 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3103 * gencode.c (process_instructions): Call build_endian_shift when
3104 expanding STORE RIGHT, to fix swr.
3105 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3106 clear the high bits.
3107 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3108 Fix float to int conversions to produce signed values.
3110 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3112 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3113 (process_instructions): Correct handling of nor instruction.
3114 Correct shift count for 32 bit shift instructions. Correct sign
3115 extension for arithmetic shifts to not shift the number of bits in
3116 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3117 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3119 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3120 It's OK to have a mult follow a mult. What's not OK is to have a
3121 mult follow an mfhi.
3122 (Convert): Comment out incorrect rounding code.
3124 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3126 * interp.c (sim_monitor): Improved monitor printf
3127 simulation. Tidied up simulator warnings, and added "--log" option
3128 for directing warning message output.
3129 * gencode.c: Use sim_warning() rather than WARNING macro.
3131 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3133 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3134 getopt1.o, rather than on gencode.c. Link objects together.
3135 Don't link against -liberty.
3136 (gencode.o, getopt.o, getopt1.o): New targets.
3137 * gencode.c: Include <ctype.h> and "ansidecl.h".
3138 (AND): Undefine after including "ansidecl.h".
3139 (ULONG_MAX): Define if not defined.
3140 (OP_*): Don't define macros; now defined in opcode/mips.h.
3141 (main): Call my_strtoul rather than strtoul.
3142 (my_strtoul): New static function.
3144 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3146 * gencode.c (process_instructions): Generate word64 and uword64
3147 instead of `long long' and `unsigned long long' data types.
3148 * interp.c: #include sysdep.h to get signals, and define default
3150 * (Convert): Work around for Visual-C++ compiler bug with type
3152 * support.h: Make things compile under Visual-C++ by using
3153 __int64 instead of `long long'. Change many refs to long long
3154 into word64/uword64 typedefs.
3156 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3158 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3159 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3161 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3162 (AC_PROG_INSTALL): Added.
3163 (AC_PROG_CC): Moved to before configure.host call.
3164 * configure: Rebuilt.
3166 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3168 * configure.in: Define @SIMCONF@ depending on mips target.
3169 * configure: Rebuild.
3170 * Makefile.in (run): Add @SIMCONF@ to control simulator
3172 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3173 * interp.c: Remove some debugging, provide more detailed error
3174 messages, update memory accesses to use LOADDRMASK.
3176 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3178 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3179 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3181 * configure: Rebuild.
3182 * config.in: New file, generated by autoheader.
3183 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3184 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3185 HAVE_ANINT and HAVE_AINT, as appropriate.
3186 * Makefile.in (run): Use @LIBS@ rather than -lm.
3187 (interp.o): Depend upon config.h.
3188 (Makefile): Just rebuild Makefile.
3189 (clean): Remove stamp-h.
3190 (mostlyclean): Make the same as clean, not as distclean.
3191 (config.h, stamp-h): New targets.
3193 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3195 * interp.c (ColdReset): Fix boolean test. Make all simulator
3198 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3200 * interp.c (xfer_direct_word, xfer_direct_long,
3201 swap_direct_word, swap_direct_long, xfer_big_word,
3202 xfer_big_long, xfer_little_word, xfer_little_long,
3203 swap_word,swap_long): Added.
3204 * interp.c (ColdReset): Provide function indirection to
3205 host<->simulated_target transfer routines.
3206 * interp.c (sim_store_register, sim_fetch_register): Updated to
3207 make use of indirected transfer routines.
3209 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3211 * gencode.c (process_instructions): Ensure FP ABS instruction
3213 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3214 system call support.
3216 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
3218 * interp.c (sim_do_command): Complain if callback structure not
3221 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
3223 * interp.c (Convert): Provide round-to-nearest and round-to-zero
3224 support for Sun hosts.
3225 * Makefile.in (gencode): Ensure the host compiler and libraries
3226 used for cross-hosted build.
3228 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
3230 * interp.c, gencode.c: Some more (TODO) tidying.
3232 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
3234 * gencode.c, interp.c: Replaced explicit long long references with
3235 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3236 * support.h (SET64LO, SET64HI): Macros added.
3238 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
3240 * configure: Regenerate with autoconf 2.7.
3242 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
3244 * interp.c (LoadMemory): Enclose text following #endif in /* */.
3245 * support.h: Remove superfluous "1" from #if.
3246 * support.h (CHECKSIM): Remove stray 'a' at end of line.
3248 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
3250 * interp.c (StoreFPR): Control UndefinedResult() call on
3251 WARN_RESULT manifest.
3253 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
3255 * gencode.c: Tidied instruction decoding, and added FP instruction
3258 * interp.c: Added dineroIII, and BSD profiling support. Also
3259 run-time FP handling.
3261 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
3263 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3264 gencode.c, interp.c, support.h: created.