sim/testsuite/ChangeLog

   1 2006-09-30  Hans-Peter Nilsson  <hp@axis.com>
   2
   3         * sim/cris/c/pipe2.c: Adjust expected output.
   4         (process): Don't write as much to the pipe as to trig the
   5         inordinate-amount test in the sim pipe machinery.  Correct test of
   6         write return-value; check only that pipemax bytes were
   7         successfully written.  For error-case, emit strerror as well.
   8         (main): Add a second read.
   9
  10 2006-04-08  Hans-Peter Nilsson  <hp@axis.com>
  11
  12         * sim/cris/hw/rv-n-cris/irq6.ms: New test.
  13
  14 2006-04-03  Hans-Peter Nilsson  <hp@axis.com>
  15
  16         * sim/cris/hw: New directory for subdirectories with tests.
  17         * sim/cris/hw/rv-n-cris: New directory with tests.
  18
  19 2006-04-02  Hans-Peter Nilsson  <hp@axis.com>
  20
  21         * sim/cris/asm/testutils.inc (test_h_mem): Use register prefix.
  22         (testr_h_dr, test_h_dr, ldmem_h_gr, mvr_h_mem): Ditto.  Correct
  23         syntax.
  24
  25         * sim/cris/asm/x0-v10.ms, sim/cris/asm/x0-v32.ms: Widen regexp for
  26         stack pointer values.
  27
  28 2006-02-23  Hans-Peter Nilsson  <hp@axis.com>
  29
  30         * sim/cris/c/time2.c: New test.
  31
  32 2006-01-10  Hans-Peter Nilsson  <hp@axis.com>
  33
  34         * sim/cris/asm/x1-v10.ms, sim/cris/asm/x3-v10.ms,
  35         sim/cris/asm/x7-v10.ms: Update expected cycle output.
  36
  37 2005-12-06  Hans-Peter Nilsson  <hp@axis.com>
  38
  39         * sim/cris/asm/movmp8.ms, sim/cris/asm/pcplus.ms: New tests.
  40         * sim/cris/asm/movmp.ms: Do not write to P0, P4 or P8.
  41         * sim/cris/asm/raw13.ms: Write to MOF instead of WZ (P4).
  42
  43 2005-11-21  Hans-Peter Nilsson  <hp@axis.com>
  44
  45         * sim/cris: New directory with C and assembly tests for the CRIS
  46         simulator.
  47
  48 2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>
  49
  50         * configure: Regenerated to track ../common/aclocal.m4 changes.
  51
  52 2005-01-07  Andrew Cagney  <cagney@gnu.org>
  53
  54         * configure.ac: Rename configure.in, require autoconf 2.59.
  55         * configure: Re-generate.
  56
  57         * configure.in: Pass literal subdirectories to AC_CONFIG_SUBDIRS.
  58         * configure: Re-generate.
  59
  60         * fr30-elf, d30v-elf: Delete directory.
  61
  62 2004-11-16  Hans-Peter Nilsson  <hp@axis.com>
  63
  64         * lib/sim-defs.exp (run_sim_test): Make multiple "output"
  65         specifications concatenate, not override.
  66         Support "xfail" and "kfail".
  67
  68 2004-10-26  Nick Clifton  <nickc@redhat.com>
  69
  70         * lib/sim-defs.exp (sim_run): Add support for the "rawsid"
  71         protocol.
  72
  73 2004-09-13  DJ Delorie  <dj@redhat.com>
  74
  75         * lib/sim-defs.exp (run_sim_test): Add global_as_options,
  76         global_ld_options, and global_sim_options to all test cases, if
  77         defined.
  78
  79 2004-05-12  Ben Elliston  <bje@au.ibm.com>
  80
  81         * lib/sim-defs.exp: Remove stray semicolons.
  82
  83 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
  84
  85         * sim/frv/allinsn.exp (all_machs): Add fr405 and fr450.
  86         * sim/fr400/allinsn.exp (all_machs): Likewise.
  87         * sim/fr400/addss.cgs (mach): Change to "fr405 fr450".
  88         * sim/fr400/scutss.cgs (mach): Likewise.
  89         * sim/fr400/slass.cgs (mach): Likewise.
  90         * sim/fr400/smass.cgs (mach): Likewise.
  91         * sim/fr400/smsss.cgs (mach): Likewise.
  92         * sim/fr400/smu.cgs (mach): Likewise.
  93         * sim/fr400/subss.cgs (mach): Likewise.
  94         * sim/interrupts/fp_exception.cgs: Replace fmadds with .word.
  95         * sim/interrupts/fp_exception-fr550.cgs: Likewise.
  96         * sim/frv/mqlclrhs.cgs: New test.
  97         * sim/frv/mqlmths.cgs: New test.
  98         * sim/frv/mqsllhi.cgs: New test.
  99         * sim/frv/mqsrahi.cgs: New test.
 100
 101 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 102
 103         * sim/frv/fr400/scutss.cgs: Fix tests to account for rounding.
 104         Add some new ones.
 105
 106 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 107
 108         * sim/frv/{rstb,rsth,rst,rstd,rstq}.cgs: Delete.
 109         * sim/frv/{rstbf,rsthf,rstf,rstdf,rstqf}.cgs: Delete.
 110
 111 2004-01-26  Chris Demetriou  <cgd@broadcom.com>
 112
 113         * sim/mips: New directory.  Tests for the MIPS simulator.
 114
 115 2004-01-23  Ben Elliston  <bje@wasabisystems.com>
 116
 117         * lib/sim-defs.exp (run_sim_test): Delete the .o and .x files if a
 118         test passes.
 119
 120 2003-10-10  Dave Brolley  <brolley@redhat.com>
 121
 122         * sim/frv/testutils.inc (or_gr_immed): New macro.
 123         * sim/frv/fp_exception-fr550.cgs: Write insns using
 124         unaligned registers into the program in order to
 125         cause the required exceptions.
 126         * sim/frv/fp_exception.cgs: Ditto.
 127         * sim/frv/regalign.cgs: Ditto.
 128
 129 2003-10-06  Dave Brolley  <brolley@redhat.com>
 130
 131         * sim/frv/fr550: New subdirectory.
 132         * sim/frv/fr400/*.cgs: Add fr550 as appropriate.
 133         * sim/frv/fr500/*.cgs: Add fr550 as appropriate.
 134         * sim/frv/interrupts/*.cgs: Add fr550 as appropriate.
 135         * sim/frv/interrupts/*-fr550.cgs: New test cases for fr550.
 136
 137 2003-09-19  Michael Snyder  <msnyder@redhat.com>
 138
 139         * sim/frv/nldqi.cgs: Remove.  This insn was never implemented
 140         by Fujitsu.
 141
 142 2003-09-19  Dave Brolley  <brolley@redhat.com>
 143
 144         * sim/frv/rstqf.cgs: Use nldq instead of nldqi.
 145         * sim/frv/rstq.cgs: Use nldq instead of nldqi.
 146
 147 2003-09-11  Michael Snyder  <msnyder@redhat.com>
 148
 149         * sim/testsuite/sim/frv/movgs.cgs: Change lcr to spr[273],
 150         which according to the comments seems to be the intent.
 151
 152 2003-09-09  Dave Brolley  <brolley@redhat.com>
 153
 154         * sim/frv/maddaccs.cgs: move to fr400 subdirectory.
 155         * sim/frv/msubaccs.cgs: move to fr400 subdirectory.
 156         * sim/frv/masaccs.cgs: move to fr400 subdirectory.
 157
 158 2003-09-03  Michael Snyder  <msnyder@redhat.com>
 159
 160         * sim/frv/fr500/mclracc.cgs: Change mach to 'all', to be
 161         consistent with other tests in the directory.
 162
 163 2003-09-03  Michael Snyder  <msnyder@redhat.com>
 164
 165         * sim/frv/interrupts/Ipipe-fr400.cgs: New file.
 166         * sim/frv/interrupts/Ipipe-fr500.cgs: New file.
 167         * sim/frv/interrupts/Ipipe.cgs: Remove (replaced by above).
 168
 169 2003-08-20  Michael Snyder  <msnyder@redhat.com>
 170             On behalf of Dave Brolley
 171
 172         * sim/frv: New testsuite.
 173         * frv-elf: New testsuite.
 174
 175 2003-07-09  Michael Snyder  <msnyder@redhat.com>
 176
 177         * sim/sh: New directory.  Tests for Renesas sh family.
 178
 179 2003-04-13  Michael Snyder  <msnyder@redhat.com>
 180
 181         * sim/h8300: New directory.  Tests for Renesas h8/300 family.
 182
 183 2003-04-01  Nick Clifton  <nickc@redhat.com>
 184
 185         * sim/arm: New directory: Tests for ARM simulator.
 186         * sim/arm/allinsn.exp: New file: Test script.
 187         * sim/arm/testutils.inc: New file: Test macros.
 188         * sim/arm/adc.cgs, sim/arm/add.cgs, sim/arm/and.cgs,
 189         sim/arm/b.cgs, sim/arm/bic.cgs, sim/arm/bl.cgs, sim/arm/bx.cgs,
 190         sim/arm/cmn.cgs, sim/arm/cmp.cgs, sim/arm/eor.cgs,
 191         sim/arm/hello.ms, sim/arm/ldm.cgs, sim/arm/ldr.cgs,
 192         sim/arm/ldrb.cgs, sim/arm/ldrh.cgs, sim/arm/ldrsb.cgs,
 193         sim/arm/ldrsh.cgs, sim/arm/misaligned1.ms, sim/arm/misaligned2.ms,
 194         sim/arm/misaligned3.ms, sim/arm/misc.exp, sim/arm/mla.cgs,
 195         sim/arm/mov.cgs, sim/arm/mrs.cgs, sim/arm/msr.cgs,
 196         sim/arm/mul.cgs, sim/arm/mvn.cgs, sim/arm/orr.cgs,
 197         sim/arm/rsb.cgs, sim/arm/rsc.cgs, sim/arm/sbc.cgs,
 198         sim/arm/smlal.cgs, sim/arm/smull.cgs, sim/arm/stm.cgs,
 199         sim/arm/str.cgs, sim/arm/strb.cgs, sim/arm/strh.cgs,
 200         sim/arm/sub.cgs, sim/arm/swi.cgs, sim/arm/swp.cgs,
 201         sim/arm/swpb.cgs, sim/arm/teq.cgs,  sim/arm/tst.cgs,
 202         sim/arm/umlal.cgs, sim/arm/umull.cgs: New files: ARM tests.
 203         * sim/arm/iwmmxt: New Directory: Tests for iWMMXt.
 204         * sim/arm/iwmmxt/iwmmxt.exp: New file: Test script.
 205         * sim/arm/iwmmxt/testutils.inc: New file: Test macros.
 206         * sim/arm/iwmmxt/tbcst.cgs, sim/arm/iwmmxt/textrm.cgs,
 207         sim/arm/iwmmxt/tinsr.cgs, sim/arm/iwmmxt/tmia.cgs,
 208         sim/arm/iwmmxt/tmiaph.cgs, sim/arm/iwmmxt/tmiaxy.cgs,
 209         sim/arm/iwmmxt/tmovmsk.cgss, sim/arm/iwmmxt/wacc.cgs,
 210         sim/arm/iwmmxt/wadd.cgs, sim/arm/iwmmxt/waligni.cgs,
 211         sim/arm/iwmmxt/walignr.cgs, sim/arm/iwmmxt/wand.cgs,
 212         sim/arm/iwmmxt/wandn.cgs, sim/arm/iwmmxt/wavg2.cgs,
 213         sim/arm/iwmmxt/wcmpeq.cgs, sim/arm/iwmmxt/wcmpgt.cgs,
 214         sim/arm/iwmmxt/wmac.cgs, sim/arm/iwmmxt/wmadd.cgs,
 215         sim/arm/iwmmxt/wmax.cgs, sim/arm/iwmmxt/wmin.cgs,
 216         sim/arm/iwmmxt/wmov.cgs, sim/arm/iwmmxt/wmul.cgs,
 217         sim/arm/iwmmxt/wor.cgs, sim/arm/iwmmxt/wpack.cgs,
 218         sim/arm/iwmmxt/wror.cgs, sim/arm/iwmmxt/wsad.cgs,
 219         sim/arm/iwmmxt/wshufh.cgs, sim/arm/iwmmxt/wsll.cgs,
 220         sim/arm/iwmmxt/wsra.cgs, sim/arm/iwmmxt/wsrl.cgs,
 221         sim/arm/iwmmxt/wsub.cgs, sim/arm/iwmmxt/wunpckeh.cgs,
 222         sim/arm/iwmmxt/wunpckel.cgs, sim/arm/iwmmxt/wunpckih.cgs,
 223         sim/arm/iwmmxt/wunpckil.cgs, sim/arm/iwmmxt/wxor.cgs,
 224         sim/arm/iwmmxt/wzero.cgs: New files: iWMMXt tests.
 225         * sim/arm/thumb: New Directory: Thumb tests.
 226         * sim/arm/thumb/allthumb.exp: New file: Test script.
 227         * sim/arm/thumb/testutils.inc: New file: Test macros.
 228         * sim/arm/thumb/adc.cgs, sim/arm/thumb/add-hd-hs.cgs,
 229         sim/arm/thumb/add-hd-rs.cgs, sim/arm/thumb/add-rd-hs.cgs,
 230         sim/arm/thumb/add-sp.cgs, sim/arm/thumb/add.cgs,
 231         sim/arm/thumb/addi.cgs, sim/arm/thumb/addi8.cgs,
 232         sim/arm/thumb/and.cgs, sim/arm/thumb/asr.cgs, sim/arm/thumb/b.cgs,
 233         sim/arm/thumb/bcc.cgs, sim/arm/thumb/bcs.cgs,
 234         sim/arm/thumb/beq.cgs, sim/arm/thumb/bge.cgs,
 235         sim/arm/thumb/bgt.cgs, sim/arm/thumb/bhi.cgs,
 236         sim/arm/thumb/bic.cgs, sim/arm/thumb/bl-hi.cgs,
 237         sim/arm/thumb/bl-lo.cgs, sim/arm/thumb/ble.cgs,
 238         sim/arm/thumb/bls.cgs, sim/arm/thumb/blt.cgs,
 239         sim/arm/thumb/bmi.cgs, sim/arm/thumb/bne.cgs,
 240         sim/arm/thumb/bpl.cgs, sim/arm/thumb/bvc.cgs,
 241         sim/arm/thumb/bvs.cgs, sim/arm/thumb/bx-hs.cgs,
 242         sim/arm/thumb/bx-rs.cgs, sim/arm/thumb/cmn.cgs,
 243         sim/arm/thumb/cmp-hd-hs.cgs, sim/arm/thumb/cmp-hd-rs.cgs,
 244         sim/arm/thumb/cmp-rd-hs.cgs, sim/arm/thumb/cmp.cgs,
 245         sim/arm/thumb/eor.cgs, sim/arm/thumb/lda-pc.cgs,
 246         sim/arm/thumb/lda-sp.cgs, sim/arm/thumb/ldmia.cgs,
 247         sim/arm/thumb/ldr-imm.cgs, sim/arm/thumb/ldr-pc.cgs,
 248         sim/arm/thumb/ldr-sprel.cgs, sim/arm/thumb/ldr.cgs,
 249         sim/arm/thumb/ldrb-imm.cgs, sim/arm/thumb/ldrb.cgs,
 250         sim/arm/thumb/ldrh-imm.cgs, sim/arm/thumb/ldrh.cgs,
 251         sim/arm/thumb/ldsb.cgs, sim/arm/thumb/ldsh.cgs,
 252         sim/arm/thumb/lsl.cgs, sim/arm/thumb/lsr.cgs,
 253         sim/arm/thumb/mov-hd-hs.cgs, sim/arm/thumb/mov-hd-rs.cgs,
 254         sim/arm/thumb/mov-rd-hs.cgs, sim/arm/thumb/mov.cgs,
 255         sim/arm/thumb/mul.cgs, sim/arm/thumb/mvn.cgs,
 256         sim/arm/thumb/neg.cgs, sim/arm/thumb/orr.cgs,
 257         sim/arm/thumb/pop-pc.cgs, sim/arm/thumb/pop.cgs,
 258         sim/arm/thumb/push-lr.cgs, sim/arm/thumb/push.cgs,
 259         sim/arm/thumb/ror.cgs, sim/arm/thumb/sbc.cgs,
 260         sim/arm/thumb/stmia.cgs, sim/arm/thumb/str-imm.cgs,
 261         sim/arm/thumb/str-sprel.cgs, sim/arm/thumb/str.cgs,
 262         sim/arm/thumb/strb-imm.cgs, sim/arm/thumb/strb.cgs,
 263         sim/arm/thumb/strh-imm.cgs, sim/arm/thumb/strh.cgs,
 264         sim/arm/thumb/sub-sp.cgs, sim/arm/thumb/sub.cgs,
 265         sim/arm/thumb/subi.cgs, sim/arm/thumb/subi8.cgs,
 266         sim/arm/thumb/swi.cgs, sim/arm/thumb/tst.cgs: New files: Thumb
 267         tests.
 268         * sim/arm/xscale: New directory.
 269         * sim/arm/xscale/xscale.exp: New file: Test script.
 270         * sim/arm/xscale/testutils.inc: New file: Test macros.
 271         * sim/arm/xscale/blx.cgs, sim/arm/xscale/mia.cgs,
 272         sim/arm/xscale/miaph.cgs, sim/arm/xscale/miaxy.cgs,
 273         sim/arm/xscale/mra.cgs: New files: XScale tests.
 274
 275 2002-06-16  Andrew Cagney  <ac131313@redhat.com>
 276
 277         * configure: Regenerated to track ../common/aclocal.m4 changes.
 278
 279 2001-07-31  Ben Elliston  <bje@redhat.com>
 280
 281         * lib/sim-defs.exp (run_sim_test): Include a description such as
 282         "assembling" or "linking" that identifies the phase a test fails
 283         in, for easier analysis of failures.
 284
 285 2000-11-01  Dave Brolley  <brolley@cygnus.com>
 286
 287         * lib/sim-defs.exp (run_sm_test): Correct comment. "output" and
 288         "xerror" options do not use a list of machines. Clear options from
 289         previous test case. Use "$cpu_option"  to identify the machine to the
 290         assembler, if specified.
 291
 292 Tue May 23 21:39:23 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 293
 294         * configure: Regenerated to track ../common/aclocal.m4 changes.
 295
 296 1999-09-15  Doug Evans  <devans@casey.cygnus.com>
 297
 298         * sim/arm/b.cgs: New testcase.
 299         * sim/arm/bic.cgs: New testcase.
 300         * sim/arm/bl.cgs: New testcase.
 301
 302 Thu Sep  2 18:15:53 1999  Andrew Cagney  <cagney@b1.cygnus.com>
 303
 304         * configure: Regenerated to track ../common/aclocal.m4 changes.
 305
 306 1999-08-30  Doug Evans  <devans@casey.cygnus.com>
 307
 308         * lib/sim-defs.exp (run_sim_test): Rename all_machs arg to
 309         requested_machs, now is list of machs to run tests for.
 310         Delete locals AS,ASFLAGS,LD,LDFLAGS.  Use target_assemble
 311         and target_link instead.
 312
 313 1999-04-21  Doug Evans  <devans@casey.cygnus.com>
 314
 315         * sim/m32r/nop.cgs: Add missing nop insn.
 316
 317 Mon Mar 22 13:28:56 1999  Dave Brolley  <brolley@cygnus.com>
 318
 319         * sim/fr30/stb.cgs: Correct for unaligned access.
 320         * sim/fr30/sth.cgs: Correct for unaligned access.
 321         * sim/fr30/ldub.cgs: Fix typo: lduh->ldub. Correct
 322         for unaligned access.
 323         * sim/fr30/and.cgs: Test unaligned access.
 324
 325 Fri Feb  5 12:41:11 1999  Doug Evans  <devans@canuck.cygnus.com>
 326
 327         * lib/sim-defs.exp (sim_run): Print simulator arguments log message.
 328
 329 1999-01-05  Doug Evans  <devans@casey.cygnus.com>
 330
 331         * lib/sim-defs.exp (run_sim_test): New arg all_machs.
 332         * sim/fr30/allinsn.exp: Update.
 333         * sim/fr30/misc.exp: Update.
 334         * sim/m32r/allinsn.exp: Update.
 335         * sim/m32r/misc.exp: Update.
 336
 337 Fri Dec 18 17:19:34 1998  Dave Brolley  <brolley@cygnus.com>
 338
 339         * sim/fr30/ldres.cgs: New testcase.
 340         * sim/fr30/copld.cgs: New testcase.
 341         * sim/fr30/copst.cgs: New testcase.
 342         * sim/fr30/copsv.cgs: New testcase.
 343         * sim/fr30/nop.cgs: New testcase.
 344         * sim/fr30/andccr.cgs: New testcase.
 345         * sim/fr30/orccr.cgs: New testcase.
 346         * sim/fr30/addsp.cgs: New testcase.
 347         * sim/fr30/stilm.cgs: New testcase.
 348         * sim/fr30/extsb.cgs: New testcase.
 349         * sim/fr30/extub.cgs: New testcase.
 350         * sim/fr30/extsh.cgs: New testcase.
 351         * sim/fr30/extuh.cgs: New testcase.
 352         * sim/fr30/enter.cgs: New testcase.
 353         * sim/fr30/leave.cgs: New testcase.
 354         * sim/fr30/xchb.cgs: New testcase.
 355         * sim/fr30/dmovb.cgs: New testcase.
 356         * sim/fr30/dmov.cgs: New testcase.
 357         * sim/fr30/dmovh.cgs: New testcase.
 358
 359 Thu Dec 17 17:18:43 1998  Dave Brolley  <brolley@cygnus.com>
 360
 361         * sim/fr30/testutils.inc (take_branch{_d},no_branch{_d}): New macros.
 362         * sim/fr30/ret.cgs: Add tests fir ret:d.
 363         * sim/fr30/inte.cgs: New testcase.
 364         * sim/fr30/reti.cgs: New testcase.
 365         * sim/fr30/bra.cgs: New testcase.
 366         * sim/fr30/bno.cgs: New testcase.
 367         * sim/fr30/beq.cgs: New testcase.
 368         * sim/fr30/bne.cgs: New testcase.
 369         * sim/fr30/bc.cgs: New testcase.
 370         * sim/fr30/bnc.cgs: New testcase.
 371         * sim/fr30/bn.cgs: New testcase.
 372         * sim/fr30/bp.cgs: New testcase.
 373         * sim/fr30/bv.cgs: New testcase.
 374         * sim/fr30/bnv.cgs: New testcase.
 375         * sim/fr30/blt.cgs: New testcase.
 376         * sim/fr30/bge.cgs: New testcase.
 377         * sim/fr30/ble.cgs: New testcase.
 378         * sim/fr30/bgt.cgs: New testcase.
 379         * sim/fr30/bls.cgs: New testcase.
 380         * sim/fr30/bhi.cgs: New testcase.
 381
 382 Tue Dec 15 17:47:13 1998  Dave Brolley  <brolley@cygnus.com>
 383
 384         * sim/fr30/div.cgs (int): Add signed division scenario.
 385         * sim/fr30/int.cgs (int): Complete testcase.
 386         * sim/fr30/testutils.inc (_start): Initialize tbr.
 387         (test_s_user,test_s_system,set_i,test_i): New macros.
 388
 389 1998-12-14  Doug Evans  <devans@casey.cygnus.com>
 390
 391         * lib/sim-defs.exp (run_sim_test): New option xerror, for expected
 392         errors.  Translate \n sequences in expected output to newline char.
 393         (slurp_options): Make parentheses optional.
 394         (sim_run): Look for board_info sim,options.
 395         * sim/fr30/hello.ms: Add trailing \n to expected output.
 396         * sim/m32r/hello.ms: Ditto.
 397         * sim/m32r/hw-trap.ms: Ditto.
 398
 399         * sim/m32r/trap.cgs: Properly align trap2_handler.
 400
 401         * sim/m32r/uread16.ms: New testcase.
 402         * sim/m32r/uread32.ms: New testcase.
 403         * sim/m32r/uwrite16.ms: New testcase.
 404         * sim/m32r/uwrite32.ms: New testcase.
 405
 406 1998-12-14  Dave Brolley  <brolley@cygnus.com>
 407
 408         * sim/fr30/call.cgs: Test ret here as well.
 409         * sim/fr30/ld.cgs: Remove bogus comment.
 410         * sim/fr30/testutils.inc (save_rp,restore_rp): New macros.
 411         * sim/fr30/div.ms: New testcase.
 412         * sim/fr30/st.cgs: New testcase.
 413         * sim/fr30/sth.cgs: New testcase.
 414         * sim/fr30/stb.cgs: New testcase.
 415         * sim/fr30/mov.cgs: New testcase.
 416         * sim/fr30/jmp.cgs: New testcase.
 417         * sim/fr30/ret.cgs: New testcase.
 418         * sim/fr30/int.cgs: New testcase.
 419
 420 Thu Dec 10 18:46:25 1998  Dave Brolley  <brolley@cygnus.com>
 421
 422         * sim/fr30/div0s.cgs: New testcase.
 423         * sim/fr30/div0u.cgs: New testcase.
 424         * sim/fr30/div1.cgs: New testcase.
 425         * sim/fr30/div2.cgs: New testcase.
 426         * sim/fr30/div3.cgs: New testcase.
 427         * sim/fr30/div4s.cgs: New testcase.
 428         * sim/fr30/testutils.inc (mvi_h_dr,set_dbits,test_dbits): New Macros.
 429
 430 Tue Dec  8 13:16:53 1998  Dave Brolley  <brolley@cygnus.com>
 431
 432         * sim/fr30/testutils.inc (set_s_user): Correct Mask.
 433         (set_s_system): Correct Mask.
 434         * sim/fr30/ld.cgs (ld): Move previously failing test back
 435         into place.
 436         * sim/fr30/ldm0.cgs: New testcase.
 437         * sim/fr30/ldm1.cgs: New testcase.
 438         * sim/fr30/stm0.cgs: New testcase.
 439         * sim/fr30/stm1.cgs: New testcase.
 440
 441 Thu Dec  3 14:20:03 1998  Dave Brolley  <brolley@cygnus.com>
 442
 443         * sim/fr30/ld.cgs: Implement more loads.
 444         * sim/fr30/call.cgs: New testcase.
 445         * sim/fr30/testutils.inc (testr_h_dr): New macro.
 446         (set_s_user,set_s_system): New macros.
 447
 448         * sim/fr30: New Directory.
 449
 450 Wed Nov 18 10:50:19 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 451
 452         * common/bits-gen.c (main): Add BYTE_ORDER so that it matches
 453         recent sim/common/sim-basics.h changes.
 454         * common/Makefile.in: Update.
 455
 456 Fri Oct 30 00:37:31 1998  Felix Lee  <flee@cygnus.com>
 457
 458         * lib/sim-defs.exp (sim_run): download target program to remote
 459         host, if necessary.  for unix-driven win32 testing.
 460
 461 Tue Sep 15 14:56:22 1998  Doug Evans  <devans@canuck.cygnus.com>
 462
 463         * sim/m32r/testutils.inc (test_h_gr): Use mvaddr_h_gr.
 464         * sim/m32r/rte.cgs: Test bbpc,bbpsw.
 465         * sim/m32r/trap.cgs: Test bbpc,bbpsw.
 466
 467 Fri Jul 31 17:49:13 1998  Felix Lee  <flee@cygnus.com>
 468
 469         * lib/sim-defs.exp (sim_run): remote_spawn, use writeto instead of
 470         writeonly.
 471
 472 Fri Jul 24 09:40:34 1998  Doug Evans  <devans@canuck.cygnus.com>
 473
 474         * Makefile.in (clean,mostlyclean): Change leading spaces to a tab.
 475
 476 Wed Jul  1 15:57:54 1998  Doug Evans  <devans@seba.cygnus.com>
 477
 478         * sim/m32r/hw-trap.ms: New testcase.
 479
 480 Tue Jun 16 15:44:01 1998 Jillian Ye <jillian@cygnus.com>
 481
 482         * lib/sim-defs.exp: Print out timeout setting info when "-v" is used.
 483
 484 Thu Jun 11 15:24:53 1998  Doug Evans  <devans@canuck.cygnus.com>
 485
 486         * lib/sim-defs.exp (sim_run): Argument env_vals renamed to options,
 487         which is now a list of options controlling the behaviour of sim_run.
 488
 489 Wed Jun 10 10:53:20 1998  Doug Evans  <devans@seba.cygnus.com>
 490
 491         * sim/m32r/addx.cgs: Add another test.
 492         * sim/m32r/jmp.cgs: Add another test.
 493
 494 Mon Jun  8 16:08:27 1998  Doug Evans  <devans@canuck.cygnus.com>
 495
 496         * sim/m32r/trap.cgs: Test trap 2.
 497
 498 Mon Jun  1 18:54:22 1998  Frank Ch. Eigler  <fche@cygnus.com>
 499
 500         * lib/sim-defs.exp (sim_run): Add possible environment variable
 501         list to simulator run.
 502
 503 Thu May 28 14:59:46 1998 Jillian Ye <jillian@cygnus.com>
 504
 505         * Makefile.in: Take RUNTEST out of FLAG_TO_PASS
 506                        so that make check can be invoked recursively.
 507
 508 Thu May 14 11:48:35 1998  Doug Evans  <devans@canuck.cygnus.com>
 509
 510         * config/default.exp (CC,SIM): Delete.
 511
 512         * lib/sim-defs.exp (sim_run): Fix handling of output redirection.
 513         New arg prog_opts.  All callers updated.
 514
 515 Fri May  8 18:10:28 1998  Jillian Ye <jillian@cygnus.com>
 516
 517         * Makefile.in: Made "check" the target of two
 518           dependencies (test1, test2) so that test2 get a chance to
 519           run even when test1 failed if "make -k check" is used.
 520
 521 Fri May  8 14:41:28 1998  Doug Evans  <devans@canuck.cygnus.com>
 522
 523         * lib/sim-defs.exp (sim_version): Simplify.
 524         (sim_run): Implement.
 525         (run_sim_test): Use sim_run.
 526         (sim_compile): New proc.
 527
 528 Mon May  4 17:59:11 1998  Frank Ch. Eigler  <fche@cygnus.com>
 529
 530         * config/default.exp: Added C compiler settings.
 531
 532 Wed Apr 22 12:26:28 1998  Doug Evans  <devans@canuck.cygnus.com>
 533
 534         * Makefile.in (TARGET_FLAGS_TO_PASS): Delete LIBS, LDFLAGS.
 535
 536 Tue Apr 21 10:49:03 1998  Doug Evans  <devans@canuck.cygnus.com>
 537
 538         * lib/sim-defs.exp (run_sim_test): Don't exit early if one mach fails,
 539         try all machs.
 540
 541         * sim/m32r/addx.cgs: Test (-1)+(-1)+1.
 542
 543 Fri Apr 17 16:00:52 1998  Doug Evans  <devans@canuck.cygnus.com>
 544
 545         * sim/m32r/mv[ft]achi.cgs: Fix expected result
 546         (sign extension of top 8 bits).
 547
 548 Wed Feb 25 11:01:17 1998  Doug Evans  <devans@canuck.cygnus.com>
 549
 550         * Makefile.in (RUNTEST): Fix path to runtest.
 551
 552 Fri Feb 20 11:00:02 1998  Nick Clifton  <nickc@cygnus.com>
 553
 554         * sim/m32r/unlock.cgs: Fixed test.
 555         * sim/m32r/mvfc.cgs: Fixed test.
 556         * sim/m32r/remu.cgs: Fixed test.
 557         * sim/m32r/bnc24.cgs: Test long BNC instruction.
 558         * sim/m32r/bnc8.cgs: Test short BNC instruction.
 559         * sim/m32r/ld-plus.cgs: Test LD instruction.
 560         * sim/m32r/macwhi.cgs: Test MACWHI instruction.
 561         * sim/m32r/macwlo.cgs: Test MACWLO instruction.
 562         * sim/m32r/mulwhi.cgs: Test MULWHI instruction.
 563         * sim/m32r/mulwlo.cgs: Test MULWLO instruction.
 564         * sim/m32r/mvfachi.cgs: Test MVFACHI instruction.
 565         * sim/m32r/mvfaclo.cgs: Test MVFACLO instruction.
 566         * sim/m32r/mvtaclo.cgs: Test MVTACLO instruction.
 567         * sim/m32r/addv.cgs: Test ADDV instruction.
 568         * sim/m32r/addv3.cgs: Test ADDV3 instruction.
 569         * sim/m32r/addx.cgs: Test ADDX instruction.
 570         * sim/m32r/lock.cgs: Test LOCK instruction.
 571         * sim/m32r/neg.cgs: Test NEG instruction.
 572         * sim/m32r/not.cgs: Test NOT instruction.
 573         * sim/m32r/unlock.cgs: Test UNLOCK instruction.
 574
 575 Thu Feb 19 11:15:45 1998  Nick Clifton  <nickc@cygnus.com>
 576
 577         * sim/m32r/testutils.inc (mvaddr_h_gr): new macro to load an
 578         address into a general register.
 579
 580         * sim/m32r/or3.cgs: Test OR3 instruction.
 581         * sim/m32r/rach.cgs: Test RACH instruction.
 582         * sim/m32r/rem.cgs: Test REM instruction.
 583         * sim/m32r/sub.cgs: Test SUB instruction.
 584         * sim/m32r/mv.cgs: Test MV instruction.
 585         * sim/m32r/mul.cgs: Test MUL instruction.
 586         * sim/m32r/bl24.cgs: Test long BL instruction.
 587         * sim/m32r/bl8.cgs: Test short BL instruction.
 588         * sim/m32r/blez.cgs: Test BLEZ instruction.
 589         * sim/m32r/bltz.cgs: Test BLTZ instruction.
 590         * sim/m32r/bne.cgs: Test BNE instruction.
 591         * sim/m32r/bnez.cgs: Test BNEZ instruction.
 592         * sim/m32r/bra24.cgs: Test long BRA instruction.
 593         * sim/m32r/bra8.cgs: Test short BRA instruction.
 594         * sim/m32r/jl.cgs: Test JL instruction.
 595         * sim/m32r/or.cgs: Test OR instruction.
 596         * sim/m32r/jmp.cgs: Test JMP instruction.
 597         * sim/m32r/and.cgs: Test AND instruction.
 598         * sim/m32r/and3.cgs: Test AND3 instruction.
 599         * sim/m32r/beq.cgs: Test BEQ instruction.
 600         * sim/m32r/beqz.cgs: Test BEQZ instruction.
 601         * sim/m32r/bgez.cgs: Test BGEZ instruction.
 602         * sim/m32r/bgtz.cgs: Test BGTZ instruction.
 603         * sim/m32r/cmp.cgs: Test CMP instruction.
 604         * sim/m32r/cmpi.cgs: Test CMPI instruction.
 605         * sim/m32r/cmpu.cgs: Test CMPU instruction.
 606         * sim/m32r/cmpui.cgs: Test CMPUI instruction.
 607         * sim/m32r/div.cgs: Test DIV instruction.
 608         * sim/m32r/divu.cgs: Test DIVU instruction.
 609         * sim/m32r/cmpeq.cgs: Test CMPEQ instruction.
 610         * sim/m32r/sll.cgs: Test SLL instruction.
 611         * sim/m32r/sll3.cgs: Test SLL3 instruction.
 612         * sim/m32r/slli.cgs: Test SLLI instruction.
 613         * sim/m32r/sra.cgs: Test SRA instruction.
 614         * sim/m32r/sra3.cgs: Test SRA3 instruction.
 615         * sim/m32r/srai.cgs: Test SRAI instruction.
 616         * sim/m32r/srl.cgs: Test SRL instruction.
 617         * sim/m32r/srl3.cgs: Test SRL3 instruction.
 618         * sim/m32r/srli.cgs: Test SRLI instruction.
 619         * sim/m32r/xor3.cgs: Test XOR3 instruction.
 620         * sim/m32r/xor.cgs: Test XOR instruction.
 621
 622 Tue Feb 17 12:46:05 1998  Doug Evans  <devans@seba.cygnus.com>
 623
 624         * config/default.exp: New file.
 625         * lib/sim-defs.exp: New file.
 626         * sim/m32r/*: m32r dejagnu simulator testsuite.
 627
 628         * Makefile.in (build_alias): Define.
 629         (arch): Define.
 630         (RUNTEST_FOR_TARGET): Delete.
 631         (RUNTEST): Fix.
 632         (check): Depend on site.exp.  Run dejagnu.
 633         (site.exp): New target.
 634         * configure.in (arch): Define from target_cpu.
 635         * configure: Regenerate.
 636
 637 Wed Sep 17 10:21:26 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 638
 639         * common/bits-gen.c (gen_bit): Pass in the full name of the macro.
 640         (gen_mask): Ditto.
 641
 642         * common/bits-tst.c (main): Add tests for LSSEXT, MSSEXT.
 643         (calc): Add support for 8 bit version of macros.
 644         (main): Add tests for 8 bit versions of macros.
 645         (check_sext): Check SEXT of zero clears bits.
 646
 647         * common/bits-gen.c (main): Generate tests for 8 bit versions of
 648         macros.
 649
 650 Thu Sep 11 13:04:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 651
 652         * common/Make-common.in: New file, provide generic rules for
 653         running checks.
 654
 655 Mon Sep  1 16:43:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 656
 657         * configure.in (configdirs): Test for the target directory instead
 658         of matching on a target.
 659