3 use ieee.std_logic_1164.all;
4 use ieee.std_logic_unsigned.all;
7 --* Add Memory to Accumulator with Carry: ADC
12 port ( a, b : in std_logic_vector (7 downto 0);
13 sum : out std_logic_vector (7 downto 0);
16 n, v, z : out std_logic
20 architecture rtl of alu_adc is
21 signal adc_work : std_logic_vector (8 downto 0);
23 adc_work <= ('0' & a) + ('0' & b) + ("0000000" & cin);
25 sum <= adc_work(7 downto 0);
28 v <= '1' when (a(7) = '0' and b(7) = '0' and adc_work(7) = '1') else
29 '1' when (a(7) = '1' and b(7) = '1' and adc_work(7) = '0') else
32 n <= '1' when (adc_work(7) = '1') else
34 z <= '1' when (adc_work(7 downto 0) = "00000000") else