4 * Copyright IBM, Corp. 2011
7 * Anthony Liguori <aliguori@us.ibm.com>
9 * This work is licensed under the terms of the GNU GPL, version 2 or later.
10 * See the COPYING file in the top-level directory.
14 #include "qemu/osdep.h"
15 #include "qapi/error.h"
17 #include "sysemu/qtest.h"
18 #include "sysemu/runstate.h"
19 #include "chardev/char-fe.h"
20 #include "exec/ioport.h"
21 #include "exec/memory.h"
22 #include "hw/qdev-core.h"
24 #include "qemu/accel.h"
25 #include "sysemu/cpu-timers.h"
26 #include "qemu/config-file.h"
27 #include "qemu/option.h"
28 #include "qemu/error-report.h"
29 #include "qemu/module.h"
30 #include "qemu/cutils.h"
31 #include "qapi/qmp/qerror.h"
32 #include "qom/object_interfaces.h"
33 #include CONFIG_DEVICES
35 #include "hw/ppc/spapr_rtas.h"
40 #define TYPE_QTEST "qtest"
42 OBJECT_DECLARE_SIMPLE_TYPE(QTest, QTEST)
47 bool has_machine_link;
50 CharBackend qtest_chr;
56 static DeviceState *irq_intercept_dev;
57 static FILE *qtest_log_fp;
59 static GString *inbuf;
60 static int irq_levels[MAX_IRQ];
62 static bool qtest_opened;
63 static void (*qtest_server_send)(void*, const char*);
64 static void *qtest_server_send_opaque;
66 #define FMT_timeval "%.06f"
71 * Line based protocol, request/response based. Server can send async messages
72 * so clients should always handle many async messages before the response
81 * The qtest client is completely in charge of the QEMU_CLOCK_VIRTUAL. qtest commands
82 * let you adjust the value of the clock (monotonically). All the commands
83 * return the current value of the clock in nanoseconds.
85 * .. code-block:: none
90 * Advance the clock to the next deadline. Useful when waiting for
91 * asynchronous events.
93 * .. code-block:: none
98 * Advance the clock by NS nanoseconds.
100 * .. code-block:: none
105 * Advance the clock to NS nanoseconds (do nothing if it's already past).
107 * PIO and memory access:
108 * """"""""""""""""""""""
110 * .. code-block:: none
115 * .. code-block:: none
120 * .. code-block:: none
125 * .. code-block:: none
130 * .. code-block:: none
135 * .. code-block:: none
140 * .. code-block:: none
142 * > writeb ADDR VALUE
145 * .. code-block:: none
147 * > writew ADDR VALUE
150 * .. code-block:: none
152 * > writel ADDR VALUE
155 * .. code-block:: none
157 * > writeq ADDR VALUE
160 * .. code-block:: none
165 * .. code-block:: none
170 * .. code-block:: none
175 * .. code-block:: none
180 * .. code-block:: none
185 * .. code-block:: none
187 * > write ADDR SIZE DATA
190 * .. code-block:: none
192 * > b64read ADDR SIZE
195 * .. code-block:: none
197 * > b64write ADDR SIZE B64_DATA
200 * .. code-block:: none
202 * > memset ADDR SIZE VALUE
205 * ADDR, SIZE, VALUE are all integers parsed with strtoul() with a base of 0.
206 * For 'memset' a zero size is permitted and does nothing.
208 * DATA is an arbitrarily long hex number prefixed with '0x'. If it's smaller
209 * than the expected size, the value will be zero filled at the end of the data
212 * B64_DATA is an arbitrarily long base64 encoded string.
213 * If the sizes do not match, the data will be truncated.
218 * .. code-block:: none
220 * > irq_intercept_in QOM-PATH
223 * .. code-block:: none
225 * > irq_intercept_out QOM-PATH
228 * Attach to the gpio-in (resp. gpio-out) pins exported by the device at
229 * QOM-PATH. When the pin is triggered, one of the following async messages
230 * will be printed to the qtest stream::
235 * where NUM is an IRQ number. For the PC, interrupts can be intercepted
236 * simply with "irq_intercept_in ioapic" (note that IRQ0 comes out with
237 * NUM=0 even though it is remapped to GSI 2).
239 * Setting interrupt level:
240 * """"""""""""""""""""""""
242 * .. code-block:: none
244 * > set_irq_in QOM-PATH NAME NUM LEVEL
247 * where NAME is the name of the irq/gpio list, NUM is an IRQ number and
248 * LEVEL is an signed integer IRQ level.
250 * Forcibly set the given interrupt pin to the given level.
254 static int hex2nib(char ch)
256 if (ch >= '0' && ch <= '9') {
258 } else if (ch >= 'a' && ch <= 'f') {
259 return 10 + (ch - 'a');
260 } else if (ch >= 'A' && ch <= 'F') {
261 return 10 + (ch - 'A');
267 static void qtest_send_prefix(CharBackend *chr)
269 if (!qtest_log_fp || !qtest_opened) {
273 fprintf(qtest_log_fp, "[S +" FMT_timeval "] ", g_timer_elapsed(timer, NULL));
276 static void G_GNUC_PRINTF(1, 2) qtest_log_send(const char *fmt, ...)
280 if (!qtest_log_fp || !qtest_opened) {
284 qtest_send_prefix(NULL);
287 vfprintf(qtest_log_fp, fmt, ap);
291 static void qtest_server_char_be_send(void *opaque, const char *str)
293 size_t len = strlen(str);
294 CharBackend* chr = (CharBackend *)opaque;
295 qemu_chr_fe_write_all(chr, (uint8_t *)str, len);
296 if (qtest_log_fp && qtest_opened) {
297 fprintf(qtest_log_fp, "%s", str);
301 static void qtest_send(CharBackend *chr, const char *str)
303 qtest_server_send(qtest_server_send_opaque, str);
306 static void G_GNUC_PRINTF(2, 3) qtest_sendf(CharBackend *chr,
307 const char *fmt, ...)
313 buffer = g_strdup_vprintf(fmt, ap);
314 qtest_send(chr, buffer);
319 static void qtest_irq_handler(void *opaque, int n, int level)
321 qemu_irq old_irq = *(qemu_irq *)opaque;
322 qemu_set_irq(old_irq, level);
324 if (irq_levels[n] != level) {
325 CharBackend *chr = &qtest->qtest_chr;
326 irq_levels[n] = level;
327 qtest_send_prefix(chr);
328 qtest_sendf(chr, "IRQ %s %d\n",
329 level ? "raise" : "lower", n);
333 static int64_t qtest_clock_counter;
335 int64_t qtest_get_virtual_clock(void)
337 return qatomic_read_i64(&qtest_clock_counter);
340 static void qtest_set_virtual_clock(int64_t count)
342 qatomic_set_i64(&qtest_clock_counter, count);
345 static void qtest_clock_warp(int64_t dest)
347 int64_t clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
348 AioContext *aio_context;
349 assert(qtest_enabled());
350 aio_context = qemu_get_aio_context();
351 while (clock < dest) {
352 int64_t deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL,
353 QEMU_TIMER_ATTR_ALL);
354 int64_t warp = qemu_soonest_timeout(dest - clock, deadline);
356 qtest_set_virtual_clock(qtest_get_virtual_clock() + warp);
358 qemu_clock_run_timers(QEMU_CLOCK_VIRTUAL);
359 timerlist_run_timers(aio_context->tlg.tl[QEMU_CLOCK_VIRTUAL]);
360 clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
362 qemu_clock_notify(QEMU_CLOCK_VIRTUAL);
365 static void qtest_process_command(CharBackend *chr, gchar **words)
367 const gchar *command;
376 fprintf(qtest_log_fp, "[R +" FMT_timeval "]", g_timer_elapsed(timer, NULL));
377 for (i = 0; words[i]; i++) {
378 fprintf(qtest_log_fp, " %s", words[i]);
380 fprintf(qtest_log_fp, "\n");
384 if (strcmp(words[0], "irq_intercept_out") == 0
385 || strcmp(words[0], "irq_intercept_in") == 0) {
390 dev = DEVICE(object_resolve_path(words[1], NULL));
392 qtest_send_prefix(chr);
393 qtest_send(chr, "FAIL Unknown device\n");
397 if (irq_intercept_dev) {
398 qtest_send_prefix(chr);
399 if (irq_intercept_dev != dev) {
400 qtest_send(chr, "FAIL IRQ intercept already enabled\n");
402 qtest_send(chr, "OK\n");
407 QLIST_FOREACH(ngl, &dev->gpios, node) {
408 /* We don't support intercept of named GPIOs yet */
412 if (words[0][14] == 'o') {
414 for (i = 0; i < ngl->num_out; ++i) {
415 qemu_irq *disconnected = g_new0(qemu_irq, 1);
416 qemu_irq icpt = qemu_allocate_irq(qtest_irq_handler,
419 *disconnected = qdev_intercept_gpio_out(dev, icpt,
423 qemu_irq_intercept_in(ngl->in, qtest_irq_handler,
427 irq_intercept_dev = dev;
428 qtest_send_prefix(chr);
429 qtest_send(chr, "OK\n");
430 } else if (strcmp(words[0], "set_irq_in") == 0) {
438 g_assert(words[1] && words[2] && words[3] && words[4]);
440 dev = DEVICE(object_resolve_path(words[1], NULL));
442 qtest_send_prefix(chr);
443 qtest_send(chr, "FAIL Unknown device\n");
447 if (strcmp(words[2], "unnamed-gpio-in") == 0) {
453 ret = qemu_strtoi(words[3], NULL, 0, &num);
455 ret = qemu_strtoi(words[4], NULL, 0, &level);
458 irq = qdev_get_gpio_in_named(dev, name, num);
460 qemu_set_irq(irq, level);
461 qtest_send_prefix(chr);
462 qtest_send(chr, "OK\n");
463 } else if (strcmp(words[0], "outb") == 0 ||
464 strcmp(words[0], "outw") == 0 ||
465 strcmp(words[0], "outl") == 0) {
470 g_assert(words[1] && words[2]);
471 ret = qemu_strtoul(words[1], NULL, 0, &addr);
473 ret = qemu_strtoul(words[2], NULL, 0, &value);
475 g_assert(addr <= 0xffff);
477 if (words[0][3] == 'b') {
478 cpu_outb(addr, value);
479 } else if (words[0][3] == 'w') {
480 cpu_outw(addr, value);
481 } else if (words[0][3] == 'l') {
482 cpu_outl(addr, value);
484 qtest_send_prefix(chr);
485 qtest_send(chr, "OK\n");
486 } else if (strcmp(words[0], "inb") == 0 ||
487 strcmp(words[0], "inw") == 0 ||
488 strcmp(words[0], "inl") == 0) {
490 uint32_t value = -1U;
494 ret = qemu_strtoul(words[1], NULL, 0, &addr);
496 g_assert(addr <= 0xffff);
498 if (words[0][2] == 'b') {
499 value = cpu_inb(addr);
500 } else if (words[0][2] == 'w') {
501 value = cpu_inw(addr);
502 } else if (words[0][2] == 'l') {
503 value = cpu_inl(addr);
505 qtest_send_prefix(chr);
506 qtest_sendf(chr, "OK 0x%04x\n", value);
507 } else if (strcmp(words[0], "writeb") == 0 ||
508 strcmp(words[0], "writew") == 0 ||
509 strcmp(words[0], "writel") == 0 ||
510 strcmp(words[0], "writeq") == 0) {
515 g_assert(words[1] && words[2]);
516 ret = qemu_strtou64(words[1], NULL, 0, &addr);
518 ret = qemu_strtou64(words[2], NULL, 0, &value);
521 if (words[0][5] == 'b') {
522 uint8_t data = value;
523 address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
525 } else if (words[0][5] == 'w') {
526 uint16_t data = value;
528 address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
530 } else if (words[0][5] == 'l') {
531 uint32_t data = value;
533 address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
535 } else if (words[0][5] == 'q') {
536 uint64_t data = value;
538 address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
541 qtest_send_prefix(chr);
542 qtest_send(chr, "OK\n");
543 } else if (strcmp(words[0], "readb") == 0 ||
544 strcmp(words[0], "readw") == 0 ||
545 strcmp(words[0], "readl") == 0 ||
546 strcmp(words[0], "readq") == 0) {
548 uint64_t value = UINT64_C(-1);
552 ret = qemu_strtou64(words[1], NULL, 0, &addr);
555 if (words[0][4] == 'b') {
557 address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
560 } else if (words[0][4] == 'w') {
562 address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
564 value = tswap16(data);
565 } else if (words[0][4] == 'l') {
567 address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
569 value = tswap32(data);
570 } else if (words[0][4] == 'q') {
571 address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
575 qtest_send_prefix(chr);
576 qtest_sendf(chr, "OK 0x%016" PRIx64 "\n", value);
577 } else if (strcmp(words[0], "read") == 0) {
578 uint64_t addr, len, i;
583 g_assert(words[1] && words[2]);
584 ret = qemu_strtou64(words[1], NULL, 0, &addr);
586 ret = qemu_strtou64(words[2], NULL, 0, &len);
588 /* We'd send garbage to libqtest if len is 0 */
591 data = g_malloc(len);
592 address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, data,
595 enc = g_malloc(2 * len + 1);
596 for (i = 0; i < len; i++) {
597 sprintf(&enc[i * 2], "%02x", data[i]);
600 qtest_send_prefix(chr);
601 qtest_sendf(chr, "OK 0x%s\n", enc);
605 } else if (strcmp(words[0], "b64read") == 0) {
611 g_assert(words[1] && words[2]);
612 ret = qemu_strtou64(words[1], NULL, 0, &addr);
614 ret = qemu_strtou64(words[2], NULL, 0, &len);
617 data = g_malloc(len);
618 address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, data,
620 b64_data = g_base64_encode(data, len);
621 qtest_send_prefix(chr);
622 qtest_sendf(chr, "OK %s\n", b64_data);
626 } else if (strcmp(words[0], "write") == 0) {
627 uint64_t addr, len, i;
632 g_assert(words[1] && words[2] && words[3]);
633 ret = qemu_strtou64(words[1], NULL, 0, &addr);
635 ret = qemu_strtou64(words[2], NULL, 0, &len);
638 data_len = strlen(words[3]);
640 qtest_send(chr, "ERR invalid argument size\n");
644 data = g_malloc(len);
645 for (i = 0; i < len; i++) {
646 if ((i * 2 + 4) <= data_len) {
647 data[i] = hex2nib(words[3][i * 2 + 2]) << 4;
648 data[i] |= hex2nib(words[3][i * 2 + 3]);
653 address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, data,
657 qtest_send_prefix(chr);
658 qtest_send(chr, "OK\n");
659 } else if (strcmp(words[0], "memset") == 0) {
662 unsigned long pattern;
665 g_assert(words[1] && words[2] && words[3]);
666 ret = qemu_strtou64(words[1], NULL, 0, &addr);
668 ret = qemu_strtou64(words[2], NULL, 0, &len);
670 ret = qemu_strtoul(words[3], NULL, 0, &pattern);
674 data = g_malloc(len);
675 memset(data, pattern, len);
676 address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
681 qtest_send_prefix(chr);
682 qtest_send(chr, "OK\n");
683 } else if (strcmp(words[0], "b64write") == 0) {
690 g_assert(words[1] && words[2] && words[3]);
691 ret = qemu_strtou64(words[1], NULL, 0, &addr);
693 ret = qemu_strtou64(words[2], NULL, 0, &len);
696 data_len = strlen(words[3]);
698 qtest_send(chr, "ERR invalid argument size\n");
702 data = g_base64_decode_inplace(words[3], &out_len);
703 if (out_len != len) {
704 qtest_log_send("b64write: data length mismatch (told %"PRIu64", "
707 out_len = MIN(out_len, len);
710 address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, data,
713 qtest_send_prefix(chr);
714 qtest_send(chr, "OK\n");
715 } else if (strcmp(words[0], "endianness") == 0) {
716 qtest_send_prefix(chr);
717 #if TARGET_BIG_ENDIAN
718 qtest_sendf(chr, "OK big\n");
720 qtest_sendf(chr, "OK little\n");
722 #ifdef CONFIG_PSERIES
723 } else if (strcmp(words[0], "rtas") == 0) {
724 uint64_t res, args, ret;
725 unsigned long nargs, nret;
728 rc = qemu_strtoul(words[2], NULL, 0, &nargs);
730 rc = qemu_strtou64(words[3], NULL, 0, &args);
732 rc = qemu_strtoul(words[4], NULL, 0, &nret);
734 rc = qemu_strtou64(words[5], NULL, 0, &ret);
736 res = qtest_rtas_call(words[1], nargs, args, nret, ret);
738 qtest_send_prefix(chr);
739 qtest_sendf(chr, "OK %"PRIu64"\n", res);
741 } else if (qtest_enabled() && strcmp(words[0], "clock_step") == 0) {
745 int ret = qemu_strtoi64(words[1], NULL, 0, &ns);
748 ns = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL,
749 QEMU_TIMER_ATTR_ALL);
751 qtest_clock_warp(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + ns);
752 qtest_send_prefix(chr);
753 qtest_sendf(chr, "OK %"PRIi64"\n",
754 (int64_t)qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
755 } else if (strcmp(words[0], "module_load") == 0) {
756 g_assert(words[1] && words[2]);
758 qtest_send_prefix(chr);
759 if (module_load_one(words[1], words[2], false)) {
760 qtest_sendf(chr, "OK\n");
762 qtest_sendf(chr, "FAIL\n");
764 } else if (qtest_enabled() && strcmp(words[0], "clock_set") == 0) {
769 ret = qemu_strtoi64(words[1], NULL, 0, &ns);
771 qtest_clock_warp(ns);
772 qtest_send_prefix(chr);
773 qtest_sendf(chr, "OK %"PRIi64"\n",
774 (int64_t)qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
776 qtest_send_prefix(chr);
777 qtest_sendf(chr, "FAIL Unknown command '%s'\n", words[0]);
781 static void qtest_process_inbuf(CharBackend *chr, GString *inbuf)
785 while ((end = strchr(inbuf->str, '\n')) != NULL) {
790 offset = end - inbuf->str;
792 cmd = g_string_new_len(inbuf->str, offset);
793 g_string_erase(inbuf, 0, offset + 1);
795 words = g_strsplit(cmd->str, " ", 0);
796 qtest_process_command(chr, words);
799 g_string_free(cmd, TRUE);
803 static void qtest_read(void *opaque, const uint8_t *buf, int size)
805 CharBackend *chr = opaque;
807 g_string_append_len(inbuf, (const gchar *)buf, size);
808 qtest_process_inbuf(chr, inbuf);
811 static int qtest_can_read(void *opaque)
816 static void qtest_event(void *opaque, QEMUChrEvent event)
821 case CHR_EVENT_OPENED:
823 * We used to call qemu_system_reset() here, hoping we could
824 * use the same process for multiple tests that way. Never
825 * used. Injects an extra reset even when it's not used, and
826 * that can mess up tests, e.g. -boot once.
828 for (i = 0; i < ARRAY_SIZE(irq_levels); i++) {
832 g_clear_pointer(&timer, g_timer_destroy);
833 timer = g_timer_new();
836 fprintf(qtest_log_fp, "[I " FMT_timeval "] OPENED\n", g_timer_elapsed(timer, NULL));
839 case CHR_EVENT_CLOSED:
840 qtest_opened = false;
842 fprintf(qtest_log_fp, "[I +" FMT_timeval "] CLOSED\n", g_timer_elapsed(timer, NULL));
844 g_clear_pointer(&timer, g_timer_destroy);
851 void qtest_server_init(const char *qtest_chrdev, const char *qtest_log, Error **errp)
857 chr = qemu_chr_new("qtest", qtest_chrdev, NULL);
859 error_setg(errp, "Failed to initialize device for qtest: \"%s\"",
864 qtest = object_new(TYPE_QTEST);
865 object_property_set_str(qtest, "chardev", "qtest", &error_abort);
867 object_property_set_str(qtest, "log", qtest_log, &error_abort);
869 object_property_add_child(qdev_get_machine(), "qtest", qtest);
870 user_creatable_complete(USER_CREATABLE(qtest), errp);
872 object_unparent(qtest);
874 object_unref(OBJECT(chr));
878 static bool qtest_server_start(QTest *q, Error **errp)
880 Chardev *chr = q->chr;
881 const char *qtest_log = q->log;
884 if (strcmp(qtest_log, "none") != 0) {
885 qtest_log_fp = fopen(qtest_log, "w+");
888 qtest_log_fp = stderr;
891 if (!qemu_chr_fe_init(&q->qtest_chr, chr, errp)) {
894 qemu_chr_fe_set_handlers(&q->qtest_chr, qtest_can_read, qtest_read,
895 qtest_event, NULL, &q->qtest_chr, NULL, true);
896 qemu_chr_fe_set_echo(&q->qtest_chr, true);
898 inbuf = g_string_new("");
900 if (!qtest_server_send) {
901 qtest_server_set_send_handler(qtest_server_char_be_send, &q->qtest_chr);
907 void qtest_server_set_send_handler(void (*send)(void*, const char*),
910 qtest_server_send = send;
911 qtest_server_send_opaque = opaque;
914 bool qtest_driver(void)
916 return qtest && qtest->qtest_chr.chr != NULL;
919 void qtest_server_inproc_recv(void *dummy, const char *buf)
921 static GString *gstr;
923 gstr = g_string_new(NULL);
925 g_string_append(gstr, buf);
926 if (gstr->str[gstr->len - 1] == '\n') {
927 qtest_process_inbuf(NULL, gstr);
928 g_string_truncate(gstr, 0);
932 static void qtest_complete(UserCreatable *uc, Error **errp)
934 QTest *q = QTEST(uc);
936 error_setg(errp, "Only one instance of qtest can be created");
940 error_setg(errp, "No backend specified");
944 if (OBJECT(uc)->parent != qdev_get_machine()) {
945 q->has_machine_link = true;
946 object_property_add_const_link(qdev_get_machine(), "qtest", OBJECT(uc));
948 /* -qtest was used. */
951 qtest_server_start(q, errp);
954 static void qtest_unparent(Object *obj)
956 QTest *q = QTEST(obj);
959 qemu_chr_fe_disconnect(&q->qtest_chr);
960 assert(!qtest_opened);
961 qemu_chr_fe_deinit(&q->qtest_chr, false);
963 fclose(qtest_log_fp);
969 if (q->has_machine_link) {
970 object_property_del(qdev_get_machine(), "qtest");
971 q->has_machine_link = false;
975 static void qtest_set_log(Object *obj, const char *value, Error **errp)
977 QTest *q = QTEST(obj);
980 error_setg(errp, "Property 'log' can not be set now");
983 q->log = g_strdup(value);
987 static char *qtest_get_log(Object *obj, Error **errp)
989 QTest *q = QTEST(obj);
991 return g_strdup(q->log);
994 static void qtest_set_chardev(Object *obj, const char *value, Error **errp)
996 QTest *q = QTEST(obj);
1000 error_setg(errp, "Property 'chardev' can not be set now");
1004 chr = qemu_chr_find(value);
1006 error_setg(errp, "Cannot find character device '%s'", value);
1010 g_free(q->chr_name);
1011 q->chr_name = g_strdup(value);
1014 object_unref(q->chr);
1020 static char *qtest_get_chardev(Object *obj, Error **errp)
1022 QTest *q = QTEST(obj);
1024 return g_strdup(q->chr_name);
1027 static void qtest_class_init(ObjectClass *oc, void *data)
1029 UserCreatableClass *ucc = USER_CREATABLE_CLASS(oc);
1031 oc->unparent = qtest_unparent;
1032 ucc->complete = qtest_complete;
1034 object_class_property_add_str(oc, "chardev",
1035 qtest_get_chardev, qtest_set_chardev);
1036 object_class_property_add_str(oc, "log",
1037 qtest_get_log, qtest_set_log);
1040 static const TypeInfo qtest_info = {
1042 .parent = TYPE_OBJECT,
1043 .class_init = qtest_class_init,
1044 .instance_size = sizeof(QTest),
1045 .interfaces = (InterfaceInfo[]) {
1046 { TYPE_USER_CREATABLE },
1051 static void register_types(void)
1053 type_register_static(&qtest_info);
1056 type_init(register_types);