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[tomoyo/tomoyo-test1.git] / sound / soc / codecs / rt700-sdw.c
1 // SPDX-License-Identifier: GPL-2.0
2 //
3 // rt700-sdw.c -- rt700 ALSA SoC audio driver
4 //
5 // Copyright(c) 2019 Realtek Semiconductor Corp.
6 //
7 //
8
9 #include <linux/delay.h>
10 #include <linux/device.h>
11 #include <linux/mod_devicetable.h>
12 #include <linux/soundwire/sdw.h>
13 #include <linux/soundwire/sdw_type.h>
14 #include <linux/module.h>
15 #include <linux/regmap.h>
16 #include <sound/soc.h>
17 #include "rt700.h"
18 #include "rt700-sdw.h"
19
20 static bool rt700_readable_register(struct device *dev, unsigned int reg)
21 {
22         switch (reg) {
23         case 0x00e0:
24         case 0x00f0:
25         case 0x2000 ... 0x200e:
26         case 0x2012 ... 0x2016:
27         case 0x201a ... 0x2027:
28         case 0x2029 ... 0x202a:
29         case 0x202d ... 0x2034:
30         case 0x2200 ... 0x2204:
31         case 0x2206 ... 0x2212:
32         case 0x2220 ... 0x2223:
33         case 0x2230 ... 0x2231:
34         case 0x3000 ... 0x3fff:
35         case 0x7000 ... 0x7fff:
36         case 0x8300 ... 0x83ff:
37         case 0x9c00 ... 0x9cff:
38         case 0xb900 ... 0xb9ff:
39         case 0x75201a:
40         case 0x752045:
41         case 0x752046:
42         case 0x752048:
43         case 0x75204a:
44         case 0x75206b:
45         case 0x752080:
46         case 0x752081:
47                 return true;
48         default:
49                 return false;
50         }
51 }
52
53 static bool rt700_volatile_register(struct device *dev, unsigned int reg)
54 {
55         switch (reg) {
56         case 0x2009:
57         case 0x2016:
58         case 0x201b:
59         case 0x201c:
60         case 0x201d:
61         case 0x201f:
62         case 0x2021:
63         case 0x2023:
64         case 0x2230:
65         case 0x200b ... 0x200e: /* i2c read */
66         case 0x2012 ... 0x2015: /* HD-A read */
67         case 0x202d ... 0x202f: /* BRA */
68         case 0x2201 ... 0x2212: /* i2c debug */
69         case 0x2220 ... 0x2223: /* decoded HD-A */
70         case 0x9c00 ... 0x9cff:
71         case 0xb900 ... 0xb9ff:
72         case 0xff01:
73         case 0x75201a:
74         case 0x752046:
75         case 0x752080:
76         case 0x752081:
77                 return true;
78         default:
79                 return false;
80         }
81 }
82
83 static int rt700_sdw_read(void *context, unsigned int reg, unsigned int *val)
84 {
85         struct device *dev = context;
86         struct rt700_priv *rt700 = dev_get_drvdata(dev);
87         unsigned int sdw_data_3, sdw_data_2, sdw_data_1, sdw_data_0;
88         unsigned int reg2 = 0, reg3 = 0, reg4 = 0, mask, nid, val2;
89         unsigned int is_hda_reg = 1, is_index_reg = 0;
90         int ret;
91
92         if (reg > 0xffff)
93                 is_index_reg = 1;
94
95         mask = reg & 0xf000;
96
97         if (is_index_reg) { /* index registers */
98                 val2 = reg & 0xff;
99                 reg = reg >> 8;
100                 nid = reg & 0xff;
101                 ret = regmap_write(rt700->sdw_regmap, reg, 0);
102                 if (ret < 0)
103                         return ret;
104                 reg2 = reg + 0x1000;
105                 reg2 |= 0x80;
106                 ret = regmap_write(rt700->sdw_regmap, reg2, val2);
107                 if (ret < 0)
108                         return ret;
109
110                 reg3 = RT700_PRIV_DATA_R_H | nid;
111                 ret = regmap_write(rt700->sdw_regmap,
112                         reg3, ((*val >> 8) & 0xff));
113                 if (ret < 0)
114                         return ret;
115                 reg4 = reg3 + 0x1000;
116                 reg4 |= 0x80;
117                 ret = regmap_write(rt700->sdw_regmap, reg4, (*val & 0xff));
118                 if (ret < 0)
119                         return ret;
120         } else if (mask   == 0x3000) {
121                 reg += 0x8000;
122                 ret = regmap_write(rt700->sdw_regmap, reg, *val);
123                 if (ret < 0)
124                         return ret;
125         } else if (mask == 0x7000) {
126                 reg += 0x2000;
127                 reg |= 0x800;
128                 ret = regmap_write(rt700->sdw_regmap,
129                         reg, ((*val >> 8) & 0xff));
130                 if (ret < 0)
131                         return ret;
132                 reg2 = reg + 0x1000;
133                 reg2 |= 0x80;
134                 ret = regmap_write(rt700->sdw_regmap, reg2, (*val & 0xff));
135                 if (ret < 0)
136                         return ret;
137         } else if ((reg & 0xff00) == 0x8300) { /* for R channel */
138                 reg2 = reg - 0x1000;
139                 reg2 &= ~0x80;
140                 ret = regmap_write(rt700->sdw_regmap,
141                         reg2, ((*val >> 8) & 0xff));
142                 if (ret < 0)
143                         return ret;
144                 ret = regmap_write(rt700->sdw_regmap, reg, (*val & 0xff));
145                 if (ret < 0)
146                         return ret;
147         } else if (mask == 0x9000) {
148                 ret = regmap_write(rt700->sdw_regmap,
149                         reg, ((*val >> 8) & 0xff));
150                 if (ret < 0)
151                         return ret;
152                 reg2 = reg + 0x1000;
153                 reg2 |= 0x80;
154                 ret = regmap_write(rt700->sdw_regmap, reg2, (*val & 0xff));
155                 if (ret < 0)
156                         return ret;
157         } else if (mask == 0xb000) {
158                 ret = regmap_write(rt700->sdw_regmap, reg, *val);
159                 if (ret < 0)
160                         return ret;
161         } else {
162                 ret = regmap_read(rt700->sdw_regmap, reg, val);
163                 if (ret < 0)
164                         return ret;
165                 is_hda_reg = 0;
166         }
167
168         if (is_hda_reg || is_index_reg) {
169                 sdw_data_3 = 0;
170                 sdw_data_2 = 0;
171                 sdw_data_1 = 0;
172                 sdw_data_0 = 0;
173                 ret = regmap_read(rt700->sdw_regmap,
174                         RT700_READ_HDA_3, &sdw_data_3);
175                 if (ret < 0)
176                         return ret;
177                 ret = regmap_read(rt700->sdw_regmap,
178                         RT700_READ_HDA_2, &sdw_data_2);
179                 if (ret < 0)
180                         return ret;
181                 ret = regmap_read(rt700->sdw_regmap,
182                         RT700_READ_HDA_1, &sdw_data_1);
183                 if (ret < 0)
184                         return ret;
185                 ret = regmap_read(rt700->sdw_regmap,
186                         RT700_READ_HDA_0, &sdw_data_0);
187                 if (ret < 0)
188                         return ret;
189                 *val = ((sdw_data_3 & 0xff) << 24) |
190                         ((sdw_data_2 & 0xff) << 16) |
191                         ((sdw_data_1 & 0xff) << 8) | (sdw_data_0 & 0xff);
192         }
193
194         if (is_hda_reg == 0)
195                 dev_dbg(dev, "[%s] %04x => %08x\n", __func__, reg, *val);
196         else if (is_index_reg)
197                 dev_dbg(dev, "[%s] %04x %04x %04x %04x => %08x\n",
198                         __func__, reg, reg2, reg3, reg4, *val);
199         else
200                 dev_dbg(dev, "[%s] %04x %04x => %08x\n",
201                         __func__, reg, reg2, *val);
202
203         return 0;
204 }
205
206 static int rt700_sdw_write(void *context, unsigned int reg, unsigned int val)
207 {
208         struct device *dev = context;
209         struct rt700_priv *rt700 = dev_get_drvdata(dev);
210         unsigned int reg2 = 0, reg3, reg4, nid, mask, val2;
211         unsigned int is_index_reg = 0;
212         int ret;
213
214         if (reg > 0xffff)
215                 is_index_reg = 1;
216
217         mask = reg & 0xf000;
218
219         if (is_index_reg) { /* index registers */
220                 val2 = reg & 0xff;
221                 reg = reg >> 8;
222                 nid = reg & 0xff;
223                 ret = regmap_write(rt700->sdw_regmap, reg, 0);
224                 if (ret < 0)
225                         return ret;
226                 reg2 = reg + 0x1000;
227                 reg2 |= 0x80;
228                 ret = regmap_write(rt700->sdw_regmap, reg2, val2);
229                 if (ret < 0)
230                         return ret;
231
232                 reg3 = RT700_PRIV_DATA_W_H | nid;
233                 ret = regmap_write(rt700->sdw_regmap,
234                         reg3, ((val >> 8) & 0xff));
235                 if (ret < 0)
236                         return ret;
237                 reg4 = reg3 + 0x1000;
238                 reg4 |= 0x80;
239                 ret = regmap_write(rt700->sdw_regmap, reg4, (val & 0xff));
240                 if (ret < 0)
241                         return ret;
242                 is_index_reg = 1;
243         } else if (reg < 0x4fff) {
244                 ret = regmap_write(rt700->sdw_regmap, reg, val);
245                 if (ret < 0)
246                         return ret;
247         } else if (reg == 0xff01) {
248                 ret = regmap_write(rt700->sdw_regmap, reg, val);
249                 if (ret < 0)
250                         return ret;
251         } else if (mask == 0x7000) {
252                 ret = regmap_write(rt700->sdw_regmap,
253                         reg, ((val >> 8) & 0xff));
254                 if (ret < 0)
255                         return ret;
256                 reg2 = reg + 0x1000;
257                 reg2 |= 0x80;
258                 ret = regmap_write(rt700->sdw_regmap, reg2, (val & 0xff));
259                 if (ret < 0)
260                         return ret;
261         } else if ((reg & 0xff00) == 0x8300) {  /* for R channel */
262                 reg2 = reg - 0x1000;
263                 reg2 &= ~0x80;
264                 ret = regmap_write(rt700->sdw_regmap,
265                         reg2, ((val >> 8) & 0xff));
266                 if (ret < 0)
267                         return ret;
268                 ret = regmap_write(rt700->sdw_regmap, reg, (val & 0xff));
269                 if (ret < 0)
270                         return ret;
271         }
272
273         if (reg2 == 0)
274                 dev_dbg(dev, "[%s] %04x <= %04x\n", __func__, reg, val);
275         else if (is_index_reg)
276                 dev_dbg(dev, "[%s] %04x %04x %04x %04x <= %04x %04x\n",
277                         __func__, reg, reg2, reg3, reg4, val2, val);
278         else
279                 dev_dbg(dev, "[%s] %04x %04x <= %04x\n",
280                         __func__, reg, reg2, val);
281
282         return 0;
283 }
284
285 static const struct regmap_config rt700_regmap = {
286         .reg_bits = 24,
287         .val_bits = 32,
288         .readable_reg = rt700_readable_register,
289         .volatile_reg = rt700_volatile_register,
290         .max_register = 0x755800,
291         .reg_defaults = rt700_reg_defaults,
292         .num_reg_defaults = ARRAY_SIZE(rt700_reg_defaults),
293         .cache_type = REGCACHE_RBTREE,
294         .use_single_read = true,
295         .use_single_write = true,
296         .reg_read = rt700_sdw_read,
297         .reg_write = rt700_sdw_write,
298 };
299
300 static const struct regmap_config rt700_sdw_regmap = {
301         .name = "sdw",
302         .reg_bits = 32,
303         .val_bits = 8,
304         .readable_reg = rt700_readable_register,
305         .max_register = 0xff01,
306         .cache_type = REGCACHE_NONE,
307         .use_single_read = true,
308         .use_single_write = true,
309 };
310
311 static int rt700_update_status(struct sdw_slave *slave,
312                                         enum sdw_slave_status status)
313 {
314         struct rt700_priv *rt700 = dev_get_drvdata(&slave->dev);
315
316         /* Update the status */
317         rt700->status = status;
318
319         if (status == SDW_SLAVE_UNATTACHED)
320                 rt700->hw_init = false;
321
322         /*
323          * Perform initialization only if slave status is present and
324          * hw_init flag is false
325          */
326         if (rt700->hw_init || rt700->status != SDW_SLAVE_ATTACHED)
327                 return 0;
328
329         /* perform I/O transfers required for Slave initialization */
330         return rt700_io_init(&slave->dev, slave);
331 }
332
333 static int rt700_read_prop(struct sdw_slave *slave)
334 {
335         struct sdw_slave_prop *prop = &slave->prop;
336         int nval, i, num_of_ports = 1;
337         u32 bit;
338         unsigned long addr;
339         struct sdw_dpn_prop *dpn;
340
341         prop->paging_support = false;
342
343         /* first we need to allocate memory for set bits in port lists */
344         prop->source_ports = 0x14; /* BITMAP: 00010100 */
345         prop->sink_ports = 0xA; /* BITMAP:  00001010 */
346
347         nval = hweight32(prop->source_ports);
348         num_of_ports += nval;
349         prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval,
350                                                 sizeof(*prop->src_dpn_prop),
351                                                 GFP_KERNEL);
352         if (!prop->src_dpn_prop)
353                 return -ENOMEM;
354
355         i = 0;
356         dpn = prop->src_dpn_prop;
357         addr = prop->source_ports;
358         for_each_set_bit(bit, &addr, 32) {
359                 dpn[i].num = bit;
360                 dpn[i].type = SDW_DPN_FULL;
361                 dpn[i].simple_ch_prep_sm = true;
362                 dpn[i].ch_prep_timeout = 10;
363                 i++;
364         }
365
366         /* do this again for sink now */
367         nval = hweight32(prop->sink_ports);
368         num_of_ports += nval;
369         prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval,
370                                                 sizeof(*prop->sink_dpn_prop),
371                                                 GFP_KERNEL);
372         if (!prop->sink_dpn_prop)
373                 return -ENOMEM;
374
375         i = 0;
376         dpn = prop->sink_dpn_prop;
377         addr = prop->sink_ports;
378         for_each_set_bit(bit, &addr, 32) {
379                 dpn[i].num = bit;
380                 dpn[i].type = SDW_DPN_FULL;
381                 dpn[i].simple_ch_prep_sm = true;
382                 dpn[i].ch_prep_timeout = 10;
383                 i++;
384         }
385
386         /* Allocate port_ready based on num_of_ports */
387         slave->port_ready = devm_kcalloc(&slave->dev, num_of_ports,
388                                         sizeof(*slave->port_ready),
389                                         GFP_KERNEL);
390         if (!slave->port_ready)
391                 return -ENOMEM;
392
393         /* Initialize completion */
394         for (i = 0; i < num_of_ports; i++)
395                 init_completion(&slave->port_ready[i]);
396
397         /* set the timeout values */
398         prop->clk_stop_timeout = 20;
399
400         /* wake-up event */
401         prop->wake_capable = 1;
402
403         return 0;
404 }
405
406 static int rt700_bus_config(struct sdw_slave *slave,
407                                 struct sdw_bus_params *params)
408 {
409         struct rt700_priv *rt700 = dev_get_drvdata(&slave->dev);
410         int ret;
411
412         memcpy(&rt700->params, params, sizeof(*params));
413
414         ret = rt700_clock_config(&slave->dev);
415         if (ret < 0)
416                 dev_err(&slave->dev, "Invalid clk config");
417
418         return ret;
419 }
420
421 static int rt700_interrupt_callback(struct sdw_slave *slave,
422                                         struct sdw_slave_intr_status *status)
423 {
424         struct rt700_priv *rt700 = dev_get_drvdata(&slave->dev);
425
426         dev_dbg(&slave->dev,
427                 "%s control_port_stat=%x", __func__, status->control_port);
428
429         if (status->control_port & 0x4) {
430                 mod_delayed_work(system_power_efficient_wq,
431                         &rt700->jack_detect_work, msecs_to_jiffies(250));
432         }
433
434         return 0;
435 }
436
437 /*
438  * slave_ops: callbacks for get_clock_stop_mode, clock_stop and
439  * port_prep are not defined for now
440  */
441 static struct sdw_slave_ops rt700_slave_ops = {
442         .read_prop = rt700_read_prop,
443         .interrupt_callback = rt700_interrupt_callback,
444         .update_status = rt700_update_status,
445         .bus_config = rt700_bus_config,
446 };
447
448 static int rt700_sdw_probe(struct sdw_slave *slave,
449                                 const struct sdw_device_id *id)
450 {
451         struct regmap *sdw_regmap, *regmap;
452
453         /* Assign ops */
454         slave->ops = &rt700_slave_ops;
455
456         /* Regmap Initialization */
457         sdw_regmap = devm_regmap_init_sdw(slave, &rt700_sdw_regmap);
458         if (!sdw_regmap)
459                 return -EINVAL;
460
461         regmap = devm_regmap_init(&slave->dev, NULL,
462                 &slave->dev, &rt700_regmap);
463         if (IS_ERR(regmap))
464                 return PTR_ERR(regmap);
465
466         rt700_init(&slave->dev, sdw_regmap, regmap, slave);
467
468         return 0;
469 }
470
471 static int rt700_sdw_remove(struct sdw_slave *slave)
472 {
473         struct rt700_priv *rt700 = dev_get_drvdata(&slave->dev);
474
475         if (rt700 && rt700->hw_init) {
476                 cancel_delayed_work(&rt700->jack_detect_work);
477                 cancel_delayed_work(&rt700->jack_btn_check_work);
478         }
479
480         return 0;
481 }
482
483 static const struct sdw_device_id rt700_id[] = {
484         SDW_SLAVE_ENTRY(0x025d, 0x700, 0),
485         {},
486 };
487 MODULE_DEVICE_TABLE(sdw, rt700_id);
488
489 static int rt700_dev_suspend(struct device *dev)
490 {
491         struct rt700_priv *rt700 = dev_get_drvdata(dev);
492
493         if (!rt700->hw_init)
494                 return 0;
495
496         regcache_cache_only(rt700->regmap, true);
497
498         return 0;
499 }
500
501 #define RT700_PROBE_TIMEOUT 2000
502
503 static int rt700_dev_resume(struct device *dev)
504 {
505         struct sdw_slave *slave = dev_to_sdw_dev(dev);
506         struct rt700_priv *rt700 = dev_get_drvdata(dev);
507         unsigned long time;
508
509         if (!rt700->hw_init)
510                 return 0;
511
512         if (!slave->unattach_request)
513                 goto regmap_sync;
514
515         time = wait_for_completion_timeout(&slave->initialization_complete,
516                                 msecs_to_jiffies(RT700_PROBE_TIMEOUT));
517         if (!time) {
518                 dev_err(&slave->dev, "Initialization not complete, timed out\n");
519                 return -ETIMEDOUT;
520         }
521
522 regmap_sync:
523         slave->unattach_request = 0;
524         regcache_cache_only(rt700->regmap, false);
525         regcache_sync_region(rt700->regmap, 0x3000, 0x8fff);
526         regcache_sync_region(rt700->regmap, 0x752010, 0x75206b);
527
528         return 0;
529 }
530
531 static const struct dev_pm_ops rt700_pm = {
532         SET_SYSTEM_SLEEP_PM_OPS(rt700_dev_suspend, rt700_dev_resume)
533         SET_RUNTIME_PM_OPS(rt700_dev_suspend, rt700_dev_resume, NULL)
534 };
535
536 static struct sdw_driver rt700_sdw_driver = {
537         .driver = {
538                 .name = "rt700",
539                 .owner = THIS_MODULE,
540                 .pm = &rt700_pm,
541         },
542         .probe = rt700_sdw_probe,
543         .remove = rt700_sdw_remove,
544         .ops = &rt700_slave_ops,
545         .id_table = rt700_id,
546 };
547 module_sdw_driver(rt700_sdw_driver);
548
549 MODULE_DESCRIPTION("ASoC RT700 driver SDW");
550 MODULE_AUTHOR("Shuming Fan <shumingf@realtek.com>");
551 MODULE_LICENSE("GPL v2");