2 * Intel Baytrail SST DSP driver
3 * Copyright (c) 2014, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 #include <linux/delay.h>
17 #include <linux/slab.h>
18 #include <linux/device.h>
19 #include <linux/interrupt.h>
20 #include <linux/module.h>
21 #include <linux/dma-mapping.h>
22 #include <linux/platform_device.h>
23 #include <linux/firmware.h>
26 #include "sst-dsp-priv.h"
27 #include "sst-baytrail-ipc.h"
29 #define SST_BYT_FW_SIGNATURE_SIZE 4
30 #define SST_BYT_FW_SIGN "$SST"
32 #define SST_BYT_IRAM_OFFSET 0xC0000
33 #define SST_BYT_DRAM_OFFSET 0x100000
34 #define SST_BYT_SHIM_OFFSET 0x140000
42 struct dma_block_info {
43 enum sst_ram_type type; /* IRAM/DRAM */
45 u32 ram_offset; /* Offset in I/DRAM */
46 u32 rsvd; /* Reserved field */
50 unsigned char signature[SST_BYT_FW_SIGNATURE_SIZE];
51 u32 file_size; /* size of fw minus this header */
52 u32 modules; /* # of modules */
53 u32 file_format; /* version of header format */
57 struct sst_byt_fw_module_header {
58 unsigned char signature[SST_BYT_FW_SIGNATURE_SIZE];
59 u32 mod_size; /* size of module */
60 u32 blocks; /* # of blocks */
61 u32 type; /* codec type, pp lib */
65 static int sst_byt_parse_module(struct sst_dsp *dsp, struct sst_fw *fw,
66 struct sst_byt_fw_module_header *module)
68 struct dma_block_info *block;
69 struct sst_module *mod;
70 struct sst_module_data block_data;
71 struct sst_module_template template;
74 memset(&template, 0, sizeof(template));
75 template.id = module->type;
76 template.entry = module->entry_point;
77 template.p.type = SST_MEM_DRAM;
78 template.p.data_type = SST_DATA_P;
79 template.s.type = SST_MEM_DRAM;
80 template.s.data_type = SST_DATA_S;
82 mod = sst_module_new(fw, &template, NULL);
86 block = (void *)module + sizeof(*module);
88 for (count = 0; count < module->blocks; count++) {
90 if (block->size <= 0) {
91 dev_err(dsp->dev, "block %d size invalid\n", count);
95 switch (block->type) {
97 block_data.offset = block->ram_offset +
98 dsp->addr.iram_offset;
99 block_data.type = SST_MEM_IRAM;
102 block_data.offset = block->ram_offset +
103 dsp->addr.dram_offset;
104 block_data.type = SST_MEM_DRAM;
107 block_data.offset = block->ram_offset +
108 (dsp->addr.fw_ext - dsp->addr.lpe);
109 block_data.type = SST_MEM_CACHE;
112 dev_err(dsp->dev, "wrong ram type 0x%x in block0x%x\n",
117 block_data.size = block->size;
118 block_data.data_type = SST_DATA_M;
119 block_data.data = (void *)block + sizeof(*block);
121 sst_module_insert_fixed_block(mod, &block_data);
123 block = (void *)block + sizeof(*block) + block->size;
128 static int sst_byt_parse_fw_image(struct sst_fw *sst_fw)
130 struct fw_header *header;
131 struct sst_byt_fw_module_header *module;
132 struct sst_dsp *dsp = sst_fw->dsp;
135 /* Read the header information from the data pointer */
136 header = (struct fw_header *)sst_fw->dma_buf;
139 if ((strncmp(header->signature, SST_BYT_FW_SIGN, 4) != 0) ||
140 (sst_fw->size != header->file_size + sizeof(*header))) {
141 /* Invalid FW signature */
142 dev_err(dsp->dev, "Invalid FW sign/filesize mismatch\n");
147 "header sign=%4s size=0x%x modules=0x%x fmt=0x%x size=%zu\n",
148 header->signature, header->file_size, header->modules,
149 header->file_format, sizeof(*header));
151 module = (void *)sst_fw->dma_buf + sizeof(*header);
152 for (count = 0; count < header->modules; count++) {
154 ret = sst_byt_parse_module(dsp, sst_fw, module);
156 dev_err(dsp->dev, "invalid module %d\n", count);
159 module = (void *)module + sizeof(*module) + module->mod_size;
165 static void sst_byt_dump_shim(struct sst_dsp *sst)
170 for (i = 0; i <= 0xF0; i += 8) {
171 reg = sst_dsp_shim_read64_unlocked(sst, i);
173 dev_dbg(sst->dev, "shim 0x%2.2x value 0x%16.16llx\n",
177 for (i = 0x00; i <= 0xff; i += 4) {
178 reg = readl(sst->addr.pci_cfg + i);
180 dev_dbg(sst->dev, "pci 0x%2.2x value 0x%8.8x\n",
185 static irqreturn_t sst_byt_irq(int irq, void *context)
187 struct sst_dsp *sst = (struct sst_dsp *) context;
189 irqreturn_t ret = IRQ_NONE;
191 spin_lock(&sst->spinlock);
193 isrx = sst_dsp_shim_read64_unlocked(sst, SST_ISRX);
194 if (isrx & SST_ISRX_DONE) {
195 /* ADSP has processed the message request from IA */
196 sst_dsp_shim_update_bits64_unlocked(sst, SST_IPCX,
197 SST_BYT_IPCX_DONE, 0);
198 ret = IRQ_WAKE_THREAD;
200 if (isrx & SST_BYT_ISRX_REQUEST) {
201 /* mask message request from ADSP and do processing later */
202 sst_dsp_shim_update_bits64_unlocked(sst, SST_IMRX,
203 SST_BYT_IMRX_REQUEST,
204 SST_BYT_IMRX_REQUEST);
205 ret = IRQ_WAKE_THREAD;
208 spin_unlock(&sst->spinlock);
213 static void sst_byt_boot(struct sst_dsp *sst)
217 /* release stall and wait to unstall */
218 sst_dsp_shim_update_bits64(sst, SST_CSR, SST_BYT_CSR_STALL, 0x0);
220 if (!(sst_dsp_shim_read64(sst, SST_CSR) &
221 SST_BYT_CSR_PWAITMODE))
226 dev_err(sst->dev, "unable to start DSP\n");
227 sst_byt_dump_shim(sst);
231 static void sst_byt_reset(struct sst_dsp *sst)
233 /* put DSP into reset, set reset vector and stall */
234 sst_dsp_shim_update_bits64(sst, SST_CSR,
235 SST_BYT_CSR_RST | SST_BYT_CSR_VECTOR_SEL | SST_BYT_CSR_STALL,
236 SST_BYT_CSR_RST | SST_BYT_CSR_VECTOR_SEL | SST_BYT_CSR_STALL);
240 /* take DSP out of reset and keep stalled for FW loading */
241 sst_dsp_shim_update_bits64(sst, SST_CSR, SST_BYT_CSR_RST, 0);
244 struct sst_adsp_memregion {
248 enum sst_mem_type type;
252 static const struct sst_adsp_memregion byt_region[] = {
253 {0xC0000, 0x100000, 8, SST_MEM_IRAM}, /* I-SRAM - 8 * 32kB */
254 {0x100000, 0x140000, 8, SST_MEM_DRAM}, /* D-SRAM0 - 8 * 32kB */
257 static int sst_byt_resource_map(struct sst_dsp *sst, struct sst_pdata *pdata)
259 sst->addr.lpe_base = pdata->lpe_base;
260 sst->addr.lpe = ioremap(pdata->lpe_base, pdata->lpe_size);
264 /* ADSP PCI MMIO config space */
265 sst->addr.pci_cfg = ioremap(pdata->pcicfg_base, pdata->pcicfg_size);
266 if (!sst->addr.pci_cfg) {
267 iounmap(sst->addr.lpe);
271 /* SST Extended FW allocation */
272 sst->addr.fw_ext = ioremap(pdata->fw_base, pdata->fw_size);
273 if (!sst->addr.fw_ext) {
274 iounmap(sst->addr.pci_cfg);
275 iounmap(sst->addr.lpe);
280 sst->addr.shim = sst->addr.lpe + sst->addr.shim_offset;
282 sst_dsp_mailbox_init(sst, SST_BYT_MAILBOX_OFFSET + 0x204,
283 SST_BYT_IPC_MAX_PAYLOAD_SIZE,
284 SST_BYT_MAILBOX_OFFSET,
285 SST_BYT_IPC_MAX_PAYLOAD_SIZE);
287 sst->irq = pdata->irq;
292 static int sst_byt_init(struct sst_dsp *sst, struct sst_pdata *pdata)
294 const struct sst_adsp_memregion *region;
296 int ret = -ENODEV, i, j, region_count;
304 region_count = ARRAY_SIZE(byt_region);
305 sst->addr.iram_offset = SST_BYT_IRAM_OFFSET;
306 sst->addr.dram_offset = SST_BYT_DRAM_OFFSET;
307 sst->addr.shim_offset = SST_BYT_SHIM_OFFSET;
310 dev_err(dev, "failed to get mem resources\n");
314 ret = sst_byt_resource_map(sst, pdata);
316 dev_err(dev, "failed to map resources\n");
321 * save the physical address of extended firmware block in the first
322 * 4 bytes of the mailbox
324 memcpy_toio(sst->addr.lpe + SST_BYT_MAILBOX_OFFSET,
325 &pdata->fw_base, sizeof(u32));
327 ret = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(32));
331 /* enable Interrupt from both sides */
332 sst_dsp_shim_update_bits64(sst, SST_IMRX, 0x3, 0x0);
333 sst_dsp_shim_update_bits64(sst, SST_IMRD, 0x3, 0x0);
335 /* register DSP memory blocks - ideally we should get this from ACPI */
336 for (i = 0; i < region_count; i++) {
337 offset = region[i].start;
338 size = (region[i].end - region[i].start) / region[i].blocks;
340 /* register individual memory blocks */
341 for (j = 0; j < region[i].blocks; j++) {
342 sst_mem_block_register(sst, offset, size,
343 region[i].type, NULL, j, sst);
351 static void sst_byt_free(struct sst_dsp *sst)
353 sst_mem_block_unregister_all(sst);
354 iounmap(sst->addr.lpe);
355 iounmap(sst->addr.pci_cfg);
356 iounmap(sst->addr.fw_ext);
359 struct sst_ops sst_byt_ops = {
360 .reset = sst_byt_reset,
361 .boot = sst_byt_boot,
362 .write = sst_shim32_write,
363 .read = sst_shim32_read,
364 .write64 = sst_shim32_write64,
365 .read64 = sst_shim32_read64,
366 .ram_read = sst_memcpy_fromio_32,
367 .ram_write = sst_memcpy_toio_32,
368 .irq_handler = sst_byt_irq,
369 .init = sst_byt_init,
370 .free = sst_byt_free,
371 .parse_fw = sst_byt_parse_fw_image,