sound/soc/msm/msm8998.c

   1 /*
   2  * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 and
   6  * only version 2 as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  */
  13
  14 #include <linux/clk.h>
  15 #include <linux/delay.h>
  16 #include <linux/gpio.h>
  17 #include <linux/of_gpio.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/slab.h>
  20 #include <linux/regulator/consumer.h>
  21 #include <linux/io.h>
  22 #include <linux/module.h>
  23 #include <linux/switch.h>
  24 #include <linux/input.h>
  25 #include <linux/of_device.h>
  26 #include <linux/mfd/msm-cdc-pinctrl.h>
  27 #include <sound/core.h>
  28 #include <sound/soc.h>
  29 #include <sound/soc-dapm.h>
  30 #include <sound/pcm.h>
  31 #include <sound/jack.h>
  32 #include <sound/q6afe-v2.h>
  33 #include <sound/q6core.h>
  34 #include <sound/pcm_params.h>
  35 #include <sound/info.h>
  36 #include <device_event.h>
  37 #include <linux/qdsp6v2/audio_notifier.h>
  38 #include "qdsp6v2/msm-pcm-routing-v2.h"
  39 #include "../codecs/wcd9335.h"
  40 #include "../codecs/wcd934x/wcd934x.h"
  41 #include "../codecs/wcd934x/wcd934x-mbhc.h"
  42 #include "../codecs/wsa881x.h"
  43
  44 #ifdef CONFIG_MACH_XIAOMI_MSM8998
  45 #include <soc/qcom/socinfo.h>
  46 #include <linux/mfd/spk-id.h>
  47 #include "../codecs/usb-headset.h"
  48 #endif
  49
  50 #define DRV_NAME "msm8998-asoc-snd"
  51
  52 #define __CHIPSET__ "MSM8998 "
  53 #define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
  54
  55 #define SAMPLING_RATE_8KHZ      8000
  56 #define SAMPLING_RATE_11P025KHZ 11025
  57 #define SAMPLING_RATE_16KHZ     16000
  58 #define SAMPLING_RATE_22P05KHZ  22050
  59 #define SAMPLING_RATE_32KHZ     32000
  60 #define SAMPLING_RATE_44P1KHZ   44100
  61 #define SAMPLING_RATE_48KHZ     48000
  62 #define SAMPLING_RATE_88P2KHZ   88200
  63 #define SAMPLING_RATE_96KHZ     96000
  64 #define SAMPLING_RATE_176P4KHZ  176400
  65 #define SAMPLING_RATE_192KHZ    192000
  66 #define SAMPLING_RATE_352P8KHZ  352800
  67 #define SAMPLING_RATE_384KHZ    384000
  68
  69 #define WCD9XXX_MBHC_DEF_BUTTONS    8
  70 #define WCD9XXX_MBHC_DEF_RLOADS     5
  71 #define CODEC_EXT_CLK_RATE          9600000
  72 #define ADSP_STATE_READY_TIMEOUT_MS 3000
  73 #define DEV_NAME_STR_LEN            32
  74
  75 #define WSA8810_NAME_1 "wsa881x.20170211"
  76 #define WSA8810_NAME_2 "wsa881x.20170212"
  77
  78 #define WCN_CDC_SLIM_RX_CH_MAX 2
  79 #define WCN_CDC_SLIM_TX_CH_MAX 3
  80
  81 #define TDM_CHANNEL_MAX 16
  82 #define TDM_SLOT_OFFSET_MAX 32
  83
  84 #define MSM_HIFI_ON 1
  85
  86 enum {
  87         SLIM_RX_0 = 0,
  88         SLIM_RX_1,
  89         SLIM_RX_2,
  90         SLIM_RX_3,
  91         SLIM_RX_4,
  92         SLIM_RX_5,
  93         SLIM_RX_6,
  94         SLIM_RX_7,
  95         SLIM_RX_MAX,
  96 };
  97
  98 enum {
  99         SLIM_TX_0 = 0,
 100         SLIM_TX_1,
 101         SLIM_TX_2,
 102         SLIM_TX_3,
 103         SLIM_TX_4,
 104         SLIM_TX_5,
 105         SLIM_TX_6,
 106         SLIM_TX_7,
 107         SLIM_TX_8,
 108         SLIM_TX_MAX,
 109 };
 110
 111 enum {
 112         PRIM_MI2S = 0,
 113         SEC_MI2S,
 114         TERT_MI2S,
 115         QUAT_MI2S,
 116         MI2S_MAX,
 117 };
 118
 119 enum {
 120         PRIM_AUX_PCM = 0,
 121         SEC_AUX_PCM,
 122         TERT_AUX_PCM,
 123         QUAT_AUX_PCM,
 124         AUX_PCM_MAX,
 125 };
 126
 127 enum {
 128         PCM_I2S_SEL_PRIM = 0,
 129         PCM_I2S_SEL_SEC,
 130         PCM_I2S_SEL_TERT,
 131         PCM_I2S_SEL_QUAT,
 132         PCM_I2S_SEL_MAX,
 133 };
 134
 135 struct mi2s_aux_pcm_common_conf {
 136         struct mutex lock;
 137         void *pcm_i2s_sel_vt_addr;
 138 };
 139
 140 struct mi2s_conf {
 141         struct mutex lock;
 142         u32 ref_cnt;
 143         u32 msm_is_mi2s_master;
 144 };
 145
 146 struct auxpcm_conf {
 147         struct mutex lock;
 148         u32 ref_cnt;
 149 };
 150
 151 struct dev_config {
 152         u32 sample_rate;
 153         u32 bit_format;
 154         u32 channels;
 155 };
 156
 157 enum {
 158         HDMI_RX_IDX = 0,
 159         DP_RX_IDX,
 160         EXT_DISP_RX_IDX_MAX,
 161 };
 162
 163 struct msm_wsa881x_dev_info {
 164         struct device_node *of_node;
 165         u32 index;
 166 };
 167
 168 enum pinctrl_pin_state {
 169         STATE_DISABLE = 0, /* All pins are in sleep state */
 170         STATE_MI2S_ACTIVE,  /* IS2 = active, TDM = sleep */
 171         STATE_TDM_ACTIVE,  /* IS2 = sleep, TDM = active */
 172 };
 173
 174 struct msm_pinctrl_info {
 175         struct pinctrl *pinctrl;
 176         struct pinctrl_state *mi2s_disable;
 177         struct pinctrl_state *tdm_disable;
 178         struct pinctrl_state *mi2s_active;
 179         struct pinctrl_state *tdm_active;
 180         enum pinctrl_pin_state curr_state;
 181 };
 182
 183 struct msm_asoc_mach_data {
 184         u32 mclk_freq;
 185         int us_euro_gpio; /* used by gpio driver API */
 186         struct device_node *us_euro_gpio_p; /* used by pinctrl API */
 187         struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
 188         struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
 189         struct snd_info_entry *codec_root;
 190         struct msm_pinctrl_info pinctrl_info;
 191 #ifdef CONFIG_MACH_XIAOMI_MSM8998
 192         struct device_node *spk_id_gpio_p;
 193         struct device_node *rcv_id_gpio_p;
 194         struct regulator *us_p_power;
 195         struct regulator *us_n_power;
 196 #endif
 197 };
 198
 199 struct msm_asoc_wcd93xx_codec {
 200         void* (*get_afe_config_fn)(struct snd_soc_codec *codec,
 201                                    enum afe_config_type config_type);
 202         void (*mbhc_hs_detect_exit)(struct snd_soc_codec *codec);
 203 };
 204
 205 static const char *const pin_states[] = {"sleep", "i2s-active",
 206                                          "tdm-active"};
 207
 208 enum {
 209         TDM_0 = 0,
 210         TDM_1,
 211         TDM_2,
 212         TDM_3,
 213         TDM_4,
 214         TDM_5,
 215         TDM_6,
 216         TDM_7,
 217         TDM_PORT_MAX,
 218 };
 219
 220 enum {
 221         TDM_PRI = 0,
 222         TDM_SEC,
 223         TDM_TERT,
 224         TDM_QUAT,
 225         TDM_INTERFACE_MAX,
 226 };
 227
 228 struct tdm_port {
 229         u32 mode;
 230         u32 channel;
 231 };
 232
 233 /* TDM default config */
 234 static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
 235         { /* PRI TDM */
 236                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
 237                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
 238                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
 239                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
 240                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
 241                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
 242                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
 243                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
 244         },
 245         { /* SEC TDM */
 246                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
 247                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
 248                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
 249                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
 250                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
 251                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
 252                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
 253                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
 254         },
 255         { /* TERT TDM */
 256                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
 257                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
 258                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
 259                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
 260                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
 261                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
 262                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
 263                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
 264         },
 265         { /* QUAT TDM */
 266                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
 267                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
 268                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
 269                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
 270                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
 271                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
 272                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
 273                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
 274         }
 275 };
 276
 277 /* TDM default config */
 278 static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
 279         { /* PRI TDM */
 280                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
 281                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
 282                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
 283                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
 284                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
 285                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
 286                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
 287                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
 288         },
 289         { /* SEC TDM */
 290                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
 291                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
 292                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
 293                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
 294                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
 295                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
 296                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
 297                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
 298         },
 299         { /* TERT TDM */
 300                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
 301                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
 302                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
 303                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
 304                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
 305                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
 306                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
 307                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
 308         },
 309         { /* QUAT TDM */
 310                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
 311                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
 312                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
 313                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
 314                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
 315                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
 316                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
 317                 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
 318         }
 319 };
 320
 321 /*TDM default offset currently only supporting TDM_RX_0 and TDM_TX_0 */
 322 static unsigned int tdm_slot_offset[TDM_PORT_MAX][TDM_SLOT_OFFSET_MAX] = {
 323         {0, 4, 8, 12, 16, 20, 24, 28},/* TX_0 | RX_0 */
 324         {AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_1 | RX_1 */
 325         {AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_2 | RX_2 */
 326         {AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_3 | RX_3 */
 327         {AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_4 | RX_4 */
 328         {AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_5 | RX_5 */
 329         {AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_6 | RX_6 */
 330         {AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_7 | RX_7 */
 331 };
 332
 333 /* Default configuration of slimbus channels */
 334 static struct dev_config slim_rx_cfg[] = {
 335         [SLIM_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
 336 #ifdef CONFIG_MACH_XIAOMI_MSM8998
 337         [SLIM_RX_1] = {SAMPLING_RATE_96KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
 338 #else
 339         [SLIM_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
 340 #endif
 341         [SLIM_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
 342         [SLIM_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
 343         [SLIM_RX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
 344         [SLIM_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
 345         [SLIM_RX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
 346         [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
 347 };
 348
 349 static struct dev_config slim_tx_cfg[] = {
 350         [SLIM_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
 351 #ifdef CONFIG_MACH_XIAOMI_MSM8998
 352         [SLIM_TX_1] = {SAMPLING_RATE_96KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
 353 #else
 354         [SLIM_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
 355 #endif
 356         [SLIM_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
 357         [SLIM_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
 358         [SLIM_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
 359         [SLIM_TX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
 360         [SLIM_TX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
 361         [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
 362         [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
 363 };
 364
 365
 366 /* Default configuration of external display BE */
 367 static struct dev_config ext_disp_rx_cfg[] = {
 368         [HDMI_RX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
 369         [DP_RX_IDX] =   {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
 370 };
 371
 372 static struct dev_config usb_rx_cfg = {
 373         .sample_rate = SAMPLING_RATE_48KHZ,
 374         .bit_format = SNDRV_PCM_FORMAT_S16_LE,
 375         .channels = 2,
 376 };
 377
 378 static struct dev_config usb_tx_cfg = {
 379         .sample_rate = SAMPLING_RATE_48KHZ,
 380         .bit_format = SNDRV_PCM_FORMAT_S16_LE,
 381         .channels = 1,
 382 };
 383
 384 static struct dev_config proxy_rx_cfg = {
 385         .sample_rate = SAMPLING_RATE_48KHZ,
 386         .bit_format = SNDRV_PCM_FORMAT_S16_LE,
 387         .channels = 2,
 388 };
 389
 390 /* Default configuration of MI2S channels */
 391 static struct dev_config mi2s_rx_cfg[] = {
 392         [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
 393         [SEC_MI2S]  = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
 394         [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
 395         [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
 396 };
 397
 398 static struct dev_config mi2s_tx_cfg[] = {
 399         [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
 400         [SEC_MI2S]  = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
 401         [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
 402         [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
 403 };
 404
 405 static struct dev_config aux_pcm_rx_cfg[] = {
 406         [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
 407         [SEC_AUX_PCM]  = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
 408         [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
 409         [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
 410 };
 411
 412 static struct dev_config aux_pcm_tx_cfg[] = {
 413         [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
 414         [SEC_AUX_PCM]  = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
 415         [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
 416         [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
 417 };
 418
 419 /* TDM default slot config */
 420 struct tdm_slot_cfg {
 421         u32 width;
 422         u32 num;
 423 };
 424
 425 static struct tdm_slot_cfg tdm_slot[TDM_INTERFACE_MAX] = {
 426         /* PRI TDM */
 427         {32, 8},
 428         /* SEC TDM */
 429         {32, 8},
 430         /* TERT TDM */
 431         {32, 8},
 432         /* QUAT TDM */
 433         {32, 8}
 434 };
 435
 436 static unsigned int tdm_rx_slot_offset
 437         [TDM_INTERFACE_MAX][TDM_PORT_MAX][TDM_SLOT_OFFSET_MAX] = {
 438         {/* PRI TDM */
 439                 {0, 4, 8, 12, 16, 20, 24, 28,
 440                         32, 36, 40, 44, 48, 52, 56, 60, 0xFFFF},
 441                 {0xFFFF}, /* not used */
 442                 {0xFFFF}, /* not used */
 443                 {0xFFFF}, /* not used */
 444                 {0xFFFF}, /* not used */
 445                 {0xFFFF}, /* not used */
 446                 {0xFFFF}, /* not used */
 447                 {0xFFFF}, /* not used */
 448         },
 449         {/* SEC TDM */
 450                 {0, 4, 8, 12, 16, 20, 24, 28,
 451                         32, 36, 40, 44, 48, 52, 56, 60, 0xFFFF},
 452                 {0xFFFF}, /* not used */
 453                 {0xFFFF}, /* not used */
 454                 {0xFFFF}, /* not used */
 455                 {0xFFFF}, /* not used */
 456                 {0xFFFF}, /* not used */
 457                 {0xFFFF}, /* not used */
 458                 {0xFFFF}, /* not used */
 459         },
 460         {/* TERT TDM */
 461                 {0, 4, 8, 12, 16, 20, 24, 28,
 462                         32, 36, 40, 44, 48, 52, 56, 60, 0xFFFF},
 463                 {0xFFFF}, /* not used */
 464                 {0xFFFF}, /* not used */
 465                 {0xFFFF}, /* not used */
 466                 {0xFFFF}, /* not used */
 467                 {0xFFFF}, /* not used */
 468                 {0xFFFF}, /* not used */
 469                 {0xFFFF}, /* not used */
 470         },
 471         {/* QUAT TDM */
 472                 {0, 4, 8, 12, 16, 20, 24, 28,
 473                         32, 36, 40, 44, 48, 52, 56, 60, 0xFFFF},
 474                 {0xFFFF}, /* not used */
 475                 {0xFFFF}, /* not used */
 476                 {0xFFFF}, /* not used */
 477                 {0xFFFF}, /* not used */
 478                 {0xFFFF}, /* not used */
 479                 {0xFFFF}, /* not used */
 480         }
 481 };
 482
 483 static unsigned int tdm_tx_slot_offset
 484         [TDM_INTERFACE_MAX][TDM_PORT_MAX][TDM_SLOT_OFFSET_MAX] = {
 485         {/* PRI TDM */
 486                 {0, 4, 8, 12, 16, 20, 24, 28,
 487                         32, 36, 40, 44, 48, 52, 56, 60, 0xFFFF},
 488                 {0xFFFF}, /* not used */
 489                 {0xFFFF}, /* not used */
 490                 {0xFFFF}, /* not used */
 491                 {0xFFFF}, /* not used */
 492                 {0xFFFF}, /* not used */
 493                 {0xFFFF}, /* not used */
 494                 {0xFFFF}, /* not used */
 495         },
 496         {/* SEC TDM */
 497                 {0, 4, 8, 12, 16, 20, 24, 28,
 498                         32, 36, 40, 44, 48, 52, 56, 60, 0xFFFF},
 499                 {0xFFFF}, /* not used */
 500                 {0xFFFF}, /* not used */
 501                 {0xFFFF}, /* not used */
 502                 {0xFFFF}, /* not used */
 503                 {0xFFFF}, /* not used */
 504                 {0xFFFF}, /* not used */
 505                 {0xFFFF}, /* not used */
 506         },
 507         {/* TERT TDM */
 508                 {0, 4, 8, 12, 16, 20, 24, 28,
 509                         32, 36, 40, 44, 48, 52, 56, 60, 0xFFFF},
 510                 {0xFFFF}, /* not used */
 511                 {0xFFFF}, /* not used */
 512                 {0xFFFF}, /* not used */
 513                 {0xFFFF}, /* not used */
 514                 {0xFFFF}, /* not used */
 515                 {0xFFFF}, /* not used */
 516                 {0xFFFF}, /* not used */
 517         },
 518         {/* QUAT TDM */
 519                 {0, 4, 8, 12, 16, 20, 24, 28,
 520                         32, 36, 40, 44, 48, 52, 56, 60, 0xFFFF},/*MIC ARR*/
 521                 {0xFFFF}, /* not used */
 522                 {0xFFFF}, /* not used */
 523                 {0xFFFF}, /* not used */
 524                 {0xFFFF}, /* not used */
 525                 {0xFFFF}, /* not used */
 526                 {0xFFFF}, /* not used */
 527                 {0xFFFF}, /* not used */
 528         }
 529 };
 530 static int msm_vi_feed_tx_ch = 2;
 531 static const char *const slim_rx_ch_text[] = {"One", "Two", "Three", "Four",
 532                                                 "Five", "Six", "Seven",
 533                                                 "Eight"};
 534 static const char *const slim_tx_ch_text[] = {"One", "Two", "Three", "Four",
 535                                                 "Five", "Six", "Seven",
 536                                                 "Eight"};
 537 static const char *const vi_feed_ch_text[] = {"One", "Two"};
 538 static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
 539                                           "S32_LE"};
 540 static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE"};
 541 static char const *slim_sample_rate_text[] = {"KHZ_8", "KHZ_16",
 542                                         "KHZ_32", "KHZ_44P1", "KHZ_48",
 543                                         "KHZ_88P2", "KHZ_96", "KHZ_176P4",
 544                                         "KHZ_192", "KHZ_352P8", "KHZ_384"};
 545 static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_48"};
 546 static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16", "KHZ_48"};
 547 static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16", "KHZ_48"};
 548 static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
 549                                            "Five", "Six", "Seven",
 550                                            "Eight"};
 551 static char const *ch_text[] = {"Two", "Three", "Four", "Five",
 552                                         "Six", "Seven", "Eight"};
 553 static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
 554                                         "KHZ_16", "KHZ_22P05",
 555                                         "KHZ_32", "KHZ_44P1", "KHZ_48",
 556                                         "KHZ_88P2", "KHZ_96", "KHZ_176P4",
 557                                         "KHZ_192", "KHZ_352P8", "KHZ_384"};
 558 static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
 559                                         "KHZ_192", "KHZ_32", "KHZ_44P1",
 560                                         "KHZ_88P2", "KHZ_176P4"};
 561 static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
 562                                         "Five", "Six", "Seven", "Eight",
 563                                         "Nine", "Ten", "Eleven", "Twelve",
 564                                         "Thirteen", "Fourteen", "Fifteen",
 565                                         "Sixteen"};
 566 static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
 567 static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
 568                                              "KHZ_44P1", "KHZ_48", "KHZ_96",
 569                                              "KHZ_192", "KHZ_352P8", "KHZ_384"};
 570 static const char *const tdm_slot_num_text[] = {"One", "Two", "Four",
 571         "Eight", "Sixteen", "ThirtyTwo"};
 572 static const char *const tdm_slot_width_text[] = {"16", "24", "32"};
 573 static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
 574 static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_16",
 575                                       "KHZ_32", "KHZ_44P1", "KHZ_48",
 576                                       "KHZ_88P2", "KHZ_96", "KHZ_176P4",
 577                                       "KHZ_192"};
 578 static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
 579                                            "Five", "Six", "Seven",
 580                                            "Eight"};
 581 static const char *const hifi_text[] = {"Off", "On"};
 582
 583 #ifdef CONFIG_MACH_XIAOMI_MSM8998
 584 static const char *const ras_switch_text[] = {"None", "Speaker", "Receiver"};
 585 static const char *const vendor_id_text[] = {"None", "AAC", "Goer", "SSI", "Unknown"};
 586 static const char *const ultrasound_power_text[] = {"Off", "On"};
 587 #endif
 588
 589 static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_chs, slim_rx_ch_text);
 590 static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_chs, slim_rx_ch_text);
 591 static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_chs, slim_tx_ch_text);
 592 static SOC_ENUM_SINGLE_EXT_DECL(slim_1_tx_chs, slim_tx_ch_text);
 593 static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_chs, slim_rx_ch_text);
 594 static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_chs, slim_rx_ch_text);
 595 static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
 596 static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
 597 static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
 598 static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
 599 static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
 600 static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_format, bit_format_text);
 601 static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_format, bit_format_text);
 602 static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_format, bit_format_text);
 603 static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_format, bit_format_text);
 604 static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
 605 static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
 606 static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
 607 static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_sample_rate, slim_sample_rate_text);
 608 static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_sample_rate, slim_sample_rate_text);
 609 static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_sample_rate, slim_sample_rate_text);
 610 static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_sample_rate, slim_sample_rate_text);
 611 static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_sample_rate, slim_sample_rate_text);
 612 static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
 613 static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
 614 static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
 615 static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
 616 static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
 617 static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
 618                                 ext_disp_sample_rate_text);
 619 static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
 620 static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
 621 static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
 622 static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
 623 static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
 624 static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
 625 static SOC_ENUM_SINGLE_EXT_DECL(tdm_slot_num, tdm_slot_num_text);
 626 static SOC_ENUM_SINGLE_EXT_DECL(tdm_slot_width, tdm_slot_width_text);
 627 static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
 628 static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
 629 static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
 630 static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
 631 static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
 632 static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
 633 static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
 634 static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
 635 static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
 636 static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
 637 static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
 638 static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
 639 static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
 640 static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
 641 static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
 642 static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
 643 static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
 644 static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
 645 static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
 646 static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
 647 static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
 648 static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
 649 static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
 650 static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
 651 static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
 652 static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
 653 static SOC_ENUM_SINGLE_EXT_DECL(hifi_function, hifi_text);
 654
 655 #ifdef CONFIG_MACH_XIAOMI_MSM8998
 656 static SOC_ENUM_SINGLE_EXT_DECL(ras_switch, ras_switch_text);
 657 static SOC_ENUM_SINGLE_EXT_DECL(vendor_id, vendor_id_text);
 658 static SOC_ENUM_SINGLE_EXT_DECL(ultrasound_power, ultrasound_power_text);
 659 #endif
 660
 661 static struct platform_device *spdev;
 662 static int msm_hifi_control;
 663
 664 static bool is_initial_boot;
 665 static bool codec_reg_done;
 666 static struct snd_soc_aux_dev *msm_aux_dev;
 667 static struct snd_soc_codec_conf *msm_codec_conf;
 668 static struct msm_asoc_wcd93xx_codec msm_codec_fn;
 669
 670 #ifdef CONFIG_MACH_XIAOMI_MSM8998
 671 static int ras_switch_en_gpio = -1;
 672 static int ras_switch_sel_gpio = -1;
 673 static int ultrasound_power_state;
 674 #endif
 675
 676 static void *def_tasha_mbhc_cal(void);
 677 static void *def_tavil_mbhc_cal(void);
 678 static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
 679                                         int enable, bool dapm);
 680 static int msm_wsa881x_init(struct snd_soc_component *component);
 681
 682 /*
 683  * Need to report LINEIN
 684  * if R/L channel impedance is larger than 5K ohm
 685  */
 686 static struct wcd_mbhc_config wcd_mbhc_cfg = {
 687         .read_fw_bin = false,
 688         .calibration = NULL,
 689         .detect_extn_cable = true,
 690         .mono_stero_detection = false,
 691         .swap_gnd_mic = NULL,
 692         .hs_ext_micbias = true,
 693         .key_code[0] = KEY_MEDIA,
 694 #ifdef CONFIG_MACH_XIAOMI_MSM8998
 695         .key_code[1] = KEY_VOLUMEUP,
 696         .key_code[2] = KEY_VOLUMEDOWN,
 697         .key_code[3] = 0,
 698 #else
 699         .key_code[1] = KEY_VOICECOMMAND,
 700         .key_code[2] = KEY_VOLUMEUP,
 701         .key_code[3] = KEY_VOLUMEDOWN,
 702 #endif
 703         .key_code[4] = 0,
 704         .key_code[5] = 0,
 705         .key_code[6] = 0,
 706         .key_code[7] = 0,
 707         .linein_th = 5000,
 708 #ifdef CONFIG_MACH_XIAOMI_MSM8998
 709         .moisture_en = false,
 710 #else
 711         .moisture_en = true,
 712 #endif
 713         .mbhc_micbias = MIC_BIAS_2,
 714         .anc_micbias = MIC_BIAS_2,
 715         .enable_anc_mic_detect = false,
 716 };
 717
 718 static struct snd_soc_dapm_route wcd_audio_paths_tasha[] = {
 719         {"MIC BIAS1", NULL, "MCLK TX"},
 720         {"MIC BIAS2", NULL, "MCLK TX"},
 721         {"MIC BIAS3", NULL, "MCLK TX"},
 722         {"MIC BIAS4", NULL, "MCLK TX"},
 723 };
 724
 725 static struct snd_soc_dapm_route wcd_audio_paths[] = {
 726         {"MIC BIAS1", NULL, "MCLK"},
 727         {"MIC BIAS2", NULL, "MCLK"},
 728         {"MIC BIAS3", NULL, "MCLK"},
 729         {"MIC BIAS4", NULL, "MCLK"},
 730 };
 731
 732 static u32 mi2s_ebit_clk[MI2S_MAX] = {
 733         Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
 734         Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
 735         Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
 736         Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT,
 737 };
 738
 739 static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
 740         {
 741                 AFE_API_VERSION_I2S_CONFIG,
 742                 Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
 743                 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
 744                 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
 745                 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
 746                 0,
 747         },
 748         {
 749                 AFE_API_VERSION_I2S_CONFIG,
 750                 Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
 751                 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
 752                 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
 753                 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
 754                 0,
 755         },
 756         {
 757                 AFE_API_VERSION_I2S_CONFIG,
 758                 Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
 759                 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
 760                 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
 761                 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
 762                 0,
 763         },
 764         {
 765                 AFE_API_VERSION_I2S_CONFIG,
 766                 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
 767                 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
 768                 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
 769                 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
 770                 0,
 771         }
 772 };
 773
 774 static struct mi2s_aux_pcm_common_conf mi2s_auxpcm_conf[PCM_I2S_SEL_MAX];
 775 static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
 776 static struct auxpcm_conf auxpcm_intf_conf[AUX_PCM_MAX];
 777
 778 static int slim_get_sample_rate_val(int sample_rate)
 779 {
 780         int sample_rate_val = 0;
 781
 782         switch (sample_rate) {
 783         case SAMPLING_RATE_8KHZ:
 784                 sample_rate_val = 0;
 785                 break;
 786         case SAMPLING_RATE_16KHZ:
 787                 sample_rate_val = 1;
 788                 break;
 789         case SAMPLING_RATE_32KHZ:
 790                 sample_rate_val = 2;
 791                 break;
 792         case SAMPLING_RATE_44P1KHZ:
 793                 sample_rate_val = 3;
 794                 break;
 795         case SAMPLING_RATE_48KHZ:
 796                 sample_rate_val = 4;
 797                 break;
 798         case SAMPLING_RATE_88P2KHZ:
 799                 sample_rate_val = 5;
 800                 break;
 801         case SAMPLING_RATE_96KHZ:
 802                 sample_rate_val = 6;
 803                 break;
 804         case SAMPLING_RATE_176P4KHZ:
 805                 sample_rate_val = 7;
 806                 break;
 807         case SAMPLING_RATE_192KHZ:
 808                 sample_rate_val = 8;
 809                 break;
 810         case SAMPLING_RATE_352P8KHZ:
 811                 sample_rate_val = 9;
 812                 break;
 813         case SAMPLING_RATE_384KHZ:
 814                 sample_rate_val = 10;
 815                 break;
 816         default:
 817                 sample_rate_val = 4;
 818                 break;
 819         }
 820         return sample_rate_val;
 821 }
 822
 823 static int slim_get_sample_rate(int value)
 824 {
 825         int sample_rate = 0;
 826
 827         switch (value) {
 828         case 0:
 829                 sample_rate = SAMPLING_RATE_8KHZ;
 830                 break;
 831         case 1:
 832                 sample_rate = SAMPLING_RATE_16KHZ;
 833                 break;
 834         case 2:
 835                 sample_rate = SAMPLING_RATE_32KHZ;
 836                 break;
 837         case 3:
 838                 sample_rate = SAMPLING_RATE_44P1KHZ;
 839                 break;
 840         case 4:
 841                 sample_rate = SAMPLING_RATE_48KHZ;
 842                 break;
 843         case 5:
 844                 sample_rate = SAMPLING_RATE_88P2KHZ;
 845                 break;
 846         case 6:
 847                 sample_rate = SAMPLING_RATE_96KHZ;
 848                 break;
 849         case 7:
 850                 sample_rate = SAMPLING_RATE_176P4KHZ;
 851                 break;
 852         case 8:
 853                 sample_rate = SAMPLING_RATE_192KHZ;
 854                 break;
 855         case 9:
 856                 sample_rate = SAMPLING_RATE_352P8KHZ;
 857                 break;
 858         case 10:
 859                 sample_rate = SAMPLING_RATE_384KHZ;
 860                 break;
 861         default:
 862                 sample_rate = SAMPLING_RATE_48KHZ;
 863                 break;
 864         }
 865         return sample_rate;
 866 }
 867
 868 static int slim_get_bit_format_val(int bit_format)
 869 {
 870         int val = 0;
 871
 872         switch (bit_format) {
 873         case SNDRV_PCM_FORMAT_S32_LE:
 874                 val = 3;
 875                 break;
 876         case SNDRV_PCM_FORMAT_S24_3LE:
 877                 val = 2;
 878                 break;
 879         case SNDRV_PCM_FORMAT_S24_LE:
 880                 val = 1;
 881                 break;
 882         case SNDRV_PCM_FORMAT_S16_LE:
 883         default:
 884                 val = 0;
 885                 break;
 886         }
 887         return val;
 888 }
 889
 890 static int slim_get_bit_format(int val)
 891 {
 892         int bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
 893
 894         switch (val) {
 895         case 0:
 896                 bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
 897                 break;
 898         case 1:
 899                 bit_fmt = SNDRV_PCM_FORMAT_S24_LE;
 900                 break;
 901         case 2:
 902                 bit_fmt = SNDRV_PCM_FORMAT_S24_3LE;
 903                 break;
 904         case 3:
 905                 bit_fmt = SNDRV_PCM_FORMAT_S32_LE;
 906                 break;
 907         default:
 908                 bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
 909                 break;
 910         }
 911         return bit_fmt;
 912 }
 913
 914 static int slim_get_port_idx(struct snd_kcontrol *kcontrol)
 915 {
 916         int port_id = 0;
 917
 918         if (strnstr(kcontrol->id.name, "SLIM_0_RX", sizeof("SLIM_0_RX")))
 919                 port_id = SLIM_RX_0;
 920         else if (strnstr(kcontrol->id.name, "SLIM_2_RX", sizeof("SLIM_2_RX")))
 921                 port_id = SLIM_RX_2;
 922         else if (strnstr(kcontrol->id.name, "SLIM_5_RX", sizeof("SLIM_5_RX")))
 923                 port_id = SLIM_RX_5;
 924         else if (strnstr(kcontrol->id.name, "SLIM_6_RX", sizeof("SLIM_6_RX")))
 925                 port_id = SLIM_RX_6;
 926         else if (strnstr(kcontrol->id.name, "SLIM_0_TX", sizeof("SLIM_0_TX")))
 927                 port_id = SLIM_TX_0;
 928         else if (strnstr(kcontrol->id.name, "SLIM_1_TX", sizeof("SLIM_1_TX")))
 929                 port_id = SLIM_TX_1;
 930         else {
 931                 pr_err("%s: unsupported channel: %s",
 932                         __func__, kcontrol->id.name);
 933                 return -EINVAL;
 934         }
 935
 936         return port_id;
 937 }
 938
 939 static int slim_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
 940                                    struct snd_ctl_elem_value *ucontrol)
 941 {
 942         int ch_num = slim_get_port_idx(kcontrol);
 943
 944         if (ch_num < 0)
 945                 return ch_num;
 946
 947         ucontrol->value.enumerated.item[0] =
 948                 slim_get_sample_rate_val(slim_rx_cfg[ch_num].sample_rate);
 949
 950         pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
 951                  ch_num, slim_rx_cfg[ch_num].sample_rate,
 952                  ucontrol->value.enumerated.item[0]);
 953
 954         return 0;
 955 }
 956
 957 static int slim_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
 958                                    struct snd_ctl_elem_value *ucontrol)
 959 {
 960         int ch_num = slim_get_port_idx(kcontrol);
 961
 962         if (ch_num < 0)
 963                 return ch_num;
 964
 965         slim_rx_cfg[ch_num].sample_rate =
 966                 slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
 967
 968         pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
 969                  ch_num, slim_rx_cfg[ch_num].sample_rate,
 970                  ucontrol->value.enumerated.item[0]);
 971
 972         return 0;
 973 }
 974
 975 static int slim_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
 976                                    struct snd_ctl_elem_value *ucontrol)
 977 {
 978         int ch_num = slim_get_port_idx(kcontrol);
 979
 980         if (ch_num < 0)
 981                 return ch_num;
 982
 983         ucontrol->value.enumerated.item[0] =
 984                 slim_get_sample_rate_val(slim_tx_cfg[ch_num].sample_rate);
 985
 986         pr_debug("%s: slim[%d]_tx_sample_rate = %d, item = %d\n", __func__,
 987                  ch_num, slim_tx_cfg[ch_num].sample_rate,
 988                  ucontrol->value.enumerated.item[0]);
 989
 990         return 0;
 991 }
 992
 993 static int slim_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
 994                                    struct snd_ctl_elem_value *ucontrol)
 995 {
 996         int sample_rate = 0;
 997         int ch_num = slim_get_port_idx(kcontrol);
 998
 999         if (ch_num < 0)
1000                 return ch_num;
1001
1002         sample_rate = slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
1003         if (sample_rate == SAMPLING_RATE_44P1KHZ) {
1004                 pr_err("%s: Unsupported sample rate %d: for Tx path\n",
1005                         __func__, sample_rate);
1006                 return -EINVAL;
1007         }
1008         slim_tx_cfg[ch_num].sample_rate = sample_rate;
1009
1010         pr_debug("%s: slim[%d]_tx_sample_rate = %d, value = %d\n", __func__,
1011                  ch_num, slim_tx_cfg[ch_num].sample_rate,
1012                  ucontrol->value.enumerated.item[0]);
1013
1014         return 0;
1015 }
1016
1017 static int slim_rx_bit_format_get(struct snd_kcontrol *kcontrol,
1018                                   struct snd_ctl_elem_value *ucontrol)
1019 {
1020         int ch_num = slim_get_port_idx(kcontrol);
1021
1022         if (ch_num < 0)
1023                 return ch_num;
1024
1025         ucontrol->value.enumerated.item[0] =
1026                         slim_get_bit_format_val(slim_rx_cfg[ch_num].bit_format);
1027
1028         pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
1029                  __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
1030                         ucontrol->value.enumerated.item[0]);
1031
1032         return 0;
1033 }
1034
1035 static int slim_rx_bit_format_put(struct snd_kcontrol *kcontrol,
1036                                   struct snd_ctl_elem_value *ucontrol)
1037 {
1038         int ch_num = slim_get_port_idx(kcontrol);
1039
1040         if (ch_num < 0)
1041                 return ch_num;
1042
1043         slim_rx_cfg[ch_num].bit_format =
1044                 slim_get_bit_format(ucontrol->value.enumerated.item[0]);
1045
1046         pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
1047                  __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
1048                         ucontrol->value.enumerated.item[0]);
1049
1050         return 0;
1051 }
1052
1053 static int slim_tx_bit_format_get(struct snd_kcontrol *kcontrol,
1054                                   struct snd_ctl_elem_value *ucontrol)
1055 {
1056         int ch_num = slim_get_port_idx(kcontrol);
1057
1058         if (ch_num < 0)
1059                 return ch_num;
1060
1061         ucontrol->value.enumerated.item[0] =
1062                         slim_get_bit_format_val(slim_tx_cfg[ch_num].bit_format);
1063
1064         pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
1065                  __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
1066                         ucontrol->value.enumerated.item[0]);
1067
1068         return 0;
1069 }
1070
1071 static int slim_tx_bit_format_put(struct snd_kcontrol *kcontrol,
1072                                   struct snd_ctl_elem_value *ucontrol)
1073 {
1074         int ch_num = slim_get_port_idx(kcontrol);
1075
1076         if (ch_num < 0)
1077                 return ch_num;
1078
1079         slim_tx_cfg[ch_num].bit_format =
1080                 slim_get_bit_format(ucontrol->value.enumerated.item[0]);
1081
1082         pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
1083                  __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
1084                         ucontrol->value.enumerated.item[0]);
1085
1086         return 0;
1087 }
1088
1089 static int msm_slim_rx_ch_get(struct snd_kcontrol *kcontrol,
1090                               struct snd_ctl_elem_value *ucontrol)
1091 {
1092         int ch_num = slim_get_port_idx(kcontrol);
1093
1094         if (ch_num < 0)
1095                 return ch_num;
1096
1097         pr_debug("%s: msm_slim_[%d]_rx_ch  = %d\n", __func__,
1098                  ch_num, slim_rx_cfg[ch_num].channels);
1099         ucontrol->value.enumerated.item[0] = slim_rx_cfg[ch_num].channels - 1;
1100
1101         return 0;
1102 }
1103
1104 static int msm_slim_rx_ch_put(struct snd_kcontrol *kcontrol,
1105                               struct snd_ctl_elem_value *ucontrol)
1106 {
1107         int ch_num = slim_get_port_idx(kcontrol);
1108
1109         if (ch_num < 0)
1110                 return ch_num;
1111
1112         slim_rx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
1113         pr_debug("%s: msm_slim_[%d]_rx_ch  = %d\n", __func__,
1114                  ch_num, slim_rx_cfg[ch_num].channels);
1115
1116         return 1;
1117 }
1118
1119 static int msm_slim_tx_ch_get(struct snd_kcontrol *kcontrol,
1120                               struct snd_ctl_elem_value *ucontrol)
1121 {
1122         int ch_num = slim_get_port_idx(kcontrol);
1123
1124         if (ch_num < 0)
1125                 return ch_num;
1126
1127         pr_debug("%s: msm_slim_[%d]_tx_ch  = %d\n", __func__,
1128                  ch_num, slim_tx_cfg[ch_num].channels);
1129         ucontrol->value.enumerated.item[0] = slim_tx_cfg[ch_num].channels - 1;
1130
1131         return 0;
1132 }
1133
1134 static int msm_slim_tx_ch_put(struct snd_kcontrol *kcontrol,
1135                               struct snd_ctl_elem_value *ucontrol)
1136 {
1137         int ch_num = slim_get_port_idx(kcontrol);
1138
1139         if (ch_num < 0)
1140                 return ch_num;
1141
1142         slim_tx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
1143         pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
1144                  ch_num, slim_tx_cfg[ch_num].channels);
1145
1146         return 1;
1147 }
1148
1149 static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
1150                                  struct snd_ctl_elem_value *ucontrol)
1151 {
1152         ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
1153         pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
1154                  ucontrol->value.integer.value[0]);
1155         return 0;
1156 }
1157
1158 static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
1159                                  struct snd_ctl_elem_value *ucontrol)
1160 {
1161         msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
1162
1163         pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
1164         return 1;
1165 }
1166
1167 static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
1168                                   struct snd_ctl_elem_value *ucontrol)
1169 {
1170         /*
1171          * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
1172          * when used for BT_SCO use case. Return either Rx or Tx sample rate
1173          * value.
1174          */
1175         switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
1176         case SAMPLING_RATE_48KHZ:
1177                 ucontrol->value.integer.value[0] = 2;
1178                 break;
1179         case SAMPLING_RATE_16KHZ:
1180                 ucontrol->value.integer.value[0] = 1;
1181                 break;
1182         case SAMPLING_RATE_8KHZ:
1183         default:
1184                 ucontrol->value.integer.value[0] = 0;
1185                 break;
1186         }
1187         pr_debug("%s: sample rate = %d", __func__,
1188                  slim_rx_cfg[SLIM_RX_7].sample_rate);
1189
1190         return 0;
1191 }
1192
1193 static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
1194                                   struct snd_ctl_elem_value *ucontrol)
1195 {
1196         switch (ucontrol->value.integer.value[0]) {
1197         case 1:
1198                 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
1199                 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
1200                 break;
1201         case 2:
1202                 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
1203                 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
1204                 break;
1205         case 0:
1206         default:
1207                 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
1208                 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
1209                 break;
1210         }
1211         pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
1212                  __func__,
1213                  slim_rx_cfg[SLIM_RX_7].sample_rate,
1214                  slim_tx_cfg[SLIM_TX_7].sample_rate,
1215                  ucontrol->value.enumerated.item[0]);
1216
1217         return 0;
1218 }
1219
1220 static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
1221                                         struct snd_ctl_elem_value *ucontrol)
1222 {
1223         switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
1224         case SAMPLING_RATE_48KHZ:
1225                 ucontrol->value.integer.value[0] = 2;
1226                 break;
1227         case SAMPLING_RATE_16KHZ:
1228                 ucontrol->value.integer.value[0] = 1;
1229                 break;
1230         case SAMPLING_RATE_8KHZ:
1231         default:
1232                 ucontrol->value.integer.value[0] = 0;
1233                 break;
1234         }
1235         pr_debug("%s: sample rate = %d", __func__,
1236                 slim_rx_cfg[SLIM_RX_7].sample_rate);
1237
1238         return 0;
1239 }
1240
1241 static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
1242                                         struct snd_ctl_elem_value *ucontrol)
1243 {
1244         switch (ucontrol->value.integer.value[0]) {
1245         case 1:
1246                 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
1247                 break;
1248         case 2:
1249                 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
1250                 break;
1251         case 0:
1252         default:
1253                 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
1254                 break;
1255         }
1256         pr_debug("%s: sample rates: slim7_rx = %d, value = %d\n",
1257                  __func__,
1258                 slim_rx_cfg[SLIM_RX_7].sample_rate,
1259                 ucontrol->value.enumerated.item[0]);
1260
1261         return 0;
1262 }
1263
1264 static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
1265                                         struct snd_ctl_elem_value *ucontrol)
1266 {
1267         switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
1268         case SAMPLING_RATE_48KHZ:
1269                 ucontrol->value.integer.value[0] = 2;
1270                 break;
1271         case SAMPLING_RATE_16KHZ:
1272                 ucontrol->value.integer.value[0] = 1;
1273                 break;
1274         case SAMPLING_RATE_8KHZ:
1275         default:
1276                 ucontrol->value.integer.value[0] = 0;
1277                 break;
1278         }
1279         pr_debug("%s: sample rate = %d", __func__,
1280                 slim_tx_cfg[SLIM_TX_7].sample_rate);
1281
1282         return 0;
1283 }
1284
1285 static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
1286                                         struct snd_ctl_elem_value *ucontrol)
1287 {
1288         switch (ucontrol->value.integer.value[0]) {
1289         case 1:
1290                 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
1291                 break;
1292         case 2:
1293                 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
1294                 break;
1295         case 0:
1296         default:
1297                 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
1298                 break;
1299         }
1300         pr_debug("%s: sample rates: slim7_tx = %d, value = %d\n",
1301                  __func__,
1302                 slim_tx_cfg[SLIM_TX_7].sample_rate,
1303                 ucontrol->value.enumerated.item[0]);
1304
1305         return 0;
1306 }
1307
1308 static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
1309                                struct snd_ctl_elem_value *ucontrol)
1310 {
1311         pr_debug("%s: usb_audio_rx_ch  = %d\n", __func__,
1312                  usb_rx_cfg.channels);
1313         ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
1314         return 0;
1315 }
1316
1317 static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
1318                                struct snd_ctl_elem_value *ucontrol)
1319 {
1320         usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1321
1322         pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
1323         return 1;
1324 }
1325
1326 static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1327                                         struct snd_ctl_elem_value *ucontrol)
1328 {
1329         int sample_rate_val;
1330
1331         switch (usb_rx_cfg.sample_rate) {
1332         case SAMPLING_RATE_384KHZ:
1333                 sample_rate_val = 12;
1334                 break;
1335         case SAMPLING_RATE_352P8KHZ:
1336                 sample_rate_val = 11;
1337                 break;
1338         case SAMPLING_RATE_192KHZ:
1339                 sample_rate_val = 10;
1340                 break;
1341         case SAMPLING_RATE_176P4KHZ:
1342                 sample_rate_val = 9;
1343                 break;
1344         case SAMPLING_RATE_96KHZ:
1345                 sample_rate_val = 8;
1346                 break;
1347         case SAMPLING_RATE_88P2KHZ:
1348                 sample_rate_val = 7;
1349                 break;
1350         case SAMPLING_RATE_48KHZ:
1351                 sample_rate_val = 6;
1352                 break;
1353         case SAMPLING_RATE_44P1KHZ:
1354                 sample_rate_val = 5;
1355                 break;
1356         case SAMPLING_RATE_32KHZ:
1357                 sample_rate_val = 4;
1358                 break;
1359         case SAMPLING_RATE_22P05KHZ:
1360                 sample_rate_val = 3;
1361                 break;
1362         case SAMPLING_RATE_16KHZ:
1363                 sample_rate_val = 2;
1364                 break;
1365         case SAMPLING_RATE_11P025KHZ:
1366                 sample_rate_val = 1;
1367                 break;
1368         case SAMPLING_RATE_8KHZ:
1369         default:
1370                 sample_rate_val = 0;
1371                 break;
1372         }
1373
1374         ucontrol->value.integer.value[0] = sample_rate_val;
1375         pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
1376                  usb_rx_cfg.sample_rate);
1377         return 0;
1378 }
1379
1380 static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1381                                         struct snd_ctl_elem_value *ucontrol)
1382 {
1383         switch (ucontrol->value.integer.value[0]) {
1384         case 12:
1385                 usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1386                 break;
1387         case 11:
1388                 usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
1389                 break;
1390         case 10:
1391                 usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1392                 break;
1393         case 9:
1394                 usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1395                 break;
1396         case 8:
1397                 usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1398                 break;
1399         case 7:
1400                 usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1401                 break;
1402         case 6:
1403                 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1404                 break;
1405         case 5:
1406                 usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1407                 break;
1408         case 4:
1409                 usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1410                 break;
1411         case 3:
1412                 usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1413                 break;
1414         case 2:
1415                 usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1416                 break;
1417         case 1:
1418                 usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1419                 break;
1420         case 0:
1421                 usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1422                 break;
1423         default:
1424                 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1425                 break;
1426         }
1427
1428         pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
1429                 __func__, ucontrol->value.integer.value[0],
1430                 usb_rx_cfg.sample_rate);
1431         return 0;
1432 }
1433
1434 static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
1435                                    struct snd_ctl_elem_value *ucontrol)
1436 {
1437         switch (usb_rx_cfg.bit_format) {
1438         case SNDRV_PCM_FORMAT_S32_LE:
1439                 ucontrol->value.integer.value[0] = 3;
1440                 break;
1441         case SNDRV_PCM_FORMAT_S24_3LE:
1442                 ucontrol->value.integer.value[0] = 2;
1443                 break;
1444         case SNDRV_PCM_FORMAT_S24_LE:
1445                 ucontrol->value.integer.value[0] = 1;
1446                 break;
1447         case SNDRV_PCM_FORMAT_S16_LE:
1448         default:
1449                 ucontrol->value.integer.value[0] = 0;
1450                 break;
1451         }
1452
1453         pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1454                  __func__, usb_rx_cfg.bit_format,
1455                  ucontrol->value.integer.value[0]);
1456         return 0;
1457 }
1458
1459 static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
1460                                    struct snd_ctl_elem_value *ucontrol)
1461 {
1462         int rc = 0;
1463
1464         switch (ucontrol->value.integer.value[0]) {
1465         case 3:
1466                 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1467                 break;
1468         case 2:
1469                 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1470                 break;
1471         case 1:
1472                 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1473                 break;
1474         case 0:
1475         default:
1476                 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1477                 break;
1478         }
1479         pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1480                  __func__, usb_rx_cfg.bit_format,
1481                  ucontrol->value.integer.value[0]);
1482
1483         return rc;
1484 }
1485
1486 static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
1487                                struct snd_ctl_elem_value *ucontrol)
1488 {
1489         pr_debug("%s: usb_audio_tx_ch  = %d\n", __func__,
1490                  usb_tx_cfg.channels);
1491         ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
1492         return 0;
1493 }
1494
1495 static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
1496                                struct snd_ctl_elem_value *ucontrol)
1497 {
1498         usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1499
1500         pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
1501         return 1;
1502 }
1503
1504 static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1505                                         struct snd_ctl_elem_value *ucontrol)
1506 {
1507         int sample_rate_val;
1508
1509         switch (usb_tx_cfg.sample_rate) {
1510         case SAMPLING_RATE_384KHZ:
1511                 sample_rate_val = 12;
1512                 break;
1513         case SAMPLING_RATE_352P8KHZ:
1514                 sample_rate_val = 11;
1515                 break;
1516         case SAMPLING_RATE_192KHZ:
1517                 sample_rate_val = 10;
1518                 break;
1519         case SAMPLING_RATE_176P4KHZ:
1520                 sample_rate_val = 9;
1521                 break;
1522         case SAMPLING_RATE_96KHZ:
1523                 sample_rate_val = 8;
1524                 break;
1525         case SAMPLING_RATE_88P2KHZ:
1526                 sample_rate_val = 7;
1527                 break;
1528         case SAMPLING_RATE_48KHZ:
1529                 sample_rate_val = 6;
1530                 break;
1531         case SAMPLING_RATE_44P1KHZ:
1532                 sample_rate_val = 5;
1533                 break;
1534         case SAMPLING_RATE_32KHZ:
1535                 sample_rate_val = 4;
1536                 break;
1537         case SAMPLING_RATE_22P05KHZ:
1538                 sample_rate_val = 3;
1539                 break;
1540         case SAMPLING_RATE_16KHZ:
1541                 sample_rate_val = 2;
1542                 break;
1543         case SAMPLING_RATE_11P025KHZ:
1544                 sample_rate_val = 1;
1545                 break;
1546         case SAMPLING_RATE_8KHZ:
1547                 sample_rate_val = 0;
1548                 break;
1549         default:
1550                 sample_rate_val = 6;
1551                 break;
1552         }
1553
1554         ucontrol->value.integer.value[0] = sample_rate_val;
1555         pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
1556                  usb_tx_cfg.sample_rate);
1557         return 0;
1558 }
1559
1560 static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1561                                         struct snd_ctl_elem_value *ucontrol)
1562 {
1563         switch (ucontrol->value.integer.value[0]) {
1564         case 12:
1565                 usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1566                 break;
1567         case 11:
1568                 usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
1569                 break;
1570         case 10:
1571                 usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1572                 break;
1573         case 9:
1574                 usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1575                 break;
1576         case 8:
1577                 usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1578                 break;
1579         case 7:
1580                 usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1581                 break;
1582         case 6:
1583                 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1584                 break;
1585         case 5:
1586                 usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1587                 break;
1588         case 4:
1589                 usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1590                 break;
1591         case 3:
1592                 usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1593                 break;
1594         case 2:
1595                 usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1596                 break;
1597         case 1:
1598                 usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1599                 break;
1600         case 0:
1601                 usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1602                 break;
1603         default:
1604                 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1605                 break;
1606         }
1607
1608         pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
1609                 __func__, ucontrol->value.integer.value[0],
1610                 usb_tx_cfg.sample_rate);
1611         return 0;
1612 }
1613
1614 static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
1615                                    struct snd_ctl_elem_value *ucontrol)
1616 {
1617         switch (usb_tx_cfg.bit_format) {
1618         case SNDRV_PCM_FORMAT_S32_LE:
1619                 ucontrol->value.integer.value[0] = 3;
1620                 break;
1621         case SNDRV_PCM_FORMAT_S24_3LE:
1622                 ucontrol->value.integer.value[0] = 2;
1623                 break;
1624         case SNDRV_PCM_FORMAT_S24_LE:
1625                 ucontrol->value.integer.value[0] = 1;
1626                 break;
1627         case SNDRV_PCM_FORMAT_S16_LE:
1628         default:
1629                 ucontrol->value.integer.value[0] = 0;
1630                 break;
1631         }
1632
1633         pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1634                  __func__, usb_tx_cfg.bit_format,
1635                  ucontrol->value.integer.value[0]);
1636         return 0;
1637 }
1638
1639 static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
1640                                    struct snd_ctl_elem_value *ucontrol)
1641 {
1642         int rc = 0;
1643
1644         switch (ucontrol->value.integer.value[0]) {
1645         case 3:
1646                 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1647                 break;
1648         case 2:
1649                 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1650                 break;
1651         case 1:
1652                 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1653                 break;
1654         case 0:
1655         default:
1656                 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1657                 break;
1658         }
1659         pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1660                  __func__, usb_tx_cfg.bit_format,
1661                  ucontrol->value.integer.value[0]);
1662
1663         return rc;
1664 }
1665
1666 static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
1667 {
1668         int idx;
1669
1670         if (strnstr(kcontrol->id.name, "HDMI_RX", sizeof("HDMI_RX")))
1671                 idx = HDMI_RX_IDX;
1672         else if (strnstr(kcontrol->id.name, "Display Port RX",
1673                          sizeof("Display Port RX")))
1674                 idx = DP_RX_IDX;
1675         else {
1676                 pr_err("%s: unsupported BE: %s",
1677                         __func__, kcontrol->id.name);
1678                 idx = -EINVAL;
1679         }
1680
1681         return idx;
1682 }
1683
1684 static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
1685                                   struct snd_ctl_elem_value *ucontrol)
1686 {
1687         int idx = ext_disp_get_port_idx(kcontrol);
1688
1689         if (idx < 0)
1690                 return idx;
1691
1692         switch (ext_disp_rx_cfg[idx].bit_format) {
1693         case SNDRV_PCM_FORMAT_S24_LE:
1694                 ucontrol->value.integer.value[0] = 1;
1695                 break;
1696
1697         case SNDRV_PCM_FORMAT_S16_LE:
1698         default:
1699                 ucontrol->value.integer.value[0] = 0;
1700                 break;
1701         }
1702
1703         pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
1704                  __func__, idx, ext_disp_rx_cfg[idx].bit_format,
1705                  ucontrol->value.integer.value[0]);
1706         return 0;
1707 }
1708
1709 static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
1710                                   struct snd_ctl_elem_value *ucontrol)
1711 {
1712         int idx = ext_disp_get_port_idx(kcontrol);
1713
1714         if (idx < 0)
1715                 return idx;
1716
1717         switch (ucontrol->value.integer.value[0]) {
1718         case 1:
1719                 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1720                 break;
1721         case 0:
1722         default:
1723                 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1724                 break;
1725         }
1726         pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
1727                  __func__, idx, ext_disp_rx_cfg[idx].bit_format,
1728                  ucontrol->value.integer.value[0]);
1729
1730         return 0;
1731 }
1732
1733 static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
1734                               struct snd_ctl_elem_value *ucontrol)
1735 {
1736         int idx = ext_disp_get_port_idx(kcontrol);
1737
1738          if (idx < 0)
1739                 return idx;
1740
1741         ucontrol->value.integer.value[0] =
1742                         ext_disp_rx_cfg[idx].channels - 2;
1743
1744         pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
1745                  idx, ext_disp_rx_cfg[idx].channels);
1746
1747         return 0;
1748 }
1749
1750 static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
1751                               struct snd_ctl_elem_value *ucontrol)
1752 {
1753         int idx = ext_disp_get_port_idx(kcontrol);
1754
1755         if (idx < 0)
1756                 return idx;
1757
1758         ext_disp_rx_cfg[idx].channels =
1759                         ucontrol->value.integer.value[0] + 2;
1760
1761         pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
1762                  idx, ext_disp_rx_cfg[idx].channels);
1763         return 1;
1764 }
1765
1766 static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1767                                        struct snd_ctl_elem_value *ucontrol)
1768 {
1769         int sample_rate_val;
1770         int idx = ext_disp_get_port_idx(kcontrol);
1771
1772         if (idx < 0)
1773                 return idx;
1774
1775         switch (ext_disp_rx_cfg[idx].sample_rate) {
1776         case SAMPLING_RATE_176P4KHZ:
1777                 sample_rate_val = 6;
1778                 break;
1779
1780         case SAMPLING_RATE_88P2KHZ:
1781                 sample_rate_val = 5;
1782                 break;
1783
1784         case SAMPLING_RATE_44P1KHZ:
1785                 sample_rate_val = 4;
1786                 break;
1787
1788         case SAMPLING_RATE_32KHZ:
1789                 sample_rate_val = 3;
1790                 break;
1791
1792         case SAMPLING_RATE_192KHZ:
1793                 sample_rate_val = 2;
1794                 break;
1795
1796         case SAMPLING_RATE_96KHZ:
1797                 sample_rate_val = 1;
1798                 break;
1799
1800         case SAMPLING_RATE_48KHZ:
1801         default:
1802                 sample_rate_val = 0;
1803                 break;
1804         }
1805
1806         ucontrol->value.integer.value[0] = sample_rate_val;
1807         pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
1808                  idx, ext_disp_rx_cfg[idx].sample_rate);
1809
1810         return 0;
1811 }
1812
1813 static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1814                                        struct snd_ctl_elem_value *ucontrol)
1815 {
1816         int idx = ext_disp_get_port_idx(kcontrol);
1817
1818         if (idx < 0)
1819                 return idx;
1820
1821         switch (ucontrol->value.integer.value[0]) {
1822         case 6:
1823                 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
1824                 break;
1825         case 5:
1826                 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
1827                 break;
1828         case 4:
1829                 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
1830                 break;
1831         case 3:
1832                 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
1833                 break;
1834         case 2:
1835                 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
1836                 break;
1837         case 1:
1838                 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
1839                 break;
1840         case 0:
1841         default:
1842                 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
1843                 break;
1844         }
1845
1846         pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
1847                  __func__, ucontrol->value.integer.value[0], idx,
1848                  ext_disp_rx_cfg[idx].sample_rate);
1849         return 0;
1850 }
1851
1852 static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
1853                                struct snd_ctl_elem_value *ucontrol)
1854 {
1855         pr_debug("%s: proxy_rx channels = %d\n",
1856                  __func__, proxy_rx_cfg.channels);
1857         ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
1858
1859         return 0;
1860 }
1861
1862 static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
1863                                struct snd_ctl_elem_value *ucontrol)
1864 {
1865         proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
1866         pr_debug("%s: proxy_rx channels = %d\n",
1867                  __func__, proxy_rx_cfg.channels);
1868
1869         return 1;
1870 }
1871
1872 static int tdm_get_sample_rate(int value)
1873 {
1874         int sample_rate = 0;
1875
1876         switch (value) {
1877         case 0:
1878                 sample_rate = SAMPLING_RATE_8KHZ;
1879                 break;
1880         case 1:
1881                 sample_rate = SAMPLING_RATE_16KHZ;
1882                 break;
1883         case 2:
1884                 sample_rate = SAMPLING_RATE_32KHZ;
1885                 break;
1886         case 3:
1887                 sample_rate = SAMPLING_RATE_44P1KHZ;
1888                 break;
1889         case 4:
1890                 sample_rate = SAMPLING_RATE_48KHZ;
1891                 break;
1892         case 5:
1893                 sample_rate = SAMPLING_RATE_96KHZ;
1894                 break;
1895         case 6:
1896                 sample_rate = SAMPLING_RATE_192KHZ;
1897                 break;
1898         case 7:
1899                 sample_rate = SAMPLING_RATE_352P8KHZ;
1900                 break;
1901         case 8:
1902                 sample_rate = SAMPLING_RATE_384KHZ;
1903                 break;
1904         default:
1905                 sample_rate = SAMPLING_RATE_48KHZ;
1906                 break;
1907         }
1908         return sample_rate;
1909 }
1910
1911 static int aux_pcm_get_sample_rate(int value)
1912 {
1913         int sample_rate;
1914
1915         switch (value) {
1916         case 1:
1917                 sample_rate = SAMPLING_RATE_16KHZ;
1918                 break;
1919         case 0:
1920         default:
1921                 sample_rate = SAMPLING_RATE_8KHZ;
1922                 break;
1923         }
1924         return sample_rate;
1925 }
1926
1927 static int tdm_get_sample_rate_val(int sample_rate)
1928 {
1929         int sample_rate_val = 0;
1930
1931         switch (sample_rate) {
1932         case SAMPLING_RATE_8KHZ:
1933                 sample_rate_val = 0;
1934                 break;
1935         case SAMPLING_RATE_16KHZ:
1936                 sample_rate_val = 1;
1937                 break;
1938         case SAMPLING_RATE_32KHZ:
1939                 sample_rate_val = 2;
1940                 break;
1941         case SAMPLING_RATE_44P1KHZ:
1942                 sample_rate_val = 3;
1943                 break;
1944         case SAMPLING_RATE_48KHZ:
1945                 sample_rate_val = 4;
1946                 break;
1947         case SAMPLING_RATE_96KHZ:
1948                 sample_rate_val = 5;
1949                 break;
1950         case SAMPLING_RATE_192KHZ:
1951                 sample_rate_val = 6;
1952                 break;
1953         case SAMPLING_RATE_352P8KHZ:
1954                 sample_rate_val = 7;
1955                 break;
1956         case SAMPLING_RATE_384KHZ:
1957                 sample_rate_val = 8;
1958                 break;
1959         default:
1960                 sample_rate_val = 4;
1961                 break;
1962         }
1963         return sample_rate_val;
1964 }
1965
1966 static int aux_pcm_get_sample_rate_val(int sample_rate)
1967 {
1968         int sample_rate_val;
1969
1970         switch (sample_rate) {
1971         case SAMPLING_RATE_16KHZ:
1972                 sample_rate_val = 1;
1973                 break;
1974         case SAMPLING_RATE_8KHZ:
1975         default:
1976                 sample_rate_val = 0;
1977                 break;
1978         }
1979         return sample_rate_val;
1980 }
1981
1982 static int tdm_get_mode(struct snd_kcontrol *kcontrol)
1983 {
1984         int mode;
1985
1986         if (strnstr(kcontrol->id.name, "PRI",
1987             sizeof(kcontrol->id.name))) {
1988                 mode = TDM_PRI;
1989         } else if (strnstr(kcontrol->id.name, "SEC",
1990             sizeof(kcontrol->id.name))) {
1991                 mode = TDM_SEC;
1992         } else if (strnstr(kcontrol->id.name, "TERT",
1993             sizeof(kcontrol->id.name))) {
1994                 mode = TDM_TERT;
1995         } else if (strnstr(kcontrol->id.name, "QUAT",
1996             sizeof(kcontrol->id.name))) {
1997                 mode = TDM_QUAT;
1998         } else {
1999                 pr_err("%s: unsupported mode in: %s",
2000                         __func__, kcontrol->id.name);
2001                 mode = -EINVAL;
2002         }
2003
2004         return mode;
2005 }
2006
2007 static int tdm_get_channel(struct snd_kcontrol *kcontrol)
2008 {
2009         int channel;
2010
2011         if (strnstr(kcontrol->id.name, "RX_0",
2012             sizeof(kcontrol->id.name)) ||
2013             strnstr(kcontrol->id.name, "TX_0",
2014             sizeof(kcontrol->id.name))) {
2015                 channel = TDM_0;
2016         } else if (strnstr(kcontrol->id.name, "RX_1",
2017                    sizeof(kcontrol->id.name)) ||
2018                    strnstr(kcontrol->id.name, "TX_1",
2019                    sizeof(kcontrol->id.name))) {
2020                 channel = TDM_1;
2021         } else if (strnstr(kcontrol->id.name, "RX_2",
2022                    sizeof(kcontrol->id.name)) ||
2023                    strnstr(kcontrol->id.name, "TX_2",
2024                    sizeof(kcontrol->id.name))) {
2025                 channel = TDM_2;
2026         } else if (strnstr(kcontrol->id.name, "RX_3",
2027                    sizeof(kcontrol->id.name)) ||
2028                    strnstr(kcontrol->id.name, "TX_3",
2029                    sizeof(kcontrol->id.name))) {
2030                 channel = TDM_3;
2031         } else if (strnstr(kcontrol->id.name, "RX_4",
2032                    sizeof(kcontrol->id.name)) ||
2033                    strnstr(kcontrol->id.name, "TX_4",
2034                    sizeof(kcontrol->id.name))) {
2035                 channel = TDM_4;
2036         } else if (strnstr(kcontrol->id.name, "RX_5",
2037                    sizeof(kcontrol->id.name)) ||
2038                    strnstr(kcontrol->id.name, "TX_5",
2039                    sizeof(kcontrol->id.name))) {
2040                 channel = TDM_5;
2041         } else if (strnstr(kcontrol->id.name, "RX_6",
2042                    sizeof(kcontrol->id.name)) ||
2043                    strnstr(kcontrol->id.name, "TX_6",
2044                    sizeof(kcontrol->id.name))) {
2045                 channel = TDM_6;
2046         } else if (strnstr(kcontrol->id.name, "RX_7",
2047                    sizeof(kcontrol->id.name)) ||
2048                    strnstr(kcontrol->id.name, "TX_7",
2049                    sizeof(kcontrol->id.name))) {
2050                 channel = TDM_7;
2051         } else {
2052                 pr_err("%s: unsupported channel in: %s",
2053                         __func__, kcontrol->id.name);
2054                 channel = -EINVAL;
2055         }
2056
2057         return channel;
2058 }
2059
2060 static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
2061                             struct tdm_port *port)
2062 {
2063         if (port) {
2064                 port->mode = tdm_get_mode(kcontrol);
2065                 if (port->mode < 0)
2066                         return port->mode;
2067
2068                 port->channel = tdm_get_channel(kcontrol);
2069                 if (port->channel < 0)
2070                         return port->channel;
2071         } else
2072                 return -EINVAL;
2073         return 0;
2074 }
2075
2076 static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2077                                    struct snd_ctl_elem_value *ucontrol)
2078 {
2079         struct tdm_port port;
2080         int ret = tdm_get_port_idx(kcontrol, &port);
2081
2082         if (ret) {
2083                 pr_err("%s: unsupported control: %s",
2084                         __func__, kcontrol->id.name);
2085         } else {
2086                 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
2087                         tdm_rx_cfg[port.mode][port.channel].sample_rate);
2088
2089                 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
2090                          tdm_rx_cfg[port.mode][port.channel].sample_rate,
2091                          ucontrol->value.enumerated.item[0]);
2092         }
2093         return ret;
2094 }
2095
2096 static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2097                                    struct snd_ctl_elem_value *ucontrol)
2098 {
2099         struct tdm_port port;
2100         int ret = tdm_get_port_idx(kcontrol, &port);
2101
2102         if (ret) {
2103                 pr_err("%s: unsupported control: %s",
2104                         __func__, kcontrol->id.name);
2105         } else {
2106                 tdm_rx_cfg[port.mode][port.channel].sample_rate =
2107                         tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2108
2109                 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
2110                          tdm_rx_cfg[port.mode][port.channel].sample_rate,
2111                          ucontrol->value.enumerated.item[0]);
2112         }
2113         return ret;
2114 }
2115
2116 static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2117                                    struct snd_ctl_elem_value *ucontrol)
2118 {
2119         struct tdm_port port;
2120         int ret = tdm_get_port_idx(kcontrol, &port);
2121
2122         if (ret) {
2123                 pr_err("%s: unsupported control: %s",
2124                         __func__, kcontrol->id.name);
2125         } else {
2126                 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
2127                         tdm_tx_cfg[port.mode][port.channel].sample_rate);
2128
2129                 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
2130                          tdm_tx_cfg[port.mode][port.channel].sample_rate,
2131                          ucontrol->value.enumerated.item[0]);
2132         }
2133         return ret;
2134 }
2135
2136 static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2137                                    struct snd_ctl_elem_value *ucontrol)
2138 {
2139         struct tdm_port port;
2140         int ret = tdm_get_port_idx(kcontrol, &port);
2141
2142         if (ret) {
2143                 pr_err("%s: unsupported control: %s",
2144                         __func__, kcontrol->id.name);
2145         } else {
2146                 tdm_tx_cfg[port.mode][port.channel].sample_rate =
2147                         tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2148
2149                 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
2150                          tdm_tx_cfg[port.mode][port.channel].sample_rate,
2151                          ucontrol->value.enumerated.item[0]);
2152         }
2153         return ret;
2154 }
2155
2156 static int tdm_get_format(int value)
2157 {
2158         int format = 0;
2159
2160         switch (value) {
2161         case 0:
2162                 format = SNDRV_PCM_FORMAT_S16_LE;
2163                 break;
2164         case 1:
2165                 format = SNDRV_PCM_FORMAT_S24_LE;
2166                 break;
2167         case 2:
2168                 format = SNDRV_PCM_FORMAT_S32_LE;
2169                 break;
2170         default:
2171                 format = SNDRV_PCM_FORMAT_S16_LE;
2172                 break;
2173         }
2174         return format;
2175 }
2176
2177 static int tdm_get_format_val(int format)
2178 {
2179         int value = 0;
2180
2181         switch (format) {
2182         case SNDRV_PCM_FORMAT_S16_LE:
2183                 value = 0;
2184                 break;
2185         case SNDRV_PCM_FORMAT_S24_LE:
2186                 value = 1;
2187                 break;
2188         case SNDRV_PCM_FORMAT_S32_LE:
2189                 value = 2;
2190                 break;
2191         default:
2192                 value = 0;
2193                 break;
2194         }
2195         return value;
2196 }
2197
2198 static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
2199                              struct snd_ctl_elem_value *ucontrol)
2200 {
2201         struct tdm_port port;
2202         int ret = tdm_get_port_idx(kcontrol, &port);
2203
2204         if (ret) {
2205                 pr_err("%s: unsupported control: %s",
2206                         __func__, kcontrol->id.name);
2207         } else {
2208                 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
2209                                 tdm_rx_cfg[port.mode][port.channel].bit_format);
2210
2211                 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
2212                          tdm_rx_cfg[port.mode][port.channel].bit_format,
2213                          ucontrol->value.enumerated.item[0]);
2214         }
2215         return ret;
2216 }
2217
2218 static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
2219                              struct snd_ctl_elem_value *ucontrol)
2220 {
2221         struct tdm_port port;
2222         int ret = tdm_get_port_idx(kcontrol, &port);
2223
2224         if (ret) {
2225                 pr_err("%s: unsupported control: %s",
2226                         __func__, kcontrol->id.name);
2227         } else {
2228                 tdm_rx_cfg[port.mode][port.channel].bit_format =
2229                         tdm_get_format(ucontrol->value.enumerated.item[0]);
2230
2231                 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
2232                          tdm_rx_cfg[port.mode][port.channel].bit_format,
2233                          ucontrol->value.enumerated.item[0]);
2234         }
2235         return ret;
2236 }
2237
2238 static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
2239                              struct snd_ctl_elem_value *ucontrol)
2240 {
2241         struct tdm_port port;
2242         int ret = tdm_get_port_idx(kcontrol, &port);
2243
2244         if (ret) {
2245                 pr_err("%s: unsupported control: %s",
2246                         __func__, kcontrol->id.name);
2247         } else {
2248                 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
2249                                 tdm_tx_cfg[port.mode][port.channel].bit_format);
2250
2251                 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
2252                          tdm_tx_cfg[port.mode][port.channel].bit_format,
2253                          ucontrol->value.enumerated.item[0]);
2254         }
2255         return ret;
2256 }
2257
2258 static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
2259                              struct snd_ctl_elem_value *ucontrol)
2260 {
2261         struct tdm_port port;
2262         int ret = tdm_get_port_idx(kcontrol, &port);
2263
2264         if (ret) {
2265                 pr_err("%s: unsupported control: %s",
2266                         __func__, kcontrol->id.name);
2267         } else {
2268                 tdm_tx_cfg[port.mode][port.channel].bit_format =
2269                         tdm_get_format(ucontrol->value.enumerated.item[0]);
2270
2271                 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
2272                          tdm_tx_cfg[port.mode][port.channel].bit_format,
2273                          ucontrol->value.enumerated.item[0]);
2274         }
2275         return ret;
2276 }
2277
2278 static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
2279                          struct snd_ctl_elem_value *ucontrol)
2280 {
2281         struct tdm_port port;
2282         int ret = tdm_get_port_idx(kcontrol, &port);
2283
2284         if (ret) {
2285                 pr_err("%s: unsupported control: %s",
2286                         __func__, kcontrol->id.name);
2287         } else {
2288
2289                 ucontrol->value.enumerated.item[0] =
2290                         tdm_rx_cfg[port.mode][port.channel].channels - 1;
2291
2292                 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
2293                          tdm_rx_cfg[port.mode][port.channel].channels - 1,
2294                          ucontrol->value.enumerated.item[0]);
2295         }
2296         return ret;
2297 }
2298
2299 static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
2300                          struct snd_ctl_elem_value *ucontrol)
2301 {
2302         struct tdm_port port;
2303         int ret = tdm_get_port_idx(kcontrol, &port);
2304
2305         if (ret) {
2306                 pr_err("%s: unsupported control: %s",
2307                         __func__, kcontrol->id.name);
2308         } else {
2309                 tdm_rx_cfg[port.mode][port.channel].channels =
2310                         ucontrol->value.enumerated.item[0] + 1;
2311
2312                 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
2313                          tdm_rx_cfg[port.mode][port.channel].channels,
2314                          ucontrol->value.enumerated.item[0] + 1);
2315         }
2316         return ret;
2317 }
2318
2319 static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
2320                                    struct snd_ctl_elem_value *ucontrol)
2321 {
2322         struct tdm_port port;
2323         int ret = tdm_get_port_idx(kcontrol, &port);
2324
2325         if (ret) {
2326                 pr_err("%s: unsupported control: %s",
2327                         __func__, kcontrol->id.name);
2328         } else {
2329                 ucontrol->value.enumerated.item[0] =
2330                         tdm_tx_cfg[port.mode][port.channel].channels - 1;
2331
2332                 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
2333                          tdm_tx_cfg[port.mode][port.channel].channels - 1,
2334                          ucontrol->value.enumerated.item[0]);
2335         }
2336         return ret;
2337 }
2338
2339 static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
2340                                    struct snd_ctl_elem_value *ucontrol)
2341 {
2342         struct tdm_port port;
2343         int ret = tdm_get_port_idx(kcontrol, &port);
2344
2345         if (ret) {
2346                 pr_err("%s: unsupported control: %s",
2347                         __func__, kcontrol->id.name);
2348         } else {
2349                 tdm_tx_cfg[port.mode][port.channel].channels =
2350                         ucontrol->value.enumerated.item[0] + 1;
2351
2352                 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
2353                          tdm_tx_cfg[port.mode][port.channel].channels,
2354                          ucontrol->value.enumerated.item[0] + 1);
2355         }
2356         return ret;
2357 }
2358
2359 static int tdm_get_slot_num_val(int slot_num)
2360 {
2361         int slot_num_val;
2362
2363         switch (slot_num) {
2364         case 1:
2365                 slot_num_val = 0;
2366                 break;
2367         case 2:
2368                 slot_num_val = 1;
2369                 break;
2370         case 4:
2371                 slot_num_val = 2;
2372                 break;
2373         case 8:
2374                 slot_num_val = 3;
2375                 break;
2376         case 16:
2377                 slot_num_val = 4;
2378                 break;
2379         case 32:
2380                 slot_num_val = 5;
2381                 break;
2382         default:
2383                 slot_num_val = 5;
2384                 break;
2385         }
2386         return slot_num_val;
2387 }
2388
2389 static int tdm_slot_num_get(struct snd_kcontrol *kcontrol,
2390                                     struct snd_ctl_elem_value *ucontrol)
2391 {
2392         int mode = tdm_get_mode(kcontrol);
2393
2394         if (mode < 0) {
2395                 pr_err("%s: unsupported control: %s",
2396                         __func__, kcontrol->id.name);
2397                 return mode;
2398         }
2399
2400         ucontrol->value.enumerated.item[0] =
2401                 tdm_get_slot_num_val(tdm_slot[mode].num);
2402
2403         pr_debug("%s: mode = %d, tdm_slot_num = %d, item = %d\n", __func__,
2404                 mode, tdm_slot[mode].num,
2405                 ucontrol->value.enumerated.item[0]);
2406
2407         return 0;
2408 }
2409
2410 static int tdm_get_slot_num(int value)
2411 {
2412         int slot_num;
2413
2414         switch (value) {
2415         case 0:
2416                 slot_num = 1;
2417                 break;
2418         case 1:
2419                 slot_num = 2;
2420                 break;
2421         case 2:
2422                 slot_num = 4;
2423                 break;
2424         case 3:
2425                 slot_num = 8;
2426                 break;
2427         case 4:
2428                 slot_num = 16;
2429                 break;
2430         case 5:
2431                 slot_num = 32;
2432                 break;
2433         default:
2434                 slot_num = 8;
2435                 break;
2436         }
2437         return slot_num;
2438 }
2439
2440 static int tdm_slot_num_put(struct snd_kcontrol *kcontrol,
2441                                     struct snd_ctl_elem_value *ucontrol)
2442 {
2443         int mode = tdm_get_mode(kcontrol);
2444
2445         if (mode < 0) {
2446                 pr_err("%s: unsupported control: %s",
2447                         __func__, kcontrol->id.name);
2448                 return mode;
2449         }
2450
2451         tdm_slot[mode].num =
2452                 tdm_get_slot_num(ucontrol->value.enumerated.item[0]);
2453
2454         pr_debug("%s: mode = %d, tdm_slot_num = %d, item = %d\n", __func__,
2455                 mode, tdm_slot[mode].num,
2456                 ucontrol->value.enumerated.item[0]);
2457
2458         return 0;
2459 }
2460
2461 static int tdm_get_slot_width_val(int slot_width)
2462 {
2463         int slot_width_val;
2464
2465         switch (slot_width) {
2466         case 16:
2467                 slot_width_val = 0;
2468                 break;
2469         case 24:
2470                 slot_width_val = 1;
2471                 break;
2472         case 32:
2473                 slot_width_val = 2;
2474                 break;
2475         default:
2476                 slot_width_val = 2;
2477                 break;
2478         }
2479         return slot_width_val;
2480 }
2481
2482 static int tdm_slot_width_get(struct snd_kcontrol *kcontrol,
2483                                     struct snd_ctl_elem_value *ucontrol)
2484 {
2485         int mode = tdm_get_mode(kcontrol);
2486
2487         if (mode < 0) {
2488                 pr_err("%s: unsupported control: %s",
2489                         __func__, kcontrol->id.name);
2490                 return mode;
2491         }
2492
2493         ucontrol->value.enumerated.item[0] =
2494                 tdm_get_slot_width_val(tdm_slot[mode].width);
2495
2496         pr_debug("%s: mode = %d, tdm_slot_width = %d, item = %d\n", __func__,
2497                 mode, tdm_slot[mode].width,
2498                 ucontrol->value.enumerated.item[0]);
2499
2500         return 0;
2501 }
2502
2503 static int tdm_get_slot_width(int value)
2504 {
2505         int slot_width;
2506
2507         switch (value) {
2508         case 0:
2509                 slot_width = 16;
2510                 break;
2511         case 1:
2512                 slot_width = 24;
2513                 break;
2514         case 2:
2515                 slot_width = 32;
2516                 break;
2517         default:
2518                 slot_width = 32;
2519                 break;
2520         }
2521         return slot_width;
2522 }
2523
2524 static int tdm_slot_width_put(struct snd_kcontrol *kcontrol,
2525                                     struct snd_ctl_elem_value *ucontrol)
2526 {
2527         int mode = tdm_get_mode(kcontrol);
2528
2529         if (mode < 0) {
2530                 pr_err("%s: unsupported control: %s",
2531                         __func__, kcontrol->id.name);
2532                 return mode;
2533         }
2534
2535         tdm_slot[mode].width =
2536                 tdm_get_slot_width(ucontrol->value.enumerated.item[0]);
2537
2538         pr_debug("%s: mode = %d, tdm_slot_width = %d, item = %d\n", __func__,
2539                 mode, tdm_slot[mode].width,
2540                 ucontrol->value.enumerated.item[0]);
2541
2542         return 0;
2543 }
2544
2545 static int tdm_rx_slot_mapping_get(struct snd_kcontrol *kcontrol,
2546                                     struct snd_ctl_elem_value *ucontrol)
2547 {
2548         unsigned int *slot_offset;
2549         int i;
2550         struct tdm_port port;
2551         int ret = tdm_get_port_idx(kcontrol, &port);
2552
2553         if (ret) {
2554                 pr_err("%s: unsupported control: %s",
2555                         __func__, kcontrol->id.name);
2556         } else {
2557                 if (port.mode < TDM_INTERFACE_MAX &&
2558                         port.channel < TDM_PORT_MAX) {
2559                         slot_offset =
2560                                 tdm_rx_slot_offset[port.mode][port.channel];
2561                         pr_debug("%s: mode = %d, channel = %d\n",
2562                                         __func__, port.mode, port.channel);
2563                         for (i = 0; i < TDM_SLOT_OFFSET_MAX; i++) {
2564                                 ucontrol->value.integer.value[i] =
2565                                         slot_offset[i];
2566                                 pr_debug("%s: offset %d, value %d\n",
2567                                                 __func__, i, slot_offset[i]);
2568                         }
2569                 } else {
2570                         pr_err("%s: unsupported mode/channel", __func__);
2571                 }
2572         }
2573         return ret;
2574 }
2575
2576 static int tdm_rx_slot_mapping_put(struct snd_kcontrol *kcontrol,
2577                                     struct snd_ctl_elem_value *ucontrol)
2578 {
2579         unsigned int *slot_offset;
2580         int i;
2581         struct tdm_port port;
2582         int ret = tdm_get_port_idx(kcontrol, &port);
2583
2584         if (ret) {
2585                 pr_err("%s: unsupported control: %s",
2586                         __func__, kcontrol->id.name);
2587         } else {
2588                 if (port.mode < TDM_INTERFACE_MAX &&
2589                         port.channel < TDM_PORT_MAX) {
2590                         slot_offset =
2591                                 tdm_rx_slot_offset[port.mode][port.channel];
2592                         pr_debug("%s: mode = %d, channel = %d\n",
2593                                         __func__, port.mode, port.channel);
2594                         for (i = 0; i < TDM_SLOT_OFFSET_MAX; i++) {
2595                                 slot_offset[i] =
2596                                         ucontrol->value.integer.value[i];
2597                                 pr_debug("%s: offset %d, value %d\n",
2598                                                 __func__, i, slot_offset[i]);
2599                         }
2600                 } else {
2601                         pr_err("%s: unsupported mode/channel", __func__);
2602                 }
2603         }
2604         return ret;
2605 }
2606
2607 static int tdm_tx_slot_mapping_get(struct snd_kcontrol *kcontrol,
2608                                     struct snd_ctl_elem_value *ucontrol)
2609 {
2610         unsigned int *slot_offset;
2611         int i;
2612         struct tdm_port port;
2613         int ret = tdm_get_port_idx(kcontrol, &port);
2614
2615         if (ret) {
2616                 pr_err("%s: unsupported control: %s",
2617                         __func__, kcontrol->id.name);
2618         } else {
2619                 if (port.mode < TDM_INTERFACE_MAX &&
2620                         port.channel < TDM_PORT_MAX) {
2621                         slot_offset =
2622                                 tdm_tx_slot_offset[port.mode][port.channel];
2623                         pr_debug("%s: mode = %d, channel = %d\n",
2624                                         __func__, port.mode, port.channel);
2625                         for (i = 0; i < TDM_SLOT_OFFSET_MAX; i++) {
2626                                 ucontrol->value.integer.value[i] =
2627                                         slot_offset[i];
2628                                 pr_debug("%s: offset %d, value %d\n",
2629                                                 __func__, i, slot_offset[i]);
2630                         }
2631                 } else {
2632                         pr_err("%s: unsupported mode/channel", __func__);
2633                 }
2634         }
2635         return ret;
2636 }
2637
2638 static int tdm_tx_slot_mapping_put(struct snd_kcontrol *kcontrol,
2639                                     struct snd_ctl_elem_value *ucontrol)
2640 {
2641         unsigned int *slot_offset;
2642         int i;
2643         struct tdm_port port;
2644         int ret = tdm_get_port_idx(kcontrol, &port);
2645
2646         if (ret) {
2647                 pr_err("%s: unsupported control: %s",
2648                         __func__, kcontrol->id.name);
2649         } else {
2650                 if (port.mode < TDM_INTERFACE_MAX &&
2651                         port.channel < TDM_PORT_MAX) {
2652                         slot_offset =
2653                                 tdm_tx_slot_offset[port.mode][port.channel];
2654                         pr_debug("%s: mode = %d, channel = %d\n",
2655                                         __func__, port.mode, port.channel);
2656                         for (i = 0; i < TDM_SLOT_OFFSET_MAX; i++) {
2657                                 slot_offset[i] =
2658                                         ucontrol->value.integer.value[i];
2659                                 pr_debug("%s: offset %d, value %d\n",
2660                                                 __func__, i, slot_offset[i]);
2661                         }
2662                 } else {
2663                         pr_err("%s: unsupported mode/channel", __func__);
2664                 }
2665         }
2666         return ret;
2667 }
2668
2669 static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
2670 {
2671         int idx;
2672
2673         if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
2674                     sizeof("PRIM_AUX_PCM")))
2675                 idx = PRIM_AUX_PCM;
2676         else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
2677                          sizeof("SEC_AUX_PCM")))
2678                 idx = SEC_AUX_PCM;
2679         else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
2680                          sizeof("TERT_AUX_PCM")))
2681                 idx = TERT_AUX_PCM;
2682         else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
2683                          sizeof("QUAT_AUX_PCM")))
2684                 idx = QUAT_AUX_PCM;
2685         else {
2686                 pr_err("%s: unsupported port: %s",
2687                         __func__, kcontrol->id.name);
2688                 idx = -EINVAL;
2689         }
2690
2691         return idx;
2692 }
2693
2694 static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2695                                       struct snd_ctl_elem_value *ucontrol)
2696 {
2697         int idx = aux_pcm_get_port_idx(kcontrol);
2698
2699         if (idx < 0)
2700                 return idx;
2701
2702         aux_pcm_rx_cfg[idx].sample_rate =
2703                 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2704
2705         pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2706                  idx, aux_pcm_rx_cfg[idx].sample_rate,
2707                  ucontrol->value.enumerated.item[0]);
2708
2709         return 0;
2710 }
2711
2712 static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2713                                       struct snd_ctl_elem_value *ucontrol)
2714 {
2715         int idx = aux_pcm_get_port_idx(kcontrol);
2716
2717         if (idx < 0)
2718                 return idx;
2719
2720         ucontrol->value.enumerated.item[0] =
2721              aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
2722
2723         pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2724                  idx, aux_pcm_rx_cfg[idx].sample_rate,
2725                  ucontrol->value.enumerated.item[0]);
2726
2727         return 0;
2728 }
2729
2730 static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2731                                       struct snd_ctl_elem_value *ucontrol)
2732 {
2733         int idx = aux_pcm_get_port_idx(kcontrol);
2734
2735         if (idx < 0)
2736                 return idx;
2737
2738         aux_pcm_tx_cfg[idx].sample_rate =
2739                 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2740
2741         pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2742                  idx, aux_pcm_tx_cfg[idx].sample_rate,
2743                  ucontrol->value.enumerated.item[0]);
2744
2745         return 0;
2746 }
2747
2748 static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2749                                    struct snd_ctl_elem_value *ucontrol)
2750 {
2751         int idx = aux_pcm_get_port_idx(kcontrol);
2752
2753         if (idx < 0)
2754                 return idx;
2755
2756         ucontrol->value.enumerated.item[0] =
2757              aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
2758
2759         pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2760                  idx, aux_pcm_tx_cfg[idx].sample_rate,
2761                  ucontrol->value.enumerated.item[0]);
2762
2763         return 0;
2764 }
2765
2766 static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
2767 {
2768         int idx;
2769
2770         if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
2771             sizeof("PRIM_MI2S_RX")))
2772                 idx = PRIM_MI2S;
2773         else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
2774                  sizeof("SEC_MI2S_RX")))
2775                 idx = SEC_MI2S;
2776         else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
2777                  sizeof("TERT_MI2S_RX")))
2778                 idx = TERT_MI2S;
2779         else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
2780                  sizeof("QUAT_MI2S_RX")))
2781                 idx = QUAT_MI2S;
2782         else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
2783                  sizeof("PRIM_MI2S_TX")))
2784                 idx = PRIM_MI2S;
2785         else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
2786                  sizeof("SEC_MI2S_TX")))
2787                 idx = SEC_MI2S;
2788         else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
2789                  sizeof("TERT_MI2S_TX")))
2790                 idx = TERT_MI2S;
2791         else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
2792                  sizeof("QUAT_MI2S_TX")))
2793                 idx = QUAT_MI2S;
2794         else {
2795                 pr_err("%s: unsupported channel: %s",
2796                         __func__, kcontrol->id.name);
2797                 idx = -EINVAL;
2798         }
2799
2800         return idx;
2801 }
2802
2803 static int mi2s_get_sample_rate_val(int sample_rate)
2804 {
2805         int sample_rate_val;
2806
2807         switch (sample_rate) {
2808         case SAMPLING_RATE_8KHZ:
2809                 sample_rate_val = 0;
2810                 break;
2811         case SAMPLING_RATE_16KHZ:
2812                 sample_rate_val = 1;
2813                 break;
2814         case SAMPLING_RATE_32KHZ:
2815                 sample_rate_val = 2;
2816                 break;
2817         case SAMPLING_RATE_44P1KHZ:
2818                 sample_rate_val = 3;
2819                 break;
2820         case SAMPLING_RATE_48KHZ:
2821                 sample_rate_val = 4;
2822                 break;
2823         case SAMPLING_RATE_88P2KHZ:
2824                 sample_rate_val = 5;
2825                 break;
2826         case SAMPLING_RATE_96KHZ:
2827                 sample_rate_val = 6;
2828                 break;
2829         case SAMPLING_RATE_176P4KHZ:
2830                 sample_rate_val = 7;
2831                 break;
2832         case SAMPLING_RATE_192KHZ:
2833                 sample_rate_val = 8;
2834                 break;
2835         default:
2836                 sample_rate_val = 4;
2837                 break;
2838         }
2839         return sample_rate_val;
2840 }
2841
2842 static int mi2s_get_sample_rate(int value)
2843 {
2844         int sample_rate;
2845
2846         switch (value) {
2847         case 0:
2848                 sample_rate = SAMPLING_RATE_8KHZ;
2849                 break;
2850         case 1:
2851                 sample_rate = SAMPLING_RATE_16KHZ;
2852                 break;
2853         case 2:
2854                 sample_rate = SAMPLING_RATE_32KHZ;
2855                 break;
2856         case 3:
2857                 sample_rate = SAMPLING_RATE_44P1KHZ;
2858                 break;
2859         case 4:
2860                 sample_rate = SAMPLING_RATE_48KHZ;
2861                 break;
2862         case 5:
2863                 sample_rate = SAMPLING_RATE_88P2KHZ;
2864                 break;
2865         case 6:
2866                 sample_rate = SAMPLING_RATE_96KHZ;
2867                 break;
2868         case 7:
2869                 sample_rate = SAMPLING_RATE_176P4KHZ;
2870                 break;
2871         case 8:
2872                 sample_rate = SAMPLING_RATE_192KHZ;
2873                 break;
2874         default:
2875                 sample_rate = SAMPLING_RATE_48KHZ;
2876                 break;
2877         }
2878         return sample_rate;
2879 }
2880
2881 static int mi2s_get_format(int value)
2882 {
2883         int format;
2884
2885         switch (value) {
2886         case 0:
2887                 format = SNDRV_PCM_FORMAT_S16_LE;
2888                 break;
2889         case 1:
2890                 format = SNDRV_PCM_FORMAT_S24_LE;
2891                 break;
2892         case 2:
2893                 format = SNDRV_PCM_FORMAT_S24_3LE;
2894                 break;
2895         case 3:
2896                 format = SNDRV_PCM_FORMAT_S32_LE;
2897                 break;
2898         default:
2899                 format = SNDRV_PCM_FORMAT_S16_LE;
2900                 break;
2901         }
2902         return format;
2903 }
2904
2905 static int mi2s_get_format_value(int format)
2906 {
2907         int value;
2908
2909         switch (format) {
2910         case SNDRV_PCM_FORMAT_S16_LE:
2911                 value = 0;
2912                 break;
2913         case SNDRV_PCM_FORMAT_S24_LE:
2914                 value = 1;
2915                 break;
2916         case SNDRV_PCM_FORMAT_S24_3LE:
2917                 value = 2;
2918                 break;
2919         case SNDRV_PCM_FORMAT_S32_LE:
2920                 value = 3;
2921                 break;
2922         default:
2923                 value = 0;
2924                 break;
2925         }
2926         return value;
2927 }
2928
2929 static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2930                                    struct snd_ctl_elem_value *ucontrol)
2931 {
2932         int idx = mi2s_get_port_idx(kcontrol);
2933
2934         if (idx < 0)
2935                 return idx;
2936
2937         mi2s_rx_cfg[idx].sample_rate =
2938                 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2939
2940         pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2941                  idx, mi2s_rx_cfg[idx].sample_rate,
2942                  ucontrol->value.enumerated.item[0]);
2943
2944         return 0;
2945 }
2946
2947 static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2948                                    struct snd_ctl_elem_value *ucontrol)
2949 {
2950         int idx = mi2s_get_port_idx(kcontrol);
2951
2952         if (idx < 0)
2953                 return idx;
2954
2955         ucontrol->value.enumerated.item[0] =
2956                 mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
2957
2958         pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2959                  idx, mi2s_rx_cfg[idx].sample_rate,
2960                  ucontrol->value.enumerated.item[0]);
2961
2962         return 0;
2963 }
2964
2965 static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2966                                    struct snd_ctl_elem_value *ucontrol)
2967 {
2968         int idx = mi2s_get_port_idx(kcontrol);
2969
2970         if (idx < 0)
2971                 return idx;
2972
2973         mi2s_tx_cfg[idx].sample_rate =
2974                 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2975
2976         pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2977                  idx, mi2s_tx_cfg[idx].sample_rate,
2978                  ucontrol->value.enumerated.item[0]);
2979
2980         return 0;
2981 }
2982
2983 static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2984                                    struct snd_ctl_elem_value *ucontrol)
2985 {
2986         int idx = mi2s_get_port_idx(kcontrol);
2987
2988         if (idx < 0)
2989                 return idx;
2990
2991         ucontrol->value.enumerated.item[0] =
2992                 mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
2993
2994         pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2995                  idx, mi2s_tx_cfg[idx].sample_rate,
2996                  ucontrol->value.enumerated.item[0]);
2997
2998         return 0;
2999 }
3000
3001 static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
3002                               struct snd_ctl_elem_value *ucontrol)
3003 {
3004         int idx = mi2s_get_port_idx(kcontrol);
3005
3006         if (idx < 0)
3007                 return idx;
3008
3009         pr_debug("%s: msm_mi2s_[%d]_rx_ch  = %d\n", __func__,
3010                  idx, mi2s_rx_cfg[idx].channels);
3011         ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
3012
3013         return 0;
3014 }
3015
3016 static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
3017                               struct snd_ctl_elem_value *ucontrol)
3018 {
3019         int idx = mi2s_get_port_idx(kcontrol);
3020
3021         if (idx < 0)
3022                 return idx;
3023
3024         mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
3025         pr_debug("%s: msm_mi2s_[%d]_rx_ch  = %d\n", __func__,
3026                  idx, mi2s_rx_cfg[idx].channels);
3027
3028         return 1;
3029 }
3030
3031 static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
3032                               struct snd_ctl_elem_value *ucontrol)
3033 {
3034         int idx = mi2s_get_port_idx(kcontrol);
3035
3036         if (idx < 0)
3037                 return idx;
3038
3039         pr_debug("%s: msm_mi2s_[%d]_tx_ch  = %d\n", __func__,
3040                  idx, mi2s_tx_cfg[idx].channels);
3041         ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
3042
3043         return 0;
3044 }
3045
3046 static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
3047                               struct snd_ctl_elem_value *ucontrol)
3048 {
3049         int idx = mi2s_get_port_idx(kcontrol);
3050
3051         if (idx < 0)
3052                 return idx;
3053
3054         mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
3055         pr_debug("%s: msm_mi2s_[%d]_tx_ch  = %d\n", __func__,
3056                  idx, mi2s_tx_cfg[idx].channels);
3057
3058         return 1;
3059 }
3060
3061 static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
3062                                 struct snd_ctl_elem_value *ucontrol)
3063 {
3064         int idx = mi2s_get_port_idx(kcontrol);
3065
3066         if (idx < 0)
3067                 return idx;
3068
3069         ucontrol->value.enumerated.item[0] =
3070                 mi2s_get_format_value(mi2s_rx_cfg[idx].bit_format);
3071
3072         pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3073                 idx, mi2s_rx_cfg[idx].bit_format,
3074                 ucontrol->value.enumerated.item[0]);
3075
3076         return 0;
3077 }
3078
3079 static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
3080                                 struct snd_ctl_elem_value *ucontrol)
3081 {
3082         int idx = mi2s_get_port_idx(kcontrol);
3083
3084         if (idx < 0)
3085                 return idx;
3086
3087         mi2s_rx_cfg[idx].bit_format =
3088                 mi2s_get_format(ucontrol->value.enumerated.item[0]);
3089
3090         pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3091                   idx, mi2s_rx_cfg[idx].bit_format,
3092                   ucontrol->value.enumerated.item[0]);
3093
3094         return 0;
3095 }
3096
3097 static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
3098                                 struct snd_ctl_elem_value *ucontrol)
3099 {
3100         int idx = mi2s_get_port_idx(kcontrol);
3101
3102         if (idx < 0)
3103                 return idx;
3104
3105         ucontrol->value.enumerated.item[0] =
3106                 mi2s_get_format_value(mi2s_tx_cfg[idx].bit_format);
3107
3108         pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3109                 idx, mi2s_tx_cfg[idx].bit_format,
3110                 ucontrol->value.enumerated.item[0]);
3111
3112         return 0;
3113 }
3114
3115 static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
3116                                 struct snd_ctl_elem_value *ucontrol)
3117 {
3118         int idx = mi2s_get_port_idx(kcontrol);
3119
3120         if (idx < 0)
3121                 return idx;
3122
3123         mi2s_tx_cfg[idx].bit_format =
3124                 mi2s_get_format(ucontrol->value.enumerated.item[0]);
3125
3126         pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3127                   idx, mi2s_tx_cfg[idx].bit_format,
3128                   ucontrol->value.enumerated.item[0]);
3129
3130         return 0;
3131 }
3132
3133 static int msm_hifi_ctrl(struct snd_soc_codec *codec)
3134 {
3135         struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
3136         struct snd_soc_card *card = codec->component.card;
3137         struct msm_asoc_mach_data *pdata =
3138                                 snd_soc_card_get_drvdata(card);
3139
3140         pr_debug("%s: msm_hifi_control = %d", __func__,
3141                  msm_hifi_control);
3142
3143         if (!pdata || !pdata->hph_en1_gpio_p) {
3144                 pr_err("%s: hph_en1_gpio is invalid\n", __func__);
3145                 return -EINVAL;
3146         }
3147         if (msm_hifi_control == MSM_HIFI_ON) {
3148                 msm_cdc_pinctrl_select_active_state(pdata->hph_en1_gpio_p);
3149                 /* 5msec delay needed as per HW requirement */
3150                 usleep_range(5000, 5010);
3151         } else {
3152                 msm_cdc_pinctrl_select_sleep_state(pdata->hph_en1_gpio_p);
3153         }
3154         snd_soc_dapm_sync(dapm);
3155
3156         return 0;
3157 }
3158
3159 static int msm_hifi_get(struct snd_kcontrol *kcontrol,
3160                         struct snd_ctl_elem_value *ucontrol)
3161 {
3162         pr_debug("%s: msm_hifi_control = %d\n",
3163                  __func__, msm_hifi_control);
3164         ucontrol->value.integer.value[0] = msm_hifi_control;
3165
3166         return 0;
3167 }
3168
3169 static int msm_hifi_put(struct snd_kcontrol *kcontrol,
3170                         struct snd_ctl_elem_value *ucontrol)
3171 {
3172         struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
3173
3174         pr_debug("%s() ucontrol->value.integer.value[0] = %ld\n",
3175                  __func__, ucontrol->value.integer.value[0]);
3176
3177         msm_hifi_control = ucontrol->value.integer.value[0];
3178         msm_hifi_ctrl(codec);
3179
3180         return 0;
3181 }
3182
3183 #ifdef CONFIG_MACH_XIAOMI_MSM8998
3184 static int ras_switch_get(struct snd_kcontrol *kcontrol,
3185                 struct snd_ctl_elem_value *ucontrol)
3186 {
3187         int en = -1;
3188         int sel = -1;
3189
3190         if (gpio_is_valid(ras_switch_en_gpio))
3191                 en = gpio_get_value(ras_switch_en_gpio);
3192         if (gpio_is_valid(ras_switch_sel_gpio))
3193                 sel = gpio_get_value(ras_switch_sel_gpio);
3194         pr_debug("%s: ras pin state, en(%d) = %d, sel(%d)=%d\n", __func__,
3195                 ras_switch_en_gpio, en, ras_switch_sel_gpio, sel);
3196
3197         if (en <= 0)
3198                 ucontrol->value.integer.value[0] = 0;
3199         else if (sel <= 0)
3200                 ucontrol->value.integer.value[0] = 1;
3201         else
3202                 ucontrol->value.integer.value[0] = 2;
3203         return 0;
3204 }
3205
3206 static int ras_switch_put(struct snd_kcontrol *kcontrol,
3207                 struct snd_ctl_elem_value *ucontrol)
3208 {
3209         int value = ucontrol->value.integer.value[0];
3210
3211         pr_debug("%s: value = %d\n", __func__, value);
3212
3213         if (gpio_is_valid(ras_switch_en_gpio) &&
3214             gpio_is_valid(ras_switch_sel_gpio)) {
3215                 switch (value) {
3216                 case 0:
3217                         gpio_direction_output(ras_switch_en_gpio, 0);
3218                         gpio_direction_output(ras_switch_sel_gpio, 0);
3219                         break;
3220                 case 1:
3221                         gpio_direction_output(ras_switch_en_gpio, 1);
3222                         gpio_direction_output(ras_switch_sel_gpio, 0);
3223                         break;
3224                 case 2:
3225                         gpio_direction_output(ras_switch_en_gpio, 1);
3226                         gpio_direction_output(ras_switch_sel_gpio, 1);
3227                         break;
3228                 default:
3229                         break;
3230             }
3231         }
3232         return 0;
3233 }
3234
3235 static int usbhs_direction_get(struct snd_kcontrol *kcontrol,
3236                 struct snd_ctl_elem_value *ucontrol)
3237 {
3238         struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
3239         struct snd_soc_card *card = codec->component.card;
3240         struct msm_asoc_mach_data *pdata =
3241                                 snd_soc_card_get_drvdata(card);
3242
3243         ucontrol->value.integer.value[0] = 0;
3244
3245         codec = snd_soc_kcontrol_codec(kcontrol);
3246         if (codec) {
3247                 card = codec->component.card;
3248                 if (card) {
3249                         pdata = snd_soc_card_get_drvdata(card);
3250                         if (!pdata)
3251                                 return 0;
3252                 }
3253         }
3254
3255         if (pdata->us_euro_gpio_p)
3256                 ucontrol->value.integer.value[0] = msm_cdc_pinctrl_get_state(pdata->us_euro_gpio_p);
3257         else if (pdata->us_euro_gpio >= 0)
3258                 ucontrol->value.integer.value[0] = gpio_get_value_cansleep(pdata->us_euro_gpio);
3259
3260         return 0;
3261 }
3262
3263 static int spk_id_get(struct device_node *np, int type)
3264 {
3265         int id;
3266         int state;
3267
3268         state = spk_id_get_pin_3state(np);
3269         if (state < 0) {
3270                 pr_err("%s: Can not get id pin state, %d\n", __func__, state);
3271                 return VENDOR_ID_NONE;
3272         }
3273
3274         switch (state) {
3275         case PIN_PULL_DOWN:
3276                 if (type == 0)
3277                         id = VENDOR_ID_AAC;
3278                 else
3279                         id = VENDOR_ID_SSI;
3280                 break;
3281         case PIN_PULL_UP:
3282                 id = VENDOR_ID_UNKNOWN;
3283                 break;
3284         case PIN_FLOAT:
3285                 if (type == 0)
3286                         id = VENDOR_ID_SSI;
3287                 else
3288                         id = VENDOR_ID_AAC;
3289                 break;
3290         default:
3291                 id = VENDOR_ID_UNKNOWN;
3292                 break;
3293         }
3294
3295         return id;
3296 }
3297
3298 static int vendor_id_get(struct snd_kcontrol *kcontrol,
3299                 struct snd_ctl_elem_value *ucontrol)
3300 {
3301         struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
3302         struct snd_soc_card *card = codec->component.card;
3303         struct msm_asoc_mach_data *pdata =
3304                                 snd_soc_card_get_drvdata(card);
3305
3306         ucontrol->value.integer.value[0] = 0;
3307
3308         codec = snd_soc_kcontrol_codec(kcontrol);
3309         if (codec) {
3310                 card = codec->component.card;
3311                 if (card) {
3312                         pdata = snd_soc_card_get_drvdata(card);
3313                         if (!pdata)
3314                                 return 0;
3315                 }
3316         }
3317
3318         if (!strncmp(kcontrol->id.name, "SPK ID", strlen("SPK ID"))) {
3319                 if (pdata->spk_id_gpio_p)
3320                         ucontrol->value.integer.value[0] = spk_id_get(pdata->spk_id_gpio_p, 0);
3321         } else {
3322                 if (pdata->rcv_id_gpio_p)
3323                         ucontrol->value.integer.value[0] = spk_id_get(pdata->rcv_id_gpio_p, 1);
3324         }
3325
3326         return 0;
3327 }
3328
3329 static int ultrasound_power_get(struct snd_kcontrol *kcontrol,
3330                                 struct snd_ctl_elem_value *ucontrol)
3331 {
3332         ucontrol->value.integer.value[0] = ultrasound_power_state;
3333         return 0;
3334 }
3335
3336 static int ultrasound_power_put(struct snd_kcontrol *kcontrol,
3337                                 struct snd_ctl_elem_value *ucontrol)
3338 {
3339         struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
3340         struct snd_soc_card *card = codec->component.card;
3341         struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
3342         int ret;
3343
3344         ultrasound_power_state = ucontrol->value.integer.value[0];
3345         pr_debug("%s: ultrasound power %d\n", __func__, ultrasound_power_state);
3346
3347         if (ultrasound_power_state == 1) {
3348                 if (pdata->us_p_power)
3349                         ret = regulator_enable(pdata->us_p_power);
3350                 if (pdata->us_n_power)
3351                         ret = regulator_enable(pdata->us_n_power);
3352         } else {
3353                 if (pdata->us_p_power)
3354                         ret = regulator_disable(pdata->us_p_power);
3355                 if (pdata->us_n_power)
3356                         ret = regulator_disable(pdata->us_n_power);
3357         }
3358
3359         return 0;
3360 }
3361 #endif
3362
3363 static const struct snd_kcontrol_new msm_snd_controls[] = {
3364         SOC_ENUM_EXT("SLIM_0_RX Channels", slim_0_rx_chs,
3365                         msm_slim_rx_ch_get, msm_slim_rx_ch_put),
3366         SOC_ENUM_EXT("SLIM_2_RX Channels", slim_2_rx_chs,
3367                         msm_slim_rx_ch_get, msm_slim_rx_ch_put),
3368         SOC_ENUM_EXT("SLIM_0_TX Channels", slim_0_tx_chs,
3369                         msm_slim_tx_ch_get, msm_slim_tx_ch_put),
3370         SOC_ENUM_EXT("SLIM_1_TX Channels", slim_1_tx_chs,
3371                         msm_slim_tx_ch_get, msm_slim_tx_ch_put),
3372         SOC_ENUM_EXT("SLIM_5_RX Channels", slim_5_rx_chs,
3373                         msm_slim_rx_ch_get, msm_slim_rx_ch_put),
3374         SOC_ENUM_EXT("SLIM_6_RX Channels", slim_6_rx_chs,
3375                         msm_slim_rx_ch_get, msm_slim_rx_ch_put),
3376         SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
3377                         msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
3378         SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
3379                         usb_audio_rx_ch_get, usb_audio_rx_ch_put),
3380         SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
3381                         usb_audio_tx_ch_get, usb_audio_tx_ch_put),
3382         SOC_ENUM_EXT("HDMI_RX Channels", ext_disp_rx_chs,
3383                         ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3384         SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
3385                         ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3386         SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
3387                         proxy_rx_ch_get, proxy_rx_ch_put),
3388         SOC_ENUM_EXT("SLIM_0_RX Format", slim_0_rx_format,
3389                         slim_rx_bit_format_get, slim_rx_bit_format_put),
3390         SOC_ENUM_EXT("SLIM_5_RX Format", slim_5_rx_format,
3391                         slim_rx_bit_format_get, slim_rx_bit_format_put),
3392         SOC_ENUM_EXT("SLIM_6_RX Format", slim_6_rx_format,
3393                         slim_rx_bit_format_get, slim_rx_bit_format_put),
3394         SOC_ENUM_EXT("SLIM_0_TX Format", slim_0_tx_format,
3395                         slim_tx_bit_format_get, slim_tx_bit_format_put),
3396         SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
3397                         usb_audio_rx_format_get, usb_audio_rx_format_put),
3398         SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
3399                         usb_audio_tx_format_get, usb_audio_tx_format_put),
3400         SOC_ENUM_EXT("HDMI_RX Bit Format", ext_disp_rx_format,
3401                         ext_disp_rx_format_get, ext_disp_rx_format_put),
3402         SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
3403                         ext_disp_rx_format_get, ext_disp_rx_format_put),
3404         SOC_ENUM_EXT("SLIM_0_RX SampleRate", slim_0_rx_sample_rate,
3405                         slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3406         SOC_ENUM_EXT("SLIM_2_RX SampleRate", slim_2_rx_sample_rate,
3407                         slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3408         SOC_ENUM_EXT("SLIM_0_TX SampleRate", slim_0_tx_sample_rate,
3409                         slim_tx_sample_rate_get, slim_tx_sample_rate_put),
3410         SOC_ENUM_EXT("SLIM_5_RX SampleRate", slim_5_rx_sample_rate,
3411                         slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3412         SOC_ENUM_EXT("SLIM_6_RX SampleRate", slim_6_rx_sample_rate,
3413                         slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3414         SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
3415                         msm_bt_sample_rate_get,
3416                         msm_bt_sample_rate_put),
3417         SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
3418                         msm_bt_sample_rate_rx_get,
3419                         msm_bt_sample_rate_rx_put),
3420         SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
3421                         msm_bt_sample_rate_tx_get,
3422                         msm_bt_sample_rate_tx_put),
3423         SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
3424                         usb_audio_rx_sample_rate_get,
3425                         usb_audio_rx_sample_rate_put),
3426         SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
3427                         usb_audio_tx_sample_rate_get,
3428                         usb_audio_tx_sample_rate_put),
3429         SOC_ENUM_EXT("HDMI_RX SampleRate", ext_disp_rx_sample_rate,
3430                         ext_disp_rx_sample_rate_get,
3431                         ext_disp_rx_sample_rate_put),
3432         SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
3433                         ext_disp_rx_sample_rate_get,
3434                         ext_disp_rx_sample_rate_put),
3435         SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3436                         tdm_rx_sample_rate_get,
3437                         tdm_rx_sample_rate_put),
3438         SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3439                         tdm_tx_sample_rate_get,
3440                         tdm_tx_sample_rate_put),
3441         SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
3442                         tdm_rx_format_get,
3443                         tdm_rx_format_put),
3444         SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
3445                         tdm_tx_format_get,
3446                         tdm_tx_format_put),
3447         SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
3448                         tdm_rx_ch_get,
3449                         tdm_rx_ch_put),
3450         SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
3451                         tdm_tx_ch_get,
3452                         tdm_tx_ch_put),
3453         SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3454                         tdm_rx_sample_rate_get,
3455                         tdm_rx_sample_rate_put),
3456         SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3457                         tdm_tx_sample_rate_get,
3458                         tdm_tx_sample_rate_put),
3459         SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
3460                         tdm_rx_format_get,
3461                         tdm_rx_format_put),
3462         SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
3463                         tdm_tx_format_get,
3464                         tdm_tx_format_put),
3465         SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
3466                         tdm_rx_ch_get,
3467                         tdm_rx_ch_put),
3468         SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
3469                         tdm_tx_ch_get,
3470                         tdm_tx_ch_put),
3471         SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3472                         tdm_rx_sample_rate_get,
3473                         tdm_rx_sample_rate_put),
3474         SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3475                         tdm_tx_sample_rate_get,
3476                         tdm_tx_sample_rate_put),
3477         SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
3478                         tdm_rx_format_get,
3479                         tdm_rx_format_put),
3480         SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
3481                         tdm_tx_format_get,
3482                         tdm_tx_format_put),
3483         SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
3484                         tdm_rx_ch_get,
3485                         tdm_rx_ch_put),
3486         SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
3487                         tdm_tx_ch_get,
3488                         tdm_tx_ch_put),
3489         SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3490                         tdm_rx_sample_rate_get,
3491                         tdm_rx_sample_rate_put),
3492         SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3493                         tdm_tx_sample_rate_get,
3494                         tdm_tx_sample_rate_put),
3495         SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
3496                         tdm_rx_format_get,
3497                         tdm_rx_format_put),
3498         SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
3499                         tdm_tx_format_get,
3500                         tdm_tx_format_put),
3501         SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
3502                         tdm_rx_ch_get,
3503                         tdm_rx_ch_put),
3504         SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
3505                         tdm_tx_ch_get,
3506                         tdm_tx_ch_put),
3507         SOC_ENUM_EXT("PRI_TDM SlotNumber", tdm_slot_num,
3508                         tdm_slot_num_get, tdm_slot_num_put),
3509         SOC_ENUM_EXT("PRI_TDM SlotWidth", tdm_slot_width,
3510                         tdm_slot_width_get, tdm_slot_width_put),
3511         SOC_ENUM_EXT("SEC_TDM SlotNumber", tdm_slot_num,
3512                         tdm_slot_num_get, tdm_slot_num_put),
3513         SOC_ENUM_EXT("SEC_TDM SlotWidth", tdm_slot_width,
3514                         tdm_slot_width_get, tdm_slot_width_put),
3515         SOC_ENUM_EXT("TERT_TDM SlotNumber", tdm_slot_num,
3516                         tdm_slot_num_get, tdm_slot_num_put),
3517         SOC_ENUM_EXT("TERT_TDM SlotWidth", tdm_slot_width,
3518                         tdm_slot_width_get, tdm_slot_width_put),
3519         SOC_ENUM_EXT("QUAT_TDM SlotNumber", tdm_slot_num,
3520                         tdm_slot_num_get, tdm_slot_num_put),
3521         SOC_ENUM_EXT("QUAT_TDM SlotWidth", tdm_slot_width,
3522                         tdm_slot_width_get, tdm_slot_width_put),
3523         SOC_SINGLE_MULTI_EXT("PRI_TDM_RX_0 SlotMapping",
3524                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3525                 tdm_rx_slot_mapping_get, tdm_rx_slot_mapping_put),
3526         SOC_SINGLE_MULTI_EXT("PRI_TDM_RX_1 SlotMapping",
3527                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3528                 tdm_rx_slot_mapping_get, tdm_rx_slot_mapping_put),
3529         SOC_SINGLE_MULTI_EXT("PRI_TDM_RX_2 SlotMapping",
3530                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3531                 tdm_rx_slot_mapping_get, tdm_rx_slot_mapping_put),
3532         SOC_SINGLE_MULTI_EXT("PRI_TDM_RX_3 SlotMapping",
3533                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3534                 tdm_rx_slot_mapping_get, tdm_rx_slot_mapping_put),
3535         SOC_SINGLE_MULTI_EXT("PRI_TDM_RX_4 SlotMapping",
3536                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3537                 tdm_rx_slot_mapping_get, tdm_rx_slot_mapping_put),
3538         SOC_SINGLE_MULTI_EXT("PRI_TDM_RX_5 SlotMapping",
3539                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3540                 tdm_rx_slot_mapping_get, tdm_rx_slot_mapping_put),
3541         SOC_SINGLE_MULTI_EXT("PRI_TDM_RX_6 SlotMapping",
3542                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3543                 tdm_rx_slot_mapping_get, tdm_rx_slot_mapping_put),
3544         SOC_SINGLE_MULTI_EXT("PRI_TDM_RX_7 SlotMapping",
3545                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3546                 tdm_rx_slot_mapping_get, tdm_rx_slot_mapping_put),
3547         SOC_SINGLE_MULTI_EXT("PRI_TDM_TX_0 SlotMapping",
3548                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3549                 tdm_tx_slot_mapping_get, tdm_tx_slot_mapping_put),
3550         SOC_SINGLE_MULTI_EXT("PRI_TDM_TX_1 SlotMapping",
3551                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3552                 tdm_tx_slot_mapping_get, tdm_tx_slot_mapping_put),
3553         SOC_SINGLE_MULTI_EXT("PRI_TDM_TX_2 SlotMapping",
3554                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3555                 tdm_tx_slot_mapping_get, tdm_tx_slot_mapping_put),
3556         SOC_SINGLE_MULTI_EXT("PRI_TDM_TX_3 SlotMapping",
3557                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3558                 tdm_tx_slot_mapping_get, tdm_tx_slot_mapping_put),
3559         SOC_SINGLE_MULTI_EXT("PRI_TDM_TX_4 SlotMapping",
3560                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3561                 tdm_tx_slot_mapping_get, tdm_tx_slot_mapping_put),
3562         SOC_SINGLE_MULTI_EXT("PRI_TDM_TX_5 SlotMapping",
3563                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3564                 tdm_tx_slot_mapping_get, tdm_tx_slot_mapping_put),
3565         SOC_SINGLE_MULTI_EXT("PRI_TDM_TX_6 SlotMapping",
3566                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3567                 tdm_tx_slot_mapping_get, tdm_tx_slot_mapping_put),
3568         SOC_SINGLE_MULTI_EXT("PRI_TDM_TX_7 SlotMapping",
3569                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3570                 tdm_tx_slot_mapping_get, tdm_tx_slot_mapping_put),
3571         SOC_SINGLE_MULTI_EXT("SEC_TDM_RX_0 SlotMapping",
3572                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3573                 tdm_rx_slot_mapping_get, tdm_rx_slot_mapping_put),
3574         SOC_SINGLE_MULTI_EXT("SEC_TDM_RX_1 SlotMapping",
3575                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3576                 tdm_rx_slot_mapping_get, tdm_rx_slot_mapping_put),
3577         SOC_SINGLE_MULTI_EXT("SEC_TDM_RX_2 SlotMapping",
3578                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3579                 tdm_rx_slot_mapping_get, tdm_rx_slot_mapping_put),
3580         SOC_SINGLE_MULTI_EXT("SEC_TDM_RX_3 SlotMapping",
3581                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3582                 tdm_rx_slot_mapping_get, tdm_rx_slot_mapping_put),
3583         SOC_SINGLE_MULTI_EXT("SEC_TDM_RX_4 SlotMapping",
3584                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3585                 tdm_rx_slot_mapping_get, tdm_rx_slot_mapping_put),
3586         SOC_SINGLE_MULTI_EXT("SEC_TDM_RX_5 SlotMapping",
3587                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3588                 tdm_rx_slot_mapping_get, tdm_rx_slot_mapping_put),
3589         SOC_SINGLE_MULTI_EXT("SEC_TDM_RX_6 SlotMapping",
3590                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3591                 tdm_rx_slot_mapping_get, tdm_rx_slot_mapping_put),
3592         SOC_SINGLE_MULTI_EXT("SEC_TDM_RX_7 SlotMapping",
3593                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3594                 tdm_rx_slot_mapping_get, tdm_rx_slot_mapping_put),
3595         SOC_SINGLE_MULTI_EXT("SEC_TDM_TX_0 SlotMapping",
3596                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3597                 tdm_tx_slot_mapping_get, tdm_tx_slot_mapping_put),
3598         SOC_SINGLE_MULTI_EXT("SEC_TDM_TX_1 SlotMapping",
3599                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3600                 tdm_tx_slot_mapping_get, tdm_tx_slot_mapping_put),
3601         SOC_SINGLE_MULTI_EXT("SEC_TDM_TX_2 SlotMapping",
3602                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3603                 tdm_tx_slot_mapping_get, tdm_tx_slot_mapping_put),
3604         SOC_SINGLE_MULTI_EXT("SEC_TDM_TX_3 SlotMapping",
3605                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3606                 tdm_tx_slot_mapping_get, tdm_tx_slot_mapping_put),
3607         SOC_SINGLE_MULTI_EXT("SEC_TDM_TX_4 SlotMapping",
3608                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3609                 tdm_tx_slot_mapping_get, tdm_tx_slot_mapping_put),
3610         SOC_SINGLE_MULTI_EXT("SEC_TDM_TX_5 SlotMapping",
3611                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3612                 tdm_tx_slot_mapping_get, tdm_tx_slot_mapping_put),
3613         SOC_SINGLE_MULTI_EXT("SEC_TDM_TX_6 SlotMapping",
3614                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3615                 tdm_tx_slot_mapping_get, tdm_tx_slot_mapping_put),
3616         SOC_SINGLE_MULTI_EXT("SEC_TDM_TX_7 SlotMapping",
3617                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3618                 tdm_tx_slot_mapping_get, tdm_tx_slot_mapping_put),
3619         SOC_SINGLE_MULTI_EXT("TERT_TDM_RX_0 SlotMapping",
3620                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3621                 tdm_rx_slot_mapping_get, tdm_rx_slot_mapping_put),
3622         SOC_SINGLE_MULTI_EXT("TERT_TDM_RX_1 SlotMapping",
3623                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3624                 tdm_rx_slot_mapping_get, tdm_rx_slot_mapping_put),
3625         SOC_SINGLE_MULTI_EXT("TERT_TDM_RX_2 SlotMapping",
3626                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3627                 tdm_rx_slot_mapping_get, tdm_rx_slot_mapping_put),
3628         SOC_SINGLE_MULTI_EXT("TERT_TDM_RX_3 SlotMapping",
3629                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3630                 tdm_rx_slot_mapping_get, tdm_rx_slot_mapping_put),
3631         SOC_SINGLE_MULTI_EXT("TERT_TDM_RX_4 SlotMapping",
3632                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3633                 tdm_rx_slot_mapping_get, tdm_rx_slot_mapping_put),
3634         SOC_SINGLE_MULTI_EXT("TERT_TDM_RX_5 SlotMapping",
3635                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3636                 tdm_rx_slot_mapping_get, tdm_rx_slot_mapping_put),
3637         SOC_SINGLE_MULTI_EXT("TERT_TDM_RX_6 SlotMapping",
3638                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3639                 tdm_rx_slot_mapping_get, tdm_rx_slot_mapping_put),
3640         SOC_SINGLE_MULTI_EXT("TERT_TDM_RX_7 SlotMapping",
3641                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3642                 tdm_rx_slot_mapping_get, tdm_rx_slot_mapping_put),
3643         SOC_SINGLE_MULTI_EXT("TERT_TDM_TX_0 SlotMapping",
3644                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3645                 tdm_tx_slot_mapping_get, tdm_tx_slot_mapping_put),
3646         SOC_SINGLE_MULTI_EXT("TERT_TDM_TX_1 SlotMapping",
3647                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3648                 tdm_tx_slot_mapping_get, tdm_tx_slot_mapping_put),
3649         SOC_SINGLE_MULTI_EXT("TERT_TDM_TX_2 SlotMapping",
3650                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3651                 tdm_tx_slot_mapping_get, tdm_tx_slot_mapping_put),
3652         SOC_SINGLE_MULTI_EXT("TERT_TDM_TX_3 SlotMapping",
3653                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3654                 tdm_tx_slot_mapping_get, tdm_tx_slot_mapping_put),
3655         SOC_SINGLE_MULTI_EXT("TERT_TDM_TX_4 SlotMapping",
3656                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3657                 tdm_tx_slot_mapping_get, tdm_tx_slot_mapping_put),
3658         SOC_SINGLE_MULTI_EXT("TERT_TDM_TX_5 SlotMapping",
3659                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3660                 tdm_tx_slot_mapping_get, tdm_tx_slot_mapping_put),
3661         SOC_SINGLE_MULTI_EXT("TERT_TDM_TX_6 SlotMapping",
3662                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3663                 tdm_tx_slot_mapping_get, tdm_tx_slot_mapping_put),
3664         SOC_SINGLE_MULTI_EXT("TERT_TDM_TX_7 SlotMapping",
3665                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3666                 tdm_tx_slot_mapping_get, tdm_tx_slot_mapping_put),
3667         SOC_SINGLE_MULTI_EXT("QUAT_TDM_RX_0 SlotMapping",
3668                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3669                 tdm_rx_slot_mapping_get, tdm_rx_slot_mapping_put),
3670         SOC_SINGLE_MULTI_EXT("QUAT_TDM_RX_1 SlotMapping",
3671                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3672                 tdm_rx_slot_mapping_get, tdm_rx_slot_mapping_put),
3673         SOC_SINGLE_MULTI_EXT("QUAT_TDM_RX_2 SlotMapping",
3674                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3675                 tdm_rx_slot_mapping_get, tdm_rx_slot_mapping_put),
3676         SOC_SINGLE_MULTI_EXT("QUAT_TDM_RX_3 SlotMapping",
3677                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3678                 tdm_rx_slot_mapping_get, tdm_rx_slot_mapping_put),
3679         SOC_SINGLE_MULTI_EXT("QUAT_TDM_RX_4 SlotMapping",
3680                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3681                 tdm_rx_slot_mapping_get, tdm_rx_slot_mapping_put),
3682         SOC_SINGLE_MULTI_EXT("QUAT_TDM_RX_5 SlotMapping",
3683                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3684                 tdm_rx_slot_mapping_get, tdm_rx_slot_mapping_put),
3685         SOC_SINGLE_MULTI_EXT("QUAT_TDM_RX_6 SlotMapping",
3686                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3687                 tdm_rx_slot_mapping_get, tdm_rx_slot_mapping_put),
3688         SOC_SINGLE_MULTI_EXT("QUAT_TDM_RX_7 SlotMapping",
3689                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3690                 tdm_rx_slot_mapping_get, tdm_rx_slot_mapping_put),
3691         SOC_SINGLE_MULTI_EXT("QUAT_TDM_TX_0 SlotMapping",
3692                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3693                 tdm_tx_slot_mapping_get, tdm_tx_slot_mapping_put),
3694         SOC_SINGLE_MULTI_EXT("QUAT_TDM_TX_1 SlotMapping",
3695                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3696                 tdm_tx_slot_mapping_get, tdm_tx_slot_mapping_put),
3697         SOC_SINGLE_MULTI_EXT("QUAT_TDM_TX_2 SlotMapping",
3698                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3699                 tdm_tx_slot_mapping_get, tdm_tx_slot_mapping_put),
3700         SOC_SINGLE_MULTI_EXT("QUAT_TDM_TX_3 SlotMapping",
3701                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3702                 tdm_tx_slot_mapping_get, tdm_tx_slot_mapping_put),
3703         SOC_SINGLE_MULTI_EXT("QUAT_TDM_TX_4 SlotMapping",
3704                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3705                 tdm_tx_slot_mapping_get, tdm_tx_slot_mapping_put),
3706         SOC_SINGLE_MULTI_EXT("QUAT_TDM_TX_5 SlotMapping",
3707                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3708                 tdm_tx_slot_mapping_get, tdm_tx_slot_mapping_put),
3709         SOC_SINGLE_MULTI_EXT("QUAT_TDM_TX_6 SlotMapping",
3710                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3711                 tdm_tx_slot_mapping_get, tdm_tx_slot_mapping_put),
3712         SOC_SINGLE_MULTI_EXT("QUAT_TDM_TX_7 SlotMapping",
3713                 SND_SOC_NOPM, 0, 0xFFFF, 0, TDM_SLOT_OFFSET_MAX,
3714                 tdm_tx_slot_mapping_get, tdm_tx_slot_mapping_put),
3715         SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3716                         aux_pcm_rx_sample_rate_get,
3717                         aux_pcm_rx_sample_rate_put),
3718         SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
3719                         aux_pcm_rx_sample_rate_get,
3720                         aux_pcm_rx_sample_rate_put),
3721         SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
3722                         aux_pcm_rx_sample_rate_get,
3723                         aux_pcm_rx_sample_rate_put),
3724         SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
3725                         aux_pcm_rx_sample_rate_get,
3726                         aux_pcm_rx_sample_rate_put),
3727         SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3728                         aux_pcm_tx_sample_rate_get,
3729                         aux_pcm_tx_sample_rate_put),
3730         SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
3731                         aux_pcm_tx_sample_rate_get,
3732                         aux_pcm_tx_sample_rate_put),
3733         SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
3734                         aux_pcm_tx_sample_rate_get,
3735                         aux_pcm_tx_sample_rate_put),
3736         SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
3737                         aux_pcm_tx_sample_rate_get,
3738                         aux_pcm_tx_sample_rate_put),
3739         SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
3740                         mi2s_rx_sample_rate_get,
3741                         mi2s_rx_sample_rate_put),
3742         SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
3743                         mi2s_rx_sample_rate_get,
3744                         mi2s_rx_sample_rate_put),
3745         SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
3746                         mi2s_rx_sample_rate_get,
3747                         mi2s_rx_sample_rate_put),
3748         SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
3749                         mi2s_rx_sample_rate_get,
3750                         mi2s_rx_sample_rate_put),
3751         SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
3752                         mi2s_tx_sample_rate_get,
3753                         mi2s_tx_sample_rate_put),
3754         SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
3755                         mi2s_tx_sample_rate_get,
3756                         mi2s_tx_sample_rate_put),
3757         SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
3758                         mi2s_tx_sample_rate_get,
3759                         mi2s_tx_sample_rate_put),
3760         SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
3761                         mi2s_tx_sample_rate_get,
3762                         mi2s_tx_sample_rate_put),
3763         SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
3764                         msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3765         SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
3766                         msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3767         SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
3768                         msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3769         SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
3770                         msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3771         SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
3772                         msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3773         SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
3774                         msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3775         SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
3776                         msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3777         SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
3778                         msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3779         SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
3780                         msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3781         SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
3782                         msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3783         SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
3784                         msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3785         SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
3786                         msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3787         SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
3788                         msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3789         SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
3790                         msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3791         SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
3792                         msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3793         SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
3794                         msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3795         SOC_ENUM_EXT("HiFi Function", hifi_function, msm_hifi_get,
3796                         msm_hifi_put),
3797 #ifdef CONFIG_MACH_XIAOMI_MSM8998
3798         SOC_ENUM_EXT("RAS Switch", ras_switch,
3799                         ras_switch_get, ras_switch_put),
3800         SOC_SINGLE_EXT("USB Headset Direction", 0, 0, UINT_MAX, 0,
3801                         usbhs_direction_get, NULL),
3802         SOC_ENUM_EXT("RCV ID", vendor_id, vendor_id_get, NULL),
3803         SOC_ENUM_EXT("SPK ID", vendor_id, vendor_id_get, NULL),
3804         SOC_ENUM_EXT("Ultrasound Power", ultrasound_power,
3805                         ultrasound_power_get, ultrasound_power_put),
3806 #endif
3807 };
3808
3809 static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
3810                                         int enable, bool dapm)
3811 {
3812         int ret = 0;
3813
3814         if (!strcmp(dev_name(codec->dev), "tasha_codec"))
3815                 ret = tasha_cdc_mclk_enable(codec, enable, dapm);
3816         else if (!strcmp(dev_name(codec->dev), "tavil_codec"))
3817                 ret = tavil_cdc_mclk_enable(codec, enable);
3818         else {
3819                 dev_err(codec->dev, "%s: unknown codec to enable ext clk\n",
3820                         __func__);
3821                 ret = -EINVAL;
3822         }
3823         return ret;
3824 }
3825
3826 static int msm_snd_enable_codec_ext_tx_clk(struct snd_soc_codec *codec,
3827                                            int enable, bool dapm)
3828 {
3829         int ret = 0;
3830
3831         if (!strcmp(dev_name(codec->dev), "tasha_codec"))
3832                 ret = tasha_cdc_mclk_tx_enable(codec, enable, dapm);
3833         else {
3834                 dev_err(codec->dev, "%s: unknown codec to enable ext clk\n",
3835                         __func__);
3836                 ret = -EINVAL;
3837         }
3838         return ret;
3839 }
3840
3841 static int msm_mclk_tx_event(struct snd_soc_dapm_widget *w,
3842                                  struct snd_kcontrol *kcontrol, int event)
3843 {
3844         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3845
3846         pr_debug("%s: event = %d\n", __func__, event);
3847
3848         switch (event) {
3849         case SND_SOC_DAPM_PRE_PMU:
3850                 return msm_snd_enable_codec_ext_tx_clk(codec, 1, true);
3851         case SND_SOC_DAPM_POST_PMD:
3852                 return msm_snd_enable_codec_ext_tx_clk(codec, 0, true);
3853         }
3854         return 0;
3855 }
3856
3857 static int msm_mclk_event(struct snd_soc_dapm_widget *w,
3858                                  struct snd_kcontrol *kcontrol, int event)
3859 {
3860         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3861
3862         pr_debug("%s: event = %d\n", __func__, event);
3863
3864         switch (event) {
3865         case SND_SOC_DAPM_PRE_PMU:
3866                 return msm_snd_enable_codec_ext_clk(codec, 1, true);
3867         case SND_SOC_DAPM_POST_PMD:
3868                 return msm_snd_enable_codec_ext_clk(codec, 0, true);
3869         }
3870         return 0;
3871 }
3872
3873 static int msm_hifi_ctrl_event(struct snd_soc_dapm_widget *w,
3874                                struct snd_kcontrol *k, int event)
3875 {
3876         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3877         struct snd_soc_card *card = codec->component.card;
3878         struct msm_asoc_mach_data *pdata =
3879                                 snd_soc_card_get_drvdata(card);
3880
3881         pr_debug("%s: msm_hifi_control = %d", __func__, msm_hifi_control);
3882
3883         if (!pdata || !pdata->hph_en0_gpio_p) {
3884                 pr_err("%s: hph_en0_gpio is invalid\n", __func__);
3885                 return -EINVAL;
3886         }
3887
3888         if (msm_hifi_control != MSM_HIFI_ON) {
3889                 pr_debug("%s: HiFi mixer control is not set\n",
3890                          __func__);
3891                 return 0;
3892         }
3893
3894         switch (event) {
3895         case SND_SOC_DAPM_POST_PMU:
3896                 msm_cdc_pinctrl_select_active_state(pdata->hph_en0_gpio_p);
3897                 break;
3898         case SND_SOC_DAPM_PRE_PMD:
3899                 msm_cdc_pinctrl_select_sleep_state(pdata->hph_en0_gpio_p);
3900                 break;
3901         }
3902
3903         return 0;
3904 }
3905
3906 static const struct snd_soc_dapm_widget msm_dapm_widgets[] = {
3907
3908         SND_SOC_DAPM_SUPPLY("MCLK",  SND_SOC_NOPM, 0, 0,
3909                             msm_mclk_event,
3910                             SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3911
3912         SND_SOC_DAPM_SUPPLY("MCLK TX",  SND_SOC_NOPM, 0, 0,
3913         msm_mclk_tx_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3914
3915         SND_SOC_DAPM_SPK("Lineout_1 amp", NULL),
3916         SND_SOC_DAPM_SPK("Lineout_3 amp", NULL),
3917         SND_SOC_DAPM_SPK("Lineout_2 amp", NULL),
3918         SND_SOC_DAPM_SPK("Lineout_4 amp", NULL),
3919         SND_SOC_DAPM_SPK("hifi amp", msm_hifi_ctrl_event),
3920         SND_SOC_DAPM_MIC("Handset Mic", NULL),
3921         SND_SOC_DAPM_MIC("Headset Mic", NULL),
3922         SND_SOC_DAPM_MIC("ANCRight Headset Mic", NULL),
3923         SND_SOC_DAPM_MIC("ANCLeft Headset Mic", NULL),
3924         SND_SOC_DAPM_MIC("Analog Mic5", NULL),
3925         SND_SOC_DAPM_MIC("Analog Mic6", NULL),
3926
3927         SND_SOC_DAPM_MIC("Digital Mic0", NULL),
3928         SND_SOC_DAPM_MIC("Digital Mic1", NULL),
3929         SND_SOC_DAPM_MIC("Digital Mic2", NULL),
3930         SND_SOC_DAPM_MIC("Digital Mic3", NULL),
3931         SND_SOC_DAPM_MIC("Digital Mic4", NULL),
3932         SND_SOC_DAPM_MIC("Digital Mic5", NULL),
3933 };
3934
3935 static inline int param_is_mask(int p)
3936 {
3937         return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
3938                         (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
3939 }
3940
3941 static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
3942                                              int n)
3943 {
3944         return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
3945 }
3946
3947 static void param_set_mask(struct snd_pcm_hw_params *p, int n, unsigned bit)
3948 {
3949         if (bit >= SNDRV_MASK_MAX)
3950                 return;
3951         if (param_is_mask(n)) {
3952                 struct snd_mask *m = param_to_mask(p, n);
3953
3954                 m->bits[0] = 0;
3955                 m->bits[1] = 0;
3956                 m->bits[bit >> 5] |= (1 << (bit & 31));
3957         }
3958 }
3959
3960 static int msm_slim_get_ch_from_beid(int32_t be_id)
3961 {
3962         int ch_id = 0;
3963
3964         switch (be_id) {
3965         case MSM_BACKEND_DAI_SLIMBUS_0_RX:
3966                 ch_id = SLIM_RX_0;
3967                 break;
3968         case MSM_BACKEND_DAI_SLIMBUS_1_RX:
3969                 ch_id = SLIM_RX_1;
3970                 break;
3971         case MSM_BACKEND_DAI_SLIMBUS_2_RX:
3972                 ch_id = SLIM_RX_2;
3973                 break;
3974         case MSM_BACKEND_DAI_SLIMBUS_3_RX:
3975                 ch_id = SLIM_RX_3;
3976                 break;
3977         case MSM_BACKEND_DAI_SLIMBUS_4_RX:
3978                 ch_id = SLIM_RX_4;
3979                 break;
3980         case MSM_BACKEND_DAI_SLIMBUS_6_RX:
3981                 ch_id = SLIM_RX_6;
3982                 break;
3983         case MSM_BACKEND_DAI_SLIMBUS_0_TX:
3984                 ch_id = SLIM_TX_0;
3985                 break;
3986         case MSM_BACKEND_DAI_SLIMBUS_3_TX:
3987                 ch_id = SLIM_TX_3;
3988                 break;
3989         default:
3990                 ch_id = SLIM_RX_0;
3991                 break;
3992         }
3993
3994         return ch_id;
3995 }
3996
3997 static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
3998 {
3999         int idx;
4000
4001         switch (be_id) {
4002         case MSM_BACKEND_DAI_HDMI_RX:
4003                 idx = HDMI_RX_IDX;
4004                 break;
4005         case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
4006                 idx = DP_RX_IDX;
4007                 break;
4008         default:
4009                 pr_err("%s: Incorrect ext_disp be_id %d\n", __func__, be_id);
4010                 idx = -EINVAL;
4011                 break;
4012         }
4013
4014         return idx;
4015 }
4016
4017 static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
4018                                   struct snd_pcm_hw_params *params)
4019 {
4020         struct snd_soc_dai_link *dai_link = rtd->dai_link;
4021         struct snd_interval *rate = hw_param_interval(params,
4022                                         SNDRV_PCM_HW_PARAM_RATE);
4023         struct snd_interval *channels = hw_param_interval(params,
4024                                         SNDRV_PCM_HW_PARAM_CHANNELS);
4025         int rc = 0;
4026         int idx;
4027         void *config = NULL;
4028         struct snd_soc_codec *codec = NULL;
4029
4030         pr_debug("%s: format = %d, rate = %d\n",
4031                   __func__, params_format(params), params_rate(params));
4032
4033         switch (dai_link->be_id) {
4034         case MSM_BACKEND_DAI_SLIMBUS_0_RX:
4035         case MSM_BACKEND_DAI_SLIMBUS_1_RX:
4036         case MSM_BACKEND_DAI_SLIMBUS_2_RX:
4037         case MSM_BACKEND_DAI_SLIMBUS_3_RX:
4038         case MSM_BACKEND_DAI_SLIMBUS_4_RX:
4039         case MSM_BACKEND_DAI_SLIMBUS_6_RX:
4040                 idx = msm_slim_get_ch_from_beid(dai_link->be_id);
4041                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4042                                 slim_rx_cfg[idx].bit_format);
4043                 rate->min = rate->max = slim_rx_cfg[idx].sample_rate;
4044                 channels->min = channels->max = slim_rx_cfg[idx].channels;
4045                 break;
4046
4047         case MSM_BACKEND_DAI_SLIMBUS_0_TX:
4048         case MSM_BACKEND_DAI_SLIMBUS_3_TX:
4049                 idx = msm_slim_get_ch_from_beid(dai_link->be_id);
4050                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4051                                 slim_tx_cfg[idx].bit_format);
4052                 rate->min = rate->max = slim_tx_cfg[idx].sample_rate;
4053                 channels->min = channels->max = slim_tx_cfg[idx].channels;
4054                 break;
4055
4056         case MSM_BACKEND_DAI_SLIMBUS_1_TX:
4057                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4058                                 slim_tx_cfg[1].bit_format);
4059                 rate->min = rate->max = slim_tx_cfg[1].sample_rate;
4060                 channels->min = channels->max = slim_tx_cfg[1].channels;
4061                 break;
4062
4063         case MSM_BACKEND_DAI_SLIMBUS_4_TX:
4064                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4065                                SNDRV_PCM_FORMAT_S32_LE);
4066                 rate->min = rate->max = SAMPLING_RATE_8KHZ;
4067                 channels->min = channels->max = msm_vi_feed_tx_ch;
4068                 break;
4069
4070         case MSM_BACKEND_DAI_SLIMBUS_5_RX:
4071                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4072                                 slim_rx_cfg[5].bit_format);
4073                 rate->min = rate->max = slim_rx_cfg[5].sample_rate;
4074                 channels->min = channels->max = slim_rx_cfg[5].channels;
4075                 break;
4076
4077         case MSM_BACKEND_DAI_SLIMBUS_5_TX:
4078                 codec = rtd->codec;
4079                 rate->min = rate->max = SAMPLING_RATE_16KHZ;
4080                 channels->min = channels->max = 1;
4081
4082                 config = msm_codec_fn.get_afe_config_fn(codec,
4083                                         AFE_SLIMBUS_SLAVE_PORT_CONFIG);
4084                 if (config) {
4085                         rc = afe_set_config(AFE_SLIMBUS_SLAVE_PORT_CONFIG,
4086                                             config, SLIMBUS_5_TX);
4087                         if (rc)
4088                                 pr_err("%s: Failed to set slimbus slave port config %d\n",
4089                                         __func__, rc);
4090                 }
4091                 break;
4092
4093         case MSM_BACKEND_DAI_SLIMBUS_7_RX:
4094                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4095                                 slim_rx_cfg[SLIM_RX_7].bit_format);
4096                 rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
4097                 channels->min = channels->max =
4098                         slim_rx_cfg[SLIM_RX_7].channels;
4099                 break;
4100
4101         case MSM_BACKEND_DAI_SLIMBUS_7_TX:
4102                 rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
4103                 channels->min = channels->max =
4104                         slim_tx_cfg[SLIM_TX_7].channels;
4105                 break;
4106
4107         case MSM_BACKEND_DAI_SLIMBUS_8_TX:
4108                 rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
4109                 channels->min = channels->max =
4110                         slim_tx_cfg[SLIM_TX_8].channels;
4111                 break;
4112
4113         case MSM_BACKEND_DAI_USB_RX:
4114                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4115                                 usb_rx_cfg.bit_format);
4116                 rate->min = rate->max = usb_rx_cfg.sample_rate;
4117                 channels->min = channels->max = usb_rx_cfg.channels;
4118                 break;
4119
4120         case MSM_BACKEND_DAI_USB_TX:
4121                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4122                                 usb_tx_cfg.bit_format);
4123                 rate->min = rate->max = usb_tx_cfg.sample_rate;
4124                 channels->min = channels->max = usb_tx_cfg.channels;
4125                 break;
4126
4127         case MSM_BACKEND_DAI_HDMI_RX:
4128         case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
4129                 idx = msm_ext_disp_get_idx_from_beid(dai_link->be_id);
4130                 if (IS_ERR_VALUE(idx)) {
4131                         pr_err("%s: Incorrect ext disp idx %d\n",
4132                                __func__, idx);
4133                         rc = idx;
4134                         goto done;
4135                 }
4136
4137                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4138                                 ext_disp_rx_cfg[idx].bit_format);
4139                 rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
4140                 channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
4141                 break;
4142
4143         case MSM_BACKEND_DAI_AFE_PCM_RX:
4144                 channels->min = channels->max = proxy_rx_cfg.channels;
4145                 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4146                 break;
4147
4148         case MSM_BACKEND_DAI_PRI_TDM_RX_0:
4149                 channels->min = channels->max =
4150                                 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
4151                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4152                                tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
4153                 rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
4154                 break;
4155
4156         case MSM_BACKEND_DAI_PRI_TDM_TX_0:
4157                 channels->min = channels->max =
4158                                 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
4159                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4160                                tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
4161                 rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
4162                 break;
4163
4164         case MSM_BACKEND_DAI_SEC_TDM_RX_0:
4165                 channels->min = channels->max =
4166                                 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
4167                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4168                                tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
4169                 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
4170                 break;
4171
4172         case MSM_BACKEND_DAI_SEC_TDM_TX_0:
4173                 channels->min = channels->max =
4174                                 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
4175                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4176                                tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
4177                 rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
4178                 break;
4179
4180         case MSM_BACKEND_DAI_TERT_TDM_RX_0:
4181                 channels->min = channels->max =
4182                                 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
4183                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4184                                tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
4185                 rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
4186                 break;
4187
4188         case MSM_BACKEND_DAI_TERT_TDM_TX_0:
4189                 channels->min = channels->max =
4190                                 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
4191                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4192                                tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
4193                 rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
4194                 break;
4195
4196         case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
4197                 channels->min = channels->max =
4198                                 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
4199                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4200                                tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
4201                 rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
4202                 break;
4203
4204         case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
4205                 channels->min = channels->max =
4206                                 tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
4207                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4208                                tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
4209                 rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
4210                 break;
4211
4212         case MSM_BACKEND_DAI_AUXPCM_RX:
4213                 rate->min = rate->max =
4214                         aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
4215                 channels->min = channels->max =
4216                         aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
4217                 break;
4218
4219         case MSM_BACKEND_DAI_AUXPCM_TX:
4220                 rate->min = rate->max =
4221                         aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
4222                 channels->min = channels->max =
4223                         aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
4224                 break;
4225
4226         case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
4227                 rate->min = rate->max =
4228                         aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
4229                 channels->min = channels->max =
4230                         aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
4231                 break;
4232
4233         case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
4234                 rate->min = rate->max =
4235                         aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
4236                 channels->min = channels->max =
4237                         aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
4238                 break;
4239
4240         case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
4241                 rate->min = rate->max =
4242                         aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
4243                 channels->min = channels->max =
4244                         aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
4245                 break;
4246
4247         case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
4248                 rate->min = rate->max =
4249                         aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
4250                 channels->min = channels->max =
4251                         aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
4252                 break;
4253
4254         case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
4255                 rate->min = rate->max =
4256                         aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
4257                 channels->min = channels->max =
4258                         aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
4259                 break;
4260
4261         case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
4262                 rate->min = rate->max =
4263                         aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
4264                 channels->min = channels->max =
4265                         aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
4266                 break;
4267
4268         case MSM_BACKEND_DAI_PRI_MI2S_RX:
4269                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4270                         mi2s_rx_cfg[PRIM_MI2S].bit_format);
4271                 rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
4272                 channels->min = channels->max =
4273                         mi2s_rx_cfg[PRIM_MI2S].channels;
4274                 break;
4275
4276         case MSM_BACKEND_DAI_PRI_MI2S_TX:
4277                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4278                         mi2s_tx_cfg[PRIM_MI2S].bit_format);
4279                 rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
4280                 channels->min = channels->max =
4281                         mi2s_tx_cfg[PRIM_MI2S].channels;
4282                 break;
4283
4284         case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
4285                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4286                         mi2s_rx_cfg[SEC_MI2S].bit_format);
4287                 rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
4288                 channels->min = channels->max =
4289                         mi2s_rx_cfg[SEC_MI2S].channels;
4290                 break;
4291
4292         case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
4293                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4294                         mi2s_tx_cfg[SEC_MI2S].bit_format);
4295                 rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
4296                 channels->min = channels->max =
4297                         mi2s_tx_cfg[SEC_MI2S].channels;
4298                 break;
4299
4300         case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
4301                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4302                         mi2s_rx_cfg[TERT_MI2S].bit_format);
4303                 rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
4304                 channels->min = channels->max =
4305                         mi2s_rx_cfg[TERT_MI2S].channels;
4306                 break;
4307
4308         case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
4309                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4310                         mi2s_tx_cfg[TERT_MI2S].bit_format);
4311                 rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
4312                 channels->min = channels->max =
4313                         mi2s_tx_cfg[TERT_MI2S].channels;
4314                 break;
4315
4316         case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
4317                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4318                         mi2s_rx_cfg[QUAT_MI2S].bit_format);
4319                 rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
4320                 channels->min = channels->max =
4321                         mi2s_rx_cfg[QUAT_MI2S].channels;
4322                 break;
4323
4324         case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
4325                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4326                         mi2s_tx_cfg[QUAT_MI2S].bit_format);
4327                 rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
4328                 channels->min = channels->max =
4329                         mi2s_tx_cfg[QUAT_MI2S].channels;
4330                 break;
4331
4332         default:
4333                 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4334                 break;
4335         }
4336
4337 done:
4338         return rc;
4339 }
4340
4341 static bool msm_swap_gnd_mic(struct snd_soc_codec *codec)
4342 {
4343         struct snd_soc_card *card = codec->component.card;
4344         struct msm_asoc_mach_data *pdata =
4345                                 snd_soc_card_get_drvdata(card);
4346         int value = 0;
4347
4348         if (pdata->us_euro_gpio_p) {
4349                 value = msm_cdc_pinctrl_get_state(pdata->us_euro_gpio_p);
4350                 if (value)
4351                         msm_cdc_pinctrl_select_sleep_state(
4352                                                         pdata->us_euro_gpio_p);
4353                 else
4354                         msm_cdc_pinctrl_select_active_state(
4355                                                         pdata->us_euro_gpio_p);
4356         } else if (pdata->us_euro_gpio >= 0) {
4357                 value = gpio_get_value_cansleep(pdata->us_euro_gpio);
4358                 gpio_set_value_cansleep(pdata->us_euro_gpio, !value);
4359         }
4360         pr_debug("%s: swap select switch %d to %d\n", __func__, value, !value);
4361         return true;
4362 }
4363
4364 static int msm_afe_set_config(struct snd_soc_codec *codec)
4365 {
4366         int ret = 0;
4367         void *config_data = NULL;
4368
4369         if (!msm_codec_fn.get_afe_config_fn) {
4370                 dev_err(codec->dev, "%s: codec get afe config not init'ed\n",
4371                         __func__);
4372                 return -EINVAL;
4373         }
4374
4375         config_data = msm_codec_fn.get_afe_config_fn(codec,
4376                         AFE_CDC_REGISTERS_CONFIG);
4377         if (config_data) {
4378                 ret = afe_set_config(AFE_CDC_REGISTERS_CONFIG, config_data, 0);
4379                 if (ret) {
4380                         dev_err(codec->dev,
4381                                 "%s: Failed to set codec registers config %d\n",
4382                                 __func__, ret);
4383                         return ret;
4384                 }
4385         }
4386
4387         config_data = msm_codec_fn.get_afe_config_fn(codec,
4388                         AFE_CDC_REGISTER_PAGE_CONFIG);
4389         if (config_data) {
4390                 ret = afe_set_config(AFE_CDC_REGISTER_PAGE_CONFIG, config_data,
4391                                     0);
4392                 if (ret)
4393                         dev_err(codec->dev,
4394                                 "%s: Failed to set cdc register page config\n",
4395                                 __func__);
4396         }
4397
4398         config_data = msm_codec_fn.get_afe_config_fn(codec,
4399                         AFE_SLIMBUS_SLAVE_CONFIG);
4400         if (config_data) {
4401                 ret = afe_set_config(AFE_SLIMBUS_SLAVE_CONFIG, config_data, 0);
4402                 if (ret) {
4403                         dev_err(codec->dev,
4404                                 "%s: Failed to set slimbus slave config %d\n",
4405                                 __func__, ret);
4406                         return ret;
4407                 }
4408         }
4409
4410         return 0;
4411 }
4412
4413 static void msm_afe_clear_config(void)
4414 {
4415         afe_clear_config(AFE_CDC_REGISTERS_CONFIG);
4416         afe_clear_config(AFE_SLIMBUS_SLAVE_CONFIG);
4417 }
4418
4419 static int msm_adsp_power_up_config(struct snd_soc_codec *codec)
4420 {
4421         int ret = 0;
4422         unsigned long timeout;
4423         int adsp_ready = 0;
4424
4425         timeout = jiffies +
4426                 msecs_to_jiffies(ADSP_STATE_READY_TIMEOUT_MS);
4427
4428         do {
4429                 if (q6core_is_adsp_ready()) {
4430                         pr_debug("%s: ADSP Audio is ready\n", __func__);
4431                         adsp_ready = 1;
4432                         break;
4433                 } else {
4434                         /*
4435                          * ADSP will be coming up after subsystem restart and
4436                          * it might not be fully up when the control reaches
4437                          * here. So, wait for 50msec before checking ADSP state
4438                          */
4439                         msleep(50);
4440                 }
4441         } while (time_after(timeout, jiffies));
4442
4443         if (!adsp_ready) {
4444                 pr_err("%s: timed out waiting for ADSP Audio\n", __func__);
4445                 ret = -ETIMEDOUT;
4446                 goto err_fail;
4447         }
4448
4449         ret = msm_afe_set_config(codec);
4450         if (ret)
4451                 pr_err("%s: Failed to set AFE config. err %d\n",
4452                         __func__, ret);
4453
4454         return 0;
4455
4456 err_fail:
4457         return ret;
4458 }
4459
4460 static int msm8998_notifier_service_cb(struct notifier_block *this,
4461                                          unsigned long opcode, void *ptr)
4462 {
4463         int ret;
4464         struct snd_soc_card *card = NULL;
4465         const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
4466         struct snd_soc_pcm_runtime *rtd;
4467         struct snd_soc_codec *codec;
4468
4469         pr_debug("%s: Service opcode 0x%lx\n", __func__, opcode);
4470
4471         switch (opcode) {
4472         case AUDIO_NOTIFIER_SERVICE_DOWN:
4473                 /*
4474                  * Use flag to ignore initial boot notifications
4475                  * On initial boot msm_adsp_power_up_config is
4476                  * called on init. There is no need to clear
4477                  * and set the config again on initial boot.
4478                  */
4479                 if (is_initial_boot)
4480                         break;
4481                 msm_afe_clear_config();
4482                 break;
4483         case AUDIO_NOTIFIER_SERVICE_UP:
4484                 if (is_initial_boot) {
4485                         is_initial_boot = false;
4486                         break;
4487                 }
4488                 if (!spdev)
4489                         return -EINVAL;
4490
4491                 card = platform_get_drvdata(spdev);
4492                 rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
4493                 if (!rtd) {
4494                         dev_err(card->dev,
4495                                 "%s: snd_soc_get_pcm_runtime for %s failed!\n",
4496                                 __func__, be_dl_name);
4497                         ret = -EINVAL;
4498                         goto done;
4499                 }
4500                 codec = rtd->codec;
4501
4502                 ret = msm_adsp_power_up_config(codec);
4503                 if (ret < 0) {
4504                         dev_err(card->dev,
4505                                 "%s: msm_adsp_power_up_config failed ret = %d!\n",
4506                                 __func__, ret);
4507                         goto done;
4508                 }
4509                 break;
4510         default:
4511                 break;
4512         }
4513 done:
4514         return NOTIFY_OK;
4515 }
4516
4517 static struct notifier_block service_nb = {
4518         .notifier_call  = msm8998_notifier_service_cb,
4519         .priority = -INT_MAX,
4520 };
4521
4522 static int msm_audrx_init(struct snd_soc_pcm_runtime *rtd)
4523 {
4524         int ret = 0;
4525         void *config_data;
4526         struct snd_soc_codec *codec = rtd->codec;
4527         struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
4528         struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4529         struct snd_soc_dai *codec_dai = rtd->codec_dai;
4530         struct snd_soc_pcm_runtime *rtd_aux = rtd->card->rtd_aux;
4531         struct snd_card *card;
4532         struct snd_info_entry *entry;
4533         struct msm_asoc_mach_data *pdata =
4534                                 snd_soc_card_get_drvdata(rtd->card);
4535
4536         /* Codec SLIMBUS configuration
4537          * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8, RX9, RX10, RX11, RX12, RX13
4538          * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
4539          * TX14, TX15, TX16
4540          */
4541         unsigned int rx_ch[TASHA_RX_MAX] = {144, 145, 146, 147, 148, 149, 150,
4542                                             151, 152, 153, 154, 155, 156};
4543         unsigned int tx_ch[TASHA_TX_MAX] = {128, 129, 130, 131, 132, 133,
4544                                             134, 135, 136, 137, 138, 139,
4545                                             140, 141, 142, 143};
4546
4547         /* Tavil Codec SLIMBUS configuration
4548          * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8
4549          * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
4550          * TX14, TX15, TX16
4551          */
4552         unsigned int rx_ch_tavil[WCD934X_RX_MAX] = {144, 145, 146, 147, 148,
4553                                                     149, 150, 151};
4554         unsigned int tx_ch_tavil[WCD934X_TX_MAX] = {128, 129, 130, 131, 132,
4555                                                     133, 134, 135, 136, 137,
4556                                                     138, 139, 140, 141, 142,
4557                                                     143};
4558
4559         pr_info("%s: dev_name%s\n", __func__, dev_name(cpu_dai->dev));
4560
4561         rtd->pmdown_time = 0;
4562
4563         ret = snd_soc_add_codec_controls(codec, msm_snd_controls,
4564                                          ARRAY_SIZE(msm_snd_controls));
4565         if (ret < 0) {
4566                 pr_err("%s: add_codec_controls failed, err %d\n",
4567                         __func__, ret);
4568                 return ret;
4569         }
4570
4571         snd_soc_dapm_new_controls(dapm, msm_dapm_widgets,
4572                                 ARRAY_SIZE(msm_dapm_widgets));
4573
4574         if (!strcmp(dev_name(codec_dai->dev), "tasha_codec"))
4575                 snd_soc_dapm_add_routes(dapm, wcd_audio_paths_tasha,
4576                                         ARRAY_SIZE(wcd_audio_paths_tasha));
4577         else
4578                 snd_soc_dapm_add_routes(dapm, wcd_audio_paths,
4579                                         ARRAY_SIZE(wcd_audio_paths));
4580
4581         snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
4582         snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
4583         snd_soc_dapm_ignore_suspend(dapm, "ANCRight Headset Mic");
4584         snd_soc_dapm_ignore_suspend(dapm, "ANCLeft Headset Mic");
4585         snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
4586         snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
4587         snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
4588         snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
4589         snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
4590         snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
4591         snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
4592         snd_soc_dapm_ignore_suspend(dapm, "Analog Mic6");
4593         snd_soc_dapm_ignore_suspend(dapm, "MADINPUT");
4594         snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_INPUT");
4595         snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT1");
4596         snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT2");
4597         snd_soc_dapm_ignore_suspend(dapm, "EAR");
4598         snd_soc_dapm_ignore_suspend(dapm, "LINEOUT1");
4599         snd_soc_dapm_ignore_suspend(dapm, "LINEOUT2");
4600         snd_soc_dapm_ignore_suspend(dapm, "ANC EAR");
4601         snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
4602         snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
4603         snd_soc_dapm_ignore_suspend(dapm, "HPHL");
4604         snd_soc_dapm_ignore_suspend(dapm, "HPHR");
4605         snd_soc_dapm_ignore_suspend(dapm, "AIF4 VI");
4606         snd_soc_dapm_ignore_suspend(dapm, "VIINPUT");
4607         snd_soc_dapm_ignore_suspend(dapm, "ANC HPHL");
4608         snd_soc_dapm_ignore_suspend(dapm, "ANC HPHR");
4609
4610         if (!strcmp(dev_name(codec_dai->dev), "tasha_codec")) {
4611                 snd_soc_dapm_ignore_suspend(dapm, "LINEOUT3");
4612                 snd_soc_dapm_ignore_suspend(dapm, "LINEOUT4");
4613                 snd_soc_dapm_ignore_suspend(dapm, "ANC LINEOUT1");
4614                 snd_soc_dapm_ignore_suspend(dapm, "ANC LINEOUT2");
4615         }
4616
4617         snd_soc_dapm_sync(dapm);
4618
4619         if (!strcmp(dev_name(codec_dai->dev), "tavil_codec")) {
4620                 snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch_tavil),
4621                                         tx_ch_tavil, ARRAY_SIZE(rx_ch_tavil),
4622                                         rx_ch_tavil);
4623         } else {
4624                 snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
4625                                         tx_ch, ARRAY_SIZE(rx_ch),
4626                                         rx_ch);
4627         }
4628
4629         if (!strcmp(dev_name(codec_dai->dev), "tavil_codec")) {
4630                 msm_codec_fn.get_afe_config_fn = tavil_get_afe_config;
4631         } else {
4632                 msm_codec_fn.get_afe_config_fn = tasha_get_afe_config;
4633                 msm_codec_fn.mbhc_hs_detect_exit = tasha_mbhc_hs_detect_exit;
4634         }
4635
4636         ret = msm_adsp_power_up_config(codec);
4637         if (ret) {
4638                 pr_err("%s: Failed to set AFE config %d\n", __func__, ret);
4639                 goto err_afe_cfg;
4640         }
4641
4642         config_data = msm_codec_fn.get_afe_config_fn(codec,
4643                                                      AFE_AANC_VERSION);
4644         if (config_data) {
4645                 ret = afe_set_config(AFE_AANC_VERSION, config_data, 0);
4646                 if (ret) {
4647                         pr_err("%s: Failed to set aanc version %d\n",
4648                                 __func__, ret);
4649                         goto err_afe_cfg;
4650                 }
4651         }
4652
4653         if (!strcmp(dev_name(codec_dai->dev), "tasha_codec")) {
4654                 config_data = msm_codec_fn.get_afe_config_fn(codec,
4655                                                 AFE_CDC_CLIP_REGISTERS_CONFIG);
4656                 if (config_data) {
4657                         ret = afe_set_config(AFE_CDC_CLIP_REGISTERS_CONFIG,
4658                                                  config_data, 0);
4659                         if (ret) {
4660                                 pr_err("%s: Failed to set clip registers %d\n",
4661                                         __func__, ret);
4662                                 goto err_afe_cfg;
4663                         }
4664                 }
4665                 config_data = msm_codec_fn.get_afe_config_fn(codec,
4666                                 AFE_CLIP_BANK_SEL);
4667                 if (config_data) {
4668                         ret = afe_set_config(AFE_CLIP_BANK_SEL, config_data, 0);
4669                         if (ret) {
4670                                 pr_err("%s: Failed to set AFE bank selection %d\n",
4671                                         __func__, ret);
4672                                 goto err_afe_cfg;
4673                         }
4674                 }
4675         }
4676
4677         /*
4678          * Send speaker configuration only for WSA8810.
4679          * Defalut configuration is for WSA8815.
4680          */
4681         pr_debug("%s: Number of aux devices: %d\n",
4682                 __func__, rtd->card->num_aux_devs);
4683         if (!strcmp(dev_name(codec_dai->dev), "tavil_codec")) {
4684                 if (rtd->card->num_aux_devs && rtd_aux && rtd_aux->component)
4685                         if (!strcmp(rtd_aux->component->name, WSA8810_NAME_1) ||
4686                             !strcmp(rtd_aux->component->name, WSA8810_NAME_2)) {
4687                                 tavil_set_spkr_mode(rtd->codec, SPKR_MODE_1);
4688                                 tavil_set_spkr_gain_offset(rtd->codec,
4689                                                         RX_GAIN_OFFSET_M1P5_DB);
4690                 }
4691                 card = rtd->card->snd_card;
4692                 entry = snd_register_module_info(card->module, "codecs",
4693                                                  card->proc_root);
4694                 if (!entry) {
4695                         pr_debug("%s: Cannot create codecs module entry\n",
4696                                  __func__);
4697                         pdata->codec_root = NULL;
4698                         goto done;
4699                 }
4700                 pdata->codec_root = entry;
4701                 tavil_codec_info_create_codec_entry(pdata->codec_root, codec);
4702         } else {
4703                 if (rtd->card->num_aux_devs && rtd_aux && rtd_aux->component)
4704                         if (!strcmp(rtd_aux->component->name, WSA8810_NAME_1) ||
4705                             !strcmp(rtd_aux->component->name, WSA8810_NAME_2)) {
4706                                 tasha_set_spkr_mode(rtd->codec, SPKR_MODE_1);
4707                                 tasha_set_spkr_gain_offset(rtd->codec,
4708                                                         RX_GAIN_OFFSET_M1P5_DB);
4709                 }
4710                 card = rtd->card->snd_card;
4711                 entry = snd_register_module_info(card->module, "codecs",
4712                                                  card->proc_root);
4713                 if (!entry) {
4714                         pr_debug("%s: Cannot create codecs module entry\n",
4715                                  __func__);
4716                         ret = 0;
4717                         goto err_snd_module;
4718                 }
4719                 pdata->codec_root = entry;
4720                 tasha_codec_info_create_codec_entry(pdata->codec_root, codec);
4721         }
4722 done:
4723         codec_reg_done = true;
4724         return 0;
4725
4726 err_snd_module:
4727 err_afe_cfg:
4728         return ret;
4729 }
4730
4731 static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
4732 {
4733         unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
4734         unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX]  = {159, 160, 161};
4735         struct snd_soc_dai *codec_dai = rtd->codec_dai;
4736
4737         return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
4738                                            tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
4739 }
4740
4741 static void *def_tasha_mbhc_cal(void)
4742 {
4743         void *tasha_wcd_cal;
4744         struct wcd_mbhc_btn_detect_cfg *btn_cfg;
4745         u16 *btn_high;
4746
4747         tasha_wcd_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
4748                                 WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
4749         if (!tasha_wcd_cal)
4750                 return NULL;
4751
4752 #define S(X, Y) ((WCD_MBHC_CAL_PLUG_TYPE_PTR(tasha_wcd_cal)->X) = (Y))
4753 #ifdef CONFIG_MACH_XIAOMI_MSM8998
4754         S(v_hs_max, 1700);
4755 #else
4756         S(v_hs_max, 1600);
4757 #endif
4758 #undef S
4759 #define S(X, Y) ((WCD_MBHC_CAL_BTN_DET_PTR(tasha_wcd_cal)->X) = (Y))
4760         S(num_btn, WCD_MBHC_DEF_BUTTONS);
4761 #undef S
4762
4763         btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(tasha_wcd_cal);
4764         btn_high = ((void *)&btn_cfg->_v_btn_low) +
4765                 (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
4766
4767         btn_high[0] = 75;
4768 #ifdef CONFIG_MACH_XIAOMI_MSM8998
4769         btn_high[1] = 260;
4770         btn_high[2] = 750;
4771         btn_high[3] = 750;
4772         btn_high[4] = 750;
4773         btn_high[5] = 750;
4774         btn_high[6] = 750;
4775         btn_high[7] = 750;
4776 #else
4777         btn_high[1] = 150;
4778         btn_high[2] = 237;
4779         btn_high[3] = 500;
4780         btn_high[4] = 500;
4781         btn_high[5] = 500;
4782         btn_high[6] = 500;
4783         btn_high[7] = 500;
4784 #endif
4785
4786         return tasha_wcd_cal;
4787 }
4788
4789 static void *def_tavil_mbhc_cal(void)
4790 {
4791         void *tavil_wcd_cal;
4792         struct wcd_mbhc_btn_detect_cfg *btn_cfg;
4793         u16 *btn_high;
4794
4795         tavil_wcd_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
4796                                 WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
4797         if (!tavil_wcd_cal)
4798                 return NULL;
4799
4800 #define S(X, Y) ((WCD_MBHC_CAL_PLUG_TYPE_PTR(tavil_wcd_cal)->X) = (Y))
4801         S(v_hs_max, 1600);
4802 #undef S
4803 #define S(X, Y) ((WCD_MBHC_CAL_BTN_DET_PTR(tavil_wcd_cal)->X) = (Y))
4804         S(num_btn, WCD_MBHC_DEF_BUTTONS);
4805 #undef S
4806
4807         btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(tavil_wcd_cal);
4808         btn_high = ((void *)&btn_cfg->_v_btn_low) +
4809                 (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
4810
4811         btn_high[0] = 75;
4812         btn_high[1] = 150;
4813         btn_high[2] = 237;
4814         btn_high[3] = 500;
4815         btn_high[4] = 500;
4816         btn_high[5] = 500;
4817         btn_high[6] = 500;
4818         btn_high[7] = 500;
4819
4820         return tavil_wcd_cal;
4821 }
4822
4823 static int msm_snd_hw_params(struct snd_pcm_substream *substream,
4824                              struct snd_pcm_hw_params *params)
4825 {
4826         struct snd_soc_pcm_runtime *rtd = substream->private_data;
4827         struct snd_soc_dai *codec_dai = rtd->codec_dai;
4828         struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4829         struct snd_soc_dai_link *dai_link = rtd->dai_link;
4830
4831         int ret = 0;
4832         u32 rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
4833         u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
4834         u32 user_set_tx_ch = 0;
4835         u32 rx_ch_count;
4836
4837         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4838                 ret = snd_soc_dai_get_channel_map(codec_dai,
4839                                         &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
4840                 if (ret < 0) {
4841                         pr_err("%s: failed to get codec chan map, err:%d\n",
4842                                 __func__, ret);
4843                         goto err_ch_map;
4844                 }
4845                 if (dai_link->be_id == MSM_BACKEND_DAI_SLIMBUS_5_RX) {
4846                         pr_debug("%s: rx_5_ch=%d\n", __func__,
4847                                   slim_rx_cfg[5].channels);
4848                         rx_ch_count = slim_rx_cfg[5].channels;
4849                 } else if (dai_link->be_id == MSM_BACKEND_DAI_SLIMBUS_2_RX) {
4850                         pr_debug("%s: rx_2_ch=%d\n", __func__,
4851                                  slim_rx_cfg[2].channels);
4852                         rx_ch_count = slim_rx_cfg[2].channels;
4853                 } else if (dai_link->be_id == MSM_BACKEND_DAI_SLIMBUS_6_RX) {
4854                         pr_debug("%s: rx_6_ch=%d\n", __func__,
4855                                   slim_rx_cfg[6].channels);
4856                         rx_ch_count = slim_rx_cfg[6].channels;
4857                 } else {
4858                         pr_debug("%s: rx_0_ch=%d\n", __func__,
4859                                   slim_rx_cfg[0].channels);
4860                         rx_ch_count = slim_rx_cfg[0].channels;
4861                 }
4862                 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
4863                                                   rx_ch_count, rx_ch);
4864                 if (ret < 0) {
4865                         pr_err("%s: failed to set cpu chan map, err:%d\n",
4866                                 __func__, ret);
4867                         goto err_ch_map;
4868                 }
4869         } else {
4870
4871                 pr_debug("%s: %s_tx_dai_id_%d_ch=%d\n", __func__,
4872                          codec_dai->name, codec_dai->id, user_set_tx_ch);
4873                 ret = snd_soc_dai_get_channel_map(codec_dai,
4874                                          &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
4875                 if (ret < 0) {
4876                         pr_err("%s: failed to get codec chan map\n, err:%d\n",
4877                                 __func__, ret);
4878                         goto err_ch_map;
4879                 }
4880                 /* For <codec>_tx1 case */
4881                 if (dai_link->be_id == MSM_BACKEND_DAI_SLIMBUS_0_TX)
4882                         user_set_tx_ch = slim_tx_cfg[0].channels;
4883                 /* For <codec>_tx3 case */
4884                 else if (dai_link->be_id == MSM_BACKEND_DAI_SLIMBUS_1_TX)
4885                         user_set_tx_ch = slim_tx_cfg[1].channels;
4886                 else if (dai_link->be_id == MSM_BACKEND_DAI_SLIMBUS_4_TX)
4887                         user_set_tx_ch = msm_vi_feed_tx_ch;
4888                 else
4889                         user_set_tx_ch = tx_ch_cnt;
4890
4891                 pr_debug("%s: msm_slim_0_tx_ch(%d) user_set_tx_ch(%d) tx_ch_cnt(%d), be_id (%d)\n",
4892                          __func__,  slim_tx_cfg[0].channels, user_set_tx_ch,
4893                          tx_ch_cnt, dai_link->be_id);
4894
4895                 ret = snd_soc_dai_set_channel_map(cpu_dai,
4896                                                   user_set_tx_ch, tx_ch, 0, 0);
4897                 if (ret < 0)
4898                         pr_err("%s: failed to set cpu chan map, err:%d\n",
4899                                 __func__, ret);
4900         }
4901
4902 err_ch_map:
4903         return ret;
4904 }
4905
4906 static int msm_snd_cpe_hw_params(struct snd_pcm_substream *substream,
4907                                  struct snd_pcm_hw_params *params)
4908 {
4909         struct snd_soc_pcm_runtime *rtd = substream->private_data;
4910         struct snd_soc_dai *codec_dai = rtd->codec_dai;
4911         struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4912         struct snd_soc_dai_link *dai_link = rtd->dai_link;
4913
4914         int ret = 0;
4915         u32 tx_ch[SLIM_MAX_TX_PORTS];
4916         u32 tx_ch_cnt = 0;
4917         u32 user_set_tx_ch = 0;
4918
4919         if (substream->stream != SNDRV_PCM_STREAM_CAPTURE) {
4920                 pr_err("%s: Invalid stream type %d\n",
4921                         __func__, substream->stream);
4922                 ret = -EINVAL;
4923                 goto err_stream_type;
4924         }
4925
4926         pr_debug("%s: %s_tx_dai_id_%d\n", __func__,
4927                  codec_dai->name, codec_dai->id);
4928         ret = snd_soc_dai_get_channel_map(codec_dai,
4929                                  &tx_ch_cnt, tx_ch, NULL, NULL);
4930         if (ret < 0) {
4931                 pr_err("%s: failed to get codec chan map\n, err:%d\n",
4932                         __func__, ret);
4933                 goto err_ch_map;
4934         }
4935
4936         user_set_tx_ch = tx_ch_cnt;
4937
4938         pr_debug("%s: tx_ch_cnt(%d) be_id %d\n",
4939                  __func__, tx_ch_cnt, dai_link->be_id);
4940
4941         ret = snd_soc_dai_set_channel_map(cpu_dai,
4942                                           user_set_tx_ch, tx_ch, 0, 0);
4943         if (ret < 0)
4944                 pr_err("%s: failed to set cpu chan map, err:%d\n",
4945                         __func__, ret);
4946 err_ch_map:
4947 err_stream_type:
4948         return ret;
4949 }
4950
4951 static int msm_slimbus_2_hw_params(struct snd_pcm_substream *substream,
4952                                           struct snd_pcm_hw_params *params)
4953 {
4954         struct snd_soc_pcm_runtime *rtd = substream->private_data;
4955         struct snd_soc_dai *codec_dai = rtd->codec_dai;
4956         struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4957         unsigned int rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
4958         unsigned int rx_ch_cnt = 0, tx_ch_cnt = 0;
4959         unsigned int num_tx_ch = 0;
4960         unsigned int num_rx_ch = 0;
4961         int ret = 0;
4962
4963         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4964                 num_rx_ch =  params_channels(params);
4965                 pr_debug("%s: %s rx_dai_id = %d  num_ch = %d\n", __func__,
4966                         codec_dai->name, codec_dai->id, num_rx_ch);
4967                 ret = snd_soc_dai_get_channel_map(codec_dai,
4968                                 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
4969                 if (ret < 0) {
4970                         pr_err("%s: failed to get codec chan map, err:%d\n",
4971                                 __func__, ret);
4972                         goto err_ch_map;
4973                 }
4974                 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
4975                                 num_rx_ch, rx_ch);
4976                 if (ret < 0) {
4977                         pr_err("%s: failed to set cpu chan map, err:%d\n",
4978                                 __func__, ret);
4979                         goto err_ch_map;
4980                 }
4981         } else {
4982                 num_tx_ch =  params_channels(params);
4983                 pr_debug("%s: %s  tx_dai_id = %d  num_ch = %d\n", __func__,
4984                         codec_dai->name, codec_dai->id, num_tx_ch);
4985                 ret = snd_soc_dai_get_channel_map(codec_dai,
4986                                 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
4987                 if (ret < 0) {
4988                         pr_err("%s: failed to get codec chan map, err:%d\n",
4989                                 __func__, ret);
4990                         goto err_ch_map;
4991                 }
4992                 ret = snd_soc_dai_set_channel_map(cpu_dai,
4993                                 num_tx_ch, tx_ch, 0, 0);
4994                 if (ret < 0) {
4995                         pr_err("%s: failed to set cpu chan map, err:%d\n",
4996                                 __func__, ret);
4997                         goto err_ch_map;
4998                 }
4999         }
5000
5001 err_ch_map:
5002         return ret;
5003 }
5004
5005 static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
5006                              struct snd_pcm_hw_params *params)
5007 {
5008         struct snd_soc_pcm_runtime *rtd = substream->private_data;
5009         struct snd_soc_dai *codec_dai = rtd->codec_dai;
5010         struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5011         struct snd_soc_dai_link *dai_link = rtd->dai_link;
5012         u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
5013         u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5014         int ret;
5015
5016         dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
5017                  codec_dai->name, codec_dai->id);
5018         ret = snd_soc_dai_get_channel_map(codec_dai,
5019                                  &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5020         if (ret) {
5021                 dev_err(rtd->dev,
5022                         "%s: failed to get BTFM codec chan map\n, err:%d\n",
5023                         __func__, ret);
5024                 goto exit;
5025         }
5026
5027         dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) be_id %d\n",
5028                 __func__, tx_ch_cnt, dai_link->be_id);
5029
5030         ret = snd_soc_dai_set_channel_map(cpu_dai,
5031                                           tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
5032         if (ret)
5033                 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
5034                         __func__, ret);
5035
5036 exit:
5037         return ret;
5038 }
5039
5040 static int msm_aux_pcm_snd_startup(struct snd_pcm_substream *substream)
5041 {
5042         int ret = 0;
5043         struct snd_soc_pcm_runtime *rtd = substream->private_data;
5044         struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5045         int index = cpu_dai->id - 1;
5046
5047         dev_dbg(rtd->card->dev,
5048                 "%s: substream = %s  stream = %d, dai name %s, dai ID %d\n",
5049                 __func__, substream->name, substream->stream,
5050                 cpu_dai->name, cpu_dai->id);
5051
5052         if (index < PRIM_AUX_PCM || index > QUAT_AUX_PCM) {
5053                 ret = -EINVAL;
5054                 dev_err(rtd->card->dev,
5055                         "%s: CPU DAI id (%d) out of range\n",
5056                         __func__, cpu_dai->id);
5057                 goto done;
5058         }
5059
5060         mutex_lock(&auxpcm_intf_conf[index].lock);
5061         if (++auxpcm_intf_conf[index].ref_cnt == 1) {
5062                 if (mi2s_auxpcm_conf[index].pcm_i2s_sel_vt_addr != NULL) {
5063                         mutex_lock(&mi2s_auxpcm_conf[index].lock);
5064                         iowrite32(1,
5065                                 mi2s_auxpcm_conf[index].pcm_i2s_sel_vt_addr);
5066                         mutex_unlock(&mi2s_auxpcm_conf[index].lock);
5067                 } else {
5068                         dev_err(rtd->card->dev,
5069                                 "%s lpaif_tert_muxsel_virt_addr is NULL\n",
5070                                 __func__);
5071                         ret = -EINVAL;
5072                 }
5073         }
5074         if (IS_ERR_VALUE(ret))
5075                 auxpcm_intf_conf[index].ref_cnt--;
5076
5077         mutex_unlock(&auxpcm_intf_conf[index].lock);
5078
5079 done:
5080         return ret;
5081 }
5082
5083 static void msm_aux_pcm_snd_shutdown(struct snd_pcm_substream *substream)
5084 {
5085         struct snd_soc_pcm_runtime *rtd = substream->private_data;
5086         int index = rtd->cpu_dai->id - 1;
5087
5088         dev_dbg(rtd->card->dev,
5089                 "%s: substream = %s  stream = %d, dai name %s, dai ID %d\n",
5090                 __func__,
5091                 substream->name, substream->stream,
5092                 rtd->cpu_dai->name, rtd->cpu_dai->id);
5093
5094         if (index < PRIM_AUX_PCM || index > QUAT_AUX_PCM) {
5095                 dev_err(rtd->card->dev,
5096                         "%s: CPU DAI id (%d) out of range\n",
5097                         __func__, rtd->cpu_dai->id);
5098                 return;
5099         }
5100
5101         mutex_lock(&auxpcm_intf_conf[index].lock);
5102         if (--auxpcm_intf_conf[index].ref_cnt == 0) {
5103                 if (mi2s_auxpcm_conf[index].pcm_i2s_sel_vt_addr != NULL) {
5104                         mutex_lock(&mi2s_auxpcm_conf[index].lock);
5105                         iowrite32(0,
5106                                 mi2s_auxpcm_conf[index].pcm_i2s_sel_vt_addr);
5107                         mutex_unlock(&mi2s_auxpcm_conf[index].lock);
5108                 } else {
5109                         dev_err(rtd->card->dev,
5110                                 "%s lpaif_tert_muxsel_virt_addr is NULL\n",
5111                                 __func__);
5112                 }
5113         }
5114         mutex_unlock(&auxpcm_intf_conf[index].lock);
5115 }
5116
5117 static int msm_get_port_id(int be_id)
5118 {
5119         int afe_port_id;
5120
5121         switch (be_id) {
5122         case MSM_BACKEND_DAI_PRI_MI2S_RX:
5123                 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
5124                 break;
5125         case MSM_BACKEND_DAI_PRI_MI2S_TX:
5126                 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
5127                 break;
5128         case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
5129                 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
5130                 break;
5131         case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
5132                 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
5133                 break;
5134         case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
5135                 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
5136                 break;
5137         case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
5138                 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
5139                 break;
5140         case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
5141                 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
5142                 break;
5143         case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
5144                 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
5145                 break;
5146         default:
5147                 pr_err("%s: Invalid be_id: %d\n", __func__, be_id);
5148                 afe_port_id = -EINVAL;
5149         }
5150
5151         return afe_port_id;
5152 }
5153
5154 static u32 get_mi2s_bits_per_sample(u32 bit_format)
5155 {
5156         u32 bit_per_sample;
5157
5158         switch (bit_format) {
5159         case SNDRV_PCM_FORMAT_S32_LE:
5160         case SNDRV_PCM_FORMAT_S24_3LE:
5161         case SNDRV_PCM_FORMAT_S24_LE:
5162                 bit_per_sample = 32;
5163                 break;
5164         case SNDRV_PCM_FORMAT_S16_LE:
5165         default:
5166                 bit_per_sample = 16;
5167                 break;
5168         }
5169
5170         return bit_per_sample;
5171 }
5172
5173 static void update_mi2s_clk_val(int dai_id, int stream)
5174 {
5175         u32 bit_per_sample;
5176
5177         if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
5178                 bit_per_sample =
5179                     get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
5180                 mi2s_clk[dai_id].clk_freq_in_hz =
5181                     mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
5182         } else {
5183                 bit_per_sample =
5184                     get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
5185                 mi2s_clk[dai_id].clk_freq_in_hz =
5186                     mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
5187         }
5188 }
5189
5190 static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
5191 {
5192         int ret = 0;
5193         struct snd_soc_pcm_runtime *rtd = substream->private_data;
5194         struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5195         int port_id = 0;
5196         int index = cpu_dai->id;
5197
5198         port_id = msm_get_port_id(rtd->dai_link->be_id);
5199         if (IS_ERR_VALUE(port_id)) {
5200                 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
5201                 ret = port_id;
5202                 goto done;
5203         }
5204
5205         if (enable) {
5206                 update_mi2s_clk_val(index, substream->stream);
5207                 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
5208                         mi2s_clk[index].clk_freq_in_hz);
5209         }
5210
5211         mi2s_clk[index].enable = enable;
5212         ret = afe_set_lpass_clock_v2(port_id,
5213                                      &mi2s_clk[index]);
5214         if (ret < 0) {
5215                 dev_err(rtd->card->dev,
5216                         "%s: afe lpass clock failed for port 0x%x , err:%d\n",
5217                         __func__, port_id, ret);
5218                 goto done;
5219         }
5220
5221 done:
5222         return ret;
5223 }
5224
5225 static int msm_set_pinctrl(struct msm_pinctrl_info *pinctrl_info,
5226                                 enum pinctrl_pin_state new_state)
5227 {
5228         int ret = 0;
5229         int curr_state = 0;
5230
5231         if (pinctrl_info == NULL) {
5232                 pr_err("%s: pinctrl_info is NULL\n", __func__);
5233                 ret = -EINVAL;
5234                 goto err;
5235         }
5236
5237         if (pinctrl_info->pinctrl == NULL) {
5238                 pr_err("%s: pinctrl_info->pinctrl is NULL\n", __func__);
5239                 ret = -EINVAL;
5240                 goto err;
5241         }
5242
5243         curr_state = pinctrl_info->curr_state;
5244         pinctrl_info->curr_state = new_state;
5245         pr_debug("%s: curr_state = %s new_state = %s\n", __func__,
5246                  pin_states[curr_state], pin_states[pinctrl_info->curr_state]);
5247
5248         if (curr_state == pinctrl_info->curr_state) {
5249                 pr_debug("%s: Already in same state\n", __func__);
5250                 goto err;
5251         }
5252
5253         if (curr_state != STATE_DISABLE &&
5254                 pinctrl_info->curr_state != STATE_DISABLE) {
5255                 pr_debug("%s: state already active cannot switch\n", __func__);
5256                 ret = -EIO;
5257                 goto err;
5258         }
5259
5260         switch (pinctrl_info->curr_state) {
5261         case STATE_MI2S_ACTIVE:
5262                 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5263                                         pinctrl_info->mi2s_active);
5264                 if (ret) {
5265                         pr_err("%s: MI2S state select failed with %d\n",
5266                                 __func__, ret);
5267                         ret = -EIO;
5268                         goto err;
5269                 }
5270                 break;
5271         case STATE_TDM_ACTIVE:
5272                 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5273                                         pinctrl_info->tdm_active);
5274                 if (ret) {
5275                         pr_err("%s: TDM state select failed with %d\n",
5276                                 __func__, ret);
5277                         ret = -EIO;
5278                         goto err;
5279                 }
5280                 break;
5281         case STATE_DISABLE:
5282                 if (curr_state == STATE_MI2S_ACTIVE) {
5283                         ret = pinctrl_select_state(pinctrl_info->pinctrl,
5284                                         pinctrl_info->mi2s_disable);
5285                 } else {
5286                         ret = pinctrl_select_state(pinctrl_info->pinctrl,
5287                                         pinctrl_info->tdm_disable);
5288                 }
5289                 if (ret) {
5290                         pr_err("%s:  state disable failed with %d\n",
5291                                 __func__, ret);
5292                         ret = -EIO;
5293                         goto err;
5294                 }
5295                 break;
5296         default:
5297                 pr_err("%s: TLMM pin state is invalid\n", __func__);
5298                 return -EINVAL;
5299         }
5300
5301 err:
5302         return ret;
5303 }
5304
5305 static void msm_release_pinctrl(struct platform_device *pdev)
5306 {
5307         struct snd_soc_card *card = platform_get_drvdata(pdev);
5308         struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5309         struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5310
5311         if (pinctrl_info->pinctrl) {
5312                 devm_pinctrl_put(pinctrl_info->pinctrl);
5313                 pinctrl_info->pinctrl = NULL;
5314         }
5315 }
5316
5317 static int msm_get_pinctrl(struct platform_device *pdev)
5318 {
5319         struct snd_soc_card *card = platform_get_drvdata(pdev);
5320         struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5321         struct msm_pinctrl_info *pinctrl_info = NULL;
5322         struct pinctrl *pinctrl;
5323         int ret;
5324
5325         pinctrl_info = &pdata->pinctrl_info;
5326
5327         if (pinctrl_info == NULL) {
5328                 pr_err("%s: pinctrl_info is NULL\n", __func__);
5329                 return -EINVAL;
5330         }
5331
5332         pinctrl = devm_pinctrl_get(&pdev->dev);
5333         if (IS_ERR_OR_NULL(pinctrl)) {
5334                 pr_err("%s: Unable to get pinctrl handle\n", __func__);
5335                 return -EINVAL;
5336         }
5337         pinctrl_info->pinctrl = pinctrl;
5338
5339         /* get all the states handles from Device Tree */
5340         pinctrl_info->mi2s_disable = pinctrl_lookup_state(pinctrl,
5341                                                 "quat-mi2s-sleep");
5342         if (IS_ERR(pinctrl_info->mi2s_disable)) {
5343                 pr_err("%s: could not get mi2s_disable pinstate\n", __func__);
5344                 goto err;
5345         }
5346         pinctrl_info->mi2s_active = pinctrl_lookup_state(pinctrl,
5347                                                 "quat-mi2s-active");
5348         if (IS_ERR(pinctrl_info->mi2s_active)) {
5349                 pr_err("%s: could not get mi2s_active pinstate\n", __func__);
5350                 goto err;
5351         }
5352         pinctrl_info->tdm_disable = pinctrl_lookup_state(pinctrl,
5353                                                 "quat-tdm-sleep");
5354         if (IS_ERR(pinctrl_info->tdm_disable)) {
5355                 pr_err("%s: could not get tdm_disable pinstate\n", __func__);
5356                 goto err;
5357         }
5358         pinctrl_info->tdm_active = pinctrl_lookup_state(pinctrl,
5359                                                 "quat-tdm-active");
5360         if (IS_ERR(pinctrl_info->tdm_active)) {
5361                 pr_err("%s: could not get tdm_active pinstate\n",
5362                         __func__);
5363                 goto err;
5364         }
5365         /* Reset the TLMM pins to a default state */
5366         ret = pinctrl_select_state(pinctrl_info->pinctrl,
5367                                         pinctrl_info->mi2s_disable);
5368         if (ret != 0) {
5369                 pr_err("%s: Disable TLMM pins failed with %d\n",
5370                         __func__, ret);
5371                 ret = -EIO;
5372                 goto err;
5373         }
5374         pinctrl_info->curr_state = STATE_DISABLE;
5375
5376         return 0;
5377
5378 err:
5379         devm_pinctrl_put(pinctrl);
5380         pinctrl_info->pinctrl = NULL;
5381         return -EINVAL;
5382 }
5383
5384 static int msm_tdm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
5385                                       struct snd_pcm_hw_params *params)
5386 {
5387         struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5388         struct snd_interval *rate = hw_param_interval(params,
5389                                         SNDRV_PCM_HW_PARAM_RATE);
5390         struct snd_interval *channels = hw_param_interval(params,
5391                                         SNDRV_PCM_HW_PARAM_CHANNELS);
5392         switch (cpu_dai->id) {
5393         case AFE_PORT_ID_PRIMARY_TDM_RX:
5394                 channels->min = channels->max =
5395                                 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
5396                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5397                                 tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
5398                 rate->min = rate->max =
5399                                 tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
5400                 break;
5401         case AFE_PORT_ID_PRIMARY_TDM_RX_1:
5402                 channels->min = channels->max =
5403                                 tdm_rx_cfg[TDM_PRI][TDM_1].channels;
5404                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5405                                 tdm_rx_cfg[TDM_PRI][TDM_1].bit_format);
5406                 rate->min = rate->max =
5407                                 tdm_rx_cfg[TDM_PRI][TDM_1].sample_rate;
5408                 break;
5409         case AFE_PORT_ID_PRIMARY_TDM_RX_2:
5410                 channels->min = channels->max =
5411                                 tdm_rx_cfg[TDM_PRI][TDM_2].channels;
5412                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5413                                 tdm_rx_cfg[TDM_PRI][TDM_2].bit_format);
5414                 rate->min = rate->max =
5415                                 tdm_rx_cfg[TDM_PRI][TDM_2].sample_rate;
5416                 break;
5417         case AFE_PORT_ID_PRIMARY_TDM_RX_3:
5418                 channels->min = channels->max =
5419                                 tdm_rx_cfg[TDM_PRI][TDM_3].channels;
5420                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5421                                 tdm_rx_cfg[TDM_PRI][TDM_3].bit_format);
5422                 rate->min = rate->max =
5423                                 tdm_rx_cfg[TDM_PRI][TDM_3].sample_rate;
5424                 break;
5425         case AFE_PORT_ID_PRIMARY_TDM_RX_4:
5426                 channels->min = channels->max =
5427                                 tdm_rx_cfg[TDM_PRI][TDM_4].channels;
5428                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5429                                 tdm_rx_cfg[TDM_PRI][TDM_4].bit_format);
5430                 rate->min = rate->max =
5431                                 tdm_rx_cfg[TDM_PRI][TDM_4].sample_rate;
5432                 break;
5433         case AFE_PORT_ID_PRIMARY_TDM_RX_5:
5434                 channels->min = channels->max =
5435                                 tdm_rx_cfg[TDM_PRI][TDM_5].channels;
5436                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5437                                 tdm_rx_cfg[TDM_PRI][TDM_5].bit_format);
5438                 rate->min = rate->max =
5439                                 tdm_rx_cfg[TDM_PRI][TDM_5].sample_rate;
5440                 break;
5441         case AFE_PORT_ID_PRIMARY_TDM_RX_6:
5442                 channels->min = channels->max =
5443                                 tdm_rx_cfg[TDM_PRI][TDM_6].channels;
5444                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5445                                 tdm_rx_cfg[TDM_PRI][TDM_6].bit_format);
5446                 rate->min = rate->max =
5447                                 tdm_rx_cfg[TDM_PRI][TDM_6].sample_rate;
5448                 break;
5449         case AFE_PORT_ID_PRIMARY_TDM_RX_7:
5450                 channels->min = channels->max =
5451                                 tdm_rx_cfg[TDM_PRI][TDM_7].channels;
5452                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5453                                 tdm_rx_cfg[TDM_PRI][TDM_7].bit_format);
5454                 rate->min = rate->max =
5455                                 tdm_rx_cfg[TDM_PRI][TDM_7].sample_rate;
5456                 break;
5457         case AFE_PORT_ID_PRIMARY_TDM_TX:
5458                 channels->min = channels->max =
5459                                 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
5460                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5461                                 tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
5462                 rate->min = rate->max =
5463                                 tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
5464                 break;
5465         case AFE_PORT_ID_PRIMARY_TDM_TX_1:
5466                 channels->min = channels->max =
5467                                 tdm_tx_cfg[TDM_PRI][TDM_1].channels;
5468                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5469                                 tdm_tx_cfg[TDM_PRI][TDM_1].bit_format);
5470                 rate->min = rate->max =
5471                                 tdm_tx_cfg[TDM_PRI][TDM_1].sample_rate;
5472                 break;
5473         case AFE_PORT_ID_PRIMARY_TDM_TX_2:
5474                 channels->min = channels->max =
5475                                 tdm_tx_cfg[TDM_PRI][TDM_2].channels;
5476                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5477                                 tdm_tx_cfg[TDM_PRI][TDM_2].bit_format);
5478                 rate->min = rate->max =
5479                                 tdm_tx_cfg[TDM_PRI][TDM_2].sample_rate;
5480                 break;
5481         case AFE_PORT_ID_PRIMARY_TDM_TX_3:
5482                 channels->min = channels->max =
5483                                 tdm_tx_cfg[TDM_PRI][TDM_3].channels;
5484                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5485                                 tdm_tx_cfg[TDM_PRI][TDM_3].bit_format);
5486                 rate->min = rate->max =
5487                                 tdm_tx_cfg[TDM_PRI][TDM_3].sample_rate;
5488                 break;
5489         case AFE_PORT_ID_PRIMARY_TDM_TX_4:
5490                 channels->min = channels->max =
5491                                 tdm_tx_cfg[TDM_PRI][TDM_4].channels;
5492                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5493                                 tdm_tx_cfg[TDM_PRI][TDM_4].bit_format);
5494                 rate->min = rate->max =
5495                                 tdm_tx_cfg[TDM_PRI][TDM_4].sample_rate;
5496                 break;
5497         case AFE_PORT_ID_PRIMARY_TDM_TX_5:
5498                 channels->min = channels->max =
5499                                 tdm_tx_cfg[TDM_PRI][TDM_5].channels;
5500                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5501                                 tdm_tx_cfg[TDM_PRI][TDM_5].bit_format);
5502                 rate->min = rate->max =
5503                                 tdm_tx_cfg[TDM_PRI][TDM_5].sample_rate;
5504                 break;
5505         case AFE_PORT_ID_PRIMARY_TDM_TX_6:
5506                 channels->min = channels->max =
5507                                 tdm_tx_cfg[TDM_PRI][TDM_6].channels;
5508                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5509                                 tdm_tx_cfg[TDM_PRI][TDM_6].bit_format);
5510                 rate->min = rate->max =
5511                                 tdm_tx_cfg[TDM_PRI][TDM_6].sample_rate;
5512                 break;
5513         case AFE_PORT_ID_PRIMARY_TDM_TX_7:
5514                 channels->min = channels->max =
5515                                 tdm_tx_cfg[TDM_PRI][TDM_7].channels;
5516                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5517                                 tdm_tx_cfg[TDM_PRI][TDM_7].bit_format);
5518                 rate->min = rate->max =
5519                                 tdm_tx_cfg[TDM_PRI][TDM_7].sample_rate;
5520                 break;
5521         case AFE_PORT_ID_SECONDARY_TDM_RX:
5522                 channels->min = channels->max =
5523                                 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
5524                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5525                                 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
5526                 rate->min = rate->max =
5527                                 tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
5528                 break;
5529         case AFE_PORT_ID_SECONDARY_TDM_RX_1:
5530                 channels->min = channels->max =
5531                                 tdm_rx_cfg[TDM_SEC][TDM_1].channels;
5532                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5533                                 tdm_rx_cfg[TDM_SEC][TDM_1].bit_format);
5534                 rate->min = rate->max =
5535                                 tdm_rx_cfg[TDM_SEC][TDM_1].sample_rate;
5536                 break;
5537         case AFE_PORT_ID_SECONDARY_TDM_RX_2:
5538                 channels->min = channels->max =
5539                                 tdm_rx_cfg[TDM_SEC][TDM_2].channels;
5540                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5541                                 tdm_rx_cfg[TDM_SEC][TDM_2].bit_format);
5542                 rate->min = rate->max =
5543                                 tdm_rx_cfg[TDM_SEC][TDM_2].sample_rate;
5544                 break;
5545         case AFE_PORT_ID_SECONDARY_TDM_RX_3:
5546                 channels->min = channels->max =
5547                                 tdm_rx_cfg[TDM_SEC][TDM_3].channels;
5548                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5549                                 tdm_rx_cfg[TDM_SEC][TDM_3].bit_format);
5550                 rate->min = rate->max =
5551                                 tdm_rx_cfg[TDM_SEC][TDM_3].sample_rate;
5552                 break;
5553         case AFE_PORT_ID_SECONDARY_TDM_RX_4:
5554                 channels->min = channels->max =
5555                                 tdm_rx_cfg[TDM_SEC][TDM_4].channels;
5556                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5557                                 tdm_rx_cfg[TDM_SEC][TDM_4].bit_format);
5558                 rate->min = rate->max =
5559                                 tdm_rx_cfg[TDM_SEC][TDM_4].sample_rate;
5560                 break;
5561         case AFE_PORT_ID_SECONDARY_TDM_RX_5:
5562                 channels->min = channels->max =
5563                                 tdm_rx_cfg[TDM_SEC][TDM_5].channels;
5564                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5565                                 tdm_rx_cfg[TDM_SEC][TDM_5].bit_format);
5566                 rate->min = rate->max =
5567                                 tdm_rx_cfg[TDM_SEC][TDM_5].sample_rate;
5568                 break;
5569         case AFE_PORT_ID_SECONDARY_TDM_RX_6:
5570                 channels->min = channels->max =
5571                                 tdm_rx_cfg[TDM_SEC][TDM_6].channels;
5572                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5573                                 tdm_rx_cfg[TDM_SEC][TDM_6].bit_format);
5574                 rate->min = rate->max =
5575                                 tdm_rx_cfg[TDM_SEC][TDM_6].sample_rate;
5576                 break;
5577         case AFE_PORT_ID_SECONDARY_TDM_RX_7:
5578                 channels->min = channels->max =
5579                                 tdm_rx_cfg[TDM_SEC][TDM_7].channels;
5580                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5581                                 tdm_rx_cfg[TDM_SEC][TDM_7].bit_format);
5582                 rate->min = rate->max =
5583                                 tdm_rx_cfg[TDM_SEC][TDM_7].sample_rate;
5584                 break;
5585         case AFE_PORT_ID_SECONDARY_TDM_TX:
5586                 channels->min = channels->max =
5587                                 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
5588                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5589                                 tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
5590                 rate->min = rate->max =
5591                                 tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
5592                 break;
5593         case AFE_PORT_ID_SECONDARY_TDM_TX_1:
5594                 channels->min = channels->max =
5595                                 tdm_tx_cfg[TDM_SEC][TDM_1].channels;
5596                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5597                                 tdm_tx_cfg[TDM_SEC][TDM_1].bit_format);
5598                 rate->min = rate->max =
5599                                 tdm_tx_cfg[TDM_SEC][TDM_1].sample_rate;
5600                 break;
5601         case AFE_PORT_ID_SECONDARY_TDM_TX_2:
5602                 channels->min = channels->max =
5603                                 tdm_tx_cfg[TDM_SEC][TDM_2].channels;
5604                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5605                                 tdm_tx_cfg[TDM_SEC][TDM_2].bit_format);
5606                 rate->min = rate->max =
5607                                 tdm_tx_cfg[TDM_SEC][TDM_2].sample_rate;
5608                 break;
5609         case AFE_PORT_ID_SECONDARY_TDM_TX_3:
5610                 channels->min = channels->max =
5611                                 tdm_tx_cfg[TDM_SEC][TDM_3].channels;
5612                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5613                                 tdm_tx_cfg[TDM_SEC][TDM_3].bit_format);
5614                 rate->min = rate->max =
5615                                 tdm_tx_cfg[TDM_SEC][TDM_3].sample_rate;
5616                 break;
5617         case AFE_PORT_ID_SECONDARY_TDM_TX_4:
5618                 channels->min = channels->max =
5619                                 tdm_tx_cfg[TDM_SEC][TDM_4].channels;
5620                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5621                                 tdm_tx_cfg[TDM_SEC][TDM_4].bit_format);
5622                 rate->min = rate->max =
5623                                 tdm_tx_cfg[TDM_SEC][TDM_4].sample_rate;
5624                 break;
5625         case AFE_PORT_ID_SECONDARY_TDM_TX_5:
5626                 channels->min = channels->max =
5627                                 tdm_tx_cfg[TDM_SEC][TDM_5].channels;
5628                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5629                                 tdm_tx_cfg[TDM_SEC][TDM_5].bit_format);
5630                 rate->min = rate->max =
5631                                 tdm_tx_cfg[TDM_SEC][TDM_5].sample_rate;
5632                 break;
5633         case AFE_PORT_ID_SECONDARY_TDM_TX_6:
5634                 channels->min = channels->max =
5635                                 tdm_tx_cfg[TDM_SEC][TDM_6].channels;
5636                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5637                                 tdm_tx_cfg[TDM_SEC][TDM_6].bit_format);
5638                 rate->min = rate->max =
5639                                 tdm_tx_cfg[TDM_SEC][TDM_6].sample_rate;
5640                 break;
5641         case AFE_PORT_ID_SECONDARY_TDM_TX_7:
5642                 channels->min = channels->max =
5643                                 tdm_tx_cfg[TDM_SEC][TDM_7].channels;
5644                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5645                                 tdm_tx_cfg[TDM_SEC][TDM_7].bit_format);
5646                 rate->min = rate->max =
5647                                 tdm_tx_cfg[TDM_SEC][TDM_7].sample_rate;
5648                 break;
5649         case AFE_PORT_ID_TERTIARY_TDM_RX:
5650                 channels->min = channels->max =
5651                                 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
5652                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5653                                 tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
5654                 rate->min = rate->max =
5655                                 tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
5656                 break;
5657         case AFE_PORT_ID_TERTIARY_TDM_RX_1:
5658                 channels->min = channels->max =
5659                                 tdm_rx_cfg[TDM_TERT][TDM_1].channels;
5660                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5661                                 tdm_rx_cfg[TDM_TERT][TDM_1].bit_format);
5662                 rate->min = rate->max =
5663                                 tdm_rx_cfg[TDM_TERT][TDM_1].sample_rate;
5664                 break;
5665         case AFE_PORT_ID_TERTIARY_TDM_RX_2:
5666                 channels->min = channels->max =
5667                                 tdm_rx_cfg[TDM_TERT][TDM_2].channels;
5668                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5669                                 tdm_rx_cfg[TDM_TERT][TDM_2].bit_format);
5670                 rate->min = rate->max =
5671                                 tdm_rx_cfg[TDM_TERT][TDM_2].sample_rate;
5672                 break;
5673         case AFE_PORT_ID_TERTIARY_TDM_RX_3:
5674                 channels->min = channels->max =
5675                                 tdm_rx_cfg[TDM_TERT][TDM_3].channels;
5676                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5677                                 tdm_rx_cfg[TDM_TERT][TDM_3].bit_format);
5678                 rate->min = rate->max =
5679                                 tdm_rx_cfg[TDM_TERT][TDM_3].sample_rate;
5680                 break;
5681         case AFE_PORT_ID_TERTIARY_TDM_RX_4:
5682                 channels->min = channels->max =
5683                                 tdm_rx_cfg[TDM_TERT][TDM_4].channels;
5684                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5685                                 tdm_rx_cfg[TDM_TERT][TDM_4].bit_format);
5686                 rate->min = rate->max =
5687                                 tdm_rx_cfg[TDM_TERT][TDM_4].sample_rate;
5688                 break;
5689         case AFE_PORT_ID_TERTIARY_TDM_RX_5:
5690                 channels->min = channels->max =
5691                                 tdm_rx_cfg[TDM_TERT][TDM_5].channels;
5692                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5693                                 tdm_rx_cfg[TDM_TERT][TDM_5].bit_format);
5694                 rate->min = rate->max =
5695                                 tdm_rx_cfg[TDM_TERT][TDM_5].sample_rate;
5696                 break;
5697         case AFE_PORT_ID_TERTIARY_TDM_RX_6:
5698                 channels->min = channels->max =
5699                                 tdm_rx_cfg[TDM_TERT][TDM_6].channels;
5700                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5701                                 tdm_rx_cfg[TDM_TERT][TDM_6].bit_format);
5702                 rate->min = rate->max =
5703                                 tdm_rx_cfg[TDM_TERT][TDM_6].sample_rate;
5704                 break;
5705         case AFE_PORT_ID_TERTIARY_TDM_RX_7:
5706                 channels->min = channels->max =
5707                                 tdm_rx_cfg[TDM_TERT][TDM_7].channels;
5708                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5709                                 tdm_rx_cfg[TDM_TERT][TDM_7].bit_format);
5710                 rate->min = rate->max =
5711                                 tdm_rx_cfg[TDM_TERT][TDM_7].sample_rate;
5712                 break;
5713         case AFE_PORT_ID_TERTIARY_TDM_TX:
5714                 channels->min = channels->max =
5715                                 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
5716                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5717                                 tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
5718                 rate->min = rate->max =
5719                                 tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
5720                 break;
5721         case AFE_PORT_ID_TERTIARY_TDM_TX_1:
5722                 channels->min = channels->max =
5723                                 tdm_tx_cfg[TDM_TERT][TDM_1].channels;
5724                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5725                                 tdm_tx_cfg[TDM_TERT][TDM_1].bit_format);
5726                 rate->min = rate->max =
5727                                 tdm_tx_cfg[TDM_TERT][TDM_1].sample_rate;
5728                 break;
5729         case AFE_PORT_ID_TERTIARY_TDM_TX_2:
5730                 channels->min = channels->max =
5731                                 tdm_tx_cfg[TDM_TERT][TDM_2].channels;
5732                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5733                                 tdm_tx_cfg[TDM_TERT][TDM_2].bit_format);
5734                 rate->min = rate->max =
5735                                 tdm_tx_cfg[TDM_TERT][TDM_2].sample_rate;
5736                 break;
5737         case AFE_PORT_ID_TERTIARY_TDM_TX_3:
5738                 channels->min = channels->max =
5739                                 tdm_tx_cfg[TDM_TERT][TDM_3].channels;
5740                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5741                                 tdm_tx_cfg[TDM_TERT][TDM_3].bit_format);
5742                 rate->min = rate->max =
5743                                 tdm_tx_cfg[TDM_TERT][TDM_3].sample_rate;
5744                 break;
5745         case AFE_PORT_ID_TERTIARY_TDM_TX_4:
5746                 channels->min = channels->max =
5747                                 tdm_tx_cfg[TDM_TERT][TDM_4].channels;
5748                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5749                                 tdm_tx_cfg[TDM_TERT][TDM_4].bit_format);
5750                 rate->min = rate->max =
5751                                 tdm_tx_cfg[TDM_TERT][TDM_4].sample_rate;
5752                 break;
5753         case AFE_PORT_ID_TERTIARY_TDM_TX_5:
5754                 channels->min = channels->max =
5755                                 tdm_tx_cfg[TDM_TERT][TDM_5].channels;
5756                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5757                                 tdm_tx_cfg[TDM_TERT][TDM_5].bit_format);
5758                 rate->min = rate->max =
5759                                 tdm_tx_cfg[TDM_TERT][TDM_5].sample_rate;
5760                 break;
5761         case AFE_PORT_ID_TERTIARY_TDM_TX_6:
5762                 channels->min = channels->max =
5763                                 tdm_tx_cfg[TDM_TERT][TDM_6].channels;
5764                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5765                                 tdm_tx_cfg[TDM_TERT][TDM_6].bit_format);
5766                 rate->min = rate->max =
5767                                 tdm_tx_cfg[TDM_TERT][TDM_6].sample_rate;
5768                 break;
5769         case AFE_PORT_ID_TERTIARY_TDM_TX_7:
5770                 channels->min = channels->max =
5771                                 tdm_tx_cfg[TDM_TERT][TDM_7].channels;
5772                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5773                                 tdm_tx_cfg[TDM_TERT][TDM_7].bit_format);
5774                 rate->min = rate->max =
5775                                 tdm_tx_cfg[TDM_TERT][TDM_7].sample_rate;
5776                 break;
5777         case AFE_PORT_ID_QUATERNARY_TDM_RX:
5778                 channels->min = channels->max =
5779                                 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
5780                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5781                                tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
5782                 rate->min = rate->max =
5783                                 tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
5784                 break;
5785         case AFE_PORT_ID_QUATERNARY_TDM_RX_1:
5786                 channels->min = channels->max =
5787                                 tdm_rx_cfg[TDM_QUAT][TDM_1].channels;
5788                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5789                                 tdm_rx_cfg[TDM_QUAT][TDM_1].bit_format);
5790                 rate->min = rate->max =
5791                                 tdm_rx_cfg[TDM_QUAT][TDM_1].sample_rate;
5792                 break;
5793         case AFE_PORT_ID_QUATERNARY_TDM_RX_2:
5794                 channels->min = channels->max =
5795                                 tdm_rx_cfg[TDM_QUAT][TDM_2].channels;
5796                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5797                                 tdm_rx_cfg[TDM_QUAT][TDM_2].bit_format);
5798                 rate->min = rate->max =
5799                                 tdm_rx_cfg[TDM_QUAT][TDM_2].sample_rate;
5800                 break;
5801         case AFE_PORT_ID_QUATERNARY_TDM_RX_3:
5802                 channels->min = channels->max =
5803                                 tdm_rx_cfg[TDM_QUAT][TDM_3].channels;
5804                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5805                                 tdm_rx_cfg[TDM_QUAT][TDM_3].bit_format);
5806                 rate->min = rate->max =
5807                                 tdm_rx_cfg[TDM_QUAT][TDM_3].sample_rate;
5808                 break;
5809         case AFE_PORT_ID_QUATERNARY_TDM_RX_4:
5810                 channels->min = channels->max =
5811                                 tdm_rx_cfg[TDM_QUAT][TDM_4].channels;
5812                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5813                                 tdm_rx_cfg[TDM_QUAT][TDM_4].bit_format);
5814                 rate->min = rate->max =
5815                                 tdm_rx_cfg[TDM_QUAT][TDM_4].sample_rate;
5816                 break;
5817         case AFE_PORT_ID_QUATERNARY_TDM_RX_5:
5818                 channels->min = channels->max =
5819                                 tdm_rx_cfg[TDM_QUAT][TDM_5].channels;
5820                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5821                                 tdm_rx_cfg[TDM_QUAT][TDM_5].bit_format);
5822                 rate->min = rate->max =
5823                                 tdm_rx_cfg[TDM_QUAT][TDM_5].sample_rate;
5824                 break;
5825         case AFE_PORT_ID_QUATERNARY_TDM_RX_6:
5826                 channels->min = channels->max =
5827                                 tdm_rx_cfg[TDM_QUAT][TDM_6].channels;
5828                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5829                                 tdm_rx_cfg[TDM_QUAT][TDM_6].bit_format);
5830                 rate->min = rate->max =
5831                                 tdm_rx_cfg[TDM_QUAT][TDM_6].sample_rate;
5832                 break;
5833         case AFE_PORT_ID_QUATERNARY_TDM_RX_7:
5834                 channels->min = channels->max =
5835                                 tdm_rx_cfg[TDM_QUAT][TDM_7].channels;
5836                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5837                                 tdm_rx_cfg[TDM_QUAT][TDM_7].bit_format);
5838                 rate->min = rate->max =
5839                                 tdm_rx_cfg[TDM_QUAT][TDM_7].sample_rate;
5840                 break;
5841         case AFE_PORT_ID_QUATERNARY_TDM_TX:
5842                 channels->min = channels->max =
5843                                 tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
5844                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5845                                 tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
5846                 rate->min = rate->max =
5847                                 tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
5848                 break;
5849         case AFE_PORT_ID_QUATERNARY_TDM_TX_1:
5850                 channels->min = channels->max =
5851                                 tdm_tx_cfg[TDM_QUAT][TDM_1].channels;
5852                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5853                                 tdm_tx_cfg[TDM_QUAT][TDM_1].bit_format);
5854                 rate->min = rate->max =
5855                                 tdm_tx_cfg[TDM_QUAT][TDM_1].sample_rate;
5856                 break;
5857         case AFE_PORT_ID_QUATERNARY_TDM_TX_2:
5858                 channels->min = channels->max =
5859                                 tdm_tx_cfg[TDM_QUAT][TDM_2].channels;
5860                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5861                                 tdm_tx_cfg[TDM_QUAT][TDM_2].bit_format);
5862                 rate->min = rate->max =
5863                                 tdm_tx_cfg[TDM_QUAT][TDM_2].sample_rate;
5864                 break;
5865         case AFE_PORT_ID_QUATERNARY_TDM_TX_3:
5866                 channels->min = channels->max =
5867                                 tdm_tx_cfg[TDM_QUAT][TDM_3].channels;
5868                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5869                                 tdm_tx_cfg[TDM_QUAT][TDM_3].bit_format);
5870                 rate->min = rate->max =
5871                                 tdm_tx_cfg[TDM_QUAT][TDM_3].sample_rate;
5872                 break;
5873         case AFE_PORT_ID_QUATERNARY_TDM_TX_4:
5874                 channels->min = channels->max =
5875                                 tdm_tx_cfg[TDM_QUAT][TDM_4].channels;
5876                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5877                                 tdm_tx_cfg[TDM_QUAT][TDM_4].bit_format);
5878                 rate->min = rate->max =
5879                                 tdm_tx_cfg[TDM_QUAT][TDM_4].sample_rate;
5880                 break;
5881         case AFE_PORT_ID_QUATERNARY_TDM_TX_5:
5882                 channels->min = channels->max =
5883                                 tdm_tx_cfg[TDM_QUAT][TDM_5].channels;
5884                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5885                                 tdm_tx_cfg[TDM_QUAT][TDM_5].bit_format);
5886                 rate->min = rate->max =
5887                                 tdm_tx_cfg[TDM_QUAT][TDM_5].sample_rate;
5888                 break;
5889         case AFE_PORT_ID_QUATERNARY_TDM_TX_6:
5890                 channels->min = channels->max =
5891                                 tdm_tx_cfg[TDM_QUAT][TDM_6].channels;
5892                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5893                                 tdm_tx_cfg[TDM_QUAT][TDM_6].bit_format);
5894                 rate->min = rate->max =
5895                                 tdm_tx_cfg[TDM_QUAT][TDM_6].sample_rate;
5896                 break;
5897         case AFE_PORT_ID_QUATERNARY_TDM_TX_7:
5898                 channels->min = channels->max =
5899                                 tdm_tx_cfg[TDM_QUAT][TDM_7].channels;
5900                 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5901                                 tdm_tx_cfg[TDM_QUAT][TDM_7].bit_format);
5902                 rate->min = rate->max =
5903                                 tdm_tx_cfg[TDM_QUAT][TDM_7].sample_rate;
5904                 break;
5905         default:
5906                 pr_err("%s: dai id 0x%x not supported\n",
5907                         __func__, cpu_dai->id);
5908                 return -EINVAL;
5909         }
5910
5911         pr_debug("%s: dai id = 0x%x channels = %d rate = %d format = 0x%x\n",
5912                 __func__, cpu_dai->id, channels->max, rate->max,
5913                 params_format(params));
5914
5915         return 0;
5916 }
5917
5918 static unsigned int tdm_param_set_slot_mask(int slots)
5919 {
5920         unsigned int slot_mask = 0;
5921         int i = 0;
5922
5923         if ((slots <= 0) || (slots > 32)) {
5924                 pr_err("%s: invalid slot number %d\n", __func__, slots);
5925                 return -EINVAL;
5926         }
5927
5928         for (i = 0; i < slots ; i++)
5929                 slot_mask |= 1 << i;
5930
5931         return slot_mask;
5932 }
5933
5934 static int msm8998_tdm_snd_hw_params(struct snd_pcm_substream *substream,
5935                                      struct snd_pcm_hw_params *params)
5936 {
5937         struct snd_soc_pcm_runtime *rtd = substream->private_data;
5938         struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5939         int ret = 0;
5940         int channels, slot_width, slots, rate, format;
5941         unsigned int slot_mask;
5942         unsigned int *slot_offset;
5943         int offset_channels = 0;
5944         int i;
5945         int clk_freq;
5946
5947         pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
5948
5949         channels = params_channels(params);
5950         if (channels < 1 || channels > 32) {
5951                 pr_err("%s: invalid param channels %d\n",
5952                         __func__, channels);
5953                 return -EINVAL;
5954         }
5955
5956         format = params_format(params);
5957         if (format != SNDRV_PCM_FORMAT_S32_LE &&
5958                 format != SNDRV_PCM_FORMAT_S24_LE &&
5959                 format != SNDRV_PCM_FORMAT_S16_LE) {
5960                 /*
5961                  * Up to 8 channel HW configuration should
5962                  * use 32 bit slot width for max support of
5963                  * stream bit width. (slot_width > bit_width)
5964                  */
5965                 pr_err("%s: invalid param format 0x%x\n",
5966                         __func__, format);
5967                 return -EINVAL;
5968         }
5969
5970         switch (cpu_dai->id) {
5971         case AFE_PORT_ID_PRIMARY_TDM_RX:
5972                 slots = tdm_slot[TDM_PRI].num;
5973                 slot_width = tdm_slot[TDM_PRI].width;
5974                 slot_offset = tdm_rx_slot_offset[TDM_PRI][TDM_0];
5975                 break;
5976         case AFE_PORT_ID_PRIMARY_TDM_RX_1:
5977                 slots = tdm_slot[TDM_PRI].num;
5978                 slot_width = tdm_slot[TDM_PRI].width;
5979                 slot_offset = tdm_rx_slot_offset[TDM_PRI][TDM_1];
5980                 break;
5981         case AFE_PORT_ID_PRIMARY_TDM_RX_2:
5982                 slots = tdm_slot[TDM_PRI].num;
5983                 slot_width = tdm_slot[TDM_PRI].width;
5984                 slot_offset = tdm_rx_slot_offset[TDM_PRI][TDM_2];
5985                 break;
5986         case AFE_PORT_ID_PRIMARY_TDM_RX_3:
5987                 slots = tdm_slot[TDM_PRI].num;
5988                 slot_width = tdm_slot[TDM_PRI].width;
5989                 slot_offset = tdm_rx_slot_offset[TDM_PRI][TDM_3];
5990                 break;
5991         case AFE_PORT_ID_PRIMARY_TDM_RX_4:
5992                 slots = tdm_slot[TDM_PRI].num;
5993                 slot_width = tdm_slot[TDM_PRI].width;
5994                 slot_offset = tdm_rx_slot_offset[TDM_PRI][TDM_4];
5995                 break;
5996         case AFE_PORT_ID_PRIMARY_TDM_RX_5:
5997                 slots = tdm_slot[TDM_PRI].num;
5998                 slot_width = tdm_slot[TDM_PRI].width;
5999                 slot_offset = tdm_rx_slot_offset[TDM_PRI][TDM_5];
6000                 break;
6001         case AFE_PORT_ID_PRIMARY_TDM_RX_6:
6002                 slots = tdm_slot[TDM_PRI].num;
6003                 slot_width = tdm_slot[TDM_PRI].width;
6004                 slot_offset = tdm_rx_slot_offset[TDM_PRI][TDM_6];
6005                 break;
6006         case AFE_PORT_ID_PRIMARY_TDM_RX_7:
6007                 slots = tdm_slot[TDM_PRI].num;
6008                 slot_width = tdm_slot[TDM_PRI].width;
6009                 slot_offset = tdm_rx_slot_offset[TDM_PRI][TDM_7];
6010                 break;
6011         case AFE_PORT_ID_PRIMARY_TDM_TX:
6012                 slots = tdm_slot[TDM_PRI].num;
6013                 slot_width = tdm_slot[TDM_PRI].width;
6014                 slot_offset = tdm_tx_slot_offset[TDM_PRI][TDM_0];
6015                 break;
6016         case AFE_PORT_ID_PRIMARY_TDM_TX_1:
6017                 slots = tdm_slot[TDM_PRI].num;
6018                 slot_width = tdm_slot[TDM_PRI].width;
6019                 slot_offset = tdm_tx_slot_offset[TDM_PRI][TDM_1];
6020                 break;
6021         case AFE_PORT_ID_PRIMARY_TDM_TX_2:
6022                 slots = tdm_slot[TDM_PRI].num;
6023                 slot_width = tdm_slot[TDM_PRI].width;
6024                 slot_offset = tdm_tx_slot_offset[TDM_PRI][TDM_2];
6025                 break;
6026         case AFE_PORT_ID_PRIMARY_TDM_TX_3:
6027                 slots = tdm_slot[TDM_PRI].num;
6028                 slot_width = tdm_slot[TDM_PRI].width;
6029                 slot_offset = tdm_tx_slot_offset[TDM_PRI][TDM_3];
6030                 break;
6031         case AFE_PORT_ID_PRIMARY_TDM_TX_4:
6032                 slots = tdm_slot[TDM_PRI].num;
6033                 slot_width = tdm_slot[TDM_PRI].width;
6034                 slot_offset = tdm_tx_slot_offset[TDM_PRI][TDM_4];
6035                 break;
6036         case AFE_PORT_ID_PRIMARY_TDM_TX_5:
6037                 slots = tdm_slot[TDM_PRI].num;
6038                 slot_width = tdm_slot[TDM_PRI].width;
6039                 slot_offset = tdm_tx_slot_offset[TDM_PRI][TDM_5];
6040                 break;
6041         case AFE_PORT_ID_PRIMARY_TDM_TX_6:
6042                 slots = tdm_slot[TDM_PRI].num;
6043                 slot_width = tdm_slot[TDM_PRI].width;
6044                 slot_offset = tdm_tx_slot_offset[TDM_PRI][TDM_6];
6045                 break;
6046         case AFE_PORT_ID_PRIMARY_TDM_TX_7:
6047                 slots = tdm_slot[TDM_PRI].num;
6048                 slot_width = tdm_slot[TDM_PRI].width;
6049                 slot_offset = tdm_tx_slot_offset[TDM_PRI][TDM_7];
6050                 break;
6051         case AFE_PORT_ID_SECONDARY_TDM_RX:
6052                 slots = tdm_slot[TDM_SEC].num;
6053                 slot_width = tdm_slot[TDM_SEC].width;
6054                 slot_offset = tdm_rx_slot_offset[TDM_SEC][TDM_0];
6055                 break;
6056         case AFE_PORT_ID_SECONDARY_TDM_RX_1:
6057                 slots = tdm_slot[TDM_SEC].num;
6058                 slot_width = tdm_slot[TDM_SEC].width;
6059                 slot_offset = tdm_rx_slot_offset[TDM_SEC][TDM_1];
6060                 break;
6061         case AFE_PORT_ID_SECONDARY_TDM_RX_2:
6062                 slots = tdm_slot[TDM_SEC].num;
6063                 slot_width = tdm_slot[TDM_SEC].width;
6064                 slot_offset = tdm_rx_slot_offset[TDM_SEC][TDM_2];
6065                 break;
6066         case AFE_PORT_ID_SECONDARY_TDM_RX_3:
6067                 slots = tdm_slot[TDM_SEC].num;
6068                 slot_width = tdm_slot[TDM_SEC].width;
6069                 slot_offset = tdm_rx_slot_offset[TDM_SEC][TDM_3];
6070                 break;
6071         case AFE_PORT_ID_SECONDARY_TDM_RX_4:
6072                 slots = tdm_slot[TDM_SEC].num;
6073                 slot_width = tdm_slot[TDM_SEC].width;
6074                 slot_offset = tdm_rx_slot_offset[TDM_SEC][TDM_4];
6075                 break;
6076         case AFE_PORT_ID_SECONDARY_TDM_RX_5:
6077                 slots = tdm_slot[TDM_SEC].num;
6078                 slot_width = tdm_slot[TDM_SEC].width;
6079                 slot_offset = tdm_rx_slot_offset[TDM_SEC][TDM_5];
6080                 break;
6081         case AFE_PORT_ID_SECONDARY_TDM_RX_6:
6082                 slots = tdm_slot[TDM_SEC].num;
6083                 slot_width = tdm_slot[TDM_SEC].width;
6084                 slot_offset = tdm_rx_slot_offset[TDM_SEC][TDM_6];
6085                 break;
6086         case AFE_PORT_ID_SECONDARY_TDM_RX_7:
6087                 slots = tdm_slot[TDM_SEC].num;
6088                 slot_width = tdm_slot[TDM_SEC].width;
6089                 slot_offset = tdm_rx_slot_offset[TDM_SEC][TDM_7];
6090                 break;
6091         case AFE_PORT_ID_SECONDARY_TDM_TX:
6092                 slots = tdm_slot[TDM_SEC].num;
6093                 slot_width = tdm_slot[TDM_SEC].width;
6094                 slot_offset = tdm_tx_slot_offset[TDM_SEC][TDM_0];
6095                 break;
6096         case AFE_PORT_ID_SECONDARY_TDM_TX_1:
6097                 slots = tdm_slot[TDM_SEC].num;
6098                 slot_width = tdm_slot[TDM_SEC].width;
6099                 slot_offset = tdm_tx_slot_offset[TDM_SEC][TDM_1];
6100                 break;
6101         case AFE_PORT_ID_SECONDARY_TDM_TX_2:
6102                 slots = tdm_slot[TDM_SEC].num;
6103                 slot_width = tdm_slot[TDM_SEC].width;
6104                 slot_offset = tdm_tx_slot_offset[TDM_SEC][TDM_2];
6105                 break;
6106         case AFE_PORT_ID_SECONDARY_TDM_TX_3:
6107                 slots = tdm_slot[TDM_SEC].num;
6108                 slot_width = tdm_slot[TDM_SEC].width;
6109                 slot_offset = tdm_tx_slot_offset[TDM_SEC][TDM_3];
6110                 break;
6111         case AFE_PORT_ID_SECONDARY_TDM_TX_4:
6112                 slots = tdm_slot[TDM_SEC].num;
6113                 slot_width = tdm_slot[TDM_SEC].width;
6114                 slot_offset = tdm_tx_slot_offset[TDM_SEC][TDM_4];
6115                 break;
6116         case AFE_PORT_ID_SECONDARY_TDM_TX_5:
6117                 slots = tdm_slot[TDM_SEC].num;
6118                 slot_width = tdm_slot[TDM_SEC].width;
6119                 slot_offset = tdm_tx_slot_offset[TDM_SEC][TDM_5];
6120                 break;
6121         case AFE_PORT_ID_SECONDARY_TDM_TX_6:
6122                 slots = tdm_slot[TDM_SEC].num;
6123                 slot_width = tdm_slot[TDM_SEC].width;
6124                 slot_offset = tdm_tx_slot_offset[TDM_SEC][TDM_6];
6125                 break;
6126         case AFE_PORT_ID_SECONDARY_TDM_TX_7:
6127                 slots = tdm_slot[TDM_SEC].num;
6128                 slot_width = tdm_slot[TDM_SEC].width;
6129                 slot_offset = tdm_tx_slot_offset[TDM_SEC][TDM_7];
6130                 break;
6131         case AFE_PORT_ID_TERTIARY_TDM_RX:
6132                 slots = tdm_slot[TDM_TERT].num;
6133                 slot_width = tdm_slot[TDM_TERT].width;
6134                 slot_offset = tdm_rx_slot_offset[TDM_TERT][TDM_0];
6135                 break;
6136         case AFE_PORT_ID_TERTIARY_TDM_RX_1:
6137                 slots = tdm_slot[TDM_TERT].num;
6138                 slot_width = tdm_slot[TDM_TERT].width;
6139                 slot_offset = tdm_rx_slot_offset[TDM_TERT][TDM_1];
6140                 break;
6141         case AFE_PORT_ID_TERTIARY_TDM_RX_2:
6142                 slots = tdm_slot[TDM_TERT].num;
6143                 slot_width = tdm_slot[TDM_TERT].width;
6144                 slot_offset = tdm_rx_slot_offset[TDM_TERT][TDM_2];
6145                 break;
6146         case AFE_PORT_ID_TERTIARY_TDM_RX_3:
6147                 slots = tdm_slot[TDM_TERT].num;
6148                 slot_width = tdm_slot[TDM_TERT].width;
6149                 slot_offset = tdm_rx_slot_offset[TDM_TERT][TDM_3];
6150                 break;
6151         case AFE_PORT_ID_TERTIARY_TDM_RX_4:
6152                 slots = tdm_slot[TDM_TERT].num;
6153                 slot_width = tdm_slot[TDM_TERT].width;
6154                 slot_offset = tdm_rx_slot_offset[TDM_TERT][TDM_4];
6155                 break;
6156         case AFE_PORT_ID_TERTIARY_TDM_RX_5:
6157                 slots = tdm_slot[TDM_TERT].num;
6158                 slot_width = tdm_slot[TDM_TERT].width;
6159                 slot_offset = tdm_rx_slot_offset[TDM_TERT][TDM_5];
6160                 break;
6161         case AFE_PORT_ID_TERTIARY_TDM_RX_6:
6162                 slots = tdm_slot[TDM_TERT].num;
6163                 slot_width = tdm_slot[TDM_TERT].width;
6164                 slot_offset = tdm_rx_slot_offset[TDM_TERT][TDM_6];
6165                 break;
6166         case AFE_PORT_ID_TERTIARY_TDM_RX_7:
6167                 slots = tdm_slot[TDM_TERT].num;
6168                 slot_width = tdm_slot[TDM_TERT].width;
6169                 slot_offset = tdm_rx_slot_offset[TDM_TERT][TDM_7];
6170                 break;
6171         case AFE_PORT_ID_TERTIARY_TDM_TX:
6172                 slots = tdm_slot[TDM_TERT].num;
6173                 slot_width = tdm_slot[TDM_TERT].width;
6174                 slot_offset = tdm_tx_slot_offset[TDM_TERT][TDM_0];
6175                 break;
6176         case AFE_PORT_ID_TERTIARY_TDM_TX_1:
6177                 slots = tdm_slot[TDM_TERT].num;
6178                 slot_width = tdm_slot[TDM_TERT].width;
6179                 slot_offset = tdm_tx_slot_offset[TDM_TERT][TDM_1];
6180                 break;
6181         case AFE_PORT_ID_TERTIARY_TDM_TX_2:
6182                 slots = tdm_slot[TDM_TERT].num;
6183                 slot_width = tdm_slot[TDM_TERT].width;
6184                 slot_offset = tdm_tx_slot_offset[TDM_TERT][TDM_2];
6185                 break;
6186         case AFE_PORT_ID_TERTIARY_TDM_TX_3:
6187                 slots = tdm_slot[TDM_TERT].num;
6188                 slot_width = tdm_slot[TDM_TERT].width;
6189                 slot_offset = tdm_tx_slot_offset[TDM_TERT][TDM_3];
6190                 break;
6191         case AFE_PORT_ID_TERTIARY_TDM_TX_4:
6192                 slots = tdm_slot[TDM_TERT].num;
6193                 slot_width = tdm_slot[TDM_TERT].width;
6194                 slot_offset = tdm_tx_slot_offset[TDM_TERT][TDM_4];
6195                 break;
6196         case AFE_PORT_ID_TERTIARY_TDM_TX_5:
6197                 slots = tdm_slot[TDM_TERT].num;
6198                 slot_width = tdm_slot[TDM_TERT].width;
6199                 slot_offset = tdm_tx_slot_offset[TDM_TERT][TDM_5];
6200                 break;
6201         case AFE_PORT_ID_TERTIARY_TDM_TX_6:
6202                 slots = tdm_slot[TDM_TERT].num;
6203                 slot_width = tdm_slot[TDM_TERT].width;
6204                 slot_offset = tdm_tx_slot_offset[TDM_TERT][TDM_6];
6205                 break;
6206         case AFE_PORT_ID_TERTIARY_TDM_TX_7:
6207                 slots = tdm_slot[TDM_TERT].num;
6208                 slot_width = tdm_slot[TDM_TERT].width;
6209                 slot_offset = tdm_tx_slot_offset[TDM_TERT][TDM_7];
6210                 break;
6211         case AFE_PORT_ID_QUATERNARY_TDM_RX:
6212                 slots = tdm_slot[TDM_QUAT].num;
6213                 slot_width = tdm_slot[TDM_QUAT].width;
6214                 slot_offset = tdm_rx_slot_offset[TDM_QUAT][TDM_0];
6215                 break;
6216         case AFE_PORT_ID_QUATERNARY_TDM_RX_1:
6217                 slots = tdm_slot[TDM_QUAT].num;
6218                 slot_width = tdm_slot[TDM_QUAT].width;
6219                 slot_offset = tdm_rx_slot_offset[TDM_QUAT][TDM_1];
6220                 break;
6221         case AFE_PORT_ID_QUATERNARY_TDM_RX_2:
6222                 slots = tdm_slot[TDM_QUAT].num;
6223                 slot_width = tdm_slot[TDM_QUAT].width;
6224                 slot_offset = tdm_rx_slot_offset[TDM_QUAT][TDM_2];
6225                 break;
6226         case AFE_PORT_ID_QUATERNARY_TDM_RX_3:
6227                 slots = tdm_slot[TDM_QUAT].num;
6228                 slot_width = tdm_slot[TDM_QUAT].width;
6229                 slot_offset = tdm_rx_slot_offset[TDM_QUAT][TDM_3];
6230                 break;
6231         case AFE_PORT_ID_QUATERNARY_TDM_RX_4:
6232                 slots = tdm_slot[TDM_QUAT].num;
6233                 slot_width = tdm_slot[TDM_QUAT].width;
6234                 slot_offset = tdm_rx_slot_offset[TDM_QUAT][TDM_4];
6235                 break;
6236         case AFE_PORT_ID_QUATERNARY_TDM_RX_5:
6237                 slots = tdm_slot[TDM_QUAT].num;
6238                 slot_width = tdm_slot[TDM_QUAT].width;
6239                 slot_offset = tdm_rx_slot_offset[TDM_QUAT][TDM_5];
6240                 break;
6241         case AFE_PORT_ID_QUATERNARY_TDM_RX_6:
6242                 slots = tdm_slot[TDM_QUAT].num;
6243                 slot_width = tdm_slot[TDM_QUAT].width;
6244                 slot_offset = tdm_rx_slot_offset[TDM_QUAT][TDM_6];
6245                 break;
6246         case AFE_PORT_ID_QUATERNARY_TDM_RX_7:
6247                 slots = tdm_slot[TDM_QUAT].num;
6248                 slot_width = tdm_slot[TDM_QUAT].width;
6249                 slot_offset = tdm_rx_slot_offset[TDM_QUAT][TDM_7];
6250                 break;
6251         case AFE_PORT_ID_QUATERNARY_TDM_TX:
6252                 slots = tdm_slot[TDM_QUAT].num;
6253                 slot_width = tdm_slot[TDM_QUAT].width;
6254                 slot_offset = tdm_tx_slot_offset[TDM_QUAT][TDM_0];
6255                 break;
6256         case AFE_PORT_ID_QUATERNARY_TDM_TX_1:
6257                 slots = tdm_slot[TDM_QUAT].num;
6258                 slot_width = tdm_slot[TDM_QUAT].width;
6259                 slot_offset = tdm_tx_slot_offset[TDM_QUAT][TDM_1];
6260                 break;
6261         case AFE_PORT_ID_QUATERNARY_TDM_TX_2:
6262                 slots = tdm_slot[TDM_QUAT].num;
6263                 slot_width = tdm_slot[TDM_QUAT].width;
6264                 slot_offset = tdm_tx_slot_offset[TDM_QUAT][TDM_2];
6265                 break;
6266         case AFE_PORT_ID_QUATERNARY_TDM_TX_3:
6267                 slots = tdm_slot[TDM_QUAT].num;
6268                 slot_width = tdm_slot[TDM_QUAT].width;
6269                 slot_offset = tdm_tx_slot_offset[TDM_QUAT][TDM_3];
6270                 break;
6271         case AFE_PORT_ID_QUATERNARY_TDM_TX_4:
6272                 slots = tdm_slot[TDM_QUAT].num;
6273                 slot_width = tdm_slot[TDM_QUAT].width;
6274                 slot_offset = tdm_tx_slot_offset[TDM_QUAT][TDM_4];
6275                 break;
6276         case AFE_PORT_ID_QUATERNARY_TDM_TX_5:
6277                 slots = tdm_slot[TDM_QUAT].num;
6278                 slot_width = tdm_slot[TDM_QUAT].width;
6279                 slot_offset = tdm_tx_slot_offset[TDM_QUAT][TDM_5];
6280                 break;
6281         case AFE_PORT_ID_QUATERNARY_TDM_TX_6:
6282                 slots = tdm_slot[TDM_QUAT].num;
6283                 slot_width = tdm_slot[TDM_QUAT].width;
6284                 slot_offset = tdm_tx_slot_offset[TDM_QUAT][TDM_6];
6285                 break;
6286         case AFE_PORT_ID_QUATERNARY_TDM_TX_7:
6287                 slots = tdm_slot[TDM_QUAT].num;
6288                 slot_width = tdm_slot[TDM_QUAT].width;
6289                 slot_offset = tdm_tx_slot_offset[TDM_QUAT][TDM_7];
6290                 break;
6291         default:
6292                 pr_err("%s: dai id 0x%x not supported\n",
6293                         __func__, cpu_dai->id);
6294                 return -EINVAL;
6295         }
6296
6297         for (i = 0; i < TDM_SLOT_OFFSET_MAX; i++) {
6298                 if (slot_offset[i] != AFE_SLOT_MAPPING_OFFSET_INVALID)
6299                         offset_channels++;
6300                 else
6301                         break;
6302         }
6303
6304         if (offset_channels == 0) {
6305                 pr_err("%s: invalid offset_channels %d\n",
6306                         __func__, offset_channels);
6307                 return -EINVAL;
6308         }
6309
6310         if (channels > offset_channels) {
6311                 pr_err("%s: channels %d exceed offset_channels %d\n",
6312                         __func__, channels, offset_channels);
6313                 return -EINVAL;
6314         }
6315
6316         slot_mask = tdm_param_set_slot_mask(slots);
6317         if (!slot_mask) {
6318                 pr_err("%s: invalid slot_mask 0x%x\n",
6319                         __func__, slot_mask);
6320                 return -EINVAL;
6321         }
6322
6323         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
6324                 pr_debug("%s: slot_width %d\n", __func__, slot_width);
6325                 ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
6326                         slots, slot_width);
6327                 if (ret < 0) {
6328                         pr_err("%s: failed to set tdm slot, err:%d\n",
6329                                 __func__, ret);
6330                         goto end;
6331                 }
6332
6333                 ret = snd_soc_dai_set_channel_map(cpu_dai,
6334                         0, NULL, channels, slot_offset);
6335                 if (ret < 0) {
6336                         pr_err("%s: failed to set channel map, err:%d\n",
6337                                 __func__, ret);
6338                         goto end;
6339                 }
6340         } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
6341                 ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
6342                         slots, slot_width);
6343                 if (ret < 0) {
6344                         pr_err("%s: failed to set tdm slot, err:%d\n",
6345                                 __func__, ret);
6346                         goto end;
6347                 }
6348
6349                 ret = snd_soc_dai_set_channel_map(cpu_dai,
6350                         channels, slot_offset, 0, NULL);
6351                 if (ret < 0) {
6352                         pr_err("%s: failed to set channel map, err:%d\n",
6353                                 __func__, ret);
6354                         goto end;
6355                 }
6356         } else {
6357                 ret = -EINVAL;
6358                 pr_err("%s: invalid use case, err:%d\n",
6359                         __func__, ret);
6360                 goto end;
6361         }
6362
6363         rate = params_rate(params);
6364         clk_freq = rate * slot_width * slots;
6365         ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
6366         if (ret < 0) {
6367                 pr_err("%s: failed to set tdm clk, err:%d\n",
6368                         __func__, ret);
6369         }
6370
6371 end:
6372         return ret;
6373 }
6374
6375 static int msm8998_tdm_snd_startup(struct snd_pcm_substream *substream)
6376 {
6377         int ret = 0;
6378         struct snd_soc_pcm_runtime *rtd = substream->private_data;
6379         struct snd_soc_card *card = rtd->card;
6380         struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
6381         struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
6382
6383         ret = msm_set_pinctrl(pinctrl_info, STATE_TDM_ACTIVE);
6384         if (ret)
6385                 pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
6386                         __func__, ret);
6387
6388         return ret;
6389 }
6390
6391 static void msm8998_tdm_snd_shutdown(struct snd_pcm_substream *substream)
6392 {
6393         int ret = 0;
6394         struct snd_soc_pcm_runtime *rtd = substream->private_data;
6395         struct snd_soc_card *card = rtd->card;
6396         struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
6397         struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
6398
6399         ret = msm_set_pinctrl(pinctrl_info, STATE_DISABLE);
6400         if (ret)
6401                 pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
6402                         __func__, ret);
6403
6404 }
6405
6406 static struct snd_soc_ops msm8998_tdm_be_ops = {
6407         .hw_params = msm8998_tdm_snd_hw_params,
6408         .startup = msm8998_tdm_snd_startup,
6409         .shutdown = msm8998_tdm_snd_shutdown
6410 };
6411
6412 static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
6413 {
6414         int ret = 0;
6415         struct snd_soc_pcm_runtime *rtd = substream->private_data;
6416         struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
6417         int index = cpu_dai->id;
6418         unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
6419         struct snd_soc_card *card = rtd->card;
6420         struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
6421         struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
6422         int ret_pinctrl = 0;
6423
6424         dev_dbg(rtd->card->dev,
6425                 "%s: substream = %s  stream = %d, dai name %s, dai ID %d\n",
6426                 __func__, substream->name, substream->stream,
6427                 cpu_dai->name, cpu_dai->id);
6428
6429         if (index < PRIM_MI2S || index > QUAT_MI2S) {
6430                 ret = -EINVAL;
6431                 dev_err(rtd->card->dev,
6432                         "%s: CPU DAI id (%d) out of range\n",
6433                         __func__, cpu_dai->id);
6434                 goto done;
6435         }
6436         if (index == QUAT_MI2S) {
6437                 ret_pinctrl = msm_set_pinctrl(pinctrl_info, STATE_MI2S_ACTIVE);
6438                 if (ret_pinctrl) {
6439                         pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
6440                                 __func__, ret_pinctrl);
6441                 }
6442         }
6443
6444         /*
6445          * Muxtex protection in case the same MI2S
6446          * interface using for both TX and RX  so
6447          * that the same clock won't be enable twice.
6448          */
6449         mutex_lock(&mi2s_intf_conf[index].lock);
6450         if (++mi2s_intf_conf[index].ref_cnt == 1) {
6451                 /* Check if msm needs to provide the clock to the interface */
6452                 if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
6453                         fmt = SND_SOC_DAIFMT_CBM_CFM;
6454                         mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
6455                 }
6456                 ret = msm_mi2s_set_sclk(substream, true);
6457                 if (IS_ERR_VALUE(ret)) {
6458                         dev_err(rtd->card->dev,
6459                                 "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
6460                                 __func__, ret);
6461                         goto clean_up;
6462                 }
6463                 if (mi2s_auxpcm_conf[index].pcm_i2s_sel_vt_addr != NULL) {
6464                         mutex_lock(&mi2s_auxpcm_conf[index].lock);
6465                         iowrite32(0,
6466                                 mi2s_auxpcm_conf[index].pcm_i2s_sel_vt_addr);
6467                         mutex_unlock(&mi2s_auxpcm_conf[index].lock);
6468                 } else {
6469                         dev_err(rtd->card->dev,
6470                                 "%s lpaif_muxsel_virt_addr is NULL for dai %d\n",
6471                                 __func__, index);
6472                         ret = -EINVAL;
6473                         goto clk_off;
6474                 }
6475                 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
6476                 if (IS_ERR_VALUE(ret)) {
6477                         pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
6478                                 __func__, index, ret);
6479                         goto clk_off;
6480                 }
6481         }
6482 clk_off:
6483         if (IS_ERR_VALUE(ret))
6484                 msm_mi2s_set_sclk(substream, false);
6485 clean_up:
6486         if (IS_ERR_VALUE(ret))
6487                 mi2s_intf_conf[index].ref_cnt--;
6488         mutex_unlock(&mi2s_intf_conf[index].lock);
6489 done:
6490         return ret;
6491 }
6492
6493 static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
6494 {
6495         int ret;
6496         struct snd_soc_pcm_runtime *rtd = substream->private_data;
6497         int index = rtd->cpu_dai->id;
6498         struct snd_soc_card *card = rtd->card;
6499         struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
6500         struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
6501         int ret_pinctrl = 0;
6502
6503         pr_debug("%s(): substream = %s  stream = %d\n", __func__,
6504                  substream->name, substream->stream);
6505         if (index < PRIM_MI2S || index > QUAT_MI2S) {
6506                 pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
6507                 return;
6508         }
6509
6510         mutex_lock(&mi2s_intf_conf[index].lock);
6511         if (--mi2s_intf_conf[index].ref_cnt == 0) {
6512                 ret = msm_mi2s_set_sclk(substream, false);
6513                 if (ret < 0)
6514                         pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
6515                                 __func__, index, ret);
6516         }
6517         mutex_unlock(&mi2s_intf_conf[index].lock);
6518
6519         if (index == QUAT_MI2S) {
6520                 ret_pinctrl = msm_set_pinctrl(pinctrl_info, STATE_DISABLE);
6521                 if (ret_pinctrl)
6522                         pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
6523                                 __func__, ret_pinctrl);
6524         }
6525 }
6526
6527 static struct snd_soc_ops msm_mi2s_be_ops = {
6528         .startup = msm_mi2s_snd_startup,
6529         .shutdown = msm_mi2s_snd_shutdown,
6530 };
6531
6532 static struct snd_soc_ops msm_aux_pcm_be_ops = {
6533         .startup = msm_aux_pcm_snd_startup,
6534         .shutdown = msm_aux_pcm_snd_shutdown,
6535 };
6536
6537 static int msm_tdm_snd_hw_params(struct snd_pcm_substream *substream,
6538                                      struct snd_pcm_hw_params *params)
6539 {
6540         struct snd_soc_pcm_runtime *rtd = substream->private_data;
6541         struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
6542         int ret = 0;
6543         int channels, slot_width, slots;
6544         unsigned int slot_mask;
6545         unsigned int *slot_offset;
6546         int offset_channels = 0;
6547         int i;
6548
6549         pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
6550
6551         channels = params_channels(params);
6552         switch (channels) {
6553         case 1:
6554         case 2:
6555         case 3:
6556         case 4:
6557         case 5:
6558         case 6:
6559         case 7:
6560         case 8:
6561                 switch (params_format(params)) {
6562                 case SNDRV_PCM_FORMAT_S32_LE:
6563                 case SNDRV_PCM_FORMAT_S24_LE:
6564                 case SNDRV_PCM_FORMAT_S16_LE:
6565                 /*
6566                  * up to 8 channels HW config should
6567                  * use 32 bit slot width for max support of
6568                  * stream bit width. (slot_width > bit_width)
6569                  */
6570                         slot_width = 32;
6571                         break;
6572                 default:
6573                         pr_err("%s: invalid param format 0x%x\n",
6574                                 __func__, params_format(params));
6575                         return -EINVAL;
6576                 }
6577                 slots = 8;
6578                 slot_mask = tdm_param_set_slot_mask(slots);
6579                 if (!slot_mask) {
6580                         pr_err("%s: invalid slot_mask 0x%x\n",
6581                                 __func__, slot_mask);
6582                         return -EINVAL;
6583                 }
6584                 break;
6585         default:
6586                 pr_err("%s: invalid param channels %d\n",
6587                         __func__, channels);
6588                 return -EINVAL;
6589         }
6590         /* currently only supporting TDM_RX_0 and TDM_TX_0 */
6591         switch (cpu_dai->id) {
6592         case AFE_PORT_ID_PRIMARY_TDM_RX:
6593         case AFE_PORT_ID_SECONDARY_TDM_RX:
6594         case AFE_PORT_ID_TERTIARY_TDM_RX:
6595         case AFE_PORT_ID_QUATERNARY_TDM_RX:
6596         case AFE_PORT_ID_PRIMARY_TDM_TX:
6597         case AFE_PORT_ID_SECONDARY_TDM_TX:
6598         case AFE_PORT_ID_TERTIARY_TDM_TX:
6599         case AFE_PORT_ID_QUATERNARY_TDM_TX:
6600                 slot_offset = tdm_slot_offset[TDM_0];
6601                 break;
6602         default:
6603                 pr_err("%s: dai id 0x%x not supported\n",
6604                         __func__, cpu_dai->id);
6605                 return -EINVAL;
6606         }
6607
6608         for (i = 0; i < TDM_SLOT_OFFSET_MAX; i++) {
6609                 if (slot_offset[i] != AFE_SLOT_MAPPING_OFFSET_INVALID)
6610                         offset_channels++;
6611                 else
6612                         break;
6613         }
6614
6615         if (offset_channels == 0) {
6616                 pr_err("%s: slot offset not supported, offset_channels %d\n",
6617                         __func__, offset_channels);
6618                 return -EINVAL;
6619         }
6620
6621         if (channels > offset_channels) {
6622                 pr_err("%s: channels %d exceed offset_channels %d\n",
6623                         __func__, channels, offset_channels);
6624                 return -EINVAL;
6625         }
6626
6627         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
6628                 ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
6629                                                slots, slot_width);
6630                 if (ret < 0) {
6631                         pr_err("%s: failed to set tdm slot, err:%d\n",
6632                                 __func__, ret);
6633                         goto end;
6634                 }
6635
6636                 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, NULL,
6637                                                   channels, slot_offset);
6638                 if (ret < 0) {
6639                         pr_err("%s: failed to set channel map, err:%d\n",
6640                                 __func__, ret);
6641                         goto end;
6642                 }
6643         } else {
6644                 ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
6645                                                slots, slot_width);
6646                 if (ret < 0) {
6647                         pr_err("%s: failed to set tdm slot, err:%d\n",
6648                                 __func__, ret);
6649                         goto end;
6650                 }
6651
6652                 ret = snd_soc_dai_set_channel_map(cpu_dai, channels,
6653                                                   slot_offset, 0, NULL);
6654                 if (ret < 0) {
6655                         pr_err("%s: failed to set channel map, err:%d\n",
6656                                 __func__, ret);
6657                         goto end;
6658                 }
6659         }
6660 end:
6661         return ret;
6662 }
6663
6664 static struct snd_soc_ops msm_be_ops = {
6665         .hw_params = msm_snd_hw_params,
6666 };
6667
6668 static struct snd_soc_ops msm_cpe_ops = {
6669         .hw_params = msm_snd_cpe_hw_params,
6670 };
6671
6672 static struct snd_soc_ops msm_slimbus_2_be_ops = {
6673         .hw_params = msm_slimbus_2_hw_params,
6674 };
6675
6676 static struct snd_soc_ops msm_wcn_ops = {
6677         .hw_params = msm_wcn_hw_params,
6678 };
6679
6680 static struct snd_soc_ops msm_tdm_be_ops = {
6681         .hw_params = msm_tdm_snd_hw_params
6682 };
6683
6684 /* Digital audio interface glue - connects codec <---> CPU */
6685 static struct snd_soc_dai_link msm_common_dai_links[] = {
6686         /* FrontEnd DAI Links */
6687         {
6688                 .name = MSM_DAILINK_NAME(Media1),
6689                 .stream_name = "MultiMedia1",
6690                 .cpu_dai_name = "MultiMedia1",
6691                 .platform_name = "msm-pcm-dsp.0",
6692                 .dynamic = 1,
6693                 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
6694                 .dpcm_playback = 1,
6695                 .dpcm_capture = 1,
6696                 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6697                         SND_SOC_DPCM_TRIGGER_POST},
6698                 .codec_dai_name = "snd-soc-dummy-dai",
6699                 .codec_name = "snd-soc-dummy",
6700                 .ignore_suspend = 1,
6701                 /* this dainlink has playback support */
6702                 .ignore_pmdown_time = 1,
6703                 .be_id = MSM_FRONTEND_DAI_MULTIMEDIA1
6704         },
6705         {
6706                 .name = MSM_DAILINK_NAME(Media2),
6707                 .stream_name = "MultiMedia2",
6708                 .cpu_dai_name = "MultiMedia2",
6709                 .platform_name = "msm-pcm-dsp.0",
6710                 .dynamic = 1,
6711                 .dpcm_playback = 1,
6712                 .dpcm_capture = 1,
6713                 .codec_dai_name = "snd-soc-dummy-dai",
6714                 .codec_name = "snd-soc-dummy",
6715                 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6716                         SND_SOC_DPCM_TRIGGER_POST},
6717                 .ignore_suspend = 1,
6718                 /* this dainlink has playback support */
6719                 .ignore_pmdown_time = 1,
6720                 .be_id = MSM_FRONTEND_DAI_MULTIMEDIA2,
6721         },
6722         {
6723                 .name = "VoiceMMode1",
6724                 .stream_name = "VoiceMMode1",
6725                 .cpu_dai_name = "VoiceMMode1",
6726                 .platform_name = "msm-pcm-voice",
6727                 .dynamic = 1,
6728                 .dpcm_playback = 1,
6729                 .dpcm_capture = 1,
6730                 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6731                             SND_SOC_DPCM_TRIGGER_POST},
6732                 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6733                 .ignore_suspend = 1,
6734                 .ignore_pmdown_time = 1,
6735                 .codec_dai_name = "snd-soc-dummy-dai",
6736                 .codec_name = "snd-soc-dummy",
6737                 .be_id = MSM_FRONTEND_DAI_VOICEMMODE1,
6738         },
6739         {
6740                 .name = "MSM VoIP",
6741                 .stream_name = "VoIP",
6742                 .cpu_dai_name = "VoIP",
6743                 .platform_name = "msm-voip-dsp",
6744                 .dynamic = 1,
6745                 .dpcm_playback = 1,
6746                 .dpcm_capture = 1,
6747                 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6748                         SND_SOC_DPCM_TRIGGER_POST},
6749                 .codec_dai_name = "snd-soc-dummy-dai",
6750                 .codec_name = "snd-soc-dummy",
6751                 .ignore_suspend = 1,
6752                 /* this dainlink has playback support */
6753                 .ignore_pmdown_time = 1,
6754                 .be_id = MSM_FRONTEND_DAI_VOIP,
6755         },
6756         {
6757                 .name = MSM_DAILINK_NAME(ULL),
6758                 .stream_name = "MultiMedia3",
6759                 .cpu_dai_name = "MultiMedia3",
6760                 .platform_name = "msm-pcm-dsp.2",
6761                 .dynamic = 1,
6762                 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
6763                 .dpcm_playback = 1,
6764                 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6765                         SND_SOC_DPCM_TRIGGER_POST},
6766                 .codec_dai_name = "snd-soc-dummy-dai",
6767                 .codec_name = "snd-soc-dummy",
6768                 .ignore_suspend = 1,
6769                 /* this dainlink has playback support */
6770                 .ignore_pmdown_time = 1,
6771                 .be_id = MSM_FRONTEND_DAI_MULTIMEDIA3,
6772         },
6773         /* Hostless PCM purpose */
6774         {
6775                 .name = "SLIMBUS_0 Hostless",
6776                 .stream_name = "SLIMBUS_0 Hostless",
6777                 .cpu_dai_name = "SLIMBUS0_HOSTLESS",
6778                 .platform_name = "msm-pcm-hostless",
6779                 .dynamic = 1,
6780                 .dpcm_playback = 1,
6781                 .dpcm_capture = 1,
6782                 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6783                             SND_SOC_DPCM_TRIGGER_POST},
6784                 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6785                 .ignore_suspend = 1,
6786                  /* this dailink has playback support */
6787                 .ignore_pmdown_time = 1,
6788                 .codec_dai_name = "snd-soc-dummy-dai",
6789                 .codec_name = "snd-soc-dummy",
6790         },
6791         {
6792                 .name = "MSM AFE-PCM RX",
6793                 .stream_name = "AFE-PROXY RX",
6794                 .cpu_dai_name = "msm-dai-q6-dev.241",
6795                 .codec_name = "msm-stub-codec.1",
6796                 .codec_dai_name = "msm-stub-rx",
6797                 .platform_name = "msm-pcm-afe",
6798                 .dpcm_playback = 1,
6799                 .ignore_suspend = 1,
6800                 /* this dainlink has playback support */
6801                 .ignore_pmdown_time = 1,
6802         },
6803         {
6804                 .name = "MSM AFE-PCM TX",
6805                 .stream_name = "AFE-PROXY TX",
6806                 .cpu_dai_name = "msm-dai-q6-dev.240",
6807                 .codec_name = "msm-stub-codec.1",
6808                 .codec_dai_name = "msm-stub-tx",
6809                 .platform_name  = "msm-pcm-afe",
6810                 .dpcm_capture = 1,
6811                 .ignore_suspend = 1,
6812         },
6813         {
6814                 .name = MSM_DAILINK_NAME(Compress1),
6815                 .stream_name = "Compress1",
6816                 .cpu_dai_name = "MultiMedia4",
6817                 .platform_name = "msm-compress-dsp",
6818                 .dynamic = 1,
6819                 .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
6820                 .dpcm_playback = 1,
6821                 .dpcm_capture = 1,
6822                 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6823                          SND_SOC_DPCM_TRIGGER_POST},
6824                 .codec_dai_name = "snd-soc-dummy-dai",
6825                 .codec_name = "snd-soc-dummy",
6826                 .ignore_suspend = 1,
6827                 .ignore_pmdown_time = 1,
6828                  /* this dainlink has playback support */
6829                 .be_id = MSM_FRONTEND_DAI_MULTIMEDIA4,
6830         },
6831         {
6832                 .name = "AUXPCM Hostless",
6833                 .stream_name = "AUXPCM Hostless",
6834                 .cpu_dai_name = "AUXPCM_HOSTLESS",
6835                 .platform_name = "msm-pcm-hostless",
6836                 .dynamic = 1,
6837                 .dpcm_playback = 1,
6838                 .dpcm_capture = 1,
6839                 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6840                         SND_SOC_DPCM_TRIGGER_POST},
6841                 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6842                 .ignore_suspend = 1,
6843                 /* this dainlink has playback support */
6844                 .ignore_pmdown_time = 1,
6845                 .codec_dai_name = "snd-soc-dummy-dai",
6846                 .codec_name = "snd-soc-dummy",
6847         },
6848         {
6849                 .name = "SLIMBUS_1 Hostless",
6850                 .stream_name = "SLIMBUS_1 Hostless",
6851                 .cpu_dai_name = "SLIMBUS1_HOSTLESS",
6852                 .platform_name = "msm-pcm-hostless",
6853                 .dynamic = 1,
6854                 .dpcm_playback = 1,
6855                 .dpcm_capture = 1,
6856                 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6857                             SND_SOC_DPCM_TRIGGER_POST},
6858                 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6859                 .ignore_suspend = 1,
6860                  /* this dailink has playback support */
6861                 .ignore_pmdown_time = 1,
6862                 .codec_dai_name = "snd-soc-dummy-dai",
6863                 .codec_name = "snd-soc-dummy",
6864         },
6865         {
6866                 .name = "SLIMBUS_3 Hostless",
6867                 .stream_name = "SLIMBUS_3 Hostless",
6868                 .cpu_dai_name = "SLIMBUS3_HOSTLESS",
6869                 .platform_name = "msm-pcm-hostless",
6870                 .dynamic = 1,
6871                 .dpcm_playback = 1,
6872                 .dpcm_capture = 1,
6873                 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6874                             SND_SOC_DPCM_TRIGGER_POST},
6875                 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6876                 .ignore_suspend = 1,
6877                  /* this dailink has playback support */
6878                 .ignore_pmdown_time = 1,
6879                 .codec_dai_name = "snd-soc-dummy-dai",
6880                 .codec_name = "snd-soc-dummy",
6881         },
6882         {
6883                 .name = "SLIMBUS_4 Hostless",
6884                 .stream_name = "SLIMBUS_4 Hostless",
6885                 .cpu_dai_name = "SLIMBUS4_HOSTLESS",
6886                 .platform_name = "msm-pcm-hostless",
6887                 .dynamic = 1,
6888                 .dpcm_playback = 1,
6889                 .dpcm_capture = 1,
6890                 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6891                             SND_SOC_DPCM_TRIGGER_POST},
6892                 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6893                 .ignore_suspend = 1,
6894                  /* this dailink has playback support */
6895                 .ignore_pmdown_time = 1,
6896                 .codec_dai_name = "snd-soc-dummy-dai",
6897                 .codec_name = "snd-soc-dummy",
6898         },
6899         {
6900                 .name = MSM_DAILINK_NAME(LowLatency),
6901                 .stream_name = "MultiMedia5",
6902                 .cpu_dai_name = "MultiMedia5",
6903                 .platform_name = "msm-pcm-dsp.1",
6904                 .dynamic = 1,
6905                 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
6906                 .dpcm_playback = 1,
6907                 .dpcm_capture = 1,
6908                 .codec_dai_name = "snd-soc-dummy-dai",
6909                 .codec_name = "snd-soc-dummy",
6910                 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6911                                 SND_SOC_DPCM_TRIGGER_POST},
6912                 .ignore_suspend = 1,
6913                 /* this dainlink has playback support */
6914                 .ignore_pmdown_time = 1,
6915                 .be_id = MSM_FRONTEND_DAI_MULTIMEDIA5,
6916         },
6917         {
6918                 .name = "Listen 1 Audio Service",
6919                 .stream_name = "Listen 1 Audio Service",
6920                 .cpu_dai_name = "LSM1",
6921                 .platform_name = "msm-lsm-client",
6922                 .dynamic = 1,
6923                 .dpcm_capture = 1,
6924                 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6925                              SND_SOC_DPCM_TRIGGER_POST },
6926                 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6927                 .ignore_suspend = 1,
6928                 .ignore_pmdown_time = 1,
6929                 .codec_dai_name = "snd-soc-dummy-dai",
6930                 .codec_name = "snd-soc-dummy",
6931                 .be_id = MSM_FRONTEND_DAI_LSM1,
6932         },
6933         /* Multiple Tunnel instances */
6934         {
6935                 .name = MSM_DAILINK_NAME(Compress2),
6936                 .stream_name = "Compress2",
6937                 .cpu_dai_name = "MultiMedia7",
6938                 .platform_name = "msm-compress-dsp",
6939                 .dynamic = 1,
6940                 .dpcm_playback = 1,
6941                 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6942                          SND_SOC_DPCM_TRIGGER_POST},
6943                 .codec_dai_name = "snd-soc-dummy-dai",
6944                 .codec_name = "snd-soc-dummy",
6945                 .ignore_suspend = 1,
6946                 .ignore_pmdown_time = 1,
6947                  /* this dainlink has playback support */
6948                 .be_id = MSM_FRONTEND_DAI_MULTIMEDIA7,
6949         },
6950         {
6951                 .name = MSM_DAILINK_NAME(Compress3),
6952                 .stream_name = "Compress3",
6953                 .cpu_dai_name = "MultiMedia10",
6954                 .platform_name = "msm-compress-dsp",
6955                 .dynamic = 1,
6956                 .dpcm_playback = 1,
6957                 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6958                          SND_SOC_DPCM_TRIGGER_POST},
6959                 .codec_dai_name = "snd-soc-dummy-dai",
6960                 .codec_name = "snd-soc-dummy",
6961                 .ignore_suspend = 1,
6962                 .ignore_pmdown_time = 1,
6963                  /* this dainlink has playback support */
6964                 .be_id = MSM_FRONTEND_DAI_MULTIMEDIA10,
6965         },
6966         {
6967                 .name = MSM_DAILINK_NAME(ULL_NOIRQ),
6968                 .stream_name = "MM_NOIRQ",
6969                 .cpu_dai_name = "MultiMedia8",
6970                 .platform_name = "msm-pcm-dsp-noirq",
6971                 .dynamic = 1,
6972                 .dpcm_playback = 1,
6973                 .dpcm_capture = 1,
6974                 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6975                          SND_SOC_DPCM_TRIGGER_POST},
6976                 .codec_dai_name = "snd-soc-dummy-dai",
6977                 .codec_name = "snd-soc-dummy",
6978                 .ignore_suspend = 1,
6979                 .ignore_pmdown_time = 1,
6980                  /* this dainlink has playback support */
6981                 .be_id = MSM_FRONTEND_DAI_MULTIMEDIA8,
6982         },
6983         /* HDMI Hostless */
6984         {
6985                 .name = "HDMI_RX_HOSTLESS",
6986                 .stream_name = "HDMI_RX_HOSTLESS",
6987                 .cpu_dai_name = "HDMI_HOSTLESS",
6988                 .platform_name = "msm-pcm-hostless",
6989                 .dynamic = 1,
6990                 .dpcm_playback = 1,
6991                 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6992                         SND_SOC_DPCM_TRIGGER_POST},
6993                 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6994                 .ignore_suspend = 1,
6995                 .ignore_pmdown_time = 1,
6996                 .codec_dai_name = "snd-soc-dummy-dai",
6997                 .codec_name = "snd-soc-dummy",
6998         },
6999         {
7000                 .name = "VoiceMMode2",
7001                 .stream_name = "VoiceMMode2",
7002                 .cpu_dai_name = "VoiceMMode2",
7003                 .platform_name = "msm-pcm-voice",
7004                 .dynamic = 1,
7005                 .dpcm_playback = 1,
7006                 .dpcm_capture = 1,
7007                 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7008                             SND_SOC_DPCM_TRIGGER_POST},
7009                 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
7010                 .ignore_suspend = 1,
7011                 .ignore_pmdown_time = 1,
7012                 .codec_dai_name = "snd-soc-dummy-dai",
7013                 .codec_name = "snd-soc-dummy",
7014                 .be_id = MSM_FRONTEND_DAI_VOICEMMODE2,
7015         },
7016         /* LSM FE */
7017         {
7018                 .name = "Listen 2 Audio Service",
7019                 .stream_name = "Listen 2 Audio Service",
7020                 .cpu_dai_name = "LSM2",
7021                 .platform_name = "msm-lsm-client",
7022                 .dynamic = 1,
7023                 .dpcm_capture = 1,
7024                 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
7025                                  SND_SOC_DPCM_TRIGGER_POST },
7026                 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
7027                 .ignore_suspend = 1,
7028                 .ignore_pmdown_time = 1,
7029                 .codec_dai_name = "snd-soc-dummy-dai",
7030                 .codec_name = "snd-soc-dummy",
7031                 .be_id = MSM_FRONTEND_DAI_LSM2,
7032         },
7033         {
7034                 .name = "Listen 3 Audio Service",
7035                 .stream_name = "Listen 3 Audio Service",
7036                 .cpu_dai_name = "LSM3",
7037                 .platform_name = "msm-lsm-client",
7038                 .dynamic = 1,
7039                 .dpcm_capture = 1,
7040                 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
7041                                  SND_SOC_DPCM_TRIGGER_POST },
7042                 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
7043                 .ignore_suspend = 1,
7044                 .ignore_pmdown_time = 1,
7045                 .codec_dai_name = "snd-soc-dummy-dai",
7046                 .codec_name = "snd-soc-dummy",
7047                 .be_id = MSM_FRONTEND_DAI_LSM3,
7048         },
7049         {
7050                 .name = "Listen 4 Audio Service",
7051                 .stream_name = "Listen 4 Audio Service",
7052                 .cpu_dai_name = "LSM4",
7053                 .platform_name = "msm-lsm-client",
7054                 .dynamic = 1,
7055                 .dpcm_capture = 1,
7056                 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
7057                                  SND_SOC_DPCM_TRIGGER_POST },
7058                 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
7059                 .ignore_suspend = 1,
7060                 .ignore_pmdown_time = 1,
7061                 .codec_dai_name = "snd-soc-dummy-dai",
7062                 .codec_name = "snd-soc-dummy",
7063                 .be_id = MSM_FRONTEND_DAI_LSM4,
7064         },
7065         {
7066                 .name = "Listen 5 Audio Service",
7067                 .stream_name = "Listen 5 Audio Service",
7068                 .cpu_dai_name = "LSM5",
7069                 .platform_name = "msm-lsm-client",
7070                 .dynamic = 1,
7071                 .dpcm_capture = 1,
7072                 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
7073                                  SND_SOC_DPCM_TRIGGER_POST },
7074                 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
7075                 .ignore_suspend = 1,
7076                 .ignore_pmdown_time = 1,
7077                 .codec_dai_name = "snd-soc-dummy-dai",
7078                 .codec_name = "snd-soc-dummy",
7079                 .be_id = MSM_FRONTEND_DAI_LSM5,
7080         },
7081         {
7082                 .name = "Listen 6 Audio Service",
7083                 .stream_name = "Listen 6 Audio Service",
7084                 .cpu_dai_name = "LSM6",
7085                 .platform_name = "msm-lsm-client",
7086                 .dynamic = 1,
7087                 .dpcm_capture = 1,
7088                 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
7089                                  SND_SOC_DPCM_TRIGGER_POST },
7090                 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
7091                 .ignore_suspend = 1,
7092                 .ignore_pmdown_time = 1,
7093                 .codec_dai_name = "snd-soc-dummy-dai",
7094                 .codec_name = "snd-soc-dummy",
7095                 .be_id = MSM_FRONTEND_DAI_LSM6,
7096         },
7097         {
7098                 .name = "Listen 7 Audio Service",
7099                 .stream_name = "Listen 7 Audio Service",
7100                 .cpu_dai_name = "LSM7",
7101                 .platform_name = "msm-lsm-client",
7102                 .dynamic = 1,
7103                 .dpcm_capture = 1,
7104                 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
7105                                  SND_SOC_DPCM_TRIGGER_POST },
7106                 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
7107                 .ignore_suspend = 1,
7108                 .ignore_pmdown_time = 1,
7109                 .codec_dai_name = "snd-soc-dummy-dai",
7110                 .codec_name = "snd-soc-dummy",
7111                 .be_id = MSM_FRONTEND_DAI_LSM7,
7112         },
7113         {
7114                 .name = "Listen 8 Audio Service",
7115                 .stream_name = "Listen 8 Audio Service",
7116                 .cpu_dai_name = "LSM8",
7117                 .platform_name = "msm-lsm-client",
7118                 .dynamic = 1,
7119                 .dpcm_capture = 1,
7120                 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
7121                                  SND_SOC_DPCM_TRIGGER_POST },
7122                 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
7123                 .ignore_suspend = 1,
7124                 .ignore_pmdown_time = 1,
7125                 .codec_dai_name = "snd-soc-dummy-dai",
7126                 .codec_name = "snd-soc-dummy",
7127                 .be_id = MSM_FRONTEND_DAI_LSM8,
7128         },
7129         {
7130                 .name = MSM_DAILINK_NAME(Media9),
7131                 .stream_name = "MultiMedia9",
7132                 .cpu_dai_name = "MultiMedia9",
7133                 .platform_name = "msm-pcm-dsp.0",
7134                 .dynamic = 1,
7135                 .dpcm_playback = 1,
7136                 .dpcm_capture = 1,
7137                 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7138                                 SND_SOC_DPCM_TRIGGER_POST},
7139                 .codec_dai_name = "snd-soc-dummy-dai",
7140                 .codec_name = "snd-soc-dummy",
7141                 .ignore_suspend = 1,
7142                 /* this dainlink has playback support */
7143                 .ignore_pmdown_time = 1,
7144                 .be_id = MSM_FRONTEND_DAI_MULTIMEDIA9,
7145         },
7146         {
7147                 .name = MSM_DAILINK_NAME(Compress4),
7148                 .stream_name = "Compress4",
7149                 .cpu_dai_name = "MultiMedia11",
7150                 .platform_name = "msm-compress-dsp",
7151                 .dynamic = 1,
7152                 .dpcm_playback = 1,
7153                 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7154                          SND_SOC_DPCM_TRIGGER_POST},
7155                 .codec_dai_name = "snd-soc-dummy-dai",
7156                 .codec_name = "snd-soc-dummy",
7157                 .ignore_suspend = 1,
7158                 .ignore_pmdown_time = 1,
7159                  /* this dainlink has playback support */
7160                 .be_id = MSM_FRONTEND_DAI_MULTIMEDIA11,
7161         },
7162         {
7163                 .name = MSM_DAILINK_NAME(Compress5),
7164                 .stream_name = "Compress5",
7165                 .cpu_dai_name = "MultiMedia12",
7166                 .platform_name = "msm-compress-dsp",
7167                 .dynamic = 1,
7168                 .dpcm_playback = 1,
7169                 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7170                          SND_SOC_DPCM_TRIGGER_POST},
7171                 .codec_dai_name = "snd-soc-dummy-dai",
7172                 .codec_name = "snd-soc-dummy",
7173                 .ignore_suspend = 1,
7174                 .ignore_pmdown_time = 1,
7175                  /* this dainlink has playback support */
7176                 .be_id = MSM_FRONTEND_DAI_MULTIMEDIA12,
7177         },
7178         {
7179                 .name = MSM_DAILINK_NAME(Compress6),
7180                 .stream_name = "Compress6",
7181                 .cpu_dai_name = "MultiMedia13",
7182                 .platform_name = "msm-compress-dsp",
7183                 .dynamic = 1,
7184                 .dpcm_playback = 1,
7185                 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7186                          SND_SOC_DPCM_TRIGGER_POST},
7187                 .codec_dai_name = "snd-soc-dummy-dai",
7188                 .codec_name = "snd-soc-dummy",
7189                 .ignore_suspend = 1,
7190                 .ignore_pmdown_time = 1,
7191                  /* this dainlink has playback support */
7192                 .be_id = MSM_FRONTEND_DAI_MULTIMEDIA13,
7193         },
7194         {
7195                 .name = MSM_DAILINK_NAME(Compress7),
7196                 .stream_name = "Compress7",
7197                 .cpu_dai_name = "MultiMedia14",
7198                 .platform_name = "msm-compress-dsp",
7199                 .dynamic = 1,
7200                 .dpcm_playback = 1,
7201                 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7202                          SND_SOC_DPCM_TRIGGER_POST},
7203                 .codec_dai_name = "snd-soc-dummy-dai",
7204                 .codec_name = "snd-soc-dummy",
7205                 .ignore_suspend = 1,
7206                 .ignore_pmdown_time = 1,
7207                  /* this dainlink has playback support */
7208                 .be_id = MSM_FRONTEND_DAI_MULTIMEDIA14,
7209         },
7210         {
7211                 .name = MSM_DAILINK_NAME(Compress8),
7212                 .stream_name = "Compress8",
7213                 .cpu_dai_name = "MultiMedia15",
7214                 .platform_name = "msm-compress-dsp",
7215                 .dynamic = 1,
7216                 .dpcm_playback = 1,
7217                 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7218                          SND_SOC_DPCM_TRIGGER_POST},
7219                 .codec_dai_name = "snd-soc-dummy-dai",
7220                 .codec_name = "snd-soc-dummy",
7221                 .ignore_suspend = 1,
7222                 .ignore_pmdown_time = 1,
7223                  /* this dainlink has playback support */
7224                 .be_id = MSM_FRONTEND_DAI_MULTIMEDIA15,
7225         },
7226         {
7227                 .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
7228                 .stream_name = "MM_NOIRQ_2",
7229                 .cpu_dai_name = "MultiMedia16",
7230                 .platform_name = "msm-pcm-dsp-noirq",
7231                 .dynamic = 1,
7232                 .dpcm_playback = 1,
7233                 .dpcm_capture = 1,
7234                 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7235                          SND_SOC_DPCM_TRIGGER_POST},
7236                 .codec_dai_name = "snd-soc-dummy-dai",
7237                 .codec_name = "snd-soc-dummy",
7238                 .ignore_suspend = 1,
7239                 .ignore_pmdown_time = 1,
7240                  /* this dainlink has playback support */
7241                 .be_id = MSM_FRONTEND_DAI_MULTIMEDIA16,
7242         },
7243         {
7244                 .name = "SLIMBUS_8 Hostless",
7245                 .stream_name = "SLIMBUS8_HOSTLESS Capture",
7246                 .cpu_dai_name = "SLIMBUS8_HOSTLESS",
7247                 .platform_name = "msm-pcm-hostless",
7248                 .dynamic = 1,
7249                 .dpcm_capture = 1,
7250                 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7251                             SND_SOC_DPCM_TRIGGER_POST},
7252                 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
7253                 .ignore_suspend = 1,
7254                 .ignore_pmdown_time = 1,
7255                 .codec_dai_name = "snd-soc-dummy-dai",
7256                 .codec_name = "snd-soc-dummy",
7257         },
7258 };
7259
7260 static struct snd_soc_dai_link msm_tasha_fe_dai_links[] = {
7261         {
7262                 .name = LPASS_BE_SLIMBUS_4_TX,
7263                 .stream_name = "Slimbus4 Capture",
7264                 .cpu_dai_name = "msm-dai-q6-dev.16393",
7265                 .platform_name = "msm-pcm-hostless",
7266                 .codec_name = "tasha_codec",
7267                 .codec_dai_name = "tasha_vifeedback",
7268                 .be_id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
7269                 .be_hw_params_fixup = msm_be_hw_params_fixup,
7270                 .ops = &msm_be_ops,
7271                 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
7272                 .ignore_suspend = 1,
7273         },
7274         /* Ultrasound RX DAI Link */
7275         {
7276                 .name = "SLIMBUS_2 Hostless Playback",
7277                 .stream_name = "SLIMBUS_2 Hostless Playback",
7278                 .cpu_dai_name = "msm-dai-q6-dev.16388",
7279                 .platform_name = "msm-pcm-hostless",
7280                 .codec_name = "tasha_codec",
7281                 .codec_dai_name = "tasha_rx2",
7282                 .ignore_suspend = 1,
7283                 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
7284                 .ops = &msm_slimbus_2_be_ops,
7285         },
7286         /* Ultrasound TX DAI Link */
7287         {
7288                 .name = "SLIMBUS_2 Hostless Capture",
7289                 .stream_name = "SLIMBUS_2 Hostless Capture",
7290                 .cpu_dai_name = "msm-dai-q6-dev.16389",
7291                 .platform_name = "msm-pcm-hostless",
7292                 .codec_name = "tasha_codec",
7293                 .codec_dai_name = "tasha_tx2",
7294                 .ignore_suspend = 1,
7295                 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
7296                 .ops = &msm_slimbus_2_be_ops,
7297         },
7298         /* CPE LSM direct dai-link */
7299         {
7300                 .name = "CPE Listen service",
7301                 .stream_name = "CPE Listen Audio Service",
7302                 .cpu_dai_name = "msm-dai-slim",
7303                 .platform_name = "msm-cpe-lsm",
7304                 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7305                             SND_SOC_DPCM_TRIGGER_POST},
7306                 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
7307                 .ignore_suspend = 1,
7308                 .ignore_pmdown_time = 1,
7309                 .codec_dai_name = "tasha_mad1",
7310                 .codec_name = "tasha_codec",
7311                 .ops = &msm_cpe_ops,
7312         },
7313         {
7314                 .name = "SLIMBUS_6 Hostless Playback",
7315                 .stream_name = "SLIMBUS_6 Hostless",
7316                 .cpu_dai_name = "SLIMBUS6_HOSTLESS",
7317                 .platform_name = "msm-pcm-hostless",
7318                 .dynamic = 1,
7319                 .dpcm_playback = 1,
7320                 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7321                             SND_SOC_DPCM_TRIGGER_POST},
7322                 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
7323                 .ignore_suspend = 1,
7324                  /* this dailink has playback support */
7325                 .ignore_pmdown_time = 1,
7326                 .codec_dai_name = "snd-soc-dummy-dai",
7327                 .codec_name = "snd-soc-dummy",
7328         },
7329         /* CPE LSM EC PP direct dai-link */
7330         {
7331                 .name = "CPE Listen service ECPP",
7332                 .stream_name = "CPE Listen Audio Service ECPP",
7333                 .cpu_dai_name = "CPE_LSM_NOHOST",
7334                 .platform_name = "msm-cpe-lsm.3",
7335                 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7336                             SND_SOC_DPCM_TRIGGER_POST},
7337                 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
7338                 .ignore_suspend = 1,
7339                 .ignore_pmdown_time = 1,
7340                 .codec_dai_name = "tasha_cpe",
7341                 .codec_name = "tasha_codec",
7342         },
7343 };
7344
7345 static struct snd_soc_dai_link msm_tavil_fe_dai_links[] = {
7346         {
7347                 .name = LPASS_BE_SLIMBUS_4_TX,
7348                 .stream_name = "Slimbus4 Capture",
7349                 .cpu_dai_name = "msm-dai-q6-dev.16393",
7350                 .platform_name = "msm-pcm-hostless",
7351                 .codec_name = "tavil_codec",
7352                 .codec_dai_name = "tavil_vifeedback",
7353                 .be_id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
7354                 .be_hw_params_fixup = msm_be_hw_params_fixup,
7355                 .ops = &msm_be_ops,
7356                 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
7357                 .ignore_suspend = 1,
7358         },
7359         /* Ultrasound RX DAI Link */
7360         {
7361                 .name = "SLIMBUS_2 Hostless Playback",
7362                 .stream_name = "SLIMBUS_2 Hostless Playback",
7363                 .cpu_dai_name = "msm-dai-q6-dev.16388",
7364                 .platform_name = "msm-pcm-hostless",
7365                 .codec_name = "tavil_codec",
7366                 .codec_dai_name = "tavil_rx2",
7367                 .ignore_suspend = 1,
7368                 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
7369                 .ops = &msm_slimbus_2_be_ops,
7370         },
7371         /* Ultrasound TX DAI Link */
7372         {
7373                 .name = "SLIMBUS_2 Hostless Capture",
7374                 .stream_name = "SLIMBUS_2 Hostless Capture",
7375                 .cpu_dai_name = "msm-dai-q6-dev.16389",
7376                 .platform_name = "msm-pcm-hostless",
7377                 .codec_name = "tavil_codec",
7378                 .codec_dai_name = "tavil_tx2",
7379                 .ignore_suspend = 1,
7380                 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
7381                 .ops = &msm_slimbus_2_be_ops,
7382         },
7383 };
7384
7385 static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
7386         {
7387                 .name = MSM_DAILINK_NAME(ASM Loopback),
7388                 .stream_name = "MultiMedia6",
7389                 .cpu_dai_name = "MultiMedia6",
7390                 .platform_name = "msm-pcm-loopback",
7391                 .dynamic = 1,
7392                 .dpcm_playback = 1,
7393                 .dpcm_capture = 1,
7394                 .codec_dai_name = "snd-soc-dummy-dai",
7395                 .codec_name = "snd-soc-dummy",
7396                 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7397                             SND_SOC_DPCM_TRIGGER_POST},
7398                 .ignore_suspend = 1,
7399                 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
7400                 .ignore_pmdown_time = 1,
7401                 .be_id = MSM_FRONTEND_DAI_MULTIMEDIA6,
7402         },
7403         {
7404                 .name = "USB Audio Hostless",
7405                 .stream_name = "USB Audio Hostless",
7406                 .cpu_dai_name = "USBAUDIO_HOSTLESS",
7407                 .platform_name = "msm-pcm-hostless",
7408                 .dynamic = 1,
7409                 .dpcm_playback = 1,
7410                 .dpcm_capture = 1,
7411                 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7412                             SND_SOC_DPCM_TRIGGER_POST},
7413                 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
7414                 .ignore_suspend = 1,
7415                 .ignore_pmdown_time = 1,
7416                 .codec_dai_name = "snd-soc-dummy-dai",
7417                 .codec_name = "snd-soc-dummy",
7418         },
7419         {
7420                 .name = MSM_DAILINK_NAME(Transcode Loopback Playback),
7421                 .stream_name = "Transcode Loopback Playback",
7422                 .cpu_dai_name = "MultiMedia26",
7423                 .platform_name = "msm-transcode-loopback",
7424                 .dynamic = 1,
7425                 .dpcm_playback = 1,
7426                 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7427                          SND_SOC_DPCM_TRIGGER_POST},
7428                 .codec_dai_name = "snd-soc-dummy-dai",
7429                 .codec_name = "snd-soc-dummy",
7430                 .ignore_suspend = 1,
7431                 .ignore_pmdown_time = 1,
7432                  /* this dainlink has playback support */
7433                 .be_id = MSM_FRONTEND_DAI_MULTIMEDIA26,
7434         },
7435         {
7436                 .name = MSM_DAILINK_NAME(Transcode Loopback Capture),
7437                 .stream_name = "Transcode Loopback Capture",
7438                 .cpu_dai_name = "MultiMedia27",
7439                 .platform_name = "msm-transcode-loopback",
7440                 .dynamic = 1,
7441                 .dpcm_capture = 1,
7442                 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7443                          SND_SOC_DPCM_TRIGGER_POST},
7444                 .codec_dai_name = "snd-soc-dummy-dai",
7445                 .codec_name = "snd-soc-dummy",
7446                 .ignore_suspend = 1,
7447                 .ignore_pmdown_time = 1,
7448                 .be_id = MSM_FRONTEND_DAI_MULTIMEDIA27,
7449         },
7450         {
7451                 .name = "MultiMedia21",
7452                 .stream_name = "MultiMedia21",
7453                 .cpu_dai_name = "MultiMedia21",
7454                 .platform_name = "msm-pcm-dsp.0",
7455                 .dynamic = 1,
7456                 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
7457                 .dpcm_playback = 1,
7458                 .codec_dai_name = "snd-soc-dummy-dai",
7459                 .codec_name = "snd-soc-dummy",
7460                 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7461                         SND_SOC_DPCM_TRIGGER_POST},
7462                 .ignore_suspend = 1,
7463                 /* this dainlink has playback support */
7464                 .ignore_pmdown_time = 1,
7465                 .be_id = MSM_FRONTEND_DAI_MULTIMEDIA21,
7466         },
7467         {
7468                 .name = "MultiMedia22",
7469                 .stream_name = "MultiMedia22",
7470                 .cpu_dai_name = "MultiMedia22",
7471                 .platform_name = "msm-pcm-dsp.0",
7472                 .dynamic = 1,
7473                 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
7474                 .dpcm_playback = 1,
7475                 .codec_dai_name = "snd-soc-dummy-dai",
7476                 .codec_name = "snd-soc-dummy",
7477                 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7478                         SND_SOC_DPCM_TRIGGER_POST},
7479                 .ignore_suspend = 1,
7480                 /* this dainlink has playback support */
7481                 .ignore_pmdown_time = 1,
7482                 .be_id = MSM_FRONTEND_DAI_MULTIMEDIA22,
7483         },
7484         {
7485                 .name = "MultiMedia23",
7486                 .stream_name = "MultiMedia23",
7487                 .cpu_dai_name = "MultiMedia23",
7488                 .platform_name = "msm-pcm-dsp.0",
7489                 .dynamic = 1,
7490                 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
7491                 .dpcm_playback = 1,
7492                 .codec_dai_name = "snd-soc-dummy-dai",
7493                 .codec_name = "snd-soc-dummy",
7494                 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7495                         SND_SOC_DPCM_TRIGGER_POST},
7496                 .ignore_suspend = 1,
7497                 /* this dainlink has playback support */
7498                 .ignore_pmdown_time = 1,
7499                 .be_id = MSM_FRONTEND_DAI_MULTIMEDIA23,
7500         },
7501         {
7502                 .name = "MultiMedia24",
7503                 .stream_name = "MultiMedia24",
7504                 .cpu_dai_name = "MultiMedia24",
7505                 .platform_name = "msm-pcm-dsp.0",
7506                 .dynamic = 1,
7507                 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
7508                 .dpcm_playback = 1,
7509                 .codec_dai_name = "snd-soc-dummy-dai",
7510                 .codec_name = "snd-soc-dummy",
7511                 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7512                         SND_SOC_DPCM_TRIGGER_POST},
7513                 .ignore_suspend = 1,
7514                 /* this dainlink has playback support */
7515                 .ignore_pmdown_time = 1,
7516                 .be_id = MSM_FRONTEND_DAI_MULTIMEDIA24,
7517         },
7518         {
7519                 .name = "MultiMedia25",
7520                 .stream_name = "MultiMedia25",
7521                 .cpu_dai_name = "MultiMedia25",
7522                 .platform_name = "msm-pcm-dsp.0",
7523                 .dynamic = 1,
7524                 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
7525                 .dpcm_playback = 1,
7526                 .codec_dai_name = "snd-soc-dummy-dai",
7527                 .codec_name = "snd-soc-dummy",
7528                 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7529                         SND_SOC_DPCM_TRIGGER_POST},
7530                 .ignore_suspend = 1,
7531                 /* this dainlink has playback support */
7532                 .ignore_pmdown_time = 1,
7533                 .be_id = MSM_FRONTEND_DAI_MULTIMEDIA25,
7534         },
7535 };
7536
7537 static struct snd_soc_dai_link msm_common_be_dai_links[] = {
7538         /* Backend AFE DAI Links */
7539         {
7540                 .name = LPASS_BE_AFE_PCM_RX,
7541                 .stream_name = "AFE Playback",
7542                 .cpu_dai_name = "msm-dai-q6-dev.224",
7543                 .platform_name = "msm-pcm-routing",
7544                 .codec_name = "msm-stub-codec.1",
7545                 .codec_dai_name = "msm-stub-rx",
7546                 .no_pcm = 1,
7547                 .dpcm_playback = 1,
7548                 .be_id = MSM_BACKEND_DAI_AFE_PCM_RX,
7549                 .be_hw_params_fixup = msm_be_hw_params_fixup,
7550                 /* this dainlink has playback support */
7551                 .ignore_pmdown_time = 1,
7552                 .ignore_suspend = 1,
7553         },
7554         {
7555                 .name = LPASS_BE_AFE_PCM_TX,
7556                 .stream_name = "AFE Capture",
7557                 .cpu_dai_name = "msm-dai-q6-dev.225",
7558                 .platform_name = "msm-pcm-routing",
7559                 .codec_name = "msm-stub-codec.1",
7560                 .codec_dai_name = "msm-stub-tx",
7561                 .no_pcm = 1,
7562                 .dpcm_capture = 1,
7563                 .be_id = MSM_BACKEND_DAI_AFE_PCM_TX,
7564                 .be_hw_params_fixup = msm_be_hw_params_fixup,
7565                 .ignore_suspend = 1,
7566         },
7567         /* Incall Record Uplink BACK END DAI Link */
7568         {
7569                 .name = LPASS_BE_INCALL_RECORD_TX,
7570                 .stream_name = "Voice Uplink Capture",
7571                 .cpu_dai_name = "msm-dai-q6-dev.32772",
7572                 .platform_name = "msm-pcm-routing",
7573                 .codec_name = "msm-stub-codec.1",
7574                 .codec_dai_name = "msm-stub-tx",
7575                 .no_pcm = 1,
7576                 .dpcm_capture = 1,
7577                 .be_id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
7578                 .be_hw_params_fixup = msm_be_hw_params_fixup,
7579                 .ignore_suspend = 1,
7580         },
7581         /* Incall Record Downlink BACK END DAI Link */
7582         {
7583                 .name = LPASS_BE_INCALL_RECORD_RX,
7584                 .stream_name = "Voice Downlink Capture",
7585                 .cpu_dai_name = "msm-dai-q6-dev.32771",
7586                 .platform_name = "msm-pcm-routing",
7587                 .codec_name = "msm-stub-codec.1",
7588                 .codec_dai_name = "msm-stub-tx",
7589                 .no_pcm = 1,
7590                 .dpcm_capture = 1,
7591                 .be_id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
7592                 .be_hw_params_fixup = msm_be_hw_params_fixup,
7593                 .ignore_suspend = 1,
7594         },
7595         /* Incall Music BACK END DAI Link */
7596         {
7597                 .name = LPASS_BE_VOICE_PLAYBACK_TX,
7598                 .stream_name = "Voice Farend Playback",
7599                 .cpu_dai_name = "msm-dai-q6-dev.32773",
7600                 .platform_name = "msm-pcm-routing",
7601                 .codec_name = "msm-stub-codec.1",
7602                 .codec_dai_name = "msm-stub-rx",
7603                 .no_pcm = 1,
7604                 .dpcm_playback = 1,
7605                 .be_id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
7606                 .be_hw_params_fixup = msm_be_hw_params_fixup,
7607                 .ignore_suspend = 1,
7608         },
7609         /* Incall Music 2 BACK END DAI Link */
7610         {
7611                 .name = LPASS_BE_VOICE2_PLAYBACK_TX,
7612                 .stream_name = "Voice2 Farend Playback",
7613                 .cpu_dai_name = "msm-dai-q6-dev.32770",
7614                 .platform_name = "msm-pcm-routing",
7615                 .codec_name = "msm-stub-codec.1",
7616                 .codec_dai_name = "msm-stub-rx",
7617                 .no_pcm = 1,
7618                 .dpcm_playback = 1,
7619                 .be_id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
7620                 .be_hw_params_fixup = msm_be_hw_params_fixup,
7621                 .ignore_suspend = 1,
7622         },
7623         {
7624                 .name = LPASS_BE_USB_AUDIO_RX,
7625                 .stream_name = "USB Audio Playback",
7626                 .cpu_dai_name = "msm-dai-q6-dev.28672",
7627                 .platform_name = "msm-pcm-routing",
7628                 .codec_name = "msm-stub-codec.1",
7629                 .codec_dai_name = "msm-stub-rx",
7630                 .no_pcm = 1,
7631                 .dpcm_playback = 1,
7632                 .be_id = MSM_BACKEND_DAI_USB_RX,
7633                 .be_hw_params_fixup = msm_be_hw_params_fixup,
7634                 .ignore_pmdown_time = 1,
7635                 .ignore_suspend = 1,
7636         },
7637         {
7638                 .name = LPASS_BE_USB_AUDIO_TX,
7639                 .stream_name = "USB Audio Capture",
7640                 .cpu_dai_name = "msm-dai-q6-dev.28673",
7641                 .platform_name = "msm-pcm-routing",
7642                 .codec_name = "msm-stub-codec.1",
7643                 .codec_dai_name = "msm-stub-tx",
7644                 .no_pcm = 1,
7645                 .dpcm_capture = 1,
7646                 .be_id = MSM_BACKEND_DAI_USB_TX,
7647                 .be_hw_params_fixup = msm_be_hw_params_fixup,
7648                 .ignore_suspend = 1,
7649         },
7650         {
7651                 .name = LPASS_BE_PRI_TDM_RX_0,
7652                 .stream_name = "Primary TDM0 Playback",
7653                 .cpu_dai_name = "msm-dai-q6-tdm.36864",
7654                 .platform_name = "msm-pcm-routing",
7655                 .codec_name = "msm-stub-codec.1",
7656                 .codec_dai_name = "msm-stub-rx",
7657                 .no_pcm = 1,
7658                 .dpcm_playback = 1,
7659                 .be_id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
7660                 .be_hw_params_fixup = msm_tdm_be_hw_params_fixup,
7661                 .ops = &msm8998_tdm_be_ops,
7662                 .ignore_suspend = 1,
7663         },
7664         {
7665                 .name = LPASS_BE_PRI_TDM_TX_0,
7666                 .stream_name = "Primary TDM0 Capture",
7667                 .cpu_dai_name = "msm-dai-q6-tdm.36865",
7668                 .platform_name = "msm-pcm-routing",
7669                 .codec_name = "msm-stub-codec.1",
7670                 .codec_dai_name = "msm-stub-tx",
7671                 .no_pcm = 1,
7672                 .dpcm_capture = 1,
7673                 .be_id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
7674                 .be_hw_params_fixup = msm_tdm_be_hw_params_fixup,
7675                 .ops = &msm8998_tdm_be_ops,
7676                 .ignore_suspend = 1,
7677         },
7678         {
7679                 .name = LPASS_BE_SEC_TDM_RX_0,
7680                 .stream_name = "Secondary TDM0 Playback",
7681                 .cpu_dai_name = "msm-dai-q6-tdm.36880",
7682                 .platform_name = "msm-pcm-routing",
7683                 .codec_name = "msm-stub-codec.1",
7684                 .codec_dai_name = "msm-stub-rx",
7685                 .no_pcm = 1,
7686                 .dpcm_playback = 1,
7687                 .be_id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
7688                 .be_hw_params_fixup = msm_be_hw_params_fixup,
7689                 .ops = &msm_tdm_be_ops,
7690                 .ignore_suspend = 1,
7691         },
7692         {
7693                 .name = LPASS_BE_SEC_TDM_TX_0,
7694                 .stream_name = "Secondary TDM0 Capture",
7695                 .cpu_dai_name = "msm-dai-q6-tdm.36881",
7696                 .platform_name = "msm-pcm-routing",
7697                 .codec_name = "msm-stub-codec.1",
7698                 .codec_dai_name = "msm-stub-tx",
7699                 .no_pcm = 1,
7700                 .dpcm_capture = 1,
7701                 .be_id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
7702                 .be_hw_params_fixup = msm_be_hw_params_fixup,
7703                 .ops = &msm_tdm_be_ops,
7704                 .ignore_suspend = 1,
7705         },
7706         {
7707                 .name = LPASS_BE_TERT_TDM_RX_0,
7708                 .stream_name = "Tertiary TDM0 Playback",
7709                 .cpu_dai_name = "msm-dai-q6-tdm.36896",
7710                 .platform_name = "msm-pcm-routing",
7711                 .codec_name = "msm-stub-codec.1",
7712                 .codec_dai_name = "msm-stub-rx",
7713                 .no_pcm = 1,
7714                 .dpcm_playback = 1,
7715                 .be_id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
7716                 .be_hw_params_fixup = msm_be_hw_params_fixup,
7717                 .ops = &msm_tdm_be_ops,
7718                 .ignore_suspend = 1,
7719         },
7720         {
7721                 .name = LPASS_BE_TERT_TDM_TX_0,
7722                 .stream_name = "Tertiary TDM0 Capture",
7723                 .cpu_dai_name = "msm-dai-q6-tdm.36897",
7724                 .platform_name = "msm-pcm-routing",
7725                 .codec_name = "msm-stub-codec.1",
7726                 .codec_dai_name = "msm-stub-tx",
7727                 .no_pcm = 1,
7728                 .dpcm_capture = 1,
7729                 .be_id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
7730                 .be_hw_params_fixup = msm_be_hw_params_fixup,
7731                 .ops = &msm_tdm_be_ops,
7732                 .ignore_suspend = 1,
7733         },
7734         {
7735                 .name = LPASS_BE_QUAT_TDM_RX_0,
7736                 .stream_name = "Quaternary TDM0 Playback",
7737                 .cpu_dai_name = "msm-dai-q6-tdm.36912",
7738                 .platform_name = "msm-pcm-routing",
7739                 .codec_name = "msm-stub-codec.1",
7740                 .codec_dai_name = "msm-stub-rx",
7741                 .no_pcm = 1,
7742                 .dpcm_playback = 1,
7743                 .be_id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
7744                 .be_hw_params_fixup = msm_tdm_be_hw_params_fixup,
7745                 .ops = &msm8998_tdm_be_ops,
7746                 .ignore_suspend = 1,
7747         },
7748         {
7749                 .name = LPASS_BE_QUAT_TDM_TX_0,
7750                 .stream_name = "Quaternary TDM0 Capture",
7751                 .cpu_dai_name = "msm-dai-q6-tdm.36913",
7752                 .platform_name = "msm-pcm-routing",
7753                 .codec_name = "msm-stub-codec.1",
7754                 .codec_dai_name = "msm-stub-tx",
7755                 .no_pcm = 1,
7756                 .dpcm_capture = 1,
7757                 .be_id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
7758                 .be_hw_params_fixup = msm_tdm_be_hw_params_fixup,
7759                 .ops = &msm8998_tdm_be_ops,
7760                 .ignore_suspend = 1,
7761         },
7762 };
7763
7764 static struct snd_soc_dai_link msm_tasha_be_dai_links[] = {
7765         {
7766                 .name = LPASS_BE_SLIMBUS_0_RX,
7767                 .stream_name = "Slimbus Playback",
7768                 .cpu_dai_name = "msm-dai-q6-dev.16384",
7769                 .platform_name = "msm-pcm-routing",
7770                 .codec_name = "tasha_codec",
7771                 .codec_dai_name = "tasha_mix_rx1",
7772                 .no_pcm = 1,
7773                 .dpcm_playback = 1,
7774                 .be_id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
7775                 .init = &msm_audrx_init,
7776                 .be_hw_params_fixup = msm_be_hw_params_fixup,
7777                 /* this dainlink has playback support */
7778                 .ignore_pmdown_time = 1,
7779                 .ignore_suspend = 1,
7780                 .ops = &msm_be_ops,
7781         },
7782         {
7783                 .name = LPASS_BE_SLIMBUS_0_TX,
7784                 .stream_name = "Slimbus Capture",
7785                 .cpu_dai_name = "msm-dai-q6-dev.16385",
7786                 .platform_name = "msm-pcm-routing",
7787                 .codec_name = "tasha_codec",
7788                 .codec_dai_name = "tasha_tx1",
7789                 .no_pcm = 1,
7790                 .dpcm_capture = 1,
7791                 .be_id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
7792                 .be_hw_params_fixup = msm_be_hw_params_fixup,
7793                 .ignore_suspend = 1,
7794                 .ops = &msm_be_ops,
7795         },
7796         {
7797                 .name = LPASS_BE_SLIMBUS_1_RX,
7798                 .stream_name = "Slimbus1 Playback",
7799                 .cpu_dai_name = "msm-dai-q6-dev.16386",
7800                 .platform_name = "msm-pcm-routing",
7801                 .codec_name = "tasha_codec",
7802 #ifdef CONFIG_MACH_XIAOMI_MSM8998
7803                 .codec_dai_name = "tasha_rx2",
7804 #else
7805                 .codec_dai_name = "tasha_mix_rx1",
7806 #endif
7807                 .no_pcm = 1,
7808                 .dpcm_playback = 1,
7809                 .be_id = MSM_BACKEND_DAI_SLIMBUS_1_RX,
7810                 .be_hw_params_fixup = msm_be_hw_params_fixup,
7811                 .ops = &msm_be_ops,
7812                 /* dai link has playback support */
7813                 .ignore_pmdown_time = 1,
7814                 .ignore_suspend = 1,
7815         },
7816         {
7817                 .name = LPASS_BE_SLIMBUS_1_TX,
7818                 .stream_name = "Slimbus1 Capture",
7819                 .cpu_dai_name = "msm-dai-q6-dev.16387",
7820                 .platform_name = "msm-pcm-routing",
7821                 .codec_name = "tasha_codec",
7822 #ifdef CONFIG_MACH_XIAOMI_MSM8998
7823                 .codec_dai_name = "tasha_tx2",
7824 #else
7825                 .codec_dai_name = "tasha_tx3",
7826 #endif
7827                 .no_pcm = 1,
7828                 .dpcm_capture = 1,
7829                 .be_id = MSM_BACKEND_DAI_SLIMBUS_1_TX,
7830                 .be_hw_params_fixup = msm_be_hw_params_fixup,
7831                 .ops = &msm_be_ops,
7832                 .ignore_suspend = 1,
7833         },
7834         {
7835                 .name = LPASS_BE_SLIMBUS_3_RX,
7836                 .stream_name = "Slimbus3 Playback",
7837                 .cpu_dai_name = "msm-dai-q6-dev.16390",
7838                 .platform_name = "msm-pcm-routing",
7839                 .codec_name = "tasha_codec",
7840                 .codec_dai_name = "tasha_mix_rx1",
7841                 .no_pcm = 1,
7842                 .dpcm_playback = 1,
7843                 .be_id = MSM_BACKEND_DAI_SLIMBUS_3_RX,
7844                 .be_hw_params_fixup = msm_be_hw_params_fixup,
7845                 .ops = &msm_be_ops,
7846                 /* dai link has playback support */
7847                 .ignore_pmdown_time = 1,
7848                 .ignore_suspend = 1,
7849         },
7850         {
7851                 .name = LPASS_BE_SLIMBUS_3_TX,
7852                 .stream_name = "Slimbus3 Capture",
7853                 .cpu_dai_name = "msm-dai-q6-dev.16391",
7854                 .platform_name = "msm-pcm-routing",
7855                 .codec_name = "tasha_codec",
7856                 .codec_dai_name = "tasha_tx1",
7857                 .no_pcm = 1,
7858                 .dpcm_capture = 1,
7859                 .be_id = MSM_BACKEND_DAI_SLIMBUS_3_TX,
7860                 .be_hw_params_fixup = msm_be_hw_params_fixup,
7861                 .ops = &msm_be_ops,
7862                 .ignore_suspend = 1,
7863         },
7864         {
7865                 .name = LPASS_BE_SLIMBUS_4_RX,
7866                 .stream_name = "Slimbus4 Playback",
7867                 .cpu_dai_name = "msm-dai-q6-dev.16392",
7868                 .platform_name = "msm-pcm-routing",
7869                 .codec_name = "tasha_codec",
7870                 .codec_dai_name = "tasha_mix_rx1",
7871                 .no_pcm = 1,
7872                 .dpcm_playback = 1,
7873                 .be_id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
7874                 .be_hw_params_fixup = msm_be_hw_params_fixup,
7875                 .ops = &msm_be_ops,
7876                 /* dai link has playback support */
7877                 .ignore_pmdown_time = 1,
7878                 .ignore_suspend = 1,
7879         },
7880         {
7881                 .name = LPASS_BE_SLIMBUS_5_RX,
7882                 .stream_name = "Slimbus5 Playback",
7883                 .cpu_dai_name = "msm-dai-q6-dev.16394",
7884                 .platform_name = "msm-pcm-routing",
7885                 .codec_name = "tasha_codec",
7886                 .codec_dai_name = "tasha_rx3",
7887                 .no_pcm = 1,
7888                 .dpcm_playback = 1,
7889                 .be_id = MSM_BACKEND_DAI_SLIMBUS_5_RX,
7890                 .be_hw_params_fixup = msm_be_hw_params_fixup,
7891                 .ops = &msm_be_ops,
7892                 /* dai link has playback support */
7893                 .ignore_pmdown_time = 1,
7894                 .ignore_suspend = 1,
7895         },
7896         /* MAD BE */
7897         {
7898                 .name = LPASS_BE_SLIMBUS_5_TX,
7899                 .stream_name = "Slimbus5 Capture",
7900                 .cpu_dai_name = "msm-dai-q6-dev.16395",
7901                 .platform_name = "msm-pcm-routing",
7902                 .codec_name = "tasha_codec",
7903                 .codec_dai_name = "tasha_mad1",
7904                 .no_pcm = 1,
7905                 .dpcm_capture = 1,
7906                 .be_id = MSM_BACKEND_DAI_SLIMBUS_5_TX,
7907                 .be_hw_params_fixup = msm_be_hw_params_fixup,
7908                 .ops = &msm_be_ops,
7909                 .ignore_suspend = 1,
7910         },
7911         {
7912                 .name = LPASS_BE_SLIMBUS_6_RX,
7913                 .stream_name = "Slimbus6 Playback",
7914                 .cpu_dai_name = "msm-dai-q6-dev.16396",
7915                 .platform_name = "msm-pcm-routing",
7916                 .codec_name = "tasha_codec",
7917                 .codec_dai_name = "tasha_rx4",
7918                 .no_pcm = 1,
7919                 .dpcm_playback = 1,
7920                 .be_id = MSM_BACKEND_DAI_SLIMBUS_6_RX,
7921                 .be_hw_params_fixup = msm_be_hw_params_fixup,
7922                 .ops = &msm_be_ops,
7923                 /* dai link has playback support */
7924                 .ignore_pmdown_time = 1,
7925                 .ignore_suspend = 1,
7926         },
7927         /* Slimbus VI Recording */
7928         {
7929                 .name = LPASS_BE_SLIMBUS_TX_VI,
7930                 .stream_name = "Slimbus4 Capture",
7931                 .cpu_dai_name = "msm-dai-q6-dev.16393",
7932                 .platform_name = "msm-pcm-routing",
7933                 .codec_name = "tasha_codec",
7934                 .codec_dai_name = "tasha_vifeedback",
7935                 .be_id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
7936                 .be_hw_params_fixup = msm_be_hw_params_fixup,
7937                 .ops = &msm_be_ops,
7938                 .ignore_suspend = 1,
7939                 .no_pcm = 1,
7940                 .dpcm_capture = 1,
7941                 .ignore_pmdown_time = 1,
7942         },
7943 };
7944
7945 static struct snd_soc_dai_link msm_tavil_be_dai_links[] = {
7946         {
7947                 .name = LPASS_BE_SLIMBUS_0_RX,
7948                 .stream_name = "Slimbus Playback",
7949                 .cpu_dai_name = "msm-dai-q6-dev.16384",
7950                 .platform_name = "msm-pcm-routing",
7951                 .codec_name = "tavil_codec",
7952                 .codec_dai_name = "tavil_rx1",
7953                 .no_pcm = 1,
7954                 .dpcm_playback = 1,
7955                 .be_id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
7956                 .init = &msm_audrx_init,
7957                 .be_hw_params_fixup = msm_be_hw_params_fixup,
7958                 /* this dainlink has playback support */
7959                 .ignore_pmdown_time = 1,
7960                 .ignore_suspend = 1,
7961                 .ops = &msm_be_ops,
7962         },
7963         {
7964                 .name = LPASS_BE_SLIMBUS_0_TX,
7965                 .stream_name = "Slimbus Capture",
7966                 .cpu_dai_name = "msm-dai-q6-dev.16385",
7967                 .platform_name = "msm-pcm-routing",
7968                 .codec_name = "tavil_codec",
7969                 .codec_dai_name = "tavil_tx1",
7970                 .no_pcm = 1,
7971                 .dpcm_capture = 1,
7972                 .be_id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
7973                 .be_hw_params_fixup = msm_be_hw_params_fixup,
7974                 .ignore_suspend = 1,
7975                 .ops = &msm_be_ops,
7976         },
7977         {
7978                 .name = LPASS_BE_SLIMBUS_1_RX,
7979                 .stream_name = "Slimbus1 Playback",
7980                 .cpu_dai_name = "msm-dai-q6-dev.16386",
7981                 .platform_name = "msm-pcm-routing",
7982                 .codec_name = "tavil_codec",
7983                 .codec_dai_name = "tavil_rx1",
7984                 .no_pcm = 1,
7985                 .dpcm_playback = 1,
7986                 .be_id = MSM_BACKEND_DAI_SLIMBUS_1_RX,
7987                 .be_hw_params_fixup = msm_be_hw_params_fixup,
7988                 .ops = &msm_be_ops,
7989                 /* dai link has playback support */
7990                 .ignore_pmdown_time = 1,
7991                 .ignore_suspend = 1,
7992         },
7993         {
7994                 .name = LPASS_BE_SLIMBUS_1_TX,
7995                 .stream_name = "Slimbus1 Capture",
7996                 .cpu_dai_name = "msm-dai-q6-dev.16387",
7997                 .platform_name = "msm-pcm-routing",
7998                 .codec_name = "tavil_codec",
7999                 .codec_dai_name = "tavil_tx3",
8000                 .no_pcm = 1,
8001                 .dpcm_capture = 1,
8002                 .be_id = MSM_BACKEND_DAI_SLIMBUS_1_TX,
8003                 .be_hw_params_fixup = msm_be_hw_params_fixup,
8004                 .ops = &msm_be_ops,
8005                 .ignore_suspend = 1,
8006         },
8007         {
8008                 .name = LPASS_BE_SLIMBUS_2_RX,
8009                 .stream_name = "Slimbus2 Playback",
8010                 .cpu_dai_name = "msm-dai-q6-dev.16388",
8011                 .platform_name = "msm-pcm-routing",
8012                 .codec_name = "tavil_codec",
8013                 .codec_dai_name = "tavil_rx2",
8014                 .no_pcm = 1,
8015                 .dpcm_playback = 1,
8016                 .be_id = MSM_BACKEND_DAI_SLIMBUS_2_RX,
8017                 .be_hw_params_fixup = msm_be_hw_params_fixup,
8018                 .ops = &msm_be_ops,
8019                 .ignore_pmdown_time = 1,
8020                 .ignore_suspend = 1,
8021         },
8022         {
8023                 .name = LPASS_BE_SLIMBUS_3_RX,
8024                 .stream_name = "Slimbus3 Playback",
8025                 .cpu_dai_name = "msm-dai-q6-dev.16390",
8026                 .platform_name = "msm-pcm-routing",
8027                 .codec_name = "tavil_codec",
8028                 .codec_dai_name = "tavil_rx1",
8029                 .no_pcm = 1,
8030                 .dpcm_playback = 1,
8031                 .be_id = MSM_BACKEND_DAI_SLIMBUS_3_RX,
8032                 .be_hw_params_fixup = msm_be_hw_params_fixup,
8033                 .ops = &msm_be_ops,
8034                 /* dai link has playback support */
8035                 .ignore_pmdown_time = 1,
8036                 .ignore_suspend = 1,
8037         },
8038         {
8039                 .name = LPASS_BE_SLIMBUS_3_TX,
8040                 .stream_name = "Slimbus3 Capture",
8041                 .cpu_dai_name = "msm-dai-q6-dev.16391",
8042                 .platform_name = "msm-pcm-routing",
8043                 .codec_name = "tavil_codec",
8044                 .codec_dai_name = "tavil_tx1",
8045                 .no_pcm = 1,
8046                 .dpcm_capture = 1,
8047                 .be_id = MSM_BACKEND_DAI_SLIMBUS_3_TX,
8048                 .be_hw_params_fixup = msm_be_hw_params_fixup,
8049                 .ops = &msm_be_ops,
8050                 .ignore_suspend = 1,
8051         },
8052         {
8053                 .name = LPASS_BE_SLIMBUS_4_RX,
8054                 .stream_name = "Slimbus4 Playback",
8055                 .cpu_dai_name = "msm-dai-q6-dev.16392",
8056                 .platform_name = "msm-pcm-routing",
8057                 .codec_name = "tavil_codec",
8058                 .codec_dai_name = "tavil_rx1",
8059                 .no_pcm = 1,
8060                 .dpcm_playback = 1,
8061                 .be_id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
8062                 .be_hw_params_fixup = msm_be_hw_params_fixup,
8063                 .ops = &msm_be_ops,
8064                 /* dai link has playback support */
8065                 .ignore_pmdown_time = 1,
8066                 .ignore_suspend = 1,
8067         },
8068         {
8069                 .name = LPASS_BE_SLIMBUS_5_RX,
8070                 .stream_name = "Slimbus5 Playback",
8071                 .cpu_dai_name = "msm-dai-q6-dev.16394",
8072                 .platform_name = "msm-pcm-routing",
8073                 .codec_name = "tavil_codec",
8074                 .codec_dai_name = "tavil_rx3",
8075                 .no_pcm = 1,
8076                 .dpcm_playback = 1,
8077                 .be_id = MSM_BACKEND_DAI_SLIMBUS_5_RX,
8078                 .be_hw_params_fixup = msm_be_hw_params_fixup,
8079                 .ops = &msm_be_ops,
8080                 /* dai link has playback support */
8081                 .ignore_pmdown_time = 1,
8082                 .ignore_suspend = 1,
8083         },
8084         /* MAD BE */
8085         {
8086                 .name = LPASS_BE_SLIMBUS_5_TX,
8087                 .stream_name = "Slimbus5 Capture",
8088                 .cpu_dai_name = "msm-dai-q6-dev.16395",
8089                 .platform_name = "msm-pcm-routing",
8090                 .codec_name = "tavil_codec",
8091                 .codec_dai_name = "tavil_mad1",
8092                 .no_pcm = 1,
8093                 .dpcm_capture = 1,
8094                 .be_id = MSM_BACKEND_DAI_SLIMBUS_5_TX,
8095                 .be_hw_params_fixup = msm_be_hw_params_fixup,
8096                 .ops = &msm_be_ops,
8097                 .ignore_suspend = 1,
8098         },
8099         {
8100                 .name = LPASS_BE_SLIMBUS_6_RX,
8101                 .stream_name = "Slimbus6 Playback",
8102                 .cpu_dai_name = "msm-dai-q6-dev.16396",
8103                 .platform_name = "msm-pcm-routing",
8104                 .codec_name = "tavil_codec",
8105                 .codec_dai_name = "tavil_rx4",
8106                 .no_pcm = 1,
8107                 .dpcm_playback = 1,
8108                 .be_id = MSM_BACKEND_DAI_SLIMBUS_6_RX,
8109                 .be_hw_params_fixup = msm_be_hw_params_fixup,
8110                 .ops = &msm_be_ops,
8111                 /* dai link has playback support */
8112                 .ignore_pmdown_time = 1,
8113                 .ignore_suspend = 1,
8114         },
8115         /* Slimbus VI Recording */
8116         {
8117                 .name = LPASS_BE_SLIMBUS_TX_VI,
8118                 .stream_name = "Slimbus4 Capture",
8119                 .cpu_dai_name = "msm-dai-q6-dev.16393",
8120                 .platform_name = "msm-pcm-routing",
8121                 .codec_name = "tavil_codec",
8122                 .codec_dai_name = "tavil_vifeedback",
8123                 .be_id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
8124                 .be_hw_params_fixup = msm_be_hw_params_fixup,
8125                 .ops = &msm_be_ops,
8126                 .ignore_suspend = 1,
8127                 .no_pcm = 1,
8128                 .dpcm_capture = 1,
8129                 .ignore_pmdown_time = 1,
8130         },
8131 };
8132
8133 static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
8134         {
8135                 .name = LPASS_BE_SLIMBUS_7_RX,
8136                 .stream_name = "Slimbus7 Playback",
8137                 .cpu_dai_name = "msm-dai-q6-dev.16398",
8138                 .platform_name = "msm-pcm-routing",
8139                 .codec_name = "btfmslim_slave",
8140                 /* BT codec driver determines capabilities based on
8141                  * dai name, bt codecdai name should always contains
8142                  * supported usecase information
8143                  */
8144                 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
8145                 .no_pcm = 1,
8146                 .dpcm_playback = 1,
8147                 .be_id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
8148                 .be_hw_params_fixup = msm_be_hw_params_fixup,
8149                 .ops = &msm_wcn_ops,
8150                 /* dai link has playback support */
8151                 .ignore_pmdown_time = 1,
8152                 .ignore_suspend = 1,
8153         },
8154         {
8155                 .name = LPASS_BE_SLIMBUS_7_TX,
8156                 .stream_name = "Slimbus7 Capture",
8157                 .cpu_dai_name = "msm-dai-q6-dev.16399",
8158                 .platform_name = "msm-pcm-routing",
8159                 .codec_name = "btfmslim_slave",
8160                 .codec_dai_name = "btfm_bt_sco_slim_tx",
8161                 .no_pcm = 1,
8162                 .dpcm_capture = 1,
8163                 .be_id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
8164                 .be_hw_params_fixup = msm_be_hw_params_fixup,
8165                 .ops = &msm_wcn_ops,
8166                 .ignore_suspend = 1,
8167         },
8168         {
8169                 .name = LPASS_BE_SLIMBUS_8_TX,
8170                 .stream_name = "Slimbus8 Capture",
8171                 .cpu_dai_name = "msm-dai-q6-dev.16401",
8172                 .platform_name = "msm-pcm-routing",
8173                 .codec_name = "btfmslim_slave",
8174                 .codec_dai_name = "btfm_fm_slim_tx",
8175                 .no_pcm = 1,
8176                 .dpcm_capture = 1,
8177                 .be_id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
8178                 .be_hw_params_fixup = msm_be_hw_params_fixup,
8179                 .init = &msm_wcn_init,
8180                 .ops = &msm_wcn_ops,
8181                 .ignore_suspend = 1,
8182         },
8183 };
8184
8185 static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
8186         /* HDMI BACK END DAI Link */
8187         {
8188                 .name = LPASS_BE_HDMI,
8189                 .stream_name = "HDMI Playback",
8190                 .cpu_dai_name = "msm-dai-q6-hdmi.8",
8191                 .platform_name = "msm-pcm-routing",
8192                 .codec_name = "msm-ext-disp-audio-codec-rx",
8193                 .codec_dai_name = "msm_hdmi_audio_codec_rx_dai",
8194                 .no_pcm = 1,
8195                 .dpcm_playback = 1,
8196                 .be_id = MSM_BACKEND_DAI_HDMI_RX,
8197                 .be_hw_params_fixup = msm_be_hw_params_fixup,
8198                 .ignore_pmdown_time = 1,
8199                 .ignore_suspend = 1,
8200         },
8201         /* DISP PORT BACK END DAI Link */
8202         {
8203                 .name = LPASS_BE_DISPLAY_PORT,
8204                 .stream_name = "Display Port Playback",
8205                 .cpu_dai_name = "msm-dai-q6-dp.24608",
8206                 .platform_name = "msm-pcm-routing",
8207                 .codec_name = "msm-ext-disp-audio-codec-rx",
8208                 .codec_dai_name = "msm_dp_audio_codec_rx_dai",
8209                 .no_pcm = 1,
8210                 .dpcm_playback = 1,
8211                 .be_id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
8212                 .be_hw_params_fixup = msm_be_hw_params_fixup,
8213                 .ignore_pmdown_time = 1,
8214                 .ignore_suspend = 1,
8215         },
8216 };
8217
8218 static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
8219         {
8220                 .name = LPASS_BE_PRI_MI2S_RX,
8221                 .stream_name = "Primary MI2S Playback",
8222                 .cpu_dai_name = "msm-dai-q6-mi2s.0",
8223                 .platform_name = "msm-pcm-routing",
8224                 .codec_name = "msm-stub-codec.1",
8225                 .codec_dai_name = "msm-stub-rx",
8226                 .no_pcm = 1,
8227                 .dpcm_playback = 1,
8228                 .be_id = MSM_BACKEND_DAI_PRI_MI2S_RX,
8229                 .be_hw_params_fixup = msm_be_hw_params_fixup,
8230                 .ops = &msm_mi2s_be_ops,
8231                 .ignore_suspend = 1,
8232                 .ignore_pmdown_time = 1,
8233         },
8234         {
8235                 .name = LPASS_BE_PRI_MI2S_TX,
8236                 .stream_name = "Primary MI2S Capture",
8237                 .cpu_dai_name = "msm-dai-q6-mi2s.0",
8238                 .platform_name = "msm-pcm-routing",
8239                 .codec_name = "msm-stub-codec.1",
8240                 .codec_dai_name = "msm-stub-tx",
8241                 .no_pcm = 1,
8242                 .dpcm_capture = 1,
8243                 .be_id = MSM_BACKEND_DAI_PRI_MI2S_TX,
8244                 .be_hw_params_fixup = msm_be_hw_params_fixup,
8245                 .ops = &msm_mi2s_be_ops,
8246                 .ignore_suspend = 1,
8247         },
8248         {
8249                 .name = LPASS_BE_SEC_MI2S_RX,
8250                 .stream_name = "Secondary MI2S Playback",
8251                 .cpu_dai_name = "msm-dai-q6-mi2s.1",
8252                 .platform_name = "msm-pcm-routing",
8253                 .codec_name = "msm-stub-codec.1",
8254                 .codec_dai_name = "msm-stub-rx",
8255                 .no_pcm = 1,
8256                 .dpcm_playback = 1,
8257                 .be_id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
8258                 .be_hw_params_fixup = msm_be_hw_params_fixup,
8259                 .ops = &msm_mi2s_be_ops,
8260                 .ignore_suspend = 1,
8261                 .ignore_pmdown_time = 1,
8262         },
8263         {
8264                 .name = LPASS_BE_SEC_MI2S_TX,
8265                 .stream_name = "Secondary MI2S Capture",
8266                 .cpu_dai_name = "msm-dai-q6-mi2s.1",
8267                 .platform_name = "msm-pcm-routing",
8268                 .codec_name = "msm-stub-codec.1",
8269                 .codec_dai_name = "msm-stub-tx",
8270                 .no_pcm = 1,
8271                 .dpcm_capture = 1,
8272                 .be_id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
8273                 .be_hw_params_fixup = msm_be_hw_params_fixup,
8274                 .ops = &msm_mi2s_be_ops,
8275                 .ignore_suspend = 1,
8276         },
8277         {
8278                 .name = LPASS_BE_TERT_MI2S_RX,
8279                 .stream_name = "Tertiary MI2S Playback",
8280                 .cpu_dai_name = "msm-dai-q6-mi2s.2",
8281                 .platform_name = "msm-pcm-routing",
8282                 .codec_name = "msm-stub-codec.1",
8283                 .codec_dai_name = "msm-stub-rx",
8284                 .no_pcm = 1,
8285                 .dpcm_playback = 1,
8286                 .be_id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
8287                 .be_hw_params_fixup = msm_be_hw_params_fixup,
8288                 .ops = &msm_mi2s_be_ops,
8289                 .ignore_suspend = 1,
8290                 .ignore_pmdown_time = 1,
8291         },
8292         {
8293                 .name = LPASS_BE_TERT_MI2S_TX,
8294                 .stream_name = "Tertiary MI2S Capture",
8295                 .cpu_dai_name = "msm-dai-q6-mi2s.2",
8296                 .platform_name = "msm-pcm-routing",
8297                 .codec_name = "msm-stub-codec.1",
8298                 .codec_dai_name = "msm-stub-tx",
8299                 .no_pcm = 1,
8300                 .dpcm_capture = 1,
8301                 .be_id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
8302                 .be_hw_params_fixup = msm_be_hw_params_fixup,
8303                 .ops = &msm_mi2s_be_ops,
8304                 .ignore_suspend = 1,
8305         },
8306 #ifdef CONFIG_MACH_XIAOMI_MSM8998
8307 };
8308
8309 static struct snd_soc_dai_link msm_quat_mi2s_stub_dai_links[] = {
8310 #endif
8311         {
8312                 .name = LPASS_BE_QUAT_MI2S_RX,
8313                 .stream_name = "Quaternary MI2S Playback",
8314                 .cpu_dai_name = "msm-dai-q6-mi2s.3",
8315                 .platform_name = "msm-pcm-routing",
8316                 .codec_name = "msm-stub-codec.1",
8317                 .codec_dai_name = "msm-stub-rx",
8318                 .no_pcm = 1,
8319                 .dpcm_playback = 1,
8320                 .be_id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
8321                 .be_hw_params_fixup = msm_be_hw_params_fixup,
8322                 .ops = &msm_mi2s_be_ops,
8323                 .ignore_suspend = 1,
8324                 .ignore_pmdown_time = 1,
8325         },
8326         {
8327                 .name = LPASS_BE_QUAT_MI2S_TX,
8328                 .stream_name = "Quaternary MI2S Capture",
8329                 .cpu_dai_name = "msm-dai-q6-mi2s.3",
8330                 .platform_name = "msm-pcm-routing",
8331                 .codec_name = "msm-stub-codec.1",
8332                 .codec_dai_name = "msm-stub-tx",
8333                 .no_pcm = 1,
8334                 .dpcm_capture = 1,
8335                 .be_id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
8336                 .be_hw_params_fixup = msm_be_hw_params_fixup,
8337                 .ops = &msm_mi2s_be_ops,
8338                 .ignore_suspend = 1,
8339         },
8340 };
8341
8342 #ifdef CONFIG_MACH_XIAOMI_MSM8998
8343 static struct snd_soc_dai_link msm_quat_mi2s_tfa98xx_dai_links[] = {
8344         {
8345                 .name = LPASS_BE_QUAT_MI2S_RX,
8346                 .stream_name = "Quaternary MI2S Playback",
8347                 .cpu_dai_name = "msm-dai-q6-mi2s.3",
8348                 .platform_name = "msm-pcm-routing",
8349                 .codec_name = "tfa98xx.10-0034",
8350                 .codec_dai_name = "tfa98xx-aif-a-34",
8351                 .no_pcm = 1,
8352                 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS,
8353                 .dpcm_playback = 1,
8354                 .be_id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
8355                 .be_hw_params_fixup = msm_be_hw_params_fixup,
8356                 .ops = &msm_mi2s_be_ops,
8357                 .ignore_suspend = 1,
8358                 .ignore_pmdown_time = 1,
8359         },
8360         {
8361                 .name = LPASS_BE_QUAT_MI2S_TX,
8362                 .stream_name = "Quaternary MI2S Capture",
8363                 .cpu_dai_name = "msm-dai-q6-mi2s.3",
8364                 .platform_name = "msm-pcm-routing",
8365                 .codec_name = "msm-stub-codec.1",
8366                 .codec_dai_name = "msm-stub-tx",
8367                 .no_pcm = 1,
8368                 .dpcm_capture = 1,
8369                 .be_id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
8370                 .be_hw_params_fixup = msm_be_hw_params_fixup,
8371                 .ops = &msm_mi2s_be_ops,
8372                 .ignore_suspend = 1,
8373         },
8374 };
8375
8376 static struct snd_soc_dai_link msm_quat_mi2s_tas2559_dai_links[] = {
8377         {
8378                 .name = LPASS_BE_QUAT_MI2S_RX,
8379                 .stream_name = "Quaternary MI2S Playback",
8380                 .cpu_dai_name = "msm-dai-q6-mi2s.3",
8381                 .platform_name = "msm-pcm-routing",
8382                 .codec_name = "tas2559.10-004c",
8383                 .codec_dai_name = "tas2559 ASI1",
8384                 .no_pcm = 1,
8385                 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS,
8386                 .dpcm_playback = 1,
8387                 .be_id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
8388                 .be_hw_params_fixup = msm_be_hw_params_fixup,
8389                 .ops = &msm_mi2s_be_ops,
8390                 .ignore_suspend = 1,
8391                 .ignore_pmdown_time = 1,
8392         },
8393         {
8394                 .name = LPASS_BE_QUAT_MI2S_TX,
8395                 .stream_name = "Quaternary MI2S Capture",
8396                 .cpu_dai_name = "msm-dai-q6-mi2s.3",
8397                 .platform_name = "msm-pcm-routing",
8398                 .codec_name = "msm-stub-codec.1",
8399                 .codec_dai_name = "msm-stub-tx",
8400                 .no_pcm = 1,
8401                 .dpcm_capture = 1,
8402                 .be_id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
8403                 .be_hw_params_fixup = msm_be_hw_params_fixup,
8404                 .ops = &msm_mi2s_be_ops,
8405                 .ignore_suspend = 1,
8406         },
8407 };
8408 #endif
8409
8410 static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
8411         /* Primary AUX PCM Backend DAI Links */
8412         {
8413                 .name = LPASS_BE_AUXPCM_RX,
8414                 .stream_name = "AUX PCM Playback",
8415                 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
8416                 .platform_name = "msm-pcm-routing",
8417                 .codec_name = "msm-stub-codec.1",
8418                 .codec_dai_name = "msm-stub-rx",
8419                 .no_pcm = 1,
8420                 .dpcm_playback = 1,
8421                 .be_id = MSM_BACKEND_DAI_AUXPCM_RX,
8422                 .be_hw_params_fixup = msm_be_hw_params_fixup,
8423                 .ignore_pmdown_time = 1,
8424                 .ignore_suspend = 1,
8425                 .ops = &msm_aux_pcm_be_ops,
8426         },
8427         {
8428                 .name = LPASS_BE_AUXPCM_TX,
8429                 .stream_name = "AUX PCM Capture",
8430                 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
8431                 .platform_name = "msm-pcm-routing",
8432                 .codec_name = "msm-stub-codec.1",
8433                 .codec_dai_name = "msm-stub-tx",
8434                 .no_pcm = 1,
8435                 .dpcm_capture = 1,
8436                 .be_id = MSM_BACKEND_DAI_AUXPCM_TX,
8437                 .be_hw_params_fixup = msm_be_hw_params_fixup,
8438                 .ignore_pmdown_time = 1,
8439                 .ignore_suspend = 1,
8440                 .ops = &msm_aux_pcm_be_ops,
8441         },
8442         /* Secondary AUX PCM Backend DAI Links */
8443         {
8444                 .name = LPASS_BE_SEC_AUXPCM_RX,
8445                 .stream_name = "Sec AUX PCM Playback",
8446                 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
8447                 .platform_name = "msm-pcm-routing",
8448                 .codec_name = "msm-stub-codec.1",
8449                 .codec_dai_name = "msm-stub-rx",
8450                 .no_pcm = 1,
8451                 .dpcm_playback = 1,
8452                 .be_id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
8453                 .be_hw_params_fixup = msm_be_hw_params_fixup,
8454                 .ignore_pmdown_time = 1,
8455                 .ignore_suspend = 1,
8456                 .ops = &msm_aux_pcm_be_ops,
8457         },
8458         {
8459                 .name = LPASS_BE_SEC_AUXPCM_TX,
8460                 .stream_name = "Sec AUX PCM Capture",
8461                 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
8462                 .platform_name = "msm-pcm-routing",
8463                 .codec_name = "msm-stub-codec.1",
8464                 .codec_dai_name = "msm-stub-tx",
8465                 .no_pcm = 1,
8466                 .dpcm_capture = 1,
8467                 .be_id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
8468                 .be_hw_params_fixup = msm_be_hw_params_fixup,
8469                 .ignore_suspend = 1,
8470                 .ignore_pmdown_time = 1,
8471                 .ops = &msm_aux_pcm_be_ops,
8472         },
8473         /* Tertiary AUX PCM Backend DAI Links */
8474         {
8475                 .name = LPASS_BE_TERT_AUXPCM_RX,
8476                 .stream_name = "Tert AUX PCM Playback",
8477                 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
8478                 .platform_name = "msm-pcm-routing",
8479                 .codec_name = "msm-stub-codec.1",
8480                 .codec_dai_name = "msm-stub-rx",
8481                 .no_pcm = 1,
8482                 .dpcm_playback = 1,
8483                 .be_id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
8484                 .be_hw_params_fixup = msm_be_hw_params_fixup,
8485                 .ignore_pmdown_time = 1,
8486                 .ignore_suspend = 1,
8487                 .ops = &msm_aux_pcm_be_ops,
8488         },
8489         {
8490                 .name = LPASS_BE_TERT_AUXPCM_TX,
8491                 .stream_name = "Tert AUX PCM Capture",
8492                 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
8493                 .platform_name = "msm-pcm-routing",
8494                 .codec_name = "msm-stub-codec.1",
8495                 .codec_dai_name = "msm-stub-tx",
8496                 .no_pcm = 1,
8497                 .dpcm_capture = 1,
8498                 .be_id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
8499                 .be_hw_params_fixup = msm_be_hw_params_fixup,
8500                 .ignore_suspend = 1,
8501                 .ignore_pmdown_time = 1,
8502                 .ops = &msm_aux_pcm_be_ops,
8503         },
8504         /* Quaternary AUX PCM Backend DAI Links */
8505         {
8506                 .name = LPASS_BE_QUAT_AUXPCM_RX,
8507                 .stream_name = "Quat AUX PCM Playback",
8508                 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
8509                 .platform_name = "msm-pcm-routing",
8510                 .codec_name = "msm-stub-codec.1",
8511                 .codec_dai_name = "msm-stub-rx",
8512                 .no_pcm = 1,
8513                 .dpcm_playback = 1,
8514                 .be_id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
8515                 .be_hw_params_fixup = msm_be_hw_params_fixup,
8516                 .ignore_pmdown_time = 1,
8517                 .ignore_suspend = 1,
8518                 .ops = &msm_aux_pcm_be_ops,
8519         },
8520         {
8521                 .name = LPASS_BE_QUAT_AUXPCM_TX,
8522                 .stream_name = "Quat AUX PCM Capture",
8523                 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
8524                 .platform_name = "msm-pcm-routing",
8525                 .codec_name = "msm-stub-codec.1",
8526                 .codec_dai_name = "msm-stub-tx",
8527                 .no_pcm = 1,
8528                 .dpcm_capture = 1,
8529                 .be_id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
8530                 .be_hw_params_fixup = msm_be_hw_params_fixup,
8531                 .ignore_suspend = 1,
8532                 .ignore_pmdown_time = 1,
8533                 .ops = &msm_aux_pcm_be_ops,
8534         },
8535 };
8536
8537 static struct snd_soc_dai_link msm_tasha_dai_links[
8538                          ARRAY_SIZE(msm_common_dai_links) +
8539                          ARRAY_SIZE(msm_tasha_fe_dai_links) +
8540                          ARRAY_SIZE(msm_common_misc_fe_dai_links) +
8541                          ARRAY_SIZE(msm_common_be_dai_links) +
8542                          ARRAY_SIZE(msm_tasha_be_dai_links) +
8543                          ARRAY_SIZE(msm_wcn_be_dai_links) +
8544                          ARRAY_SIZE(ext_disp_be_dai_link) +
8545                          ARRAY_SIZE(msm_mi2s_be_dai_links) +
8546 #ifdef CONFIG_MACH_XIAOMI_MSM8998
8547                          ARRAY_SIZE(msm_mi2s_be_dai_links) +
8548                          ARRAY_SIZE(msm_quat_mi2s_stub_dai_links) +
8549 #endif
8550                          ARRAY_SIZE(msm_auxpcm_be_dai_links)];
8551
8552 static struct snd_soc_dai_link msm_tavil_dai_links[
8553                          ARRAY_SIZE(msm_common_dai_links) +
8554                          ARRAY_SIZE(msm_tavil_fe_dai_links) +
8555                          ARRAY_SIZE(msm_common_misc_fe_dai_links) +
8556                          ARRAY_SIZE(msm_common_be_dai_links) +
8557                          ARRAY_SIZE(msm_tavil_be_dai_links) +
8558                          ARRAY_SIZE(msm_wcn_be_dai_links) +
8559                          ARRAY_SIZE(ext_disp_be_dai_link) +
8560                          ARRAY_SIZE(msm_mi2s_be_dai_links) +
8561 #ifdef CONFIG_MACH_XIAOMI_MSM8998
8562                          ARRAY_SIZE(msm_mi2s_be_dai_links) +
8563                          ARRAY_SIZE(msm_quat_mi2s_stub_dai_links) +
8564 #endif
8565                          ARRAY_SIZE(msm_auxpcm_be_dai_links)];
8566
8567 static int msm_snd_card_late_probe(struct snd_soc_card *card)
8568 {
8569         const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
8570         struct snd_soc_pcm_runtime *rtd;
8571         int ret = 0;
8572         void *mbhc_calibration;
8573
8574         rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
8575         if (!rtd) {
8576                 dev_err(card->dev,
8577                         "%s: snd_soc_get_pcm_runtime for %s failed!\n",
8578                         __func__, be_dl_name);
8579                 ret = -EINVAL;
8580                 goto err_pcm_runtime;
8581         }
8582
8583         mbhc_calibration = def_tasha_mbhc_cal();
8584         if (!mbhc_calibration) {
8585                 ret = -ENOMEM;
8586                 goto err_mbhc_cal;
8587         }
8588         wcd_mbhc_cfg.calibration = mbhc_calibration;
8589         ret = tasha_mbhc_hs_detect(rtd->codec, &wcd_mbhc_cfg);
8590         if (ret) {
8591                 dev_err(card->dev, "%s: mbhc hs detect failed, err:%d\n",
8592                         __func__, ret);
8593                 goto err_hs_detect;
8594         }
8595         return 0;
8596
8597 err_hs_detect:
8598         kfree(mbhc_calibration);
8599 err_mbhc_cal:
8600 err_pcm_runtime:
8601         return ret;
8602 }
8603
8604 static int msm_snd_card_tavil_late_probe(struct snd_soc_card *card)
8605 {
8606         const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
8607         struct snd_soc_pcm_runtime *rtd;
8608         int ret = 0;
8609         void *mbhc_calibration;
8610
8611         rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
8612         if (!rtd) {
8613                 dev_err(card->dev,
8614                         "%s: snd_soc_get_pcm_runtime for %s failed!\n",
8615                         __func__, be_dl_name);
8616                 ret = -EINVAL;
8617                 goto err_pcm_runtime;
8618         }
8619
8620         mbhc_calibration = def_tavil_mbhc_cal();
8621         if (!mbhc_calibration) {
8622                 ret = -ENOMEM;
8623                 goto err_mbhc_cal;
8624         }
8625         wcd_mbhc_cfg.calibration = mbhc_calibration;
8626         ret = tavil_mbhc_hs_detect(rtd->codec, &wcd_mbhc_cfg);
8627         if (ret) {
8628                 dev_err(card->dev, "%s: mbhc hs detect failed, err:%d\n",
8629                         __func__, ret);
8630                 goto err_hs_detect;
8631         }
8632         return 0;
8633
8634 err_hs_detect:
8635         kfree(mbhc_calibration);
8636 err_mbhc_cal:
8637 err_pcm_runtime:
8638         return ret;
8639 }
8640
8641 struct snd_soc_card snd_soc_card_tasha_msm = {
8642         .name           = "msm8998-tasha-snd-card",
8643         .late_probe     = msm_snd_card_late_probe,
8644 };
8645
8646 struct snd_soc_card snd_soc_card_tavil_msm = {
8647         .name           = "msm8998-tavil-snd-card",
8648         .late_probe     = msm_snd_card_tavil_late_probe,
8649 };
8650
8651 static int msm_populate_dai_link_component_of_node(
8652                                         struct snd_soc_card *card)
8653 {
8654         int i, index, ret = 0;
8655         struct device *cdev = card->dev;
8656         struct snd_soc_dai_link *dai_link = card->dai_link;
8657         struct device_node *np;
8658
8659         if (!cdev) {
8660                 pr_err("%s: Sound card device memory NULL\n", __func__);
8661                 return -ENODEV;
8662         }
8663
8664         for (i = 0; i < card->num_links; i++) {
8665                 if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
8666                         continue;
8667
8668                 /* populate platform_of_node for snd card dai links */
8669                 if (dai_link[i].platform_name &&
8670                     !dai_link[i].platform_of_node) {
8671                         index = of_property_match_string(cdev->of_node,
8672                                                 "asoc-platform-names",
8673                                                 dai_link[i].platform_name);
8674                         if (index < 0) {
8675                                 pr_err("%s: No match found for platform name: %s\n",
8676                                         __func__, dai_link[i].platform_name);
8677                                 ret = index;
8678                                 goto err;
8679                         }
8680                         np = of_parse_phandle(cdev->of_node, "asoc-platform",
8681                                               index);
8682                         if (!np) {
8683                                 pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
8684                                         __func__, dai_link[i].platform_name,
8685                                         index);
8686                                 ret = -ENODEV;
8687                                 goto err;
8688                         }
8689                         dai_link[i].platform_of_node = np;
8690                         dai_link[i].platform_name = NULL;
8691                 }
8692
8693                 /* populate cpu_of_node for snd card dai links */
8694                 if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
8695                         index = of_property_match_string(cdev->of_node,
8696                                                  "asoc-cpu-names",
8697                                                  dai_link[i].cpu_dai_name);
8698                         if (index >= 0) {
8699                                 np = of_parse_phandle(cdev->of_node, "asoc-cpu",
8700                                                 index);
8701                                 if (!np) {
8702                                         pr_err("%s: retrieving phandle for cpu dai %s failed\n",
8703                                                 __func__,
8704                                                 dai_link[i].cpu_dai_name);
8705                                         ret = -ENODEV;
8706                                         goto err;
8707                                 }
8708                                 dai_link[i].cpu_of_node = np;
8709                                 dai_link[i].cpu_dai_name = NULL;
8710                         }
8711                 }
8712
8713                 /* populate codec_of_node for snd card dai links */
8714                 if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
8715                         index = of_property_match_string(cdev->of_node,
8716                                                  "asoc-codec-names",
8717                                                  dai_link[i].codec_name);
8718                         if (index < 0)
8719                                 continue;
8720                         np = of_parse_phandle(cdev->of_node, "asoc-codec",
8721                                               index);
8722                         if (!np) {
8723                                 pr_err("%s: retrieving phandle for codec %s failed\n",
8724                                         __func__, dai_link[i].codec_name);
8725                                 ret = -ENODEV;
8726                                 goto err;
8727                         }
8728                         dai_link[i].codec_of_node = np;
8729                         dai_link[i].codec_name = NULL;
8730                 }
8731         }
8732
8733 err:
8734         return ret;
8735 }
8736
8737 static int msm_prepare_us_euro(struct snd_soc_card *card)
8738 {
8739         struct msm_asoc_mach_data *pdata =
8740                                 snd_soc_card_get_drvdata(card);
8741         int ret = 0;
8742
8743         if (pdata->us_euro_gpio >= 0) {
8744                 dev_dbg(card->dev, "%s: us_euro gpio request %d", __func__,
8745                         pdata->us_euro_gpio);
8746                 ret = gpio_request(pdata->us_euro_gpio, "TASHA_CODEC_US_EURO");
8747                 if (ret) {
8748                         dev_err(card->dev,
8749                                 "%s: Failed to request codec US/EURO gpio %d error %d\n",
8750                                 __func__, pdata->us_euro_gpio, ret);
8751                 }
8752         }
8753
8754         return ret;
8755 }
8756
8757 #ifdef CONFIG_MACH_XIAOMI_MSM8998
8758 static int msm_prepare_ras_switch(struct snd_soc_card *card)
8759 {
8760         int ret = 0;
8761
8762         if (gpio_is_valid(ras_switch_en_gpio)) {
8763                 dev_dbg(card->dev, "%s: ras_switch_en_gpio request %d\n", __func__,
8764                         ras_switch_en_gpio);
8765                 ret = gpio_request(ras_switch_en_gpio, "ras_switch_en");
8766                 if (ret) {
8767                         dev_err(card->dev,
8768                                 "%s: ras_switch_en_gpio request failed, ret:%d\n",
8769                                 __func__, ret);
8770                         goto err;
8771                 }
8772                 gpio_direction_output(ras_switch_en_gpio, 0);
8773         }
8774         if (gpio_is_valid(ras_switch_sel_gpio)) {
8775                 dev_dbg(card->dev, "%s: ras_switch_sel_gpio request %d\n", __func__,
8776                         ras_switch_sel_gpio);
8777                 ret = gpio_request(ras_switch_sel_gpio, "ras_switch_sel");
8778                 if (ret) {
8779                         dev_err(card->dev,
8780                                 "%s: ras_switch_sel_gpio request failed, ret:%d\n",
8781                                 __func__, ret);
8782                         goto err;
8783                 }
8784                 gpio_direction_output(ras_switch_sel_gpio, 0);
8785         }
8786
8787 err:
8788         return ret;
8789 }
8790 #endif
8791
8792 static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
8793 {
8794         int ret = 0;
8795         struct snd_soc_codec *codec = rtd->codec;
8796         struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
8797
8798         ret = snd_soc_add_codec_controls(codec, msm_snd_controls,
8799                                          ARRAY_SIZE(msm_snd_controls));
8800         if (ret < 0) {
8801                 dev_err(codec->dev, "%s: add_codec_controls failed, err%d\n",
8802                         __func__, ret);
8803                 return ret;
8804         }
8805
8806         snd_soc_dapm_new_controls(dapm, msm_dapm_widgets,
8807                                 ARRAY_SIZE(msm_dapm_widgets));
8808
8809         return 0;
8810 }
8811
8812 static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
8813                              struct snd_pcm_hw_params *params)
8814 {
8815         struct snd_soc_pcm_runtime *rtd = substream->private_data;
8816         struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
8817
8818         int ret = 0;
8819         unsigned int rx_ch[] = {144, 145, 146, 147, 148, 149, 150,
8820                                 151, 152, 153, 154, 155, 156};
8821         unsigned int tx_ch[] = {128, 129, 130, 131, 132, 133,
8822                                 134, 135, 136, 137, 138, 139,
8823                                 140, 141, 142, 143};
8824
8825         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
8826                 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
8827                                                   slim_rx_cfg[0].channels,
8828                                                   rx_ch);
8829                 if (ret < 0)
8830                         pr_err("%s: RX failed to set cpu chan map error %d\n",
8831                                 __func__, ret);
8832         } else {
8833                 ret = snd_soc_dai_set_channel_map(cpu_dai,
8834                                                   slim_tx_cfg[0].channels,
8835                                                   tx_ch, 0, 0);
8836                 if (ret < 0)
8837                         pr_err("%s: TX failed to set cpu chan map error %d\n",
8838                                 __func__, ret);
8839         }
8840
8841         return ret;
8842 }
8843
8844 static struct snd_soc_ops msm_stub_be_ops = {
8845         .hw_params = msm_snd_stub_hw_params,
8846 };
8847
8848 static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
8849
8850         /* FrontEnd DAI Links */
8851         {
8852                 .name = "MSMSTUB Media1",
8853                 .stream_name = "MultiMedia1",
8854                 .cpu_dai_name = "MultiMedia1",
8855                 .platform_name = "msm-pcm-dsp.0",
8856                 .dynamic = 1,
8857                 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
8858                 .dpcm_playback = 1,
8859                 .dpcm_capture = 1,
8860                 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
8861                         SND_SOC_DPCM_TRIGGER_POST},
8862                 .codec_dai_name = "snd-soc-dummy-dai",
8863                 .codec_name = "snd-soc-dummy",
8864                 .ignore_suspend = 1,
8865                 /* this dainlink has playback support */
8866                 .ignore_pmdown_time = 1,
8867                 .be_id = MSM_FRONTEND_DAI_MULTIMEDIA1
8868         },
8869 };
8870
8871 static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
8872
8873         /* Backend DAI Links */
8874         {
8875                 .name = LPASS_BE_SLIMBUS_0_RX,
8876                 .stream_name = "Slimbus Playback",
8877                 .cpu_dai_name = "msm-dai-q6-dev.16384",
8878                 .platform_name = "msm-pcm-routing",
8879                 .codec_name = "msm-stub-codec.1",
8880                 .codec_dai_name = "msm-stub-rx",
8881                 .no_pcm = 1,
8882                 .dpcm_playback = 1,
8883                 .be_id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
8884                 .init = &msm_audrx_stub_init,
8885                 .be_hw_params_fixup = msm_be_hw_params_fixup,
8886                 .ignore_pmdown_time = 1, /* dai link has playback support */
8887                 .ignore_suspend = 1,
8888                 .ops = &msm_stub_be_ops,
8889         },
8890         {
8891                 .name = LPASS_BE_SLIMBUS_0_TX,
8892                 .stream_name = "Slimbus Capture",
8893                 .cpu_dai_name = "msm-dai-q6-dev.16385",
8894                 .platform_name = "msm-pcm-routing",
8895                 .codec_name = "msm-stub-codec.1",
8896                 .codec_dai_name = "msm-stub-tx",
8897                 .no_pcm = 1,
8898                 .dpcm_capture = 1,
8899                 .be_id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
8900                 .be_hw_params_fixup = msm_be_hw_params_fixup,
8901                 .ignore_suspend = 1,
8902                 .ops = &msm_stub_be_ops,
8903         },
8904 };
8905
8906 static struct snd_soc_dai_link msm_stub_dai_links[
8907                          ARRAY_SIZE(msm_stub_fe_dai_links) +
8908                          ARRAY_SIZE(msm_stub_be_dai_links)];
8909
8910 struct snd_soc_card snd_soc_card_stub_msm = {
8911         .name           = "msm8998-stub-snd-card",
8912 };
8913
8914 static const struct of_device_id msm8998_asoc_machine_of_match[]  = {
8915         { .compatible = "qcom,msm8998-asoc-snd-tasha",
8916           .data = "tasha_codec"},
8917         { .compatible = "qcom,msm8998-asoc-snd-tavil",
8918           .data = "tavil_codec"},
8919         { .compatible = "qcom,msm8998-asoc-snd-stub",
8920           .data = "stub_codec"},
8921         {},
8922 };
8923
8924 static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
8925 {
8926         struct snd_soc_card *card = NULL;
8927         struct snd_soc_dai_link *dailink;
8928         int len_1, len_2, len_3, len_4;
8929         int total_links;
8930         const struct of_device_id *match;
8931
8932         match = of_match_node(msm8998_asoc_machine_of_match, dev->of_node);
8933         if (!match) {
8934                 dev_err(dev, "%s: No DT match found for sound card\n",
8935                         __func__);
8936                 return NULL;
8937         }
8938
8939         if (!strcmp(match->data, "tasha_codec")) {
8940                 card = &snd_soc_card_tasha_msm;
8941                 len_1 = ARRAY_SIZE(msm_common_dai_links);
8942                 len_2 = len_1 + ARRAY_SIZE(msm_tasha_fe_dai_links);
8943                 len_3 = len_2 + ARRAY_SIZE(msm_common_misc_fe_dai_links);
8944                 len_4 = len_3 + ARRAY_SIZE(msm_common_be_dai_links);
8945                 total_links = len_4 + ARRAY_SIZE(msm_tasha_be_dai_links);
8946                 memcpy(msm_tasha_dai_links,
8947                        msm_common_dai_links,
8948                        sizeof(msm_common_dai_links));
8949                 memcpy(msm_tasha_dai_links + len_1,
8950                        msm_tasha_fe_dai_links,
8951                        sizeof(msm_tasha_fe_dai_links));
8952                 memcpy(msm_tasha_dai_links + len_2,
8953                        msm_common_misc_fe_dai_links,
8954                        sizeof(msm_common_misc_fe_dai_links));
8955                 memcpy(msm_tasha_dai_links + len_3,
8956                        msm_common_be_dai_links,
8957                        sizeof(msm_common_be_dai_links));
8958                 memcpy(msm_tasha_dai_links + len_4,
8959                        msm_tasha_be_dai_links,
8960                        sizeof(msm_tasha_be_dai_links));
8961
8962                 if (of_property_read_bool(dev->of_node, "qcom,wcn-btfm")) {
8963                         dev_dbg(dev, "%s(): WCN BTFM support present\n",
8964                                 __func__);
8965                         memcpy(msm_tasha_dai_links + total_links,
8966                                msm_wcn_be_dai_links,
8967                                sizeof(msm_wcn_be_dai_links));
8968                         total_links += ARRAY_SIZE(msm_wcn_be_dai_links);
8969                 }
8970
8971                 if (of_property_read_bool(dev->of_node,
8972                                           "qcom,ext-disp-audio-rx")) {
8973                         dev_dbg(dev, "%s(): External display audio support present\n",
8974                                 __func__);
8975                         memcpy(msm_tasha_dai_links + total_links,
8976                         ext_disp_be_dai_link,
8977                         sizeof(ext_disp_be_dai_link));
8978                         total_links += ARRAY_SIZE(ext_disp_be_dai_link);
8979                 }
8980                 if (of_property_read_bool(dev->of_node,
8981                                           "qcom,mi2s-audio-intf")) {
8982                         memcpy(msm_tasha_dai_links + total_links,
8983                                msm_mi2s_be_dai_links,
8984                                sizeof(msm_mi2s_be_dai_links));
8985                         total_links += ARRAY_SIZE(msm_mi2s_be_dai_links);
8986
8987 #ifdef CONFIG_MACH_XIAOMI_MSM8998
8988                         if (get_hw_version_platform() == HARDWARE_PLATFORM_SAGIT) {
8989                                 memcpy(msm_tasha_dai_links + total_links,
8990                                        msm_quat_mi2s_tfa98xx_dai_links,
8991                                        sizeof(msm_quat_mi2s_tfa98xx_dai_links));
8992                         } else if ((get_hw_version_platform() == HARDWARE_PLATFORM_CHIRON) ||
8993                                    (get_hw_version_platform() == HARDWARE_PLATFORM_CHIRON_S)) {
8994                                 memcpy(msm_tasha_dai_links + total_links,
8995                                        msm_quat_mi2s_tas2559_dai_links,
8996                                        sizeof(msm_quat_mi2s_tas2559_dai_links));
8997                         } else {
8998                                 memcpy(msm_tasha_dai_links + total_links,
8999                                        msm_quat_mi2s_stub_dai_links,
9000                                        sizeof(msm_quat_mi2s_stub_dai_links));
9001                         }
9002                         total_links += ARRAY_SIZE(msm_quat_mi2s_stub_dai_links);
9003 #endif
9004                 }
9005                 if (of_property_read_bool(dev->of_node,
9006                                           "qcom,auxpcm-audio-intf")) {
9007                         memcpy(msm_tasha_dai_links + total_links,
9008                                msm_auxpcm_be_dai_links,
9009                                sizeof(msm_auxpcm_be_dai_links));
9010                         total_links += ARRAY_SIZE(msm_auxpcm_be_dai_links);
9011                 }
9012                 dailink = msm_tasha_dai_links;
9013         }  else if (!strcmp(match->data, "tavil_codec")) {
9014                 card = &snd_soc_card_tavil_msm;
9015                 len_1 = ARRAY_SIZE(msm_common_dai_links);
9016                 len_2 = len_1 + ARRAY_SIZE(msm_tavil_fe_dai_links);
9017                 len_3 = len_2 + ARRAY_SIZE(msm_common_misc_fe_dai_links);
9018                 len_4 = len_3 + ARRAY_SIZE(msm_common_be_dai_links);
9019                 total_links = len_4 + ARRAY_SIZE(msm_tavil_be_dai_links);
9020                 memcpy(msm_tavil_dai_links,
9021                        msm_common_dai_links,
9022                        sizeof(msm_common_dai_links));
9023                 memcpy(msm_tavil_dai_links + len_1,
9024                        msm_tavil_fe_dai_links,
9025                        sizeof(msm_tavil_fe_dai_links));
9026                 memcpy(msm_tavil_dai_links + len_2,
9027                        msm_common_misc_fe_dai_links,
9028                        sizeof(msm_common_misc_fe_dai_links));
9029                 memcpy(msm_tavil_dai_links + len_3,
9030                        msm_common_be_dai_links,
9031                        sizeof(msm_common_be_dai_links));
9032                 memcpy(msm_tavil_dai_links + len_4,
9033                        msm_tavil_be_dai_links,
9034                        sizeof(msm_tavil_be_dai_links));
9035
9036                 if (of_property_read_bool(dev->of_node, "qcom,wcn-btfm")) {
9037                         dev_dbg(dev, "%s(): WCN BTFM support present\n",
9038                                 __func__);
9039                         memcpy(msm_tavil_dai_links + total_links,
9040                                msm_wcn_be_dai_links,
9041                                sizeof(msm_wcn_be_dai_links));
9042                         total_links += ARRAY_SIZE(msm_wcn_be_dai_links);
9043                 }
9044
9045                 if (of_property_read_bool(dev->of_node,
9046                                           "qcom,ext-disp-audio-rx")) {
9047                         dev_dbg(dev, "%s(): ext disp audio support present\n",
9048                                 __func__);
9049                         memcpy(msm_tavil_dai_links + total_links,
9050                                ext_disp_be_dai_link,
9051                                sizeof(ext_disp_be_dai_link));
9052                         total_links += ARRAY_SIZE(ext_disp_be_dai_link);
9053                 }
9054                 if (of_property_read_bool(dev->of_node,
9055                                           "qcom,mi2s-audio-intf")) {
9056                         memcpy(msm_tavil_dai_links + total_links,
9057                                msm_mi2s_be_dai_links,
9058                                sizeof(msm_mi2s_be_dai_links));
9059                         total_links += ARRAY_SIZE(msm_mi2s_be_dai_links);
9060
9061 #ifdef CONFIG_MACH_XIAOMI_MSM8998
9062                         memcpy(msm_tavil_dai_links + total_links,
9063                                msm_quat_mi2s_stub_dai_links,
9064                                sizeof(msm_quat_mi2s_stub_dai_links));
9065                         total_links += ARRAY_SIZE(msm_quat_mi2s_stub_dai_links);
9066 #endif
9067                 }
9068                 if (of_property_read_bool(dev->of_node,
9069                                           "qcom,auxpcm-audio-intf")) {
9070                         memcpy(msm_tavil_dai_links + total_links,
9071                         msm_auxpcm_be_dai_links,
9072                         sizeof(msm_auxpcm_be_dai_links));
9073                         total_links += ARRAY_SIZE(msm_auxpcm_be_dai_links);
9074                 }
9075                 dailink = msm_tavil_dai_links;
9076         } else if (!strcmp(match->data, "stub_codec")) {
9077                 card = &snd_soc_card_stub_msm;
9078                 len_1 = ARRAY_SIZE(msm_stub_fe_dai_links);
9079                 len_2 = len_1 + ARRAY_SIZE(msm_stub_be_dai_links);
9080
9081                 memcpy(msm_stub_dai_links,
9082                        msm_stub_fe_dai_links,
9083                        sizeof(msm_stub_fe_dai_links));
9084                 memcpy(msm_stub_dai_links + len_1,
9085                        msm_stub_be_dai_links,
9086                        sizeof(msm_stub_be_dai_links));
9087
9088                 dailink = msm_stub_dai_links;
9089                 total_links = len_2;
9090         }
9091
9092         if (card) {
9093                 card->dai_link = dailink;
9094                 card->num_links = total_links;
9095         }
9096
9097         return card;
9098 }
9099
9100 static int msm_wsa881x_init(struct snd_soc_component *component)
9101 {
9102         u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {100, 101, 102, 106};
9103         u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {103, 104, 105, 107};
9104         unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
9105         unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
9106         struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
9107         struct msm_asoc_mach_data *pdata;
9108         struct snd_soc_dapm_context *dapm;
9109         int ret = 0;
9110
9111         if (!codec) {
9112                 pr_err("%s codec is NULL\n", __func__);
9113                 return -EINVAL;
9114         }
9115
9116         dapm = snd_soc_codec_get_dapm(codec);
9117
9118         if (!strcmp(component->name_prefix, "SpkrLeft")) {
9119                 dev_dbg(codec->dev, "%s: setting left ch map to codec %s\n",
9120                         __func__, codec->component.name);
9121                 wsa881x_set_channel_map(codec, &spkleft_ports[0],
9122                                 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
9123                                 &ch_rate[0]);
9124                 if (dapm->component) {
9125                         snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
9126                         snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
9127                 }
9128         } else if (!strcmp(component->name_prefix, "SpkrRight")) {
9129                 dev_dbg(codec->dev, "%s: setting right ch map to codec %s\n",
9130                         __func__, codec->component.name);
9131                 wsa881x_set_channel_map(codec, &spkright_ports[0],
9132                                 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
9133                                 &ch_rate[0]);
9134                 if (dapm->component) {
9135                         snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
9136                         snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
9137                 }
9138         } else {
9139                 dev_err(codec->dev, "%s: wrong codec name %s\n", __func__,
9140                         codec->component.name);
9141                 ret = -EINVAL;
9142                 goto err_codec;
9143         }
9144         pdata = snd_soc_card_get_drvdata(component->card);
9145         if (pdata && pdata->codec_root)
9146                 wsa881x_codec_info_create_codec_entry(pdata->codec_root,
9147                                                       codec);
9148
9149 err_codec:
9150         return ret;
9151 }
9152
9153 static int msm_init_wsa_dev(struct platform_device *pdev,
9154                                 struct snd_soc_card *card)
9155 {
9156         struct device_node *wsa_of_node;
9157         u32 wsa_max_devs;
9158         u32 wsa_dev_cnt;
9159         int i;
9160         struct msm_wsa881x_dev_info *wsa881x_dev_info;
9161         const char *wsa_auxdev_name_prefix[1];
9162         char *dev_name_str = NULL;
9163         int found = 0;
9164         int ret = 0;
9165
9166         /* Get maximum WSA device count for this platform */
9167         ret = of_property_read_u32(pdev->dev.of_node,
9168                                    "qcom,wsa-max-devs", &wsa_max_devs);
9169         if (ret) {
9170                 dev_dbg(&pdev->dev,
9171                          "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
9172                          __func__, pdev->dev.of_node->full_name, ret);
9173 #ifdef CONFIG_MACH_XIAOMI_MSM8998
9174                 ret = 0;
9175 #endif
9176                 goto err_dt;
9177         }
9178         if (wsa_max_devs == 0) {
9179                 dev_warn(&pdev->dev,
9180                          "%s: Max WSA devices is 0 for this target?\n",
9181                          __func__);
9182                 goto err_dt;
9183         }
9184
9185         /* Get count of WSA device phandles for this platform */
9186         wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
9187                                                  "qcom,wsa-devs", NULL);
9188         if (wsa_dev_cnt == -ENOENT) {
9189                 dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
9190                          __func__);
9191                 goto err_dt;
9192         } else if (wsa_dev_cnt <= 0) {
9193                 dev_err(&pdev->dev,
9194                         "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
9195                         __func__, wsa_dev_cnt);
9196                 ret = -EINVAL;
9197                 goto err_dt;
9198         }
9199
9200         /*
9201          * Expect total phandles count to be NOT less than maximum possible
9202          * WSA count. However, if it is less, then assign same value to
9203          * max count as well.
9204          */
9205         if (wsa_dev_cnt < wsa_max_devs) {
9206                 dev_dbg(&pdev->dev,
9207                         "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
9208                         __func__, wsa_max_devs, wsa_dev_cnt);
9209                 wsa_max_devs = wsa_dev_cnt;
9210         }
9211
9212         /* Make sure prefix string passed for each WSA device */
9213         ret = of_property_count_strings(pdev->dev.of_node,
9214                                         "qcom,wsa-aux-dev-prefix");
9215         if (ret != wsa_dev_cnt) {
9216                 dev_err(&pdev->dev,
9217                         "%s: expecting %d wsa prefix. Defined only %d in DT\n",
9218                         __func__, wsa_dev_cnt, ret);
9219                 ret = -EINVAL;
9220                 goto err_dt;
9221         }
9222
9223         /*
9224          * Alloc mem to store phandle and index info of WSA device, if already
9225          * registered with ALSA core
9226          */
9227         wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
9228                                         sizeof(struct msm_wsa881x_dev_info),
9229                                         GFP_KERNEL);
9230         if (!wsa881x_dev_info) {
9231                 ret = -ENOMEM;
9232                 goto err_mem;
9233         }
9234
9235         /*
9236          * search and check whether all WSA devices are already
9237          * registered with ALSA core or not. If found a node, store
9238          * the node and the index in a local array of struct for later
9239          * use.
9240          */
9241         for (i = 0; i < wsa_dev_cnt; i++) {
9242                 wsa_of_node = of_parse_phandle(pdev->dev.of_node,
9243                                             "qcom,wsa-devs", i);
9244                 if (unlikely(!wsa_of_node)) {
9245                         /* we should not be here */
9246                         dev_err(&pdev->dev,
9247                                 "%s: wsa dev node is not present\n",
9248                                 __func__);
9249                         ret = -EINVAL;
9250                         goto err_dev_node;
9251                 }
9252                 if (soc_find_component(wsa_of_node, NULL)) {
9253                         /* WSA device registered with ALSA core */
9254                         wsa881x_dev_info[found].of_node = wsa_of_node;
9255                         wsa881x_dev_info[found].index = i;
9256                         found++;
9257                         if (found == wsa_max_devs)
9258                                 break;
9259                 }
9260         }
9261
9262         if (found < wsa_max_devs) {
9263                 dev_dbg(&pdev->dev,
9264                         "%s: failed to find %d components. Found only %d\n",
9265                         __func__, wsa_max_devs, found);
9266                 return -EPROBE_DEFER;
9267         }
9268         dev_info(&pdev->dev,
9269                 "%s: found %d wsa881x devices registered with ALSA core\n",
9270                 __func__, found);
9271
9272         card->num_aux_devs = wsa_max_devs;
9273         card->num_configs = wsa_max_devs;
9274
9275         /* Alloc array of AUX devs struct */
9276         msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
9277                                        sizeof(struct snd_soc_aux_dev),
9278                                        GFP_KERNEL);
9279         if (!msm_aux_dev) {
9280                 ret = -ENOMEM;
9281                 goto err_auxdev_mem;
9282         }
9283
9284         /* Alloc array of codec conf struct */
9285         msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_aux_devs,
9286                                           sizeof(struct snd_soc_codec_conf),
9287                                           GFP_KERNEL);
9288         if (!msm_codec_conf) {
9289                 ret = -ENOMEM;
9290                 goto err_codec_conf;
9291         }
9292
9293         for (i = 0; i < card->num_aux_devs; i++) {
9294                 dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
9295                                             GFP_KERNEL);
9296                 if (!dev_name_str) {
9297                         ret = -ENOMEM;
9298                         goto err_dev_str;
9299                 }
9300
9301                 ret = of_property_read_string_index(pdev->dev.of_node,
9302                                                     "qcom,wsa-aux-dev-prefix",
9303                                                     wsa881x_dev_info[i].index,
9304                                                     wsa_auxdev_name_prefix);
9305                 if (ret) {
9306                         dev_err(&pdev->dev,
9307                                 "%s: failed to read wsa aux dev prefix, ret = %d\n",
9308                                 __func__, ret);
9309                         ret = -EINVAL;
9310                         goto err_dt_prop;
9311                 }
9312
9313                 snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
9314                 msm_aux_dev[i].name = dev_name_str;
9315                 msm_aux_dev[i].codec_name = NULL;
9316                 msm_aux_dev[i].codec_of_node =
9317                                         wsa881x_dev_info[i].of_node;
9318                 msm_aux_dev[i].init = msm_wsa881x_init;
9319                 msm_codec_conf[i].dev_name = NULL;
9320                 msm_codec_conf[i].name_prefix = wsa_auxdev_name_prefix[0];
9321                 msm_codec_conf[i].of_node =
9322                                 wsa881x_dev_info[i].of_node;
9323         }
9324         card->codec_conf = msm_codec_conf;
9325         card->aux_dev = msm_aux_dev;
9326
9327         return 0;
9328
9329 err_dt_prop:
9330         devm_kfree(&pdev->dev, dev_name_str);
9331 err_dev_str:
9332         devm_kfree(&pdev->dev, msm_codec_conf);
9333 err_codec_conf:
9334         devm_kfree(&pdev->dev, msm_aux_dev);
9335 err_auxdev_mem:
9336 err_dev_node:
9337         devm_kfree(&pdev->dev, wsa881x_dev_info);
9338 err_mem:
9339 err_dt:
9340         return ret;
9341 }
9342
9343 static void i2s_auxpcm_init(struct platform_device *pdev)
9344 {
9345         struct resource *muxsel;
9346         int count;
9347         u32 mi2s_master_slave[MI2S_MAX];
9348         int ret;
9349         char *str[PCM_I2S_SEL_MAX] = {
9350                 "lpaif_pri_mode_muxsel",
9351                 "lpaif_sec_mode_muxsel",
9352                 "lpaif_tert_mode_muxsel",
9353                 "lpaif_quat_mode_muxsel"
9354         };
9355
9356         for (count = 0; count < MI2S_MAX; count++) {
9357                 mutex_init(&mi2s_intf_conf[count].lock);
9358                 mi2s_intf_conf[count].ref_cnt = 0;
9359         }
9360
9361         for (count = 0; count < AUX_PCM_MAX; count++) {
9362                 mutex_init(&auxpcm_intf_conf[count].lock);
9363                 auxpcm_intf_conf[count].ref_cnt = 0;
9364         }
9365
9366         for (count = 0; count < PCM_I2S_SEL_MAX; count++) {
9367                 mutex_init(&mi2s_auxpcm_conf[count].lock);
9368                 mi2s_auxpcm_conf[count].pcm_i2s_sel_vt_addr = NULL;
9369         }
9370
9371         for (count = 0; count < PCM_I2S_SEL_MAX; count++) {
9372                 muxsel = platform_get_resource_byname(pdev, IORESOURCE_MEM,
9373                                                       str[count]);
9374                 if (muxsel) {
9375                         mi2s_auxpcm_conf[count].pcm_i2s_sel_vt_addr
9376                                 = ioremap(muxsel->start, resource_size(muxsel));
9377                 }
9378         }
9379
9380         ret = of_property_read_u32_array(pdev->dev.of_node,
9381                         "qcom,msm-mi2s-master",
9382                         mi2s_master_slave, MI2S_MAX);
9383         if (ret) {
9384                 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
9385                         __func__);
9386         } else {
9387                 for (count = 0; count < MI2S_MAX; count++) {
9388                         mi2s_intf_conf[count].msm_is_mi2s_master =
9389                                 mi2s_master_slave[count];
9390                 }
9391         }
9392 }
9393
9394 static void i2s_auxpcm_deinit(void)
9395 {
9396         int count;
9397
9398         for (count = 0; count < PCM_I2S_SEL_MAX; count++)
9399                 if (mi2s_auxpcm_conf[count].pcm_i2s_sel_vt_addr !=
9400                         NULL)
9401                         iounmap(
9402                         mi2s_auxpcm_conf[count].pcm_i2s_sel_vt_addr);
9403 }
9404
9405 static int msm_asoc_machine_probe(struct platform_device *pdev)
9406 {
9407         struct snd_soc_card *card;
9408         struct msm_asoc_mach_data *pdata;
9409         const char *mbhc_audio_jack_type = NULL;
9410         char *mclk_freq_prop_name;
9411         const struct of_device_id *match;
9412         int ret;
9413
9414         if (!pdev->dev.of_node) {
9415                 dev_err(&pdev->dev, "No platform supplied from device tree\n");
9416                 return -EINVAL;
9417         }
9418
9419         pdata = devm_kzalloc(&pdev->dev,
9420                         sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
9421         if (!pdata)
9422                 return -ENOMEM;
9423
9424         card = populate_snd_card_dailinks(&pdev->dev);
9425         if (!card) {
9426                 dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
9427                 ret = -EINVAL;
9428                 goto err;
9429         }
9430         card->dev = &pdev->dev;
9431         platform_set_drvdata(pdev, card);
9432         snd_soc_card_set_drvdata(card, pdata);
9433
9434         ret = snd_soc_of_parse_card_name(card, "qcom,model");
9435         if (ret) {
9436                 dev_err(&pdev->dev, "parse card name failed, err:%d\n",
9437                         ret);
9438                 goto err;
9439         }
9440
9441         ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
9442         if (ret) {
9443                 dev_err(&pdev->dev, "parse audio routing failed, err:%d\n",
9444                         ret);
9445                 goto err;
9446         }
9447
9448         match = of_match_node(msm8998_asoc_machine_of_match,
9449                         pdev->dev.of_node);
9450         if (!match) {
9451                 dev_err(&pdev->dev, "%s: no matched codec is found.\n",
9452                         __func__);
9453                 goto err;
9454         }
9455
9456         if (!strcmp(match->data, "tasha_codec"))
9457                 mclk_freq_prop_name = "qcom,tasha-mclk-clk-freq";
9458         else
9459                 mclk_freq_prop_name = "qcom,tavil-mclk-clk-freq";
9460
9461         ret = of_property_read_u32(pdev->dev.of_node,
9462                         mclk_freq_prop_name, &pdata->mclk_freq);
9463         if (ret) {
9464                 dev_err(&pdev->dev,
9465                         "Looking up %s property in node %s failed, err%d\n",
9466                         mclk_freq_prop_name,
9467                         pdev->dev.of_node->full_name, ret);
9468                 goto err;
9469         }
9470
9471         if (pdata->mclk_freq != CODEC_EXT_CLK_RATE) {
9472                 dev_err(&pdev->dev, "unsupported mclk freq %u\n",
9473                         pdata->mclk_freq);
9474                 ret = -EINVAL;
9475                 goto err;
9476         }
9477
9478         ret = msm_populate_dai_link_component_of_node(card);
9479         if (ret) {
9480                 ret = -EPROBE_DEFER;
9481                 goto err;
9482         }
9483         ret = msm_init_wsa_dev(pdev, card);
9484         if (ret)
9485                 goto err;
9486
9487         ret = devm_snd_soc_register_card(&pdev->dev, card);
9488         if (ret == -EPROBE_DEFER) {
9489                 if (codec_reg_done)
9490                         ret = -EINVAL;
9491                 goto err;
9492         } else if (ret) {
9493                 dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
9494                         ret);
9495                 goto err;
9496         }
9497         dev_info(&pdev->dev, "Sound card %s registered\n", card->name);
9498         spdev = pdev;
9499
9500         ret = of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
9501         if (ret) {
9502                 dev_dbg(&pdev->dev, "%s: failed to add child nodes, ret=%d\n",
9503                         __func__, ret);
9504         } else {
9505                 pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
9506                                                         "qcom,hph-en1-gpio", 0);
9507                 if (!pdata->hph_en1_gpio_p) {
9508                         dev_dbg(&pdev->dev, "property %s not detected in node %s",
9509                                 "qcom,hph-en1-gpio",
9510                                 pdev->dev.of_node->full_name);
9511                 }
9512
9513                 pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
9514                                                         "qcom,hph-en0-gpio", 0);
9515                 if (!pdata->hph_en0_gpio_p) {
9516                         dev_dbg(&pdev->dev, "property %s not detected in node %s",
9517                                 "qcom,hph-en0-gpio",
9518                                 pdev->dev.of_node->full_name);
9519                 }
9520         }
9521
9522         ret = of_property_read_string(pdev->dev.of_node,
9523                 "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
9524         if (ret) {
9525                 dev_dbg(&pdev->dev, "Looking up %s property in node %s failed",
9526                         "qcom,mbhc-audio-jack-type",
9527                         pdev->dev.of_node->full_name);
9528                 dev_dbg(&pdev->dev, "Jack type properties set to default");
9529         } else {
9530                 if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
9531                         wcd_mbhc_cfg.enable_anc_mic_detect = false;
9532                         dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
9533                 } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
9534                         wcd_mbhc_cfg.enable_anc_mic_detect = true;
9535                         dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
9536                 } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
9537                         wcd_mbhc_cfg.enable_anc_mic_detect = true;
9538                         dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
9539                 } else {
9540                         wcd_mbhc_cfg.enable_anc_mic_detect = false;
9541                         dev_dbg(&pdev->dev, "Unknown value, set to default");
9542                 }
9543         }
9544         /*
9545          * Parse US-Euro gpio info from DT. Report no error if us-euro
9546          * entry is not found in DT file as some targets do not support
9547          * US-Euro detection
9548          */
9549         pdata->us_euro_gpio = of_get_named_gpio(pdev->dev.of_node,
9550                                 "qcom,us-euro-gpios", 0);
9551         if (!gpio_is_valid(pdata->us_euro_gpio))
9552                 pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
9553                                         "qcom,us-euro-gpios", 0);
9554         if (!gpio_is_valid(pdata->us_euro_gpio) && (!pdata->us_euro_gpio_p)) {
9555                 dev_dbg(&pdev->dev, "property %s not detected in node %s",
9556                         "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
9557         } else {
9558                 dev_dbg(&pdev->dev, "%s detected",
9559                         "qcom,us-euro-gpios");
9560                 wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
9561         }
9562
9563         ret = msm_prepare_us_euro(card);
9564         if (ret)
9565                 dev_dbg(&pdev->dev, "msm_prepare_us_euro failed (%d)\n",
9566                         ret);
9567
9568 #ifdef CONFIG_MACH_XIAOMI_MSM8998
9569         pdata->spk_id_gpio_p = of_parse_phandle(pdev->dev.of_node,
9570                                         "qcom,spk-id-pin", 0);
9571         if (!pdata->spk_id_gpio_p)
9572                 dev_dbg(&pdev->dev, "property %s not detected in node %s",
9573                         "qcom,spk-id-pin", pdev->dev.of_node->full_name);
9574         pdata->rcv_id_gpio_p = of_parse_phandle(pdev->dev.of_node,
9575                                         "qcom,rcv-id-pin", 0);
9576         if (!pdata->rcv_id_gpio_p)
9577                 dev_dbg(&pdev->dev, "property %s not detected in node %s",
9578                         "qcom,rcv-id-pin", pdev->dev.of_node->full_name);
9579
9580         ras_switch_en_gpio = of_get_named_gpio(pdev->dev.of_node,
9581                                 "qcom,ras-switch-en", 0);
9582         if (ras_switch_en_gpio < 0) {
9583                 dev_dbg(&pdev->dev, "%s: %s property not found %d\n",
9584                         __func__, "qcom,ras-switch-en", ras_switch_en_gpio);
9585         }
9586         ras_switch_sel_gpio = of_get_named_gpio(pdev->dev.of_node,
9587                                 "qcom,ras-switch-sel", 0);
9588         if (ras_switch_sel_gpio < 0) {
9589                 dev_dbg(&pdev->dev, "%s: %s property not found %d\n",
9590                         __func__, "qcom,ras-switch-sel", ras_switch_sel_gpio);
9591         }
9592
9593         ret = msm_prepare_ras_switch(card);
9594         if (ret)
9595                 dev_info(&pdev->dev, "msm_prepare_ras_switch failed (%d)\n", ret);
9596 #endif
9597
9598         /* Parse pinctrl info from devicetree */
9599         ret = msm_get_pinctrl(pdev);
9600         if (!ret) {
9601                 pr_debug("%s: pinctrl parsing successful\n", __func__);
9602         } else {
9603                 dev_dbg(&pdev->dev,
9604                         "%s: Parsing pinctrl failed with %d. Cannot use Ports\n",
9605                         __func__, ret);
9606                 ret = 0;
9607         }
9608
9609         i2s_auxpcm_init(pdev);
9610
9611         is_initial_boot = true;
9612         ret = audio_notifier_register("msm8998", AUDIO_NOTIFIER_ADSP_DOMAIN,
9613                                       &service_nb);
9614         if (ret < 0)
9615                 pr_err("%s: Audio notifier register failed ret = %d\n",
9616                         __func__, ret);
9617
9618 #ifdef CONFIG_MACH_XIAOMI_MSM8998
9619         pdata->us_p_power = regulator_get(&pdev->dev, "vreg_pa_p_5p0");
9620         if (IS_ERR(pdata->us_p_power)) {
9621                 dev_info(&pdev->dev, "ultrasound p power can't be found\n");
9622                 pdata->us_p_power = NULL;
9623         }
9624
9625         pdata->us_n_power = regulator_get(&pdev->dev, "vreg_pa_n_5p0");
9626         if (IS_ERR(pdata->us_n_power)) {
9627                 dev_info(&pdev->dev, "ultrasound n power can't be found\n");
9628                 pdata->us_n_power = NULL;
9629         }
9630
9631         usbhs_init(pdev);
9632 #endif
9633
9634         return 0;
9635 err:
9636         if (pdata->us_euro_gpio > 0) {
9637                 dev_dbg(&pdev->dev, "%s free us_euro gpio %d\n",
9638                         __func__, pdata->us_euro_gpio);
9639                 gpio_free(pdata->us_euro_gpio);
9640                 pdata->us_euro_gpio = 0;
9641         }
9642
9643 #ifdef CONFIG_MACH_XIAOMI_MSM8998
9644         if (ras_switch_en_gpio > 0) {
9645                 dev_dbg(&pdev->dev, "%s free ear_switch_en0_gpio %d\n",
9646                         __func__, ras_switch_en_gpio);
9647                 gpio_free(ras_switch_en_gpio);
9648                 ras_switch_en_gpio = 0;
9649         }
9650         if (ras_switch_sel_gpio > 0) {
9651                 dev_dbg(&pdev->dev, "%s free ear_switch_en1_gpio %d\n",
9652                         __func__, ras_switch_sel_gpio);
9653                 gpio_free(ras_switch_sel_gpio);
9654                 ras_switch_sel_gpio = 0;
9655         }
9656 #endif
9657         msm_release_pinctrl(pdev);
9658         devm_kfree(&pdev->dev, pdata);
9659         return ret;
9660 }
9661
9662 static int msm_asoc_machine_remove(struct platform_device *pdev)
9663 {
9664         struct snd_soc_card *card = platform_get_drvdata(pdev);
9665         struct msm_asoc_mach_data *pdata =
9666                                 snd_soc_card_get_drvdata(card);
9667
9668 #ifdef CONFIG_MACH_XIAOMI_MSM8998
9669         usbhs_deinit();
9670
9671         if (pdata->us_p_power)
9672                 regulator_put(pdata->us_p_power);
9673         if (pdata->us_p_power)
9674                 regulator_put(pdata->us_n_power);
9675 #endif
9676
9677         gpio_free(pdata->us_euro_gpio);
9678         i2s_auxpcm_deinit();
9679
9680         snd_soc_unregister_card(card);
9681         return 0;
9682 }
9683
9684 static struct platform_driver msm8998_asoc_machine_driver = {
9685         .driver = {
9686                 .name = DRV_NAME,
9687                 .owner = THIS_MODULE,
9688                 .pm = &snd_soc_pm_ops,
9689                 .of_match_table = msm8998_asoc_machine_of_match,
9690         },
9691         .probe = msm_asoc_machine_probe,
9692         .remove = msm_asoc_machine_remove,
9693 };
9694 module_platform_driver(msm8998_asoc_machine_driver);
9695
9696 MODULE_DESCRIPTION("ALSA SoC msm");
9697 MODULE_LICENSE("GPL v2");
9698 MODULE_ALIAS("platform:" DRV_NAME);
9699 MODULE_DEVICE_TABLE(of, msm8998_asoc_machine_of_match);