source/src/vm/device.h

   1 /*
   2         Skelton for retropc emulator
   3
   4         Author : Takeda.Toshiya
   5         Date   : 2006.08.18 -
   6
   7         [ device base class ]
   8 */
   9
  10 #ifndef _DEVICE_H_
  11 #define _DEVICE_H_
  12
  13 #include <stdarg.h>
  14 #include "vm.h"
  15 #include "../emu.h"
  16 #if defined(_USE_QT)
  17 #include "osd.h"
  18 #include "csp_logger.h"
  19 #define USE_DEVICE_NAME
  20 #endif
  21
  22 #if defined(USE_SHARED_DLL)
  23 #include "libcpu_newdev/device.h"
  24
  25 #else
  26 // max devices connected to the output port
  27 #define MAX_OUTPUT      16
  28
  29 // common signal id
  30 #define SIG_CPU_IRQ             101
  31 #define SIG_CPU_FIRQ            102
  32 #define SIG_CPU_NMI             103
  33 #define SIG_CPU_BUSREQ          104
  34 #define SIG_CPU_DEBUG           105
  35
  36 #define SIG_PRINTER_DATA        201
  37 #define SIG_PRINTER_STROBE      202
  38 #define SIG_PRINTER_RESET       203
  39 #define SIG_PRINTER_BUSY        204
  40 #define SIG_PRINTER_ACK         205
  41 #define SIG_PRINTER_SELECT      206
  42
  43 #define SIG_SCSI_DAT            301
  44 #define SIG_SCSI_BSY            302
  45 #define SIG_SCSI_CD             303
  46 #define SIG_SCSI_IO             304
  47 #define SIG_SCSI_MSG            305
  48 #define SIG_SCSI_REQ            306
  49 #define SIG_SCSI_SEL            307
  50 #define SIG_SCSI_ATN            308
  51 #define SIG_SCSI_ACK            309
  52 #define SIG_SCSI_RST            310
  53
  54 class DEVICE
  55 {
  56 protected:
  57         VM* vm;
  58         EMU* emu;
  59         OSD* osd;
  60 public:
  61         DEVICE(VM* parent_vm, EMU* parent_emu) : vm(parent_vm), emu(parent_emu)
  62         {
  63 #if defined(_USE_QT)
  64                 osd = emu->get_osd();
  65 #else
  66                 osd = NULL;
  67 #endif
  68
  69                 strncpy(this_device_name, "Base Device", 128);
  70                 prev_device = vm->last_device;
  71                 next_device = NULL;
  72                 if(vm->first_device == NULL) {
  73                         // this is the first device
  74                         vm->first_device = this;
  75                         this_device_id = 0;
  76                 } else {
  77                         // this is not the first device
  78                         vm->last_device->next_device = this;
  79                         this_device_id = vm->last_device->this_device_id + 1;
  80                 }
  81                 vm->last_device = this;
  82
  83                 // primary event manager
  84                 event_manager = NULL;
  85         }
  86         //ToDo: Will implement real destructor per real classes and below destructor decl. with "virtual".
  87         // This makes warning:
  88         //"deleting object of polymorphic class type 'DEVICE' which has non-virtual
  89         // destructor might cause undefined behavior [-Wdelete-non-virtual-dtor]".
  90         ~DEVICE(void) {}
  91
  92         virtual void initialize() {     /* osd = emu->get_osd(); */ /* Initializing VM must be after initializing OSD. */ }
  93         virtual void release() {}
  94
  95         virtual void update_config() {}
  96         virtual void save_state(FILEIO* state_fio) {}
  97         virtual bool load_state(FILEIO* state_fio)
  98         {
  99                 return true;
 100         }
 101
 102         // control
 103         virtual void reset() {}
 104         virtual void special_reset()
 105         {
 106                 reset();
 107         }
 108
 109         // NOTE: the virtual bus interface functions for 16/32bit access invite the cpu is little endian.
 110         // if the cpu is big endian, you need to implement them in the virtual machine memory/io classes.
 111
 112         // memory bus
 113         virtual void write_data8(uint32_t addr, uint32_t data) {}
 114         virtual uint32_t read_data8(uint32_t addr)
 115         {
 116                 return 0xff;
 117         }
 118         virtual void write_data16(uint32_t addr, uint32_t data)
 119         {
 120                 write_data8(addr, data & 0xff);
 121                 write_data8(addr + 1, (data >> 8) & 0xff);
 122         }
 123         virtual uint32_t read_data16(uint32_t addr)
 124         {
 125                 uint32_t val = read_data8(addr);
 126                 val |= read_data8(addr + 1) << 8;
 127                 return val;
 128         }
 129         virtual void write_data32(uint32_t addr, uint32_t data)
 130         {
 131                 write_data16(addr, data & 0xffff);
 132                 write_data16(addr + 2, (data >> 16) & 0xffff);
 133         }
 134         virtual uint32_t read_data32(uint32_t addr)
 135         {
 136                 uint32_t val = read_data16(addr);
 137                 val |= read_data16(addr + 2) << 16;
 138                 return val;
 139         }
 140         virtual void write_data8w(uint32_t addr, uint32_t data, int* wait)
 141         {
 142                 *wait = 0;
 143                 write_data8(addr, data);
 144         }
 145         virtual uint32_t read_data8w(uint32_t addr, int* wait)
 146         {
 147                 *wait = 0;
 148                 return read_data8(addr);
 149         }
 150         virtual void write_data16w(uint32_t addr, uint32_t data, int* wait)
 151         {
 152                 int wait_l, wait_h;
 153                 write_data8w(addr, data & 0xff, &wait_l);
 154                 write_data8w(addr + 1, (data >> 8) & 0xff, &wait_h);
 155                 *wait = wait_l + wait_h;
 156         }
 157         virtual uint32_t read_data16w(uint32_t addr, int* wait)
 158         {
 159                 int wait_l, wait_h;
 160                 uint32_t val = read_data8w(addr, &wait_l);
 161                 val |= read_data8w(addr + 1, &wait_h) << 8;
 162                 *wait = wait_l + wait_h;
 163                 return val;
 164         }
 165         virtual void write_data32w(uint32_t addr, uint32_t data, int* wait)
 166         {
 167                 int wait_l, wait_h;
 168                 write_data16w(addr, data & 0xffff, &wait_l);
 169                 write_data16w(addr + 2, (data >> 16) & 0xffff, &wait_h);
 170                 *wait = wait_l + wait_h;
 171         }
 172         virtual uint32_t read_data32w(uint32_t addr, int* wait)
 173         {
 174                 int wait_l, wait_h;
 175                 uint32_t val = read_data16w(addr, &wait_l);
 176                 val |= read_data16w(addr + 2, &wait_h) << 16;
 177                 *wait = wait_l + wait_h;
 178                 return val;
 179         }
 180         virtual uint32_t fetch_op(uint32_t addr, int *wait)
 181         {
 182                 return read_data8w(addr, wait);
 183         }
 184         virtual void write_dma_data8(uint32_t addr, uint32_t data)
 185         {
 186                 write_data8(addr, data);
 187         }
 188         virtual uint32_t read_dma_data8(uint32_t addr)
 189         {
 190                 return read_data8(addr);
 191         }
 192         virtual void write_dma_data16(uint32_t addr, uint32_t data)
 193         {
 194                 write_data16(addr, data);
 195         }
 196         virtual uint32_t read_dma_data16(uint32_t addr)
 197         {
 198                 return read_data16(addr);
 199         }
 200         virtual void write_dma_data32(uint32_t addr, uint32_t data)
 201         {
 202                 write_data32(addr, data);
 203         }
 204         virtual uint32_t read_dma_data32(uint32_t addr)
 205         {
 206                 return read_data32(addr);
 207         }
 208         virtual void write_dma_data8w(uint32_t addr, uint32_t data, int* wait)
 209         {
 210                 write_data8w(addr, data, wait);
 211         }
 212         virtual uint32_t read_dma_data8w(uint32_t addr, int* wait)
 213         {
 214                 return read_data8w(addr, wait);
 215         }
 216         virtual void write_dma_data16w(uint32_t addr, uint32_t data, int* wait)
 217         {
 218                 write_data16w(addr, data, wait);
 219         }
 220         virtual uint32_t read_dma_data16w(uint32_t addr, int* wait)
 221         {
 222                 return read_data16w(addr, wait);
 223         }
 224         virtual void write_dma_data32w(uint32_t addr, uint32_t data, int* wait)
 225         {
 226                 write_data32w(addr, data, wait);
 227         }
 228         virtual uint32_t read_dma_data32w(uint32_t addr, int* wait)
 229         {
 230                 return read_data32w(addr, wait);
 231         }
 232
 233         // i/o bus
 234         virtual void write_io8(uint32_t addr, uint32_t data) {}
 235         virtual uint32_t read_io8(uint32_t addr)
 236         {
 237 #ifdef IOBUS_RETURN_ADDR
 238                 return (addr & 1 ? addr >> 8 : addr) & 0xff;
 239 #else
 240                 return 0xff;
 241 #endif
 242         }
 243         virtual void write_io16(uint32_t addr, uint32_t data)
 244         {
 245                 write_io8(addr, data & 0xff);
 246                 write_io8(addr + 1, (data >> 8) & 0xff);
 247         }
 248         virtual uint32_t read_io16(uint32_t addr)
 249         {
 250                 uint32_t val = read_io8(addr);
 251                 val |= read_io8(addr + 1) << 8;
 252                 return val;
 253         }
 254         virtual void write_io32(uint32_t addr, uint32_t data)
 255         {
 256                 write_io16(addr, data & 0xffff);
 257                 write_io16(addr + 2, (data >> 16) & 0xffff);
 258         }
 259         virtual uint32_t read_io32(uint32_t addr)
 260         {
 261                 uint32_t val = read_io16(addr);
 262                 val |= read_io16(addr + 2) << 16;
 263                 return val;
 264         }
 265         virtual void write_io8w(uint32_t addr, uint32_t data, int* wait)
 266         {
 267                 *wait = 0;
 268                 write_io8(addr, data);
 269         }
 270         virtual uint32_t read_io8w(uint32_t addr, int* wait)
 271         {
 272                 *wait = 0;
 273                 return read_io8(addr);
 274         }
 275         virtual void write_io16w(uint32_t addr, uint32_t data, int* wait)
 276         {
 277                 int wait_l, wait_h;
 278                 write_io8w(addr, data & 0xff, &wait_l);
 279                 write_io8w(addr + 1, (data >> 8) & 0xff, &wait_h);
 280                 *wait = wait_l + wait_h;
 281         }
 282         virtual uint32_t read_io16w(uint32_t addr, int* wait)
 283         {
 284                 int wait_l, wait_h;
 285                 uint32_t val = read_io8w(addr, &wait_l);
 286                 val |= read_io8w(addr + 1, &wait_h) << 8;
 287                 *wait = wait_l + wait_h;
 288                 return val;
 289         }
 290         virtual void write_io32w(uint32_t addr, uint32_t data, int* wait)
 291         {
 292                 int wait_l, wait_h;
 293                 write_io16w(addr, data & 0xffff, &wait_l);
 294                 write_io16w(addr + 2, (data >> 16) & 0xffff, &wait_h);
 295                 *wait = wait_l + wait_h;
 296         }
 297         virtual uint32_t read_io32w(uint32_t addr, int* wait)
 298         {
 299                 int wait_l, wait_h;
 300                 uint32_t val = read_io16w(addr, &wait_l);
 301                 val |= read_io16w(addr + 2, &wait_h) << 16;
 302                 *wait = wait_l + wait_h;
 303                 return val;
 304         }
 305         virtual void write_dma_io8(uint32_t addr, uint32_t data)
 306         {
 307                 write_io8(addr, data);
 308         }
 309         virtual uint32_t read_dma_io8(uint32_t addr)
 310         {
 311                 return read_io8(addr);
 312         }
 313         virtual void write_dma_io16(uint32_t addr, uint32_t data)
 314         {
 315                 write_io16(addr, data);
 316         }
 317         virtual uint32_t read_dma_io16(uint32_t addr)
 318         {
 319                 return read_io16(addr);
 320         }
 321         virtual void write_dma_io32(uint32_t addr, uint32_t data)
 322         {
 323                 write_io32(addr, data);
 324         }
 325         virtual uint32_t read_dma_io32(uint32_t addr)
 326         {
 327                 return read_io32(addr);
 328         }
 329         virtual void write_dma_io8w(uint32_t addr, uint32_t data, int* wait)
 330         {
 331                 write_io8w(addr, data, wait);
 332         }
 333         virtual uint32_t read_dma_io8w(uint32_t addr, int* wait)
 334         {
 335                 return read_io8w(addr, wait);
 336         }
 337         virtual void write_dma_io16w(uint32_t addr, uint32_t data, int* wait)
 338         {
 339                 write_io16w(addr, data, wait);
 340         }
 341         virtual uint32_t read_dma_io16w(uint32_t addr, int* wait)
 342         {
 343                 return read_io16w(addr, wait);
 344         }
 345         virtual void write_dma_io32w(uint32_t addr, uint32_t data, int* wait)
 346         {
 347                 write_io32w(addr, data, wait);
 348         }
 349         virtual uint32_t read_dma_io32w(uint32_t addr, int* wait)
 350         {
 351                 return read_io32w(addr, wait);
 352         }
 353
 354         // memory mapped i/o
 355         virtual void write_memory_mapped_io8(uint32_t addr, uint32_t data)
 356         {
 357                 write_io8(addr, data);
 358         }
 359         virtual uint32_t read_memory_mapped_io8(uint32_t addr)
 360         {
 361                 return read_io8(addr);
 362         }
 363         virtual void write_memory_mapped_io16(uint32_t addr, uint32_t data)
 364         {
 365                 write_memory_mapped_io8(addr, data & 0xff);
 366                 write_memory_mapped_io8(addr + 1, (data >> 8) & 0xff);
 367         }
 368         virtual uint32_t read_memory_mapped_io16(uint32_t addr)
 369         {
 370                 uint32_t val = read_memory_mapped_io8(addr);
 371                 val |= read_memory_mapped_io8(addr + 1) << 8;
 372                 return val;
 373         }
 374         virtual void write_memory_mapped_io32(uint32_t addr, uint32_t data)
 375         {
 376                 write_memory_mapped_io16(addr, data & 0xffff);
 377                 write_memory_mapped_io16(addr + 2, (data >> 16) & 0xffff);
 378         }
 379         virtual uint32_t read_memory_mapped_io32(uint32_t addr)
 380         {
 381                 uint32_t val = read_memory_mapped_io16(addr);
 382                 val |= read_memory_mapped_io16(addr + 2) << 16;
 383                 return val;
 384         }
 385         virtual void write_memory_mapped_io8w(uint32_t addr, uint32_t data, int* wait)
 386         {
 387                 *wait = 0;
 388                 write_memory_mapped_io8(addr, data);
 389         }
 390         virtual uint32_t read_memory_mapped_io8w(uint32_t addr, int* wait)
 391         {
 392                 *wait = 0;
 393                 return read_memory_mapped_io8(addr);
 394         }
 395         virtual void write_memory_mapped_io16w(uint32_t addr, uint32_t data, int* wait)
 396         {
 397                 int wait_l, wait_h;
 398                 write_memory_mapped_io8w(addr, data & 0xff, &wait_l);
 399                 write_memory_mapped_io8w(addr + 1, (data >> 8) & 0xff, &wait_h);
 400                 *wait = wait_l + wait_h;
 401         }
 402         virtual uint32_t read_memory_mapped_io16w(uint32_t addr, int* wait)
 403         {
 404                 int wait_l, wait_h;
 405                 uint32_t val = read_memory_mapped_io8w(addr, &wait_l);
 406                 val |= read_memory_mapped_io8w(addr + 1, &wait_h) << 8;
 407                 *wait = wait_l + wait_h;
 408                 return val;
 409         }
 410         virtual void write_memory_mapped_io32w(uint32_t addr, uint32_t data, int* wait)
 411         {
 412                 int wait_l, wait_h;
 413                 write_memory_mapped_io16w(addr, data & 0xffff, &wait_l);
 414                 write_memory_mapped_io16w(addr + 2, (data >> 16) & 0xffff, &wait_h);
 415                 *wait = wait_l + wait_h;
 416         }
 417         virtual uint32_t read_memory_mapped_io32w(uint32_t addr, int* wait)
 418         {
 419                 int wait_l, wait_h;
 420                 uint32_t val = read_memory_mapped_io16w(addr, &wait_l);
 421                 val |= read_memory_mapped_io16w(addr + 2, &wait_h) << 16;
 422                 *wait = wait_l + wait_h;
 423                 return val;
 424         }
 425
 426         // device to device
 427         typedef struct {
 428                 DEVICE *device;
 429                 int id;
 430                 uint32_t mask;
 431                 int shift;
 432         } output_t;
 433
 434         typedef struct {
 435                 int count;
 436                 output_t item[MAX_OUTPUT];
 437         } outputs_t;
 438
 439         virtual void initialize_output_signals(outputs_t *items)
 440         {
 441                 items->count = 0;
 442         }
 443         virtual void register_output_signal(outputs_t *items, DEVICE *device, int id, uint32_t mask, int shift)
 444         {
 445                 int c = items->count++;
 446                 items->item[c].device = device;
 447                 items->item[c].id = id;
 448                 items->item[c].mask = mask;
 449                 items->item[c].shift = shift;
 450         }
 451         virtual void register_output_signal(outputs_t *items, DEVICE *device, int id, uint32_t mask)
 452         {
 453                 int c = items->count++;
 454                 items->item[c].device = device;
 455                 items->item[c].id = id;
 456                 items->item[c].mask = mask;
 457                 items->item[c].shift = 0;
 458         }
 459         virtual void write_signals(outputs_t *items, uint32_t data)
 460         {
 461                 for(int i = 0; i < items->count; i++) {
 462                         output_t *item = &items->item[i];
 463                         int shift = item->shift;
 464                         uint32_t val = (shift < 0) ? (data >> (-shift)) : (data << shift);
 465                         uint32_t mask = (shift < 0) ? (item->mask >> (-shift)) : (item->mask << shift);
 466                         item->device->write_signal(item->id, val, mask);
 467                 }
 468         };
 469         virtual void write_signal(int id, uint32_t data, uint32_t mask) {}
 470         virtual uint32_t read_signal(int ch)
 471         {
 472                 return 0;
 473         }
 474
 475         // z80 daisy chain
 476         virtual void set_context_intr(DEVICE* device, uint32_t bit) {}
 477         virtual void set_context_child(DEVICE* device) {}
 478
 479         // interrupt device to device
 480         virtual void set_intr_iei(bool val) {}
 481
 482         // interrupt device to cpu
 483         virtual void set_intr_line(bool line, bool pending, uint32_t bit) {}
 484
 485         // interrupt cpu to device
 486         virtual uint32_t get_intr_ack()
 487         {
 488                 return 0xff;
 489         }
 490         virtual void notify_intr_reti() {}
 491         virtual void notify_intr_ei() {}
 492
 493         // dma
 494         virtual void do_dma() {}
 495
 496         // cpu
 497         virtual int run(int clock)
 498         {
 499                 // when clock == -1, run one opecode
 500                 return (clock == -1 ? 1 : clock);
 501         }
 502         virtual void set_extra_clock(int clock) {}
 503         virtual int get_extra_clock()
 504         {
 505                 return 0;
 506         }
 507         virtual uint32_t get_pc()
 508         {
 509                 return 0;
 510         }
 511         virtual uint32_t get_next_pc()
 512         {
 513                 return 0;
 514         }
 515
 516         // bios
 517         virtual bool bios_call_far_i86(uint32_t PC, uint16_t regs[], uint16_t sregs[], int32_t* ZeroFlag, int32_t* CarryFlag)
 518         {
 519                 return false;
 520         }
 521         virtual bool bios_int_i86(int intnum, uint16_t regs[], uint16_t sregs[], int32_t* ZeroFlag, int32_t* CarryFlag)
 522         {
 523                 return false;
 524         }
 525         virtual bool bios_ret_z80(uint16_t PC, pair_t* af, pair_t* bc, pair_t* de, pair_t* hl, pair_t* ix, pair_t* iy, uint8_t* iff1)   {
 526                 return false;
 527         }
 528         // misc
 529         const _TCHAR *get_device_name(void)
 530         {
 531                 return (const _TCHAR *)this_device_name;
 532         }
 533
 534         // event manager
 535         DEVICE* event_manager;
 536
 537         virtual void set_context_event_manager(DEVICE* device)
 538         {
 539                 event_manager = device;
 540         }
 541         virtual int get_event_manager_id()
 542         {
 543                 if(event_manager == NULL) {
 544                         event_manager = vm->first_device->next_device;
 545                 }
 546                 return event_manager->this_device_id;
 547         }
 548         virtual void register_event(DEVICE* device, int event_id, double usec, bool loop, int* register_id)
 549         {
 550                 if(event_manager == NULL) {
 551                         event_manager = vm->first_device->next_device;
 552                 }
 553                 event_manager->register_event(device, event_id, usec, loop, register_id);
 554         }
 555         virtual void register_event_by_clock(DEVICE* device, int event_id, uint64_t clock, bool loop, int* register_id)
 556         {
 557                 if(event_manager == NULL) {
 558                         event_manager = vm->first_device->next_device;
 559                 }
 560                 event_manager->register_event_by_clock(device, event_id, clock, loop, register_id);
 561         }
 562         virtual void cancel_event(DEVICE* device, int register_id)
 563         {
 564                 if(event_manager == NULL) {
 565                         event_manager = vm->first_device->next_device;
 566                 }
 567                 event_manager->cancel_event(device, register_id);
 568         }
 569         virtual void register_frame_event(DEVICE* device)
 570         {
 571                 if(event_manager == NULL) {
 572                         event_manager = vm->first_device->next_device;
 573                 }
 574                 event_manager->register_frame_event(device);
 575         }
 576         virtual void register_vline_event(DEVICE* device)
 577         {
 578                 if(event_manager == NULL) {
 579                         event_manager = vm->first_device->next_device;
 580                 }
 581                 event_manager->register_vline_event(device);
 582         }
 583         virtual uint32_t get_event_remaining_clock(int register_id)
 584         {
 585                 if(event_manager == NULL) {
 586                         event_manager = vm->first_device->next_device;
 587                 }
 588                 return event_manager->get_event_remaining_clock(register_id);
 589         }
 590         virtual double get_event_remaining_usec(int register_id)
 591         {
 592                 if(event_manager == NULL) {
 593                         event_manager = vm->first_device->next_device;
 594                 }
 595                 return event_manager->get_event_remaining_usec(register_id);
 596         }
 597         virtual uint32_t get_current_clock()
 598         {
 599                 if(event_manager == NULL) {
 600                         event_manager = vm->first_device->next_device;
 601                 }
 602                 return event_manager->get_current_clock();
 603         }
 604         virtual uint32_t get_passed_clock(uint32_t prev)
 605         {
 606                 if(event_manager == NULL) {
 607                         event_manager = vm->first_device->next_device;
 608                 }
 609                 return event_manager->get_passed_clock(prev);
 610         }
 611         virtual double get_passed_usec(uint32_t prev)
 612         {
 613                 if(event_manager == NULL) {
 614                         event_manager = vm->first_device->next_device;
 615                 }
 616                 return event_manager->get_passed_usec(prev);
 617         }
 618         virtual uint32_t get_cpu_pc(int index)
 619         {
 620                 if(event_manager == NULL) {
 621                         event_manager = vm->first_device->next_device;
 622                 }
 623                 return event_manager->get_cpu_pc(index);
 624         }
 625         virtual void request_skip_frames()
 626         {
 627                 if(event_manager == NULL) {
 628                         event_manager = vm->first_device->next_device;
 629                 }
 630                 event_manager->request_skip_frames();
 631         }
 632         virtual void set_frames_per_sec(double frames)
 633         {
 634                 if(event_manager == NULL) {
 635                         event_manager = vm->first_device->next_device;
 636                 }
 637                 event_manager->set_frames_per_sec(frames);
 638         }
 639         virtual void set_lines_per_frame(int lines)
 640         {
 641                 if(event_manager == NULL) {
 642                         event_manager = vm->first_device->next_device;
 643                 }
 644                 event_manager->set_lines_per_frame(lines);
 645         }
 646         // Force reder sound immediately when device's status has changed.
 647         // You must call this after you changing registers (or enything).
 648         // If has problems, try set_realtime_render.
 649         // See mb8877.cpp and ym2203.cpp.
 650         // -- 20161010 K.O
 651         virtual void touch_sound(void)
 652         {
 653                 if(event_manager == NULL) {
 654                         event_manager = vm->first_device->next_device;
 655                 }
 656                 event_manager->touch_sound();
 657         }
 658         // Force render per 1 sample automatically.
 659         // See pcm1bit.cpp .
 660         // -- 20161010 K.O
 661         virtual void set_realtime_render(DEVICE* device, bool flag = true)
 662         {
 663                 if(event_manager == NULL) {
 664                         event_manager = vm->first_device->next_device;
 665                 }
 666                 if(device != event_manager) event_manager->set_realtime_render(device, flag);
 667         }
 668         virtual void set_realtime_render(bool flag)
 669         {
 670                 set_realtime_render(this, flag);
 671         }
 672         virtual void update_timing(int new_clocks, double new_frames_per_sec, int new_lines_per_frame) {}
 673
 674         // event callback
 675         virtual void event_callback(int event_id, int err) {}
 676         virtual void event_pre_frame() {}       // this event is to update timing settings
 677         virtual void event_frame() {}
 678         virtual void event_vline(int v, int clock) {}
 679         virtual void event_hsync(int v, int h, int clock) {}
 680
 681         // sound
 682         virtual void mix(int32_t* buffer, int cnt) {}
 683         virtual void set_volume(int ch, int decibel_l, int decibel_r) {} // +1 equals +0.5dB (same as fmgen)
 684         virtual void set_device_name(const _TCHAR *format, ...)
 685         {
 686                 if(format != NULL) {
 687                         va_list ap;
 688                         _TCHAR buffer[1024];
 689
 690                         va_start(ap, format);
 691                         my_vstprintf_s(buffer, 1024, format, ap);
 692                         va_end(ap);
 693
 694                         my_tcscpy_s(this_device_name, 128, buffer);
 695 #ifdef _USE_QT
 696                         emu->get_osd()->set_vm_node(this_device_id, buffer);
 697 #endif
 698                 }
 699         }
 700         virtual void out_debug_log(const char *fmt, ...)
 701         {
 702                 char strbuf[4096];
 703                 va_list ap;
 704
 705                 va_start(ap, fmt);
 706                 vsnprintf(strbuf, 4095, fmt, ap);
 707                 emu->out_debug_log("%s", strbuf);
 708                 va_end(ap);
 709         }
 710         virtual void force_out_debug_log(const char *fmt, ...)
 711         {
 712                 char strbuf[4096];
 713                 va_list ap;
 714
 715                 va_start(ap, fmt);
 716                 vsnprintf(strbuf, 4095, fmt, ap);
 717                 emu->force_out_debug_log("%s", strbuf);
 718                 va_end(ap);
 719         }
 720
 721 #ifdef USE_DEBUGGER
 722         // debugger
 723         virtual void *get_debugger()
 724         {
 725                 return NULL;
 726         }
 727         virtual uint32_t get_debug_prog_addr_mask()
 728         {
 729                 return 0;
 730         }
 731         virtual uint32_t get_debug_data_addr_mask()
 732         {
 733                 return 0;
 734         }
 735         virtual void write_debug_data8(uint32_t addr, uint32_t data) {}
 736         virtual uint32_t read_debug_data8(uint32_t addr)
 737         {
 738                 return 0xff;
 739         }
 740         virtual void write_debug_data16(uint32_t addr, uint32_t data)
 741         {
 742                 write_debug_data8(addr, data & 0xff);
 743                 write_debug_data8(addr + 1, (data >> 8) & 0xff);
 744         }
 745         virtual uint32_t read_debug_data16(uint32_t addr)
 746         {
 747                 uint32_t val = read_debug_data8(addr);
 748                 val |= read_debug_data8(addr + 1) << 8;
 749                 return val;
 750         }
 751         virtual void write_debug_data32(uint32_t addr, uint32_t data)
 752         {
 753                 write_debug_data16(addr, data & 0xffff);
 754                 write_debug_data16(addr + 2, (data >> 16) & 0xffff);
 755         }
 756         virtual uint32_t read_debug_data32(uint32_t addr)
 757         {
 758                 uint32_t val = read_debug_data16(addr);
 759                 val |= read_debug_data16(addr + 2) << 16;
 760                 return val;
 761         }
 762         virtual void write_debug_io8(uint32_t addr, uint32_t data) {}
 763         virtual uint32_t read_debug_io8(uint32_t addr)
 764         {
 765                 return 0xff;
 766         }
 767         virtual void write_debug_io16(uint32_t addr, uint32_t data)
 768         {
 769                 write_debug_io8(addr, data & 0xff);
 770                 write_debug_io8(addr + 1, (data >> 8) & 0xff);
 771         }
 772         virtual uint32_t read_debug_io16(uint32_t addr)
 773         {
 774                 uint32_t val = read_debug_io8(addr);
 775                 val |= read_debug_io8(addr + 1) << 8;
 776                 return val;
 777         }
 778         virtual void write_debug_io32(uint32_t addr, uint32_t data)
 779         {
 780                 write_debug_io16(addr, data & 0xffff);
 781                 write_debug_io16(addr + 2, (data >> 16) & 0xffff);
 782         }
 783         virtual uint32_t read_debug_io32(uint32_t addr)
 784         {
 785                 uint32_t val = read_debug_io16(addr);
 786                 val |= read_debug_io16(addr + 2) << 16;
 787                 return val;
 788         }
 789         virtual bool write_debug_reg(const _TCHAR *reg, uint32_t data)
 790         {
 791                 return false;
 792         }
 793         virtual void get_debug_regs_info(_TCHAR *buffer, size_t buffer_len) {}
 794         virtual int debug_dasm(uint32_t pc, _TCHAR *buffer, size_t buffer_len)
 795         {
 796                 return 0;
 797         }
 798 #endif
 799         _TCHAR this_device_name[128];
 800
 801         DEVICE* prev_device;
 802         DEVICE* next_device;
 803         int this_device_id;
 804 };
 805 #endif // USE_SHARED_DLL
 806
 807 #endif