2 * Main memory without MMR for FM-7 [FM7_MAINMEM]
8 #include "fm7_mainmem.h"
11 void FM7_MAINMEM::reset()
16 ioaccess_wait = false;
17 sub_halted = (display->read_signal(SIG_DISPLAY_HALT) == 0) ? false : true;
19 #if defined(_FM77AV_VARIANTS)
20 memset(fm7_bootram, 0x00, 0x1f0);
21 if((config.boot_mode & 3) == 0) {
22 memcpy(fm7_bootram, &fm7_mainmem_initrom[0x1800], 0x1e0 * sizeof(uint8));
24 memcpy(fm7_bootram, &fm7_mainmem_initrom[0x1a00], 0x1e0 * sizeof(uint8));
26 fm7_bootram[0x1fe] = 0xfe; // Set reset vector.
27 fm7_bootram[0x1ff] = 0x00; //
28 initiator_enabled = true;
29 boot_ram_write = true;
30 #elif defined(_FM77_VARIANTS)
31 boot_ram_write = false;
33 bootmode = config.boot_mode & 3;
35 if((config.dipswitch & FM7_DIPSW_EXTRAM) != 0) {
36 extram_connected = true;
38 extram_connected = false;
41 #if defined(_FM77AV_VARIANTS)
42 if(dictrom_connected) {
43 use_page2_extram = true;
45 use_page2_extram = ((config.dipswitch & FM7_DIPSW_EXTRAM_AV) != 0) ? true : false;
49 for(i = 0x00; i < 0x80; i++) {
56 window_enabled = false;
58 if((bootmode & 0x03) == 0) { // IF BASIC BOOT THEN ROM
61 basicrom_fd0f = false;
63 clockmode = (config.cpu_type == 0) ? true : false;
64 is_basicrom = ((bootmode & 0x03) == 0) ? true : false;
69 void FM7_MAINMEM::wait()
71 int waitfactor; // If MMR of TWR enabled, factor = 3.
72 // If memory, factor = 2?
73 if(!clockmode) return; // SLOW
78 } else { // Not MMR, TWR or enabled FAST MMR mode
79 waitfactor = 3; // If(MMR or TWR) and NOT FAST MMR factor = 3, else factor = 2
80 if(mmr_fast) waitfactor = 2;
81 ioaccess_wait = false;
83 if((window_enabled) &&
84 (mmr_enabled)) waitfactor = 2;
88 if(waitfactor <= 0) return;
90 if(waitcount >= waitfactor) {
91 if(maincpu != NULL) maincpu->set_extra_clock(1);
97 int FM7_MAINMEM::window_convert(uint32 addr, uint32 *realaddr)
101 if((addr < 0x8000) && (addr >= 0x7c00)) {
102 raddr = ((window_offset * 256) + addr) & 0x0ffff;
104 #ifdef _FM77AV_VARIANTS
105 //printf("TWR hit %04x -> %04x\n", addr, raddr);
106 return FM7_MAINMEM_AV_PAGE0; // 0x00000 - 0x0ffff
107 #else // FM77(L4 or others)
108 *realaddr |= 0x20000;
109 return FM7_MAINMEM_EXTRAM; // 0x20000 - 0x2ffff
117 int FM7_MAINMEM::mmr_convert(uint32 addr, uint32 *realaddr)
119 uint32 raddr = addr & 0x0fff;
124 if(addr >= 0xfc00) return -1;
125 mmr_bank = mmr_map_data[(addr >> 12) & 0x000f | (mmr_segment << 4)] & 0x007f;
127 // Reallocated by MMR
128 // Bank 3x : Standard memories.
129 if((mmr_bank < 0x3f) && (mmr_bank >= 0x30)) {
130 raddr = ((mmr_bank << 12) | raddr) & 0xffff;
131 return nonmmr_convert(raddr, realaddr);
133 #ifdef _FM77AV_VARIANTS
134 else if(mmr_bank == 0x3f) {
135 if((raddr >= 0xd80) && (raddr <= 0xd97)) { // MMR AREA
137 return FM7_MAINMEM_NULL;
139 raddr = raddr | 0xf000;
140 return nonmmr_convert(raddr, realaddr); // Access I/O, Bootrom, even via MMR.
143 #elif defined(_FM77_VARIANTS)
144 else if(mmr_bank == 0x3f) {
145 if((raddr >= 0xc00) && (raddr < 0xe00)) {
148 return FM7_MAINMEM_ZERO;
150 *realaddr = raddr - 0xc00;
151 return FM7_MAINMEM_SHADOWRAM;
153 } else if(raddr >= 0xe00) {
154 *realaddr = addr - 0x0e00;
156 if(diag_load_bootrom_mmr) {
157 return FM7_MAINMEM_BOOTROM_MMR;
159 return FM7_MAINMEM_BOOTROM_BAS;
162 return FM7_MAINMEM_BOOTROM_RAM;
165 raddr = raddr | 0xf000;
166 return nonmmr_convert(raddr, realaddr); // Access I/O, Bootrom, even via MMR.
170 major_bank = (mmr_bank >> 4) & 0x0f;
172 #ifdef _FM77AV_VARIANTS
173 if(major_bank == 0x0) { // PAGE 0
174 *realaddr = ((mmr_bank << 12) | raddr) & 0x0ffff;
175 return FM7_MAINMEM_AV_PAGE0;
176 } else if(major_bank == 0x1) { // PAGE 1
177 *realaddr = ((mmr_bank << 12) | raddr) & 0x0ffff;
178 return FM7_MAINMEM_AV_DIRECTACCESS;
179 } else if(major_bank == 0x2) { // PAGE 2
180 #if defined(CAPABLE_DICTROM)
181 //uint32 dbank = mainio->read_data8(FM7_MAINIO_EXTBANK);
182 uint32 dbank = extbank;
185 case 0x29: // Backuped RAM
186 if(((dbank & 0x80) != 0) && (dictrom_connected)){ // Battery backuped RAM
187 raddr = raddr & 0x1ff;
189 return FM7_MAINMEM_BACKUPED_RAM;
193 if(((dbank & 0x40) != 0) && (dictrom_connected)) { // Dictionary ROM
194 dbank = dbank & 0x3f;
195 uint32 extrom = mainio->read_data8(FM7_MAINIO_EXTROM) & 0x80;
196 //uint32 extrom = extrom_bank;
197 if(extrom == 0) { // Dictionary selected.
199 *realaddr = raddr | dbank;
200 return FM7_MAINMEM_DICTROM;
201 } else if(dbank <= 0x1f) { // KANJI
202 *realaddr = (dbank << 12) | raddr;
203 return FM7_MAINMEM_KANJI_LEVEL1;
204 } else if(dbank <= 0x37) {
206 *realaddr = (dbank - 0x20000) | raddr;
207 return FM7_MAINMEM_77AV40_EXTRAROM;
208 } else if(dbank <= 0x3f) {
209 raddr = ((dbank << 12) - 0x30000) | raddr;
210 if((raddr >= 0xffe0) || (raddr < 0xfd00)) {
211 return nonmmr_convert(raddr, realaddr);
212 } else if((raddr >= 0xfe00) || (raddr < 0xffe0)) {
213 *realaddr = raddr - 0xfe00;
214 return FM7_MAINMEM_BOOTROM_DOS;
216 *realaddr = raddr + 0x10000;
217 return FM7_MAINMEM_77AV40_EXTRAROM;
222 *realaddr = (raddr | (mmr_bank << 12)) & 0x0ffff;
223 return FM7_MAINMEM_AV_PAGE2;
225 //*realaddr = (raddr | (mmr_bank << 12)) & 0x0ffff;
226 if(use_page2_extram) {
227 *realaddr = ((mmr_bank << 12) | raddr) & 0x0ffff;
228 return FM7_MAINMEM_AV_PAGE2;
231 return FM7_MAINMEM_NULL;
236 #if defined(_FM77AV40) || defined(_FM77AV40SX) || defined(_FM77AV40EX)
237 else if(extram_connected) { // PAGE 4-
238 if(major_bank >= (extram_pages + 4)) {
240 return FM7_MAINMEM_NULL; // $FF
242 raddr = ((uint32)(mmr_bank - 0x40) << 12) | raddr;
244 return FM7_MAINMEM_EXTRAM;
247 if(mmr_bank >= 0x40) {
249 return FM7_MAINMEM_NULL;
252 #elif defined(_FM77_VARIANTS)
253 if(extram_connected) { // PAGE 4-
254 if((major_bank > extram_pages) || (major_bank >= 3)) {
256 return FM7_MAINMEM_NULL; // $FF
258 raddr = ((uint32)mmr_bank << 12) | raddr;
260 return FM7_MAINMEM_EXTRAM;
264 return FM7_MAINMEM_NULL; // $FF
266 #else // _FM77AV_VARIANTS
269 return FM7_MAINMEM_NULL; // $FF
277 int FM7_MAINMEM::nonmmr_convert(uint32 addr, uint32 *realaddr)
280 #ifdef _FM77AV_VARIANTS
281 if(initiator_enabled) {
282 if((addr >= 0x6000) && (addr < 0x8000)) {
283 //printf("HIT %02x\n", read_table[FM7_MAINMEM_INITROM].memory[addr - 0x6000]);
284 *realaddr = addr - 0x6000;
285 return FM7_MAINMEM_INITROM;
288 //printf("HIT %02x\n", read_table[FM7_MAINMEM_INITROM].memory[addr - 0xe000]);
289 *realaddr = addr - 0xe000;
290 return FM7_MAINMEM_INITROM;
295 uint32 addr_major, addr_minor;
296 addr_major = (addr >> 12) & 0x0f;
298 switch (addr_major) {
308 return FM7_MAINMEM_OMOTE;
317 *realaddr = addr - 0x8000;
319 return FM7_MAINMEM_BASICROM;
321 return FM7_MAINMEM_URA;
324 addr_minor = (addr >> 8) & 0x0f;
338 *realaddr = addr - 0x8000;
340 return FM7_MAINMEM_BASICROM;
342 return FM7_MAINMEM_URA;
346 *realaddr = addr - 0xfc00;
347 return FM7_MAINMEM_BIOSWORK;
350 *realaddr = addr - 0xfc80;
351 return FM7_MAINMEM_SHAREDRAM;
356 *realaddr = addr - 0xfd00;
357 return FM7_MAINMEM_MMIO;
362 *realaddr = addr - 0xfe00;
363 #if defined(_FM77AV_VARIANTS)
364 return FM7_MAINMEM_BOOTROM_RAM;
368 return FM7_MAINMEM_BOOTROM_BAS;
371 //printf("BOOT_DOS ADDR=%04x\n", addr);
372 return FM7_MAINMEM_BOOTROM_DOS;
375 return FM7_MAINMEM_BOOTROM_MMR;
378 return FM7_MAINMEM_BOOTROM_EXTRA;
380 #if defined(_FM77_VARIANTS)
382 return FM7_MAINMEM_BOOTROM_RAM;
386 return FM7_MAINMEM_BOOTROM_BAS; // Really?
391 else if (addr < 0xfffe) { // VECTOR
392 *realaddr = addr - 0xffe0;
393 return FM7_MAINMEM_VECTOR;
395 else if (addr < 0x10000) {
396 *realaddr = addr - 0xfffe;
397 return FM7_MAINMEM_RESET_VECTOR;
406 return FM7_MAINMEM_OMOTE;
407 } else if(addr < 0xfc00) {
408 *realaddr = addr - 0x8000;
410 return FM7_MAINMEM_BASICROM;
412 return FM7_MAINMEM_URA;
413 } else if(addr < 0xfc80) {
414 *realaddr = addr - 0xfc00;
415 return FM7_MAINMEM_BIOSWORK;
416 }else if(addr < 0xfd00) {
417 *realaddr = addr - 0xfc80;
418 return FM7_MAINMEM_SHAREDRAM;
419 } else if(addr < 0xfe00) {
421 *realaddr = addr - 0xfd00;
422 return FM7_MAINMEM_MMIO;
423 }else if(addr < 0xffe0){
425 *realaddr = addr - 0xfe00;
426 #if defined(_FM77AV_VARIANTS)
427 return FM7_MAINMEM_BOOTROM_RAM;
429 #if defined(_FM77_VARIANTS)
431 return FM7_MAINMEM_BOOTROM_RAM;
436 return FM7_MAINMEM_BOOTROM_BAS;
439 //printf("BOOT_DOS ADDR=%04x\n", addr);
440 return FM7_MAINMEM_BOOTROM_DOS;
443 return FM7_MAINMEM_BOOTROM_MMR;
446 return FM7_MAINMEM_BOOTROM_EXTRA;
449 return FM7_MAINMEM_BOOTROM_BAS; // Really?
453 } else if(addr < 0xfffe) { // VECTOR
454 *realaddr = addr - 0xffe0;
455 return FM7_MAINMEM_VECTOR;
456 } else if(addr < 0x10000) {
457 *realaddr = addr - 0xfffe;
458 return FM7_MAINMEM_RESET_VECTOR;
461 emu->out_debug_log("Main: Over run ADDR = %08x", addr);
463 return FM7_MAINMEM_NULL;
466 int FM7_MAINMEM::getbank(uint32 addr, uint32 *realaddr)
468 if(realaddr == NULL) return FM7_MAINMEM_NULL; // Not effect.
473 stat = window_convert(addr, &raddr);
474 //if(stat >= 0) printf("WINDOW CONVERT: %04x to %04x, bank = %02x\n", addr, raddr, stat);
483 stat = mmr_convert(addr, &raddr);
485 //printf("MMR CONVERT: %04x to %05x, bank = %02x\n", addr, raddr, stat);
491 addr = addr & 0xffff;
493 return nonmmr_convert(addr, realaddr);
496 void FM7_MAINMEM::write_signal(int sigid, uint32 data, uint32 mask)
498 bool flag = ((data & mask) != 0);
500 case SIG_FM7_SUB_HALT:
503 case FM7_MAINIO_IS_BASICROM:
506 case FM7_MAINIO_PUSH_FD0F:
507 basicrom_fd0f = flag;
509 case FM7_MAINIO_CLOCKMODE:
512 case FM7_MAINIO_BOOTMODE:
513 bootmode = data & 0x07;
515 #if defined(_FM77AV_VARIANTS) || defined(_FM77_VARIANTS)
516 case FM7_MAINIO_BOOTRAM_RW:
517 boot_ram_write = flag;
521 #ifdef _FM77AV_VARIANTS
522 case FM7_MAINIO_INITROM_ENABLED:
523 initiator_enabled = flag;
525 case FM7_MAINIO_EXTBANK:
526 extcard_bank = data & 0xff;
528 case FM7_MAINIO_EXTROM:
529 extrom_bank = data & 0xff;
533 case FM7_MAINIO_WINDOW_ENABLED:
534 window_enabled = flag;
536 case FM7_MAINIO_FASTMMR_ENABLED:
539 case FM7_MAINIO_MMR_ENABLED:
547 uint32 FM7_MAINMEM::read_data8(uint32 addr)
553 if(addr >= FM7_MAINIO_WINDOW_OFFSET) {
555 case FM7_MAINIO_WINDOW_OFFSET:
556 return (uint32)window_offset;
558 case FM7_MAINIO_MMR_SEGMENT:
559 return (uint32)mmr_segment;
562 if((addr >= FM7_MAINIO_MMR_BANK) && (addr < (FM7_MAINIO_MMR_BANK + 0x80))){
563 return mmr_map_data[addr - FM7_MAINIO_MMR_BANK];
570 bank = getbank(addr, &realaddr);
572 emu->out_debug_log("Illegal BANK: ADDR = %04x", addr);
573 return 0xff; // Illegal
575 if(bank == FM7_MAINMEM_SHAREDRAM) {
576 if(!sub_halted) return 0xff; // Not halt
577 return display->read_data8(realaddr + 0xd380); // Okay?
578 } else if(bank == FM7_MAINMEM_NULL) {
581 #if defined(_FM77AV_VARIANTS)
582 else if(bank == FM7_MAINMEM_AV_DIRECTACCESS) {
583 if(!sub_halted) return 0xff; // Not halt
584 return display->read_data8(realaddr); // Okay?
587 else if(read_table[bank].dev != NULL) {
588 return read_table[bank].dev->read_data8(realaddr);
589 } else if(read_table[bank].memory != NULL) {
590 return read_table[bank].memory[realaddr];
592 return 0xff; // Dummy
595 void FM7_MAINMEM::write_data8(uint32 addr, uint32 data)
600 if(addr >= FM7_MAINIO_WINDOW_OFFSET) {
602 case FM7_MAINIO_WINDOW_OFFSET:
603 window_offset = data;
605 case FM7_MAINIO_MMR_SEGMENT:
606 mmr_segment = data & 0x0f;
609 if((addr >= FM7_MAINIO_MMR_BANK) && (addr < (FM7_MAINIO_MMR_BANK + 0x80))){
610 mmr_map_data[addr - FM7_MAINIO_MMR_BANK] = (uint8)data;
617 bank = getbank(addr, &realaddr);
619 emu->out_debug_log("Illegal BANK: ADDR = %04x", addr);
622 if(bank == FM7_MAINMEM_SHAREDRAM) {
623 if(!sub_halted) return; // Not halt
624 display->write_data8(realaddr + 0xd380, data); // Okay?
626 } else if(bank == FM7_MAINMEM_NULL) {
629 #if defined(_FM7) || defined(_FMNEW7)
630 else if(bank == FM7_MAINMEM_BASICROM) {
631 bank = FM7_MAINMEM_URA; // FM-7/NEW7 write to ura-ram even enabled basic-rom.
635 #if defined(_FM77AV_VARIANTS)
636 else if(bank == FM7_MAINMEM_AV_DIRECTACCESS) {
637 if(!sub_halted) return; // Not halt
638 display->write_data8(realaddr, data); // Okay?
643 else if(bank == FM7_MAINMEM_BOOTROM_RAM) {
644 if(!boot_ram_write) return;
647 if(write_table[bank].dev != NULL) {
648 write_table[bank].dev->write_data8(realaddr, data);
649 } else if(write_table[bank].memory != NULL) {
650 write_table[bank].memory[realaddr] = (uint8)data;
654 // Read / Write data(s) as big endian.
655 uint32 FM7_MAINMEM::read_data16(uint32 addr)
660 hi = read_data8(addr) & 0xff;
661 lo = read_data8(addr + 1) & 0xff;
667 uint32 FM7_MAINMEM::read_data32(uint32 addr)
669 uint32 ah, a2, a3, al;
672 ah = read_data8(addr) & 0xff;
673 a2 = read_data8(addr + 1) & 0xff;
674 a3 = read_data8(addr + 2) & 0xff;
675 al = read_data8(addr + 3) & 0xff;
677 val = ah * (65536 * 256) + a2 * 65536 + a3 * 256 + al;
681 void FM7_MAINMEM::write_data16(uint32 addr, uint32 data)
685 write_data8(addr + 1, d & 0xff);
687 write_data8(addr + 0, d & 0xff);
690 void FM7_MAINMEM::write_data32(uint32 addr, uint32 data)
694 write_data8(addr + 3, d & 0xff);
696 write_data8(addr + 2, d & 0xff);
698 write_data8(addr + 1, d & 0xff);
700 write_data8(addr + 0, d & 0xff);
704 bool FM7_MAINMEM::get_loadstat_basicrom(void)
706 return diag_load_basicrom;
709 bool FM7_MAINMEM::get_loadstat_bootrom_bas(void)
711 return diag_load_bootrom_bas;
714 bool FM7_MAINMEM::get_loadstat_bootrom_dos(void)
716 return diag_load_bootrom_dos;
719 uint32 FM7_MAINMEM::read_bios(const char *name, uint8 *ptr, uint32 size)
725 if((name == NULL) || (ptr == NULL)) return 0;
726 s = emu->bios_path((_TCHAR *)name);
727 if(s == NULL) return 0;
729 if(!fio.Fopen(s, FILEIO_READ_BINARY)) return 0;
730 blocks = fio.Fread(ptr, size, 1);
733 return blocks * size;
736 uint32 FM7_MAINMEM::write_bios(const char *name, uint8 *ptr, uint32 size)
742 if((name == NULL) || (ptr == NULL)) return 0;
743 s = emu->bios_path((_TCHAR *)name);
744 if(s == NULL) return 0;
746 fio.Fopen(s, FILEIO_WRITE_BINARY);
747 blocks = fio.Fwrite(ptr, size, 1);
750 return blocks * size;
753 FM7_MAINMEM::FM7_MAINMEM(VM* parent_vm, EMU* parent_emu) : DEVICE(parent_vm, parent_emu)
757 #if !defined(_FM77AV_VARIANTS)
758 for(int i = 0; i < 4; i++) fm7_bootroms[i] = (uint8 *)malloc(0x200);
765 #if defined(_FM77AV40) || defined(_FM77AV40SX) || defined(_FM77AV40EX) || defined(_FM77AV20) || defined(_FM77_VARIANTS)
766 fm7_mainmem_extram = NULL;
769 memset(read_table, 0x00, sizeof(read_table));
770 memset(write_table, 0x00, sizeof(write_table));
773 FM7_MAINMEM::~FM7_MAINMEM()
777 void FM7_MAINMEM::initialize(void)
780 diag_load_basicrom = false;
781 diag_load_bootrom_bas = false;
782 diag_load_bootrom_dos = false;
783 diag_load_bootrom_mmr = false;
784 #if defined(_FM77AV_VARIANTS)
785 dictrom_connected = false;
788 for(i = 0x00; i < 0x80; i++) {
795 window_enabled = false;
797 #ifdef _FM77AV_VARIANTS
800 initiator_enabled = true;
801 boot_ram_write = false;
803 bootmode = config.boot_mode & 3;
804 basicrom_fd0f = false;
805 is_basicrom = ((bootmode & 0x03) == 0) ? true : false;
808 i = FM7_MAINMEM_OMOTE;
809 memset(fm7_mainmem_omote, 0x00, 0x8000 * sizeof(uint8));
810 read_table[i].memory = fm7_mainmem_omote;
811 write_table[i].memory = fm7_mainmem_omote;
815 memset(fm7_mainmem_ura, 0x00, 0x7c00 * sizeof(uint8));
816 read_table[i].memory = fm7_mainmem_ura;
817 write_table[i].memory = fm7_mainmem_ura;
819 i = FM7_MAINMEM_VECTOR;
820 memset(fm7_mainmem_bootrom_vector, 0x00, 0x1e);
821 read_table[i].memory = fm7_mainmem_bootrom_vector;
822 write_table[i].memory = fm7_mainmem_bootrom_vector;
824 #if defined(CAPABLE_DICTROM)
825 diag_load_dictrom = false;
826 i = FM7_MAINMEM_DICTROM;
827 memset(fm7_mainmem_extrarom, 0xff, 0x40000 * sizeof(uint8));
828 read_table[i].memory = fm7_mainmem_dictrom;
829 write_table[i].memory = NULL;
830 if(read_bios("DICROM.ROM", fm7_mainmem_dictrom, 0x40000) == 0x40000) diag_load_dictrom = true;
831 emu->out_debug_log("DICTIONARY ROM READING : %s", diag_load_dictrom ? "OK" : "NG");
832 dictrom_connected = diag_load_dictrom;
834 i = FM7_MAINMEM_BACKUPED_RAM;
835 diag_load_learndata = false;
836 memset(fm7_mainmem_learndata, 0x00, 0x2000 * sizeof(uint8));
837 read_table[i].memory = fm7_mainmem_learndata;
838 write_table[i].memory = fm7_mainmem_learndata;
839 if(read_bios("USERDIC.DAT", read_table[i].memory, 0x2000) == 0x2000) diag_load_learndata = true;
840 emu->out_debug_log("DICTIONARY ROM READING : %s", diag_load_learndata ? "OK" : "NG");
841 if(!diag_load_learndata) write_bios("USERDIC.DAT", fm7_mainmem_learndata, 0x2000);
844 #if defined(_FM77AV40) || defined(_FM77AV40SX) || defined(_FM77AV40EX) || defined(_FM77AV20)
845 i = FM7_MAINMEM_77AV40_EXTRAROM;
846 diag_load_extrarom = false;
847 memset(fm7_mainmem_extrarom, 0xff, 0x20000 * sizeof(uint8));
848 read_table[i].memory = fm7_mainmem_extrarom;
849 write_table[i].memory = NULL;
850 if(read_bios("EXTSUB.ROM", read_table[i].memory, 0xc000) >= 0xc000) diag_load_extrarom = true;
851 emu->out_debug_log("AV40 EXTRA ROM READING : %s", diag_load_extrarom ? "OK" : "NG");
854 #if defined(_FM77AV40) || defined(_FM77AV40SX) || defined(_FM77AV40EX) || defined(_FM77AV20) || defined(_FM77_VARIANTS)
855 extram_pages = FM77_EXRAM_BANKS;
856 #if defined(_FM77_VARIANTS)
857 if(extram_pages > 3) extram_pages = 3;
859 if(extram_pages > 12) extram_pages = 12;
861 if(extram_pages > 0) {
862 i = FM7_MAINMEM_EXTRAM;
863 fm7_mainmem_extram = (uint8 *)malloc(extram_pages * 0x10000);
864 if(fm7_mainmem_extram != NULL) {
865 memset(fm7_mainmem_extram, 0x00, extram_pages * 0x10000);
866 read_table[i].memory = fm7_mainmem_extram;
867 write_table[i].memory = fm7_mainmem_extram;
872 #if defined(_FM77_VARIANTS)
873 memset(fm77_shadowram, 0x00, 0x200);
874 read_table[FM7_MAINMEM_SHADOWRAM].memory = fm77_shadowram;
875 write_table[FM7_MAINMEM_SHADOWRAM].memory = fm77_shadowram;
877 #if !defined(_FM77AV_VARIANTS)
878 for(i = FM7_MAINMEM_BOOTROM_BAS; i <= FM7_MAINMEM_BOOTROM_EXTRA; i++) {
879 memset(fm7_bootroms[i - FM7_MAINMEM_BOOTROM_BAS], 0xff, 0x200);
880 read_table[i].memory = fm7_bootroms[i - FM7_MAINMEM_BOOTROM_BAS];
881 write_table[i].memory = NULL;
885 if(read_bios("BOOT_BAS8.ROM", fm7_bootroms[0], 0x200) >= 0x1e0) {
886 diag_load_bootrom_bas = true;
888 diag_load_bootrom_bas = false;
890 if(read_bios("BOOT_DOS8.ROM", fm7_bootroms[1], 0x200) >= 0x1e0) {
891 diag_load_bootrom_dos = true;
893 diag_load_bootrom_dos = false;
895 diag_load_bootrom_mmr = false;
896 # elif defined(_FM7) || defined(_FMNEW7) || defined(_FM77_VARIANTS)
897 if(read_bios("BOOT_BAS.ROM", fm7_bootroms[0], 0x200) >= 0x1e0) {
898 diag_load_bootrom_bas = true;
900 diag_load_bootrom_bas = false;
902 if(read_bios("BOOT_DOS.ROM", fm7_bootroms[1], 0x200) >= 0x1e0) {
903 diag_load_bootrom_dos = true;
905 diag_load_bootrom_dos = false;
907 # if defined(_FM77_VARIANTS)
908 if(read_bios("BOOT_MMR.ROM", fm7_bootroms[2], 0x200) >= 0x1e0) {
909 diag_load_bootrom_mmr = true;
911 diag_load_bootrom_mmr = false;
914 i = FM7_MAINMEM_BOOTROM_RAM;
915 memset(fm7_bootram, 0x00, 0x200 * sizeof(uint8)); // RAM
916 read_table[i].memory = fm7_bootram;
917 write_table[i].memory = fm7_bootram;
920 diag_load_bootrom_mmr = false;
922 # elif defined(_FM77AV_VARIANTS)
923 i = FM7_MAINMEM_AV_PAGE0;
924 memset(fm7_mainmem_mmrbank_0, 0x00, 0x10000 * sizeof(uint8));
925 read_table[i].memory = fm7_mainmem_mmrbank_0;
926 write_table[i].memory = fm7_mainmem_mmrbank_0;
928 i = FM7_MAINMEM_AV_PAGE2;
929 memset(fm7_mainmem_mmrbank_2, 0x00, 0x10000 * sizeof(uint8));
930 read_table[i].memory = fm7_mainmem_mmrbank_2;
931 write_table[i].memory = fm7_mainmem_mmrbank_2;
933 i = FM7_MAINMEM_INITROM;
934 diag_load_initrom = false;
935 memset(fm7_mainmem_initrom, 0xff, 0x2000 * sizeof(uint8));
936 read_table[i].memory = fm7_mainmem_initrom;
937 write_table[i].memory = NULL;
938 if(read_bios("INITIATE.ROM", read_table[i].memory, 0x2000) >= 0x2000) diag_load_initrom = true;
939 emu->out_debug_log("77AV INITIATOR ROM READING : %s", diag_load_initrom ? "OK" : "NG");
941 read_table[FM7_MAINMEM_BOOTROM_BAS].memory = NULL; // Not connected.
942 read_table[FM7_MAINMEM_BOOTROM_DOS].memory = NULL; // Not connected.
943 read_table[FM7_MAINMEM_BOOTROM_MMR].memory = NULL; // Not connected.
945 i = FM7_MAINMEM_BOOTROM_RAM;
946 memset(fm7_bootram, 0x00, 0x200 * sizeof(uint8)); // RAM
947 read_table[i].memory = fm7_bootram;
948 write_table[i].memory = fm7_bootram;
949 if(diag_load_initrom) diag_load_bootrom_bas = true;
950 if(diag_load_initrom) diag_load_bootrom_dos = true;
951 if((config.boot_mode & 0x03) == 0) {
952 memcpy(fm7_bootram, &fm7_mainmem_initrom[0x1800], 0x1e0 * sizeof(uint8));
954 memcpy(fm7_bootram, &fm7_mainmem_initrom[0x1a00], 0x1e0 * sizeof(uint8));
956 fm7_bootram[0x1fe] = 0xfe; // Set reset vector.
957 fm7_bootram[0x1ff] = 0x00; //
960 emu->out_debug_log("BOOT ROM (basic mode) READING : %s", diag_load_bootrom_bas ? "OK" : "NG");
961 emu->out_debug_log("BOOT ROM (DOS mode) READING : %s", diag_load_bootrom_dos ? "OK" : "NG");
962 #if defined(_FM77_VARIANTS)
963 emu->out_debug_log("BOOT ROM (MMR mode) READING : %s", diag_load_bootrom_mmr ? "OK" : "NG");
966 i = FM7_MAINMEM_VECTOR;
967 memset(fm7_mainmem_bootrom_vector, 0x00, 0x1e);
968 read_table[i].memory = fm7_mainmem_bootrom_vector;
969 write_table[i].memory = fm7_mainmem_bootrom_vector;
971 #if !defined(_FM77AV_VARIANTS)
972 for(i = 0; i <= 3; i++) {
973 uint8 *p = fm7_bootroms[i];
974 p[0x1fe] = 0xfe; // Set reset vector.
978 i = FM7_MAINMEM_RESET_VECTOR;
979 fm7_mainmem_reset_vector[0] = 0xfe;
980 fm7_mainmem_reset_vector[1] = 0x00;
982 read_table[i].memory = fm7_mainmem_reset_vector;
983 write_table[i].memory = NULL;
985 i = FM7_MAINMEM_BASICROM;
986 memset(fm7_mainmem_basicrom, 0xff, 0x7c00 * sizeof(uint8));
987 read_table[i].dev = NULL;
988 read_table[i].memory = fm7_mainmem_basicrom;
989 write_table[i].dev = NULL;
990 write_table[i].memory = NULL;
992 if(read_bios("FBASIC302.ROM", fm7_mainmem_basicrom, 0x7c00) == 0x7c00) {
993 diag_load_basicrom = true;
994 } else if(read_bios("FBASIC300.ROM", fm7_mainmem_basicrom, 0x7c00) == 0x7c00) {
995 diag_load_basicrom = true;
996 } else if(read_bios("FBASIC30.ROM", fm7_mainmem_basicrom, 0x7c00) == 0x7c00) {
997 diag_load_basicrom = true;
1001 if(read_bios("FBASIC10.ROM", fm7_mainmem_basicrom, 0x7c00) == 0x7c00) diag_load_basicrom = true;
1003 emu->out_debug_log("BASIC ROM READING : %s", diag_load_basicrom ? "OK" : "NG");
1005 i = FM7_MAINMEM_BIOSWORK;
1006 memset(fm7_mainmem_bioswork, 0x00, 0x80 * sizeof(uint8));
1007 read_table[i].dev = NULL;
1008 read_table[i].memory = fm7_mainmem_bioswork;
1009 write_table[i].dev = NULL;
1010 write_table[i].memory = fm7_mainmem_bioswork;
1013 void FM7_MAINMEM::release()
1015 # if defined(_FM77AV40) || defined(_FM77AV40SX) || defined(_FM77AV40EX) || defined(_FM77AV20) || defined(_FM77_VARIANTS)
1016 if(fm7_mainmem_extram != NULL) free(fm7_mainmem_extram);
1018 #if !defined(_FM77AV_VARIANTS)
1020 for(i = 0; i < 4; i++) {
1021 if(fm7_bootroms[i] != NULL) free(fm7_bootroms[i]);
1022 fm7_bootroms[i] = NULL;
1025 // MEMORY::release();
1028 #define STATE_VERSION 2
1029 void FM7_MAINMEM::save_state(FILEIO *state_fio)
1031 state_fio->FputUint32_BE(STATE_VERSION);
1032 state_fio->FputInt32_BE(this_device_id);
1035 state_fio->FputBool(ioaccess_wait);
1036 state_fio->FputInt32_BE(waitfactor);
1037 state_fio->FputInt32_BE(waitcount);
1039 state_fio->FputBool(sub_halted);
1041 state_fio->FputBool(diag_load_basicrom);
1042 state_fio->FputBool(diag_load_bootrom_bas);
1043 state_fio->FputBool(diag_load_bootrom_dos);
1044 state_fio->FputBool(diag_load_bootrom_mmr);
1045 state_fio->Fwrite(fm7_mainmem_omote, sizeof(fm7_mainmem_omote), 1);
1046 state_fio->Fwrite(fm7_mainmem_ura, sizeof(fm7_mainmem_ura), 1);
1047 state_fio->Fwrite(fm7_mainmem_basicrom, sizeof(fm7_mainmem_basicrom), 1);
1048 state_fio->Fwrite(fm7_mainmem_bioswork, sizeof(fm7_mainmem_bioswork), 1);
1049 state_fio->Fwrite(fm7_mainmem_bootrom_vector, sizeof(fm7_mainmem_bootrom_vector), 1);
1050 state_fio->Fwrite(fm7_mainmem_reset_vector, sizeof(fm7_mainmem_reset_vector), 1);
1052 state_fio->Fwrite(fm7_mainmem_null, sizeof(fm7_mainmem_null), 1);
1053 #if defined(_FM77AV_VARIANTS) || defined(_FM77_VARIANTS)
1054 state_fio->Fwrite(fm7_bootram, sizeof(fm7_bootram), 1);
1056 #if !defined(_FM77AV_VARIANTS)
1058 for(addr = 0; addr < 4; addr++) state_fio->Fwrite(fm7_bootroms[addr], sizeof(0x200), 1);
1060 #ifdef _FM77AV_VARIANTS
1061 state_fio->FputBool(dictrom_connected);
1062 state_fio->FputBool(use_page2_extram);
1064 state_fio->FputBool(diag_load_initrom);
1065 state_fio->FputBool(diag_load_dictrom);
1066 state_fio->FputBool(diag_load_learndata);
1067 state_fio->Fwrite(fm7_mainmem_initrom, sizeof(fm7_mainmem_initrom), 1);
1068 state_fio->Fwrite(fm7_mainmem_mmrbank_0, sizeof(fm7_mainmem_mmrbank_0), 1);
1069 state_fio->Fwrite(fm7_mainmem_mmrbank_2, sizeof(fm7_mainmem_mmrbank_2), 1);
1071 # if defined(CAPABLE_DICTROM)
1072 state_fio->FputBool(diag_load_extrarom);
1073 state_fio->Fwrite(fm7_mainmem_extrarom, sizeof(fm7_mainmem_extrarom), 1);
1074 state_fio->Fwrite(fm7_mainmem_dictrom, sizeof(fm7_mainmem_dictrom), 1);
1075 state_fio->Fwrite(fm7_mainmem_learndata, sizeof(fm7_mainmem_learndata), 1);
1080 state_fio->FputBool(extram_connected);
1081 # if defined(_FM77AV40) || defined(_FM77AV40SX) || defined(_FM77AV40EX) || defined(_FM77AV20) || defined(_FM77_VARIANTS)
1083 state_fio->FputInt32_BE(extram_pages);
1084 pages = extram_pages;
1085 # if defined(_FM77_VARIANTS)
1086 if(pages > 3) pages = 3;
1088 if(pages > 12) pages = 12;
1090 if(pages > 0) state_fio->Fwrite(fm7_mainmem_extram, pages * 0x10000, 1);
1091 # if defined(_FM77_VARIANTS)
1092 state_fio->Fwrite(fm77_shadowram, sizeof(fm77_shadowram), 1);
1098 state_fio->FputBool(is_basicrom);
1099 state_fio->FputBool(clockmode);
1100 state_fio->FputBool(basicrom_fd0f);
1101 state_fio->FputUint32_BE(bootmode);
1102 #if defined(_FM77AV_VARIANTS)
1103 state_fio->FputUint32_BE(extcard_bank);
1104 state_fio->FputUint32_BE(extrom_bank);
1105 state_fio->FputBool(initiator_enabled);
1107 #if defined(_FM77AV_VARIANTS) || defined(_FM77_VARIANTS)
1108 state_fio->FputBool(boot_ram_write);
1110 #if defined(HAS_MMR)
1111 state_fio->FputBool(window_enabled);
1112 state_fio->FputBool(mmr_enabled);
1113 state_fio->FputBool(mmr_fast);
1114 state_fio->FputUint16_BE(window_offset);
1115 state_fio->FputUint8(mmr_segment);
1116 state_fio->Fwrite(mmr_map_data, sizeof(mmr_map_data), 1);
1121 bool FM7_MAINMEM::load_state(FILEIO *state_fio)
1125 version = state_fio->FgetUint32_BE();
1126 if(this_device_id != state_fio->FgetInt32_BE()) return false;
1129 ioaccess_wait = state_fio->FgetBool();
1130 waitfactor = state_fio->FgetInt32_BE();
1131 waitcount = state_fio->FgetInt32_BE();
1133 sub_halted = state_fio->FgetBool();
1135 diag_load_basicrom = state_fio->FgetBool();
1136 diag_load_bootrom_bas = state_fio->FgetBool();
1137 diag_load_bootrom_dos = state_fio->FgetBool();
1138 diag_load_bootrom_mmr = state_fio->FgetBool();
1140 state_fio->Fread(fm7_mainmem_omote, sizeof(fm7_mainmem_omote), 1);
1141 state_fio->Fread(fm7_mainmem_ura, sizeof(fm7_mainmem_ura), 1);
1142 state_fio->Fread(fm7_mainmem_basicrom, sizeof(fm7_mainmem_basicrom), 1);
1143 state_fio->Fread(fm7_mainmem_bioswork, sizeof(fm7_mainmem_bioswork), 1);
1144 state_fio->Fread(fm7_mainmem_bootrom_vector, sizeof(fm7_mainmem_bootrom_vector), 1);
1145 state_fio->Fread(fm7_mainmem_reset_vector, sizeof(fm7_mainmem_reset_vector), 1);
1147 state_fio->Fread(fm7_mainmem_null, sizeof(fm7_mainmem_null), 1);
1148 #if defined(_FM77AV_VARIANTS) || defined(_FM77_VARIANTS)
1149 state_fio->Fread(fm7_bootram, sizeof(fm7_bootram), 1);
1151 #if !defined(_FM77AV_VARIANTS)
1153 for(addr = 0; addr < 4; addr++) state_fio->Fread(fm7_bootroms[addr], sizeof(0x200), 1);
1155 #ifdef _FM77AV_VARIANTS
1156 dictrom_connected = state_fio->FgetBool();
1157 use_page2_extram = state_fio->FgetBool();
1159 diag_load_initrom = state_fio->FgetBool();
1160 diag_load_dictrom = state_fio->FgetBool();
1161 diag_load_learndata = state_fio->FgetBool();
1162 state_fio->Fread(fm7_mainmem_initrom, sizeof(fm7_mainmem_initrom), 1);
1163 state_fio->Fread(fm7_mainmem_mmrbank_0, sizeof(fm7_mainmem_mmrbank_0), 1);
1164 state_fio->Fread(fm7_mainmem_mmrbank_2, sizeof(fm7_mainmem_mmrbank_2), 1);
1166 # if defined(CAPABLE_DICTROM)
1167 diag_load_extrarom = state_fio->FgetBool();
1168 state_fio->Fread(fm7_mainmem_extrarom, sizeof(fm7_mainmem_extrarom), 1);
1169 state_fio->Fread(fm7_mainmem_dictrom, sizeof(fm7_mainmem_dictrom), 1);
1170 state_fio->Fread(fm7_mainmem_learndata, sizeof(fm7_mainmem_learndata), 1);
1175 extram_connected = state_fio->FgetBool();
1176 # if defined(_FM77AV40) || defined(_FM77AV40SX) || defined(_FM77AV40EX) || defined(_FM77AV20) || defined(_FM77_VARIANTS)
1178 extram_pages = state_fio->FgetInt32_BE();
1179 pages = extram_pages;
1180 # if defined(_FM77_VARIANTS)
1181 if(pages > 3) pages = 3;
1183 if(pages > 12) pages = 12;
1185 if(pages > 0) state_fio->Fread(fm7_mainmem_extram, pages * 0x10000, 1);
1186 # if defined(_FM77_VARIANTS)
1187 state_fio->Fread(fm77_shadowram, sizeof(fm77_shadowram), 1);
1191 if(version == 1) return true;
1193 if(version >= 2) { // V2;
1194 is_basicrom = state_fio->FgetBool();
1195 clockmode = state_fio->FgetBool();
1196 basicrom_fd0f = state_fio->FgetBool();
1197 bootmode = state_fio->FgetUint32_BE();
1198 #if defined(_FM77AV_VARIANTS)
1199 extcard_bank = state_fio->FgetUint32_BE();
1200 extrom_bank = state_fio->FgetUint32_BE();
1201 initiator_enabled = state_fio->FgetBool();
1203 #if defined(_FM77AV_VARIANTS) || defined(_FM77_VARIANTS)
1204 boot_ram_write = state_fio->FgetBool();
1206 #if defined(HAS_MMR)
1207 window_enabled = state_fio->FgetBool();
1208 mmr_enabled = state_fio->FgetBool();
1209 mmr_fast = state_fio->FgetBool();
1210 window_offset = state_fio->FgetUint16_BE();
1211 mmr_segment = state_fio->FgetUint8();
1212 state_fio->Fread(mmr_map_data, sizeof(mmr_map_data), 1);