source/src/vm/fm7/fm7_mainmem.h

   1 /*
   2  * Main memory without MMR for FM-7 [FM7_MAINMEM]
   3  *  Author: K.Ohta
   4  *  Date  : 2015.01.01-
   5  *
   6  */
   7
   8 #ifndef _FM7_MAINMEM_H_
   9 #define _FM7_MAINMEM_H_
  10
  11 #include "fm7_common.h"
  12
  13 #include "../device.h"
  14 #include "../mc6809.h"
  15
  16 class DEVICE;
  17 class MEMORY;
  18 class FM7_MAINIO;
  19
  20 class FM7_MAINMEM : public DEVICE
  21 {
  22  private:
  23         typedef struct {
  24                 DEVICE* dev;
  25                 uint8* memory;
  26                 int wait;
  27         } bank_t;
  28         bank_t read_table[FM7_MAINMEM_END];
  29         bank_t write_table[FM7_MAINMEM_END];
  30         bool ioaccess_wait;
  31         int waitfactor;
  32         int waitcount;
  33         bool sub_halted;
  34         // V2
  35 #ifdef HAS_MMR
  36         bool window_enabled;
  37         bool window_fast;
  38         bool mmr_enabled;
  39         bool mmr_fast;
  40         bool mmr_extend;
  41         bool refresh_fast;
  42         uint16 window_offset;
  43         uint8 mmr_segment;
  44         uint8 mmr_map_data[0x80];
  45 #endif
  46         bool is_basicrom;
  47         bool clockmode;
  48         bool basicrom_fd0f;
  49         uint32 bootmode;
  50 #ifdef _FM77AV_VARIANTS
  51         uint32 extcard_bank;
  52         bool extrom_bank;
  53         bool initiator_enabled;
  54 #endif
  55 #if defined(_FM77AV_VARIANTS) || defined(_FM77_VARIANTS)
  56         bool boot_ram_write;
  57 #endif
  58  protected:
  59         EMU *p_emu;
  60         VM *p_vm;
  61
  62         uint8 fm7_mainmem_omote[0x8000];
  63         uint8 fm7_mainmem_ura[0x7c00];
  64         uint8 fm7_mainmem_basicrom[0x7c00];
  65         uint8 fm7_mainmem_bioswork[0x80];
  66 #if !defined(_FM77AV_VARIANTS)
  67         uint8 *fm7_bootroms[4];
  68 #endif
  69         uint8 fm7_mainmem_bootrom_vector[0x1e]; // Without
  70         uint8 fm7_mainmem_reset_vector[2]; // Without
  71         uint8 fm7_mainmem_null[1];
  72 #if defined(_FM77AV_VARIANTS) || defined(_FM77_VARIANTS)
  73         uint8 fm7_bootram[0x200]; // $00000-$0ffff
  74 #endif
  75 #ifdef HAS_MMR
  76         bool extram_connected;
  77 # ifdef _FM77AV_VARIANTS
  78         bool diag_load_initrom;
  79         bool diag_load_dictrom;
  80         bool diag_load_learndata;
  81         bool dictrom_connected;
  82         bool dictrom_enabled;
  83         bool dictram_enabled;
  84
  85         bool use_page2_extram;
  86         uint8 fm7_mainmem_initrom[0x2000]; // $00000-$0ffff
  87         uint8 fm77av_hidden_bootmmr[0x200];
  88         uint8 fm7_mainmem_mmrbank_0[0x10000]; // $00000-$0ffff
  89         uint8 fm7_mainmem_mmrbank_2[0x10000]; // $20000-$2ffff
  90 #  if defined(CAPABLE_DICTROM)
  91         bool diag_load_extrarom;
  92         uint8 fm7_mainmem_extrarom[0x20000]; // $20000-$2cfff, banked
  93         uint8 fm7_mainmem_dictrom[0x40000]; // $00000-$3ffff, banked
  94         uint8 fm7_mainmem_learndata[0x2000];
  95 #  endif
  96 #  if defined(_FM77AV40) || defined(_FM77AV40SX) || defined(_FM77AV40EX) || \
  97       defined(_FM77AV20) || defined(_FM77AV20SX) || defined(_FM77AV20EX)
  98         int extram_pages;
  99         uint8 *fm7_mainmem_extram; // $40000- : MAX 768KB ($c0000)
 100 #  endif
 101 # endif
 102 # if defined(_FM77_VARIANTS)
 103         int extram_pages;
 104         uint8 *fm7_mainmem_extram; // $00000-$2ffff
 105         uint8 fm77_shadowram[0x200];
 106 # endif
 107 #endif
 108 #if defined(CAPABLE_DICTROM)
 109         DEVICE *kanjiclass1;
 110         //KANJIROM *kanjiclass2;
 111 #endif
 112         MC6809 *maincpu;
 113         DEVICE *mainio;
 114         DEVICE *display;
 115
 116         bool diag_load_basicrom;
 117         bool diag_load_bootrom_bas;
 118         bool diag_load_bootrom_dos;
 119         bool diag_load_bootrom_mmr;
 120
 121         int getbank(uint32 addr, uint32 *realaddr);
 122         int window_convert(uint32 addr, uint32 *realaddr);
 123         int mmr_convert(uint32 addr, uint32 *realaddr);
 124         int nonmmr_convert(uint32 addr, uint32 *realaddr);
 125         uint32 read_bios(const char *name, uint8 *ptr, uint32 size);
 126         uint32 write_bios(const char *name, uint8 *ptr, uint32 size);
 127         void setclock(int mode);
 128
 129  public:
 130         FM7_MAINMEM(VM* parent_vm, EMU* parent_emu);
 131         ~FM7_MAINMEM();
 132         uint32 read_data8(uint32 addr);
 133         uint32 read_dma_data8(uint32 addr);
 134         uint32 read_dma_io8(uint32 addr);
 135
 136         void write_data8(uint32 addr, uint32 data);
 137         void write_dma_data8(uint32 addr, uint32 data);
 138         void write_dma_io8(uint32 addr, uint32 data);
 139
 140         virtual uint32 read_data16(uint32 addr);
 141         virtual void write_data16(uint32 addr, uint32 data);
 142
 143         virtual uint32 read_data32(uint32 addr);
 144         virtual void write_data32(uint32 addr, uint32 data);
 145
 146         void initialize(void);
 147         void wait(void);
 148         void reset(void);
 149         void release(void);
 150
 151         bool get_loadstat_basicrom(void);
 152         bool get_loadstat_bootrom_bas(void);
 153         bool get_loadstat_bootrom_dos(void);
 154         void save_state(FILEIO *state_fio);
 155         bool load_state(FILEIO *state_fio);
 156
 157         void set_context_display(DEVICE *p){
 158                 int i;
 159                 display = p;
 160                 i = FM7_MAINMEM_SHAREDRAM;
 161                 read_table[i].dev = display;
 162                 write_table[i].dev = display;
 163
 164 #if defined(_FM77AV_VARIANTS)
 165                 i = FM7_MAINMEM_AV_DIRECTACCESS;
 166                 read_table[i].dev = display;
 167                 write_table[i].dev = display;
 168 #endif
 169         }
 170         void set_context_maincpu(MC6809 *p){
 171                 maincpu = p;
 172         }
 173         void set_context_mainio(DEVICE *p){
 174                 int i;
 175                 mainio = p;
 176                 i = FM7_MAINMEM_MMIO;
 177                 read_table[i].dev = mainio;
 178                 read_table[i].memory = NULL;
 179                 write_table[i].dev = mainio;
 180                 write_table[i].memory = NULL;
 181
 182         }
 183 #if defined(CAPABLE_DICTROM)
 184         void set_context_kanjirom_class1(DEVICE *p){
 185                 kanjiclass1 = p;
 186         }
 187 #endif
 188         void write_signal(int sigid, uint32 data, uint32 mask);
 189         uint32 read_signal(int sigid);
 190         uint32 read_io8(uint32 addr) {
 191                 return mainio->read_io8(addr);
 192         }
 193 };
 194
 195 #endif