source/src/vm/fm7/mainmem_readseq.cpp

   1 /*
   2  * Main memory for FM-7 [FM7_MAINMEM/MAINMEM_READSEQ]
   3  *  Author: K.Ohta
   4  *  Date  : 2017.04.01-
   5  *  License: GPLv2
   6  *
   7  */
   8 #include "vm.h"
   9 #include "emu.h"
  10 #include "fm7_mainmem.h"
  11 #include "fm7_mainio.h"
  12 #include "fm7_display.h"
  13 #include "kanjirom.h"
  14
  15 namespace FM7 {
  16
  17 uint8_t FM7_MAINMEM::read_data_tbl(uint32_t addr, bool dmamode)
  18 {
  19         uint32_t paddr = addr >> 7;
  20         if(data_table[paddr].read_data != NULL) {
  21                 return data_table[paddr].read_data[addr & 0x7f];
  22         } else if(data_table[paddr].read_func != NULL) {
  23                 uint8_t (FM7_MAINMEM::*read_func)(uint32_t, bool);
  24                 read_func = this->data_table[paddr].read_func;
  25                 return (this->*read_func)(addr, dmamode);
  26         }
  27         return 0xff;
  28 }
  29
  30 uint8_t FM7_MAINMEM::read_data(uint32_t addr, bool dmamode)
  31 {
  32 #ifdef HAS_MMR
  33         int stat;
  34         if(window_enabled) {
  35                 uint32_t raddr;
  36                 stat = window_convert(addr, &raddr);
  37 #if defined(_FM77AV_VARIANTS)
  38                 if(stat >= 0) {
  39                         return fm7_mainmem_mmrbank_0[raddr & 0xffff];
  40                 }
  41 #elif defined(_FM77_VARIANTS)
  42                 if(stat >= 0) {
  43                         if((extram_pages >= 3) && (fm7_mainmem_extram != NULL) && (extram_connected)) {
  44                                 return fm7_mainmem_extram[raddr];
  45                         } else {
  46                                 return 0xff;
  47                         }
  48                 }
  49 #endif
  50         }
  51         if(mmr_enabled) {
  52                 uint32_t segment = 0x00;
  53                 uint32_t raddr = (addr & 0x0fff);
  54                 uint32_t mmr_bank;
  55                 if(addr < 0xfc00) {
  56                         if(!dmamode) segment = mmr_segment;
  57 #if 1
  58                         return read_with_mmr(addr, segment, dmamode);
  59 #else
  60                         if(!mmr_extend) {
  61                                 mmr_bank = mmr_map_data[(addr >> 12) & 0x000f | ((segment & 0x03) << 4)] & 0x003f;
  62                         } else {
  63                                 mmr_bank = mmr_map_data[(addr >> 12) & 0x000f | ((segment & 0x07) << 4)];
  64                         }
  65                         // Reallocated by MMR
  66                         // Bank 3x : Standard memories.
  67                         if(mmr_bank != 0x3f){
  68                                 raddr = (mmr_bank << 12) | raddr;
  69                                 return read_data_tbl(raddr, dmamode);
  70                         }
  71 # ifdef _FM77AV_VARIANTS
  72                         else if(mmr_bank == 0x3f) {
  73                                 if((raddr >= 0xd80) && (raddr <= 0xd97)) { // MMR AREA
  74                                         iowait(); // OK?
  75                                         return 0xff;
  76                                 } else {
  77                                         raddr = raddr | 0x3f000;
  78                                         return read_data_tbl(raddr, dmamode);
  79                                 }
  80                         }
  81 # elif defined(_FM77_VARIANTS)
  82                         else if(mmr_bank == 0x3f) {
  83                                 if((raddr >= 0xc00) && (raddr < 0xe00)) {
  84                                         if(is_basicrom) {
  85                                                 return 0x00;
  86                                         } else {
  87                                                 raddr = raddr - 0xc00;
  88                                                 return fm77_shadowram[raddr];
  89                                         }
  90                                 } else if(raddr >= 0xe00) { // Note: Is this right sequence?
  91                                         raddr = raddr - 0x0e00;
  92                                         if(is_basicrom) {
  93                                                 if(diag_load_bootrom_mmr) {
  94                                                         return fm7_bootroms[2][raddr];
  95                                                 } else {
  96                                                         return fm7_bootroms[0][raddr];
  97                                                 }
  98                                         } else {
  99                                                 return fm7_bootram[raddr];
 100                                         }
 101                                 } else {
 102                                         raddr = raddr | 0x3f000;
 103                                         return read_data_tbl(raddr, dmamode);
 104                                 }
 105                         }
 106 # endif
 107 #endif
 108                 } else {
 109                         raddr = 0x30000 | (addr & 0xffff);
 110                         return read_data_tbl(raddr, dmamode);
 111                 }
 112         }
 113 #endif
 114
 115 #if !defined(_FM77AV_VARIANTS) && !defined(_FM77_VARIANTS)
 116         uint32_t raddr = (addr & 0xffff);
 117         return read_data_tbl(raddr, dmamode);
 118 #else
 119         uint32_t raddr = (addr & 0xffff) | 0x30000;
 120         return read_data_tbl(raddr, dmamode);
 121 #endif
 122 }
 123
 124 uint32_t FM7_MAINMEM::read_data8_main(uint32_t addr, bool dmamode)
 125 {
 126         uint32_t realaddr;
 127         int bank;
 128 #ifdef _FM77AV_VARIANTS
 129         if(initiator_enabled) {
 130                 if((addr >= 0x6000) && (addr < 0x8000)) {
 131                         uint32_t raddr = addr - 0x6000;
 132                         iowait();
 133                         return fm7_mainmem_initrom[raddr];
 134                 }
 135                 if((addr >= 0xfffe) && (addr < 0x10000)) {
 136                         uint32_t raddr = addr - 0xe000;
 137                         //printf("%04x %02x\n", raddr, fm7_mainmem_initrom[raddr]);
 138                         iowait();
 139                         return fm7_mainmem_initrom[raddr];
 140                 }
 141         }
 142 #endif
 143         return read_data(addr, dmamode);
 144 }
 145
 146
 147 uint8_t FM7_MAINMEM::read_shared_ram(uint32_t realaddr, bool dmamode)
 148 {
 149         realaddr = realaddr & 0x7f;
 150         if(!sub_halted) return 0xff; // Not halt
 151         return call_read_data8(display, realaddr  + 0xd380); // Okay?
 152 }
 153
 154 uint8_t FM7_MAINMEM::read_direct_access(uint32_t realaddr, bool dmamode)
 155 {
 156 #if defined(_FM77AV_VARIANTS)
 157         if(!sub_halted) return 0xff; // Not halt
 158         if(dmamode) {
 159                 return call_read_dma_data8(display, realaddr & 0xffff); // Okay?
 160         } else {
 161                 return call_read_data8(display, realaddr & 0xffff); // Okay?
 162         }
 163 #else
 164         return 0xff;
 165 #endif
 166 }
 167
 168 uint8_t FM7_MAINMEM::read_ura_basicrom(uint32_t addr, bool dmamode)
 169 {
 170         addr = addr & 0x7fff;
 171         if (basicrom_fd0f) {
 172                 return fm7_mainmem_basicrom[addr];
 173         }
 174         return fm7_mainmem_ura[addr];
 175 }
 176
 177 uint8_t FM7_MAINMEM::read_mmio(uint32_t addr, bool dmamode)
 178 {
 179         addr &= 0xff;
 180         iowait();
 181         if(mainio != NULL) {
 182                 return call_read_data8(mainio, addr);
 183         }
 184         return 0xff;
 185 }
 186
 187 uint8_t FM7_MAINMEM::read_bootrom(uint32_t addr, bool dmamode)
 188 {
 189         addr = addr & 0x1ff;
 190         if(addr <  0x1e0) {
 191
 192 #if defined(_FM77AV_VARIANTS)
 193                 if(initiator_enabled) iowait();
 194                 return fm7_bootram[addr];
 195 #elif defined(_FM77_VARIANTS)
 196                 if(boot_ram_write) {
 197                         return fm7_bootram[addr];
 198                 }
 199                 switch(bootmode) {
 200                 case 0:
 201                 case 1:
 202                 case 2:
 203                 case 3:
 204                 case 4:
 205                 case 5:
 206                 case 6:
 207                 case 7:
 208                         return fm7_bootroms[bootmode][addr];
 209                         break;
 210                 default:
 211                         return fm7_bootroms[0][addr];
 212                         break;
 213                 }
 214 #elif defined(_FM8)
 215                 switch(bootmode) {
 216                 case 0:
 217                 case 1:
 218                 case 2:
 219                 case 3:
 220                 case 4:
 221                 case 5:
 222                 case 6:
 223                 case 7:
 224                         return fm7_bootroms[bootmode][addr];
 225                         break;
 226                 default:
 227                         return fm7_bootroms[0][addr];
 228                         break;
 229                 }
 230 #else
 231                 switch(bootmode & 3) {
 232                 case 0:
 233                 case 1:
 234                 case 2:
 235                 case 3:
 236                         return fm7_bootroms[bootmode][addr];
 237                         break;
 238                 default:
 239                         return fm7_bootroms[0][addr];
 240                         break;
 241                 }
 242 #endif
 243         } else if (addr < 0x1fe) { // VECTOR
 244                 return fm7_mainmem_bootrom_vector[addr - 0x1e0];
 245         } else { // RESET VECTOR
 246 #if defined(_FM77AV_VARIANTS)
 247                 if(initiator_enabled) iowait();
 248                 return fm7_bootram[addr];
 249 #elif defined(_FM77_VARIANTS)
 250                 iowait();
 251                 if(boot_ram_write) {
 252                         return fm7_bootram[addr];
 253                 }
 254                 return fm7_mainmem_reset_vector[addr & 1];
 255 #else
 256                 return fm7_mainmem_reset_vector[addr & 1];
 257 #endif
 258         }
 259         return 0xff;
 260 }
 261
 262 }