source/src/vm/fm7/mainmem_readseq.cpp

   1 /*
   2  * Main memory for FM-7 [FM7_MAINMEM/MAINMEM_READSEQ]
   3  *  Author: K.Ohta
   4  *  Date  : 2017.04.01-
   5  *  License: GPLv2
   6  *
   7  */
   8 #include "vm.h"
   9 #include "fm7_mainmem.h"
  10 #include "fm7_mainio.h"
  11 #include "fm7_display.h"
  12 #include "kanjirom.h"
  13
  14 namespace FM7 {
  15
  16 uint8_t FM7_MAINMEM::read_data_tbl(uint32_t addr, bool dmamode)
  17 {
  18         uint32_t paddr = addr >> 7;
  19         if(data_table[paddr].read_data != NULL) {
  20                 return data_table[paddr].read_data[addr & 0x7f];
  21         } else if(data_table[paddr].read_func != NULL) {
  22                 uint8_t (__FASTCALL FM7_MAINMEM::*read_func)(uint32_t, bool);
  23                 read_func = this->data_table[paddr].read_func;
  24                 return (this->*read_func)(addr, dmamode);
  25         }
  26         return 0xff;
  27 }
  28
  29 uint8_t FM7_MAINMEM::read_data(uint32_t addr, bool dmamode)
  30 {
  31 #ifdef HAS_MMR
  32         int stat;
  33         if(window_enabled) {
  34                 uint32_t raddr;
  35                 stat = window_convert(addr, &raddr);
  36 #if defined(_FM77AV_VARIANTS)
  37                 if(stat >= 0) {
  38                         return fm7_mainmem_mmrbank_0[raddr & 0xffff];
  39                 }
  40 #elif defined(_FM77_VARIANTS)
  41                 if(stat >= 0) {
  42                         if((extram_pages >= 3) && (fm7_mainmem_extram != NULL) && (extram_connected)) {
  43                                 return fm7_mainmem_extram[raddr];
  44                         } else {
  45                                 return 0xff;
  46                         }
  47                 }
  48 #endif
  49         }
  50         if(mmr_enabled) {
  51                 uint32_t segment = 0x00;
  52                 uint32_t raddr = (addr & 0x0fff);
  53                 uint32_t mmr_bank;
  54                 if(addr < 0xfc00) {
  55                         if(!dmamode) segment = mmr_segment;
  56 #if 1
  57                         return read_with_mmr(addr, segment, dmamode);
  58 #else
  59                         if(!mmr_extend) {
  60                                 mmr_bank = mmr_map_data[(addr >> 12) & 0x000f | ((segment & 0x03) << 4)] & 0x003f;
  61                         } else {
  62                                 mmr_bank = mmr_map_data[(addr >> 12) & 0x000f | ((segment & 0x07) << 4)];
  63                         }
  64                         // Reallocated by MMR
  65                         // Bank 3x : Standard memories.
  66                         if(mmr_bank != 0x3f){
  67                                 raddr = (mmr_bank << 12) | raddr;
  68                                 return read_data_tbl(raddr, dmamode);
  69                         }
  70 # ifdef _FM77AV_VARIANTS
  71                         else if(mmr_bank == 0x3f) {
  72                                 if((raddr >= 0xd80) && (raddr <= 0xd97)) { // MMR AREA
  73                                         iowait(); // OK?
  74                                         return 0xff;
  75                                 } else {
  76                                         raddr = raddr | 0x3f000;
  77                                         return read_data_tbl(raddr, dmamode);
  78                                 }
  79                         }
  80 # elif defined(_FM77_VARIANTS)
  81                         else if(mmr_bank == 0x3f) {
  82                                 if((raddr >= 0xc00) && (raddr < 0xe00)) {
  83                                         if(is_basicrom) {
  84                                                 return 0x00;
  85                                         } else {
  86                                                 raddr = raddr - 0xc00;
  87                                                 return fm77_shadowram[raddr];
  88                                         }
  89                                 } else if(raddr >= 0xe00) { // Note: Is this right sequence?
  90                                         raddr = raddr - 0x0e00;
  91                                         if(is_basicrom) {
  92                                                 if(diag_load_bootrom_mmr) {
  93                                                         return fm7_bootroms[2][raddr];
  94                                                 } else {
  95                                                         return fm7_bootroms[0][raddr];
  96                                                 }
  97                                         } else {
  98                                                 return fm7_bootram[raddr];
  99                                         }
 100                                 } else {
 101                                         raddr = raddr | 0x3f000;
 102                                         return read_data_tbl(raddr, dmamode);
 103                                 }
 104                         }
 105 # endif
 106 #endif
 107                 } else {
 108                         raddr = 0x30000 | (addr & 0xffff);
 109                         return read_data_tbl(raddr, dmamode);
 110                 }
 111         }
 112 #endif
 113
 114 #if !defined(_FM77AV_VARIANTS) && !defined(_FM77_VARIANTS)
 115         uint32_t raddr = (addr & 0xffff);
 116         return read_data_tbl(raddr, dmamode);
 117 #else
 118         uint32_t raddr = (addr & 0xffff) | 0x30000;
 119         return read_data_tbl(raddr, dmamode);
 120 #endif
 121 }
 122
 123 uint32_t FM7_MAINMEM::read_data8_main(uint32_t addr, bool dmamode)
 124 {
 125         uint32_t realaddr;
 126         int bank;
 127 #ifdef _FM77AV_VARIANTS
 128         if(initiator_enabled) {
 129                 if((addr >= 0x6000) && (addr < 0x8000)) {
 130                         uint32_t raddr = addr - 0x6000;
 131                         iowait();
 132                         return fm7_mainmem_initrom[raddr];
 133                 }
 134                 if((addr >= 0xfffe) && (addr < 0x10000)) {
 135                         uint32_t raddr = addr - 0xe000;
 136                         //out_debug_log("%04x %02x\n", raddr, fm7_mainmem_initrom[raddr]);
 137                         iowait();
 138                         return fm7_mainmem_initrom[raddr];
 139                 }
 140         }
 141 #endif
 142         return read_data(addr, dmamode);
 143 }
 144
 145
 146 uint8_t FM7_MAINMEM::read_shared_ram(uint32_t realaddr, bool dmamode)
 147 {
 148         realaddr = realaddr & 0x7f;
 149         if(!sub_halted) return 0xff; // Not halt
 150         return call_read_data8(display, realaddr  + 0xd380); // Okay?
 151 }
 152
 153 uint8_t FM7_MAINMEM::read_direct_access(uint32_t realaddr, bool dmamode)
 154 {
 155 #if defined(_FM77AV_VARIANTS)
 156         if(!sub_halted) return 0xff; // Not halt
 157         if(dmamode) {
 158                 return call_read_dma_data8(display, realaddr & 0xffff); // Okay?
 159         } else {
 160                 return call_read_data8(display, realaddr & 0xffff); // Okay?
 161         }
 162 #else
 163         return 0xff;
 164 #endif
 165 }
 166
 167 uint8_t FM7_MAINMEM::read_ura_basicrom(uint32_t addr, bool dmamode)
 168 {
 169         addr = addr & 0x7fff;
 170         if (basicrom_fd0f) {
 171                 return fm7_mainmem_basicrom[addr];
 172         }
 173         return fm7_mainmem_ura[addr];
 174 }
 175
 176 uint8_t FM7_MAINMEM::read_mmio(uint32_t addr, bool dmamode)
 177 {
 178         addr &= 0xff;
 179         iowait();
 180         if(mainio != NULL) {
 181                 return call_read_data8(mainio, addr);
 182         }
 183         return 0xff;
 184 }
 185
 186 uint8_t FM7_MAINMEM::read_bootrom(uint32_t addr, bool dmamode)
 187 {
 188         addr = addr & 0x1ff;
 189         if(addr <  0x1e0) {
 190
 191 #if defined(_FM77AV_VARIANTS)
 192                 if(initiator_enabled) iowait();
 193                 return fm7_bootram[addr];
 194 #elif defined(_FM77_VARIANTS)
 195                 if(boot_ram_write) {
 196                         return fm7_bootram[addr];
 197                 }
 198                 switch(bootmode) {
 199                 case 0:
 200                 case 1:
 201                 case 2:
 202                 case 3:
 203                 case 4:
 204                 case 5:
 205                 case 6:
 206                 case 7:
 207                         return fm7_bootroms[bootmode][addr];
 208                         break;
 209                 default:
 210                         return fm7_bootroms[0][addr];
 211                         break;
 212                 }
 213 #elif defined(_FM8)
 214                 switch(bootmode) {
 215                 case 0:
 216                 case 1:
 217                 case 2:
 218                 case 3:
 219                 case 4:
 220                 case 5:
 221                 case 6:
 222                 case 7:
 223                         return fm7_bootroms[bootmode][addr];
 224                         break;
 225                 default:
 226                         return fm7_bootroms[0][addr];
 227                         break;
 228                 }
 229 #else
 230                 switch(bootmode & 3) {
 231                 case 0:
 232                 case 1:
 233                 case 2:
 234                 case 3:
 235                         return fm7_bootroms[bootmode][addr];
 236                         break;
 237                 default:
 238                         return fm7_bootroms[0][addr];
 239                         break;
 240                 }
 241 #endif
 242         } else if (addr < 0x1fe) { // VECTOR
 243                 return fm7_mainmem_bootrom_vector[addr - 0x1e0];
 244         } else { // RESET VECTOR
 245 #if defined(_FM77AV_VARIANTS)
 246                 if(initiator_enabled) iowait();
 247                 return fm7_bootram[addr];
 248 #elif defined(_FM77_VARIANTS)
 249                 iowait();
 250                 if(boot_ram_write) {
 251                         return fm7_bootram[addr];
 252                 }
 253                 return fm7_mainmem_reset_vector[addr & 1];
 254 #else
 255                 return fm7_mainmem_reset_vector[addr & 1];
 256 #endif
 257         }
 258         return 0xff;
 259 }
 260
 261 }