2 * FM77AV/FM16β ALU [mb61vh010.cpp]
3 * of Fujitsu MB61VH010/011
5 * Author: K.Ohta <whatisthis.sowhat _at_ gmail.com>
8 * Mar 28, 2015 : Initial
12 #include "mb61vh010.h"
15 MB61VH010::MB61VH010(VM *parent_vm, EMU *parent_emu) : DEVICE(parent_vm, parent_emu)
21 MB61VH010::~MB61VH010()
25 uint8 MB61VH010::do_read(uint32 addr, uint32 bank)
29 if(((1 << bank) & multi_page) != 0) return 0xff;
31 if((addr & 0xffff) < 0x8000) {
32 raddr = (addr & 0x7fff) | (0x8000 * bank);
33 return target->read_data8(raddr + DISPLAY_VRAM_DIRECT_ACCESS);
36 raddr = (addr & 0x3fff) | (0x4000 * bank);
37 return target->read_data8(raddr + DISPLAY_VRAM_DIRECT_ACCESS);
42 uint8 MB61VH010::do_write(uint32 addr, uint32 bank, uint8 data)
47 if(((1 << bank) & multi_page) != 0) return 0xff;
48 if((command_reg & 0x40) != 0) { // Calculate before writing
49 readdata = do_read(addr, bank);
51 if((command_reg & 0x20) != 0) { // NAND
52 readdata = readdata & cmp_status_reg;
53 data = data & (~cmp_status_reg);
55 readdata = readdata & (~cmp_status_reg);
56 data = data & cmp_status_reg;
58 readdata = readdata | data;
63 if((addr & 0xffff) < 0x8000) {
64 //raddr = ((addr + (line_addr_offset.w.l << 1)) & 0x7fff) | (0x8000 * bank);
65 raddr = (addr & 0x7fff) | (0x8000 * bank);
66 target->write_data8(raddr + DISPLAY_VRAM_DIRECT_ACCESS, readdata);
69 //raddr = ((addr + (line_addr_offset.w.l << 1)) & 0x3fff) | (0x4000 * bank);
70 raddr = (addr & 0x3fff) | (0x4000 * bank);
71 target->write_data8(raddr + DISPLAY_VRAM_DIRECT_ACCESS, readdata);
77 uint8 MB61VH010::do_pset(uint32 addr)
80 uint32 raddr = addr; // Use banked ram.
83 int planes_b = planes;
84 if(planes_b >= 4) planes_b = 4;
85 for(i = 0; i < planes_b; i++) {
86 if((bank_disable_reg & (1 << i)) != 0) {
89 if((color_reg & (1 << i)) == 0) {
95 srcdata = do_read(addr, i);
96 bitmask = bitmask & (~mask_reg);
97 srcdata = srcdata & mask_reg;
98 srcdata = srcdata | bitmask;
99 do_write(addr, i, srcdata);
104 uint8 MB61VH010::do_blank(uint32 addr)
109 if(planes >= 4) planes = 4;
110 for(i = 0; i < planes; i++) {
111 if((bank_disable_reg & (1 << i)) != 0) {
114 srcdata = do_read(addr, i);
115 srcdata = srcdata & mask_reg;
116 do_write(addr, i, srcdata);
121 uint8 MB61VH010::do_or(uint32 addr)
127 if(planes >= 4) planes = 4;
128 for(i = 0; i < planes; i++) {
129 if((bank_disable_reg & (1 << i)) != 0) {
132 srcdata = do_read(addr, i);
133 if((color_reg & (1 << i)) == 0) {
134 bitmask = srcdata; // srcdata | 0x00
136 bitmask = 0xff; // srcdata | 0xff
138 bitmask = bitmask & ~mask_reg;
139 srcdata = (srcdata & mask_reg) | bitmask;
140 do_write(addr, i, srcdata);
145 uint8 MB61VH010::do_and(uint32 addr)
151 if(planes >= 4) planes = 4;
152 for(i = 0; i < planes; i++) {
153 if((bank_disable_reg & (1 << i)) != 0) {
156 srcdata = do_read(addr, i);
157 if((color_reg & (1 << i)) == 0) {
158 bitmask = 0x00; // srcdata & 0x00
160 bitmask = srcdata; // srcdata & 0xff;
162 bitmask = bitmask & ~mask_reg;
163 srcdata = (srcdata & mask_reg) | bitmask;
164 do_write(addr, i, srcdata);
169 uint8 MB61VH010::do_xor(uint32 addr)
175 if(planes >= 4) planes = 4;
176 for(i = 0; i < planes; i++) {
177 if((bank_disable_reg & (1 << i)) != 0) {
180 srcdata = do_read(addr, i);
181 if((color_reg & (1 << i)) == 0) {
182 bitmask = srcdata ^ 0x00;
184 bitmask = srcdata ^ 0xff;
186 bitmask = bitmask & ~mask_reg;
187 srcdata = (srcdata & mask_reg) | bitmask;
188 do_write(addr, i, srcdata);
193 uint8 MB61VH010::do_not(uint32 addr)
199 if(planes >= 4) planes = 4;
200 for(i = 0; i < planes; i++) {
201 if((bank_disable_reg & (1 << i)) != 0) {
204 srcdata = do_read(addr, i);
207 bitmask = bitmask & ~mask_reg;
208 srcdata = (srcdata & mask_reg) | bitmask;
209 do_write(addr, i, srcdata);
215 uint8 MB61VH010::do_tilepaint(uint32 addr)
220 //printf("Tilepaint CMD=%02x, ADDR=%04x Planes=%d, disable=%d, tile_reg=(%02x %02x %02x %02x)\n",
221 // command_reg, addr, planes, bank_disable_reg, tile_reg[0], tile_reg[1], tile_reg[2], tile_reg[3]);
222 if(planes > 4) planes = 4;
223 for(i = 0; i < planes; i++) {
224 if((bank_disable_reg & (1 << i)) != 0) {
227 srcdata = do_read(addr, i);
228 bitmask = tile_reg[i] & (~mask_reg);
229 srcdata = (srcdata & mask_reg) | bitmask;
230 do_write(addr, i, srcdata);
235 uint8 MB61VH010::do_compare(uint32 addr)
237 uint32 offset = 0x4000;
239 uint8 disables = ~bank_disable_reg;
240 //uint8 disables = bank_disable_reg;
243 uint8 cmp_reg_bak[8];
248 disables = disables & 0x07;
250 for(j = 0; j < 8; j++) {
251 if((cmp_color_data[j] & 0x80) == 0) {
252 cmp_reg_bak[k] = cmp_color_data[j] & disables;
256 cmp_status_reg = 0x00;
257 if(k <= 0) return 0xff;
259 b = do_read(addr, 0);
260 r = do_read(addr, 1);
261 g = do_read(addr, 2);
262 for(i = 0; i < 8; i++) {
264 tmpcol = (b & 0x80) >> 7;
265 tmpcol = tmpcol | ((r & 0x80) >> 6);
266 tmpcol = tmpcol | ((g & 0x80) >> 5);
267 //tmpcol |= ((t & 0x80) != 0) ? 8 : 0;
268 tmpcol = tmpcol & disables;
269 for(j = 0; j < k; j++) {
270 if(cmp_reg_bak[j] == tmpcol) {
271 tmp_stat = tmp_stat | 0x01;
280 cmp_status_reg = tmp_stat;
284 void MB61VH010::do_alucmds_dmyread(uint32 addr)
287 addr = addr & 0x3fff;
293 addr = addr & 0x7fff;
295 if((command_reg & 0x80) == 0) {
299 cmp_status_reg = 0x00;
300 if((command_reg & 0x40) != 0) do_compare(addr);
301 switch(command_reg & 0x07) {
327 //printf("ALU DMYREAD ADDR=%04x, CMD=%02x CMP STATUS=%02x\n", addr, command_reg, cmp_status_reg);
328 //if(eventid_busy >= 0) cancel_event(this, eventid_busy) ;
329 //register_event(this, EVENT_MB61VH010_BUSY_OFF, 1.0 / 16.0, false, &eventid_busy) ;
332 uint8 MB61VH010::do_alucmds(uint32 addr)
335 addr = addr & 0x3fff;
341 addr = addr & 0x7fff;
343 cmp_status_reg = 0x00;
344 if((command_reg & 0x40) != 0) do_compare(addr);
345 switch(command_reg & 0x07) {
347 return do_pset(addr);
350 return do_blank(addr);
365 return do_tilepaint(addr);
368 return do_compare(addr);
374 void MB61VH010::do_line(void)
376 int x_begin = (int)line_xbegin.w.l;
377 int x_end = (int)line_xend.w.l;
378 int y_begin = (int)line_ybegin.w.l;
379 int y_end = (int)line_yend.w.l;
382 int ax = x_end - x_begin;
383 int ay = y_end - y_begin;
388 uint8 mask_bak = mask_reg;
390 uint8 vmask[8] = {0x80, 0x40, 0x20, 0x10, 0x08, 0x04, 0x02, 0x01};
392 bool lastflag = false;
395 oldaddr = 0xffffffff;
397 line_style = line_pattern;
402 if((line_style.b.h & 0x80) != 0) {
403 mask_reg &= ~vmask[cpx_t & 7];
405 tmp8a = ((line_style.b.h & 0x80) >> 7) & 0x01;
406 line_style.w.l = (line_style.w.l << 1) | tmp8a;
410 //lastflag = put_dot(x_begin, y_begin);
413 if(x_end >= screen_width) x_end = screen_width - 1;
414 for(; cpx_t <= x_end; cpx_t++) {
415 lastflag = put_dot(cpx_t, cpy_t);
418 if(x_end < 0) x_end = 0;
419 for(; cpx_t >= x_end; cpx_t--) {
420 lastflag = put_dot(cpx_t, cpy_t);
423 } else if(xcount == 0) {
425 if(y_end >= screen_height) y_end = screen_height - 1;
426 for(; cpy_t <= y_end; cpy_t++) {
427 lastflag = put_dot(cpx_t, cpy_t);
430 if(y_end < 0) y_end = 0;
431 for(; cpy_t >= y_end; cpy_t--) {
432 lastflag = put_dot(cpx_t, cpy_t);
435 } else if(xcount >= ycount) {
436 diff = (ycount * 32768) / xcount;
438 if(x_end < 0) xcount = x_begin;
440 if(x_end >= screen_width) xcount = screen_width - x_begin - 1;
442 for(; xcount >= 0; xcount-- ) {
443 lastflag = put_dot(cpx_t, cpy_t);
447 if(cpy_t > y_end) cpy_t--;
449 if(cpy_t < y_end) cpy_t++;
459 } else if(xcount == ycount) {
462 if(x_end < 0) xcount = x_begin;
464 if(x_end >= screen_width) xcount = screen_width - x_begin - 1;
466 for(; xcount >= 0; xcount-- ) {
467 lastflag = put_dot(cpx_t, cpy_t);
480 } else { // (abs(ax) <= abs(ay)
481 diff = (xcount * 32768) / ycount;
483 if(y_end < 0) ycount = y_begin;
485 if(y_end >= screen_height) ycount = screen_height - y_begin - 1;
487 for(; ycount >= 0; ycount--) {
488 lastflag = put_dot(cpx_t, cpy_t);
492 if(cpx_t > x_end) cpx_t--;
494 if(cpx_t < x_end) cpx_t++;
506 //lastflag = put_dot(x_end, y_end);
507 if(!lastflag) total_bytes++;
508 do_alucmds(alu_addr);
510 if(total_bytes > 0) { // Over 0.5us
511 usec = (double)total_bytes / 16.0;
512 if(eventid_busy >= 0) cancel_event(this, eventid_busy) ;
513 register_event(this, EVENT_MB61VH010_BUSY_OFF, usec, false, &eventid_busy) ;
520 bool MB61VH010::put_dot(int x, int y)
522 uint8 vmask[8] = {0x80, 0x40, 0x20, 0x10, 0x08, 0x04, 0x02, 0x01};
526 if((x < 0) || (y < 0)) return flag;
527 if((x >= (int)screen_width) || (y >= (int)screen_height)) return flag;
528 if((command_reg & 0x80) == 0) return flag;
530 alu_addr = ((y * screen_width) >> 3) + (x >> 3);
531 alu_addr = alu_addr + ((line_addr_offset.w.l << 1) & 0x3ffe);
532 alu_addr = alu_addr & 0x7fff;
533 if(!is_400line) alu_addr = alu_addr & 0x3fff;
534 //if(oldaddr == 0xffffffff) oldaddr = alu_addr;
536 if(oldaddr != alu_addr) {
537 if(oldaddr == 0xffffffff) oldaddr = alu_addr;
538 //printf("** %d %d %04x %04x %02x\n", x, y, line_addr_offset.w, alu_addr, command_reg );
545 //printf("** %d %d %04x %04x %02x\n", x, y, line_addr_offset.w, alu_addr, command_reg );
547 if((line_style.b.h & 0x80) != 0) {
548 mask_reg &= ~vmask[x & 7];
550 //tmp8a = (line_style.w.l & 0x8000) >> 15;
551 tmp8a = ((line_style.b.h & 0x80) >> 7) & 0x01;
552 line_style.w.l = (line_style.w.l << 1) | tmp8a;
556 void MB61VH010::write_data8(uint32 id, uint32 data)
558 //printf("ALU: ADDR=%02x DATA=%02x\n", id, data);
559 if(id == ALU_CMDREG) {
564 case ALU_LOGICAL_COLOR:
567 case ALU_WRITE_MASKREG:
570 case ALU_BANK_DISABLE:
571 bank_disable_reg = data;
573 case ALU_TILEPAINT_B:
576 case ALU_TILEPAINT_R:
579 case ALU_TILEPAINT_G:
582 case ALU_TILEPAINT_L:
585 case ALU_OFFSET_REG_HIGH:
586 line_addr_offset.b.h = data;
588 case ALU_OFFSET_REG_LO:
589 line_addr_offset.b.l = data;
591 case ALU_LINEPATTERN_REG_HIGH:
592 line_pattern.b.h = data;
594 case ALU_LINEPATTERN_REG_LO:
595 line_pattern.b.l = data;
597 case ALU_LINEPOS_START_X_HIGH:
598 line_xbegin.b.h = data;
600 case ALU_LINEPOS_START_X_LOW:
601 line_xbegin.b.l = data;
603 case ALU_LINEPOS_START_Y_HIGH:
604 line_ybegin.b.h = data;
606 case ALU_LINEPOS_START_Y_LOW:
607 line_ybegin.b.l = data;
609 case ALU_LINEPOS_END_X_HIGH:
610 line_xend.b.h = data;
612 case ALU_LINEPOS_END_X_LOW:
613 line_xend.b.l = data;
615 case ALU_LINEPOS_END_Y_HIGH:
616 line_yend.b.h = data;
618 case ALU_LINEPOS_END_Y_LOW:
619 line_yend.b.l = data;
623 if((id >= (ALU_CMPDATA_REG + 0)) && (id < (ALU_CMPDATA_REG + 8))) {
624 cmp_color_data[id - ALU_CMPDATA_REG] = data;
625 } else if((id >= ALU_WRITE_PROXY) && (id < (ALU_WRITE_PROXY + 0x18000))) {
626 uint32 raddr = id - ALU_WRITE_PROXY;
628 // raddr = raddr & 0x7fff;
630 // raddr = raddr & 0x3fff;
632 do_alucmds_dmyread(raddr);
638 uint32 MB61VH010::read_data8(uint32 id)
643 return (uint32)command_reg;
645 case ALU_LOGICAL_COLOR:
646 return (uint32)color_reg;
648 case ALU_WRITE_MASKREG:
649 return (uint32)mask_reg;
651 case ALU_CMP_STATUS_REG:
652 return (uint32)cmp_status_reg;
654 case ALU_BANK_DISABLE:
655 return (uint32)bank_disable_reg;
658 if((id >= ALU_WRITE_PROXY) && (id < (ALU_WRITE_PROXY + 0x18000))) {
660 raddr = id - ALU_WRITE_PROXY;
662 raddr = raddr & 0x7fff;
664 raddr = raddr & 0x3fff;
666 //dmydata = target->read_data8(raddr + DISPLAY_VRAM_DIRECT_ACCESS);
667 do_alucmds_dmyread(raddr);
668 raddr = (id - ALU_WRITE_PROXY) & 0xbfff;
669 dmydata = target->read_data8(raddr + DISPLAY_VRAM_DIRECT_ACCESS);
677 uint32 MB61VH010::read_signal(int id)
679 uint32 val = 0x00000000;
681 case SIG_ALU_BUSYSTAT:
682 if(busy_flag) val = 0xffffffff;
688 void MB61VH010::write_signal(int id, uint32 data, uint32 mask)
690 bool flag = ((data & mask) != 0);
692 case SIG_ALU_400LINE:
695 case SIG_ALU_MULTIPAGE:
696 multi_page = (data & mask) & 0x07;
699 planes = (data & mask) & 0x07;
700 if(planes >= 4) planes = 4;
702 case SIG_ALU_X_WIDTH:
703 screen_width = (data << 3) & 0x3ff;
705 case SIG_ALU_Y_HEIGHT:
706 screen_height = data & 0x3ff;
711 void MB61VH010::event_callback(int event_id, int err)
714 case EVENT_MB61VH010_BUSY_ON:
716 if(eventid_busy >= 0) cancel_event(this, eventid_busy);
719 case EVENT_MB61VH010_BUSY_OFF:
726 void MB61VH010::initialize(void)
737 void MB61VH010::reset(void)
741 if(eventid_busy >= 0) cancel_event(this, eventid_busy);
744 command_reg = 0; // D410 (RW)
745 color_reg = 0; // D411 (RW)
746 mask_reg = 0; // D412 (RW)
747 cmp_status_reg = 0; // D413 (RO)
748 for(i = 0; i < 8; i++) cmp_color_data[i] = 0x80; // D413-D41A (WO)
749 bank_disable_reg = 0; // D41B (RW)
750 for(i = 0; i < 4; i++) tile_reg[i] = 0; // D41C-D41F (WO)
752 line_addr_offset.d = 0; // D420-D421 (WO)
753 line_pattern.d = 0; // D422-D423 (WO)
754 line_xbegin.d = 0; // D424-D425 (WO)
755 line_ybegin.d = 0; // D426-D427 (WO)
756 line_xend.d = 0; // D428-D429 (WO)
757 line_yend.d = 0; // D42A-D42B (WO)
758 oldaddr = 0xffffffff;
760 if(planes >= 4) planes = 4;
763 #define STATE_VERSION 1
764 void MB61VH010::save_state(FILEIO *state_fio)
767 state_fio->FputUint32(STATE_VERSION);
768 state_fio->FputInt32(this_device_id);
771 state_fio->FputUint8(command_reg);
772 state_fio->FputUint8(color_reg);
773 state_fio->FputUint8(mask_reg);
774 state_fio->FputUint8(cmp_status_reg);
775 for(i = 0; i < 8; i++) state_fio->FputUint8(cmp_color_data[i]);
776 state_fio->FputUint8(bank_disable_reg);
777 for(i = 0; i < 4; i++) state_fio->FputUint8(tile_reg[i]);
778 state_fio->FputUint8(multi_page);
780 state_fio->FputUint32_BE(line_addr_offset.d);
781 state_fio->FputUint16_BE(line_pattern.w.l);
782 state_fio->FputUint16_BE(line_xbegin.w.l);
783 state_fio->FputUint16_BE(line_ybegin.w.l);
784 state_fio->FputUint16_BE(line_xend.w.l);
785 state_fio->FputUint16_BE(line_yend.w.l);
787 state_fio->FputBool(busy_flag);
788 state_fio->FputInt32_BE(eventid_busy);
790 state_fio->FputUint32_BE(total_bytes);
791 state_fio->FputUint32_BE(oldaddr);
792 state_fio->FputUint32_BE(alu_addr);
794 state_fio->FputUint32_BE(planes);
795 state_fio->FputBool(is_400line);
796 state_fio->FputUint32_BE(screen_width);
797 state_fio->FputUint32_BE(screen_height);
799 state_fio->FputUint16_BE(line_style.w.l);
804 bool MB61VH010::load_state(FILEIO *state_fio)
806 uint32 version = state_fio->FgetUint32();
809 if(this_device_id != state_fio->FgetInt32()) return false;
811 command_reg = state_fio->FgetUint8();
812 color_reg = state_fio->FgetUint8();
813 mask_reg = state_fio->FgetUint8();
814 cmp_status_reg = state_fio->FgetUint8();
815 for(i = 0; i < 8; i++) cmp_color_data[i] = state_fio->FgetUint8();
816 bank_disable_reg = state_fio->FgetUint8();
817 for(i = 0; i < 4; i++) tile_reg[i] = state_fio->FgetUint8();
818 multi_page = state_fio->FgetUint8();
820 line_addr_offset.d = state_fio->FgetUint32_BE();
827 line_pattern.w.l = state_fio->FgetUint16_BE();
828 line_xbegin.w.l = state_fio->FgetUint16_BE();
829 line_ybegin.w.l = state_fio->FgetUint16_BE();
830 line_xend.w.l = state_fio->FgetUint16_BE();
831 line_yend.w.l = state_fio->FgetUint16_BE();
833 busy_flag = state_fio->FgetBool();
834 eventid_busy = state_fio->FgetInt32_BE();
836 total_bytes = state_fio->FgetUint32_BE();
837 oldaddr = state_fio->FgetUint32_BE();
838 alu_addr = state_fio->FgetUint32_BE();
840 planes = state_fio->FgetUint32_BE();
841 is_400line = state_fio->FgetBool();
842 screen_width = state_fio->FgetUint32_BE();
843 screen_height = state_fio->FgetUint32_BE();
846 line_style.w.l = state_fio->FgetUint16_BE();