2 * FM77AV/FM16β ALU [mb61vh010.cpp]
3 * of Fujitsu MB61VH010/011
5 * Author: K.Ohta <whatisthis.sowhat _at_ gmail.com>
8 * Mar 28, 2015 : Initial
12 #include "mb61vh010.h"
15 MB61VH010::MB61VH010(VM *parent_vm, EMU *parent_emu) : DEVICE(parent_vm, parent_emu)
21 MB61VH010::~MB61VH010()
25 uint8 MB61VH010::do_read(uint32 addr, uint32 bank)
30 if(((1 << bank) & read_signal(SIG_DISPLAY_MULTIPAGE)) != 0) return 0xff;
31 //if(is_400line) offset = 0x8000;
34 if((addr & 0xffff) < 0x8000) {
35 //raddr = ((addr + (line_addr_offset.w.l << 1)) & 0x7fff) | (0x8000 * bank);
36 raddr = (addr & 0x7fff) | (0x8000 * bank);
37 return target->read_data8(raddr + DISPLAY_VRAM_DIRECT_ACCESS);
41 //raddr = ((addr + (line_addr_offset.w.l << 1)) & 0x3fff) | (0x4000 * bank);
42 raddr = (addr & 0x3fff) | (0x4000 * bank);
43 return target->read_data8(raddr + DISPLAY_VRAM_DIRECT_ACCESS);
48 uint8 MB61VH010::do_write(uint32 addr, uint32 bank, uint8 data)
53 if(((1 << bank) & read_signal(SIG_DISPLAY_MULTIPAGE)) != 0) return 0xff;
54 if((command_reg & 0x40) != 0) { // Calculate before writing
55 readdata = do_read(addr, bank);
57 if((command_reg & 0x20) != 0) { // NAND
58 readdata = readdata & cmp_status_reg;
59 data = data & ~cmp_status_reg;
60 readdata = readdata | data;
62 readdata = readdata & ~cmp_status_reg;
63 data = data & cmp_status_reg;
64 readdata = readdata | data;
70 if((addr & 0xffff) < 0x8000) {
71 //raddr = ((addr + (line_addr_offset.w.l << 1)) & 0x7fff) | (0x8000 * bank);
72 raddr = (addr & 0x7fff) | (0x8000 * bank);
73 target->write_data8(raddr + DISPLAY_VRAM_DIRECT_ACCESS, readdata);
76 //raddr = ((addr + (line_addr_offset.w.l << 1)) & 0x3fff) | (0x4000 * bank);
77 raddr = (addr & 0x3fff) | (0x4000 * bank);
78 target->write_data8(raddr + DISPLAY_VRAM_DIRECT_ACCESS, readdata);
84 uint8 MB61VH010::do_pset(uint32 addr)
87 uint32 raddr = addr; // Use banked ram.
90 int planes_b = planes;
92 if(planes_b >= 4) planes_b = 4;
93 for(i = 0; i < planes_b; i++) {
94 if((bank_disable_reg & (1 << i)) != 0) {
97 if((color_reg & (1 << i)) == 0) {
103 srcdata = do_read(addr, i);
104 bitmask = bitmask & ~mask_reg;
105 srcdata = srcdata & mask_reg;
106 srcdata = srcdata | bitmask;
107 do_write(addr, i, srcdata);
112 uint8 MB61VH010::do_blank(uint32 addr)
117 if(planes >= 4) planes = 4;
118 for(i = 0; i < planes; i++) {
119 if((bank_disable_reg & (1 << i)) != 0) {
122 srcdata = do_read(addr, i);
123 srcdata = srcdata & mask_reg;
124 do_write(addr, i, srcdata);
129 uint8 MB61VH010::do_or(uint32 addr)
135 if(planes >= 4) planes = 4;
136 for(i = 0; i < planes; i++) {
137 if((bank_disable_reg & (1 << i)) != 0) {
140 srcdata = do_read(addr, i);
141 if((color_reg & (1 << i)) == 0) {
142 bitmask = srcdata; // srcdata | 0x00
144 bitmask = 0xff; // srcdata | 0xff
146 bitmask = bitmask & ~mask_reg;
147 srcdata = (srcdata & mask_reg) | bitmask;
148 do_write(addr, i, srcdata);
153 uint8 MB61VH010::do_and(uint32 addr)
159 if(planes >= 4) planes = 4;
160 for(i = 0; i < planes; i++) {
161 if((bank_disable_reg & (1 << i)) != 0) {
164 srcdata = do_read(addr, i);
165 if((color_reg & (1 << i)) == 0) {
166 bitmask = 0x00; // srcdata & 0x00
168 bitmask = srcdata; // srcdata & 0xff;
170 bitmask = bitmask & ~mask_reg;
171 srcdata = (srcdata & mask_reg) | bitmask;
172 do_write(addr, i, srcdata);
177 uint8 MB61VH010::do_xor(uint32 addr)
183 if(planes >= 4) planes = 4;
184 for(i = 0; i < planes; i++) {
185 if((bank_disable_reg & (1 << i)) != 0) {
188 srcdata = do_read(addr, i);
189 if((color_reg & (1 << i)) == 0) {
190 bitmask = srcdata ^ 0x00;
192 bitmask = srcdata ^ 0xff;
194 bitmask = bitmask & ~mask_reg;
195 srcdata = (srcdata & mask_reg) | bitmask;
196 do_write(addr, i, srcdata);
201 uint8 MB61VH010::do_not(uint32 addr)
207 if(planes >= 4) planes = 4;
208 for(i = 0; i < planes; i++) {
209 if((bank_disable_reg & (1 << i)) != 0) {
212 srcdata = do_read(addr, i);
215 bitmask = bitmask & ~mask_reg;
216 srcdata = (srcdata & mask_reg) | bitmask;
217 do_write(addr, i, srcdata);
223 uint8 MB61VH010::do_tilepaint(uint32 addr)
228 //printf("Tilepaint CMD=%02x, ADDR=%04x Planes=%d, tile_reg=(%02x %02x %02x %02x)\n",
229 // command_reg, addr, planes, tile_reg[0], tile_reg[1], tile_reg[2], tile_reg[3]);
230 if(planes >= 4) planes = 4;
231 for(i = 0; i < planes; i++) {
232 if((bank_disable_reg & (1 << i)) != 0) {
235 srcdata = do_read(addr, i);
236 bitmask = tile_reg[i] & ~mask_reg;
237 srcdata = (srcdata & mask_reg) | bitmask;
238 do_write(addr, i, srcdata);
243 uint8 MB61VH010::do_compare(uint32 addr)
245 uint32 offset = 0x4000;
247 uint8 disables = ~bank_disable_reg;
252 //printf("Compare CMD=%02x, ADDR=%04x\n", command_reg, addr);
253 b = do_read(addr, 0);
254 r = do_read(addr, 1);
255 g = do_read(addr, 2);
257 t = do_read(addr, 3);
258 disables = disables & 0x0f;
261 disables = disables & 0x07;
263 for(i = 7; i >= 0; i--) {
264 tmpcol = ((b & 0x80) != 0) ? 1 : 0;
265 tmpcol |= ((r & 0x80) != 0) ? 2 : 0;
266 tmpcol |= ((g & 0x80) != 0) ? 4 : 0;
267 tmpcol |= ((t & 0x80) != 0) ? 8 : 0;
268 tmpcol = tmpcol & disables;
269 for(j = 0; j < 8; j++) {
270 if((cmp_color_data[j] & 0x80) == 0) {
271 if((cmp_color_data[j] & disables) == tmpcol) {
272 tmp_stat = tmp_stat | (1 << i);
282 cmp_status_reg = tmp_stat;
286 void MB61VH010::do_alucmds_dmyread(uint32 addr)
290 addr = addr & 0x3fff;
296 addr = addr & 0x7fff;
298 //printf("ALU DMYREAD: CMD %02x ADDR=%04x CMP[]=", command_reg, addr);
299 //for(i = 0; i < 8; i++) printf("[%02x]", cmp_color_data[i]);
300 if((command_reg & 0x80) == 0) {
304 if(((command_reg & 0x40) != 0) && ((command_reg & 0x07) != 7)) do_compare(addr);
305 switch(command_reg & 0x07) {
331 //printf(" CMP STATUS=%02x\n", cmp_status_reg);
334 uint8 MB61VH010::do_alucmds(uint32 addr)
337 addr = addr & 0x3fff;
343 addr = addr & 0x7fff;
345 //if((command_reg & 0x07) != 0x00) printf("ALU: CMD %02x ADDR=%08x\n", command_reg, addr);
346 if(((command_reg & 0x40) != 0) && ((command_reg & 0x07) != 7)) do_compare(addr);
347 switch(command_reg & 0x07) {
349 return do_pset(addr);
352 return do_blank(addr);
367 return do_tilepaint(addr);
370 return do_compare(addr);
376 void MB61VH010::do_line(void)
378 int x_begin = line_xbegin.w.l;
379 int x_end = line_xend.w.l;
380 int y_begin = line_ybegin.w.l;
381 int y_end = line_yend.w.l;
384 int ax = x_end - x_begin;
385 int ay = y_end - y_begin;
390 uint8 mask_bak = mask_reg;
391 uint8 vmask[8] = {0x80, 0x40, 0x20, 0x10, 0x08, 0x04, 0x02, 0x01};
392 //printf("Line: (%d,%d) - (%d,%d) CMD=%02x\n", x_begin, y_begin, x_end, y_end, command_reg);
394 bool lastflag = false;
396 is_400line = (target->read_signal(SIG_DISPLAY_MODE_IS_400LINE) != 0) ? true : false;
397 planes = target->read_signal(SIG_DISPLAY_PLANES) & 0x07;
398 screen_width = target->read_signal(SIG_DISPLAY_X_WIDTH) * 8;
399 screen_height = target->read_signal(SIG_DISPLAY_Y_HEIGHT);
401 //if((command_reg & 0x80) == 0) return;
402 oldaddr = 0xffffffff;
403 alu_addr = 0xffffffff;
406 line_style = line_pattern;
411 //mask_reg = 0xff & ~vmask[x_begin & 7];
413 // Got from HD63484.cpp.
416 if(xcount >= ycount) {
419 diff = ((abs(ay) + 1) * 1024) / abs(ax);
421 for(; cpx_t != x_end; ) {
422 lastflag = put_dot(cpx_t, cpy_t);
426 lastflag = put_dot(cpx_t + 1, cpy_t);
428 lastflag = put_dot(cpx_t - 1, cpy_t);
443 } else { // ax = ay = 0
444 lastflag = put_dot(cpx_t, cpy_t);
447 } else { // (abs(ax) < abs(ay)
449 diff = ((xcount + 1) * 1024) / abs(ay);
451 for(; cpy_t != y_end; ) {
452 lastflag = put_dot(cpx_t, cpy_t);
456 lastflag = put_dot(cpx_t, cpy_t + 1);
458 lastflag = put_dot(cpx_t, cpy_t - 1);
477 if(!lastflag) total_bytes++;
478 do_alucmds(alu_addr);
480 if(total_bytes > 8) { // Over 0.5us
481 usec = (double)total_bytes / 16.0;
482 register_event(this, EVENT_MB61VH010_BUSY_OFF, usec, false, &eventid_busy) ;
486 //mask_reg = mask_bak;
487 line_pattern = line_style;
490 bool MB61VH010::put_dot(int x, int y)
492 uint8 vmask[8] = {0x80, 0x40, 0x20, 0x10, 0x08, 0x04, 0x02, 0x01};
497 if((x < 0) || (y < 0)) return flag;
498 if((x >= screen_width) || (y >= screen_height)) return flag;
499 if((command_reg & 0x80) == 0) return flag;
501 alu_addr = ((y * screen_width) >> 3) + (x >> 3);
502 alu_addr = alu_addr + (line_addr_offset.w.l << 1);
503 alu_addr = alu_addr & 0x7fff;
504 if(!is_400line) alu_addr = alu_addr & 0x3fff;
505 if(oldaddr == 0xffffffff) oldaddr = alu_addr;
507 if(oldaddr != alu_addr) {
515 if((line_style.b.h & 0x80) != 0) {
516 mask_reg &= ~vmask[x & 7];
518 tmp8a = (line_style.w.l & 0x8000) >> 15;
519 line_style.w.l = (line_style.w.l << 1) | tmp8a;
523 void MB61VH010::write_data8(uint32 id, uint32 data)
525 //printf("ALU: ADDR=%02x DATA=%02x\n", id, data);
526 if(id == ALU_CMDREG) {
530 //if((command_reg & 0x80) == 0) return;
532 case ALU_LOGICAL_COLOR:
535 case ALU_WRITE_MASKREG:
538 case ALU_BANK_DISABLE:
539 bank_disable_reg = data;
541 case ALU_TILEPAINT_B:
544 case ALU_TILEPAINT_R:
547 case ALU_TILEPAINT_G:
550 case ALU_TILEPAINT_L:
553 case ALU_OFFSET_REG_HIGH:
554 line_addr_offset.b.h = data;
556 case ALU_OFFSET_REG_LO:
557 line_addr_offset.b.l = data;
559 case ALU_LINEPATTERN_REG_HIGH:
560 line_pattern.b.h = data;
562 case ALU_LINEPATTERN_REG_LO:
563 line_pattern.b.l = data;
565 case ALU_LINEPOS_START_X_HIGH:
566 line_xbegin.b.h = data;
568 case ALU_LINEPOS_START_X_LOW:
569 line_xbegin.b.l = data;
571 case ALU_LINEPOS_START_Y_HIGH:
572 line_ybegin.b.h = data;
574 case ALU_LINEPOS_START_Y_LOW:
575 line_ybegin.b.l = data;
577 case ALU_LINEPOS_END_X_HIGH:
578 line_xend.b.h = data;
580 case ALU_LINEPOS_END_X_LOW:
581 line_xend.b.l = data;
583 case ALU_LINEPOS_END_Y_HIGH:
584 line_yend.b.h = data;
586 case ALU_LINEPOS_END_Y_LOW:
587 line_yend.b.l = data;
591 if((id >= (ALU_CMPDATA_REG + 0)) && (id < (ALU_CMPDATA_REG + 8))) {
592 cmp_color_data[id - ALU_CMPDATA_REG] = data;
593 } else if((id >= ALU_WRITE_PROXY) && (id < (ALU_WRITE_PROXY + 0x18000))) {
594 is_400line = (target->read_signal(SIG_DISPLAY_MODE_IS_400LINE) != 0) ? true : false;
595 do_alucmds_dmyread(id - ALU_WRITE_PROXY);
601 uint32 MB61VH010::read_data8(uint32 id)
606 return (uint32)command_reg;
608 case ALU_LOGICAL_COLOR:
609 return (uint32)color_reg;
611 case ALU_WRITE_MASKREG:
612 return (uint32)mask_reg;
614 case ALU_CMP_STATUS_REG:
615 return (uint32)cmp_status_reg;
617 case ALU_BANK_DISABLE:
618 return (uint32)bank_disable_reg;
621 if((id >= ALU_WRITE_PROXY) && (id < (ALU_WRITE_PROXY + 0x18000))) {
622 is_400line = (target->read_signal(SIG_DISPLAY_MODE_IS_400LINE) != 0) ? true : false;
623 do_alucmds_dmyread(id - ALU_WRITE_PROXY);
630 uint32 MB61VH010::read_signal(int id)
632 uint32 val = 0x00000000;
634 case SIG_ALU_BUSYSTAT:
635 if(busy_flag) val = 0xffffffff;
641 void MB61VH010::event_callback(int event_id, int err)
644 case EVENT_MB61VH010_BUSY_ON:
646 if(eventid_busy >= 0) cancel_event(this, eventid_busy);
649 case EVENT_MB61VH010_BUSY_OFF:
656 void MB61VH010::initialize(void)
662 void MB61VH010::reset(void)
666 if(eventid_busy >= 0) cancel_event(this, eventid_busy);
669 command_reg = 0; // D410 (RW)
670 color_reg = 0; // D411 (RW)
671 mask_reg = 0; // D412 (RW)
672 cmp_status_reg = 0; // D413 (RO)
673 for(i = 0; i < 8; i++) cmp_color_data[i] = 0x80; // D413-D41A (WO)
674 bank_disable_reg = 0; // D41B (RW)
675 for(i = 0; i < 4; i++) tile_reg[i] = 0; // D41C-D41F (WO)
677 line_addr_offset.d = 0; // D420-D421 (WO)
678 line_pattern.d = 0; // D422-D423 (WO)
679 line_xbegin.d = 0; // D424-D425 (WO)
680 line_ybegin.d = 0; // D426-D427 (WO)
681 line_xend.d = 0; // D428-D429 (WO)
682 line_yend.d = 0; // D42A-D42B (WO)
684 oldaddr = 0xffffffff;
686 planes = target->read_signal(SIG_DISPLAY_PLANES) & 0x07;
687 is_400line = (target->read_signal(SIG_DISPLAY_MODE_IS_400LINE) != 0) ? true : false;
689 screen_width = target->read_signal(SIG_DISPLAY_X_WIDTH) * 8;
690 screen_height = target->read_signal(SIG_DISPLAY_Y_HEIGHT);