2 * FM77AV/FM16β ALU [mb61vh010.cpp]
3 * of Fujitsu MB61VH010/011
5 * Author: K.Ohta <whatisthis.sowhat _at_ gmail.com>
8 * Mar 28, 2015 : Initial
12 #include "mb61vh010.h"
15 void MB61VH010::do_pset(uint32_t addr)
18 uint8_t bitmask[4] = {0};
19 uint8_t srcdata[4] = {0};
20 const uint8_t mask_p[4] = {mask_reg, mask_reg, mask_reg, mask_reg};
21 uint32_t *pbm = (uint32_t *)bitmask;
22 uint32_t *pmp = (uint32_t *)mask_p;
23 uint32_t *psd = (uint32_t *)srcdata;
25 for(i = 0; i < 4; i++) { // planes
26 //if((bank_disable_reg & (1 << i)) != 0) {
27 if(disable_flags[i]) continue;
29 if((color_reg & (1 << i)) == 0) {
32 bitmask[i] = ~mask_reg;
34 srcdata[i] = do_read(addr, i);
36 *psd = (*psd & *pmp) | *pbm;
37 //srcdata[0] = (srcdata[0] & mask_p[0]) | bitmask[0];
38 //srcdata[1] = (srcdata[1] & mask_p[1]) | bitmask[1];
39 //srcdata[2] = (srcdata[2] & mask_p[2]) | bitmask[2];
40 //srcdata[3] = (srcdata[3] & mask_p[3]) | bitmask[3];
42 for(i = 0; i < 4; i++) {
43 if(disable_flags[i]) continue;
44 //if((bank_disable_reg & (1 << i)) != 0) {
47 do_write(addr, i, srcdata[i]);
52 void MB61VH010::do_blank(uint32_t addr)
57 //if(planes >= 4) planes = 4;
58 for(i = 0; i < 4; i++) {
59 if(disable_flags[i]) continue;
60 //if((bank_disable_reg & (1 << i)) != 0) {
63 srcdata = do_read(addr, i);
64 srcdata = srcdata & mask_reg;
65 do_write(addr, i, srcdata);
70 void MB61VH010::do_or(uint32_t addr)
73 uint8_t bitmask[4] = {0};
74 uint8_t srcdata[4] = {0};
75 const uint8_t mask_p[4] = {mask_reg, mask_reg, mask_reg, mask_reg};
76 const uint8_t mask_n[4] = {(uint8_t)~mask_reg, (uint8_t)~mask_reg, (uint8_t)~mask_reg, (uint8_t)~mask_reg};
77 uint32_t *pbm = (uint32_t *)bitmask;
78 uint32_t *pmp = (uint32_t *)mask_p;
79 uint32_t *pmn = (uint32_t *)mask_n;
80 uint32_t *psd = (uint32_t *)srcdata;
82 //if(planes >= 4) planes = 4;
83 for(i = 0; i < 4; i++) {
84 if(disable_flags[i]) continue;
85 //if((bank_disable_reg & (1 << i)) != 0) {
88 srcdata[i] = do_read(addr, i);
89 if((color_reg & (1 << i)) == 0) {
90 bitmask[i] = srcdata[i]; // srcdata | 0x00
92 bitmask[i] = 0xff; // srcdata | 0xff
94 //bitmask = bitmask & ~mask_reg;
95 //srcdata = (srcdata & mask_reg) | bitmask;
96 //do_write(addr, i, srcdata);
98 *psd = (*psd & *pmp) | (*pbm & *pmn);
99 //srcdata[0] = (srcdata[0] & mask_p[0]) | (bitmask[0] & mask_n[0]);
100 //srcdata[1] = (srcdata[1] & mask_p[1]) | (bitmask[1] & mask_n[1]);
101 //srcdata[2] = (srcdata[2] & mask_p[2]) | (bitmask[2] & mask_n[2]);
102 //srcdata[3] = (srcdata[3] & mask_p[3]) | (bitmask[3] & mask_n[3]);
103 for(i = 0; i < 4; i++) {
104 if(disable_flags[i]) continue;
105 //if((bank_disable_reg & (1 << i)) != 0) {
108 do_write(addr, i, srcdata[i]);
113 void MB61VH010::do_and(uint32_t addr)
116 uint8_t bitmask[4] = {0};
117 uint8_t srcdata[4] = {0};
118 const uint8_t mask_p[4] = {mask_reg, mask_reg, mask_reg, mask_reg};
119 const uint8_t mask_n[4] = {(uint8_t)~mask_reg, (uint8_t)~mask_reg, (uint8_t)~mask_reg, (uint8_t)~mask_reg};
120 uint32_t *pbm = (uint32_t *)bitmask;
121 uint32_t *pmp = (uint32_t *)mask_p;
122 uint32_t *pmn = (uint32_t *)mask_n;
123 uint32_t *psd = (uint32_t *)srcdata;
125 //if(planes >= 4) planes = 4;
126 for(i = 0; i < 4; i++) {
127 if(disable_flags[i]) continue;
128 //if((bank_disable_reg & (1 << i)) != 0) {
131 srcdata[i] = do_read(addr, i);
132 if((color_reg & (1 << i)) == 0) {
133 bitmask[i] = 0x00; // srcdata & 0x00
135 bitmask[i] = srcdata[i]; // srcdata & 0xff;
137 //bitmask = bitmask & ~mask_reg;
138 //srcdata = (srcdata & mask_reg) | bitmask;
139 //do_write(addr, i, srcdata);
141 *psd = (*psd & *pmp) | (*pbm & *pmn);
142 //srcdata[0] = (srcdata[0] & mask_p[0]) | (bitmask[0] & mask_n[0]);
143 //srcdata[1] = (srcdata[1] & mask_p[1]) | (bitmask[1] & mask_n[1]);
144 //srcdata[2] = (srcdata[2] & mask_p[2]) | (bitmask[2] & mask_n[2]);
145 //srcdata[3] = (srcdata[3] & mask_p[3]) | (bitmask[3] & mask_n[3]);
146 for(i = 0; i < 4; i++) {
147 if((bank_disable_reg & (1 << i)) != 0) {
150 do_write(addr, i, srcdata[i]);
155 void MB61VH010::do_xor(uint32_t addr)
160 uint8_t bitmask[4] = {0};
161 uint8_t srcdata[4] = {0};
162 const uint8_t mask_p[4] = {mask_reg, mask_reg, mask_reg, mask_reg};
163 const uint8_t mask_n[4] = {(uint8_t)~mask_reg, (uint8_t)~mask_reg, (uint8_t)~mask_reg, (uint8_t)~mask_reg};
164 uint32_t *pbm = (uint32_t *)bitmask;
165 uint32_t *pmp = (uint32_t *)mask_p;
166 uint32_t *pmn = (uint32_t *)mask_n;
167 uint32_t *psd = (uint32_t *)srcdata;
169 //if(planes >= 4) planes = 4;
170 for(i = 0; i < 4; i++) {
171 if(disable_flags[i]) continue;
172 //if((bank_disable_reg & (1 << i)) != 0) {
175 if((color_reg & (1 << i)) == 0) {
181 srcdata[i] = do_read(addr, i);
182 //bitmask = bitmask ^ srcdata;
183 //bitmask = bitmask & (~mask_reg);
184 //srcdata = srcdata & mask_reg;
185 //srcdata = srcdata | bitmask;
186 //do_write(addr, i, srcdata);
189 //bitmask[0] = bitmask[0] ^ srcdata[0];
190 //bitmask[1] = bitmask[1] ^ srcdata[1];
191 //bitmask[2] = bitmask[2] ^ srcdata[2];
192 //bitmask[3] = bitmask[3] ^ srcdata[3];
194 *psd = (*psd & *pmp) | (*pbm & *pmn);
195 //srcdata[0] = (srcdata[0] & mask_p[0]) | (bitmask[0] & mask_n[0]);
196 //srcdata[1] = (srcdata[1] & mask_p[1]) | (bitmask[1] & mask_n[1]);
197 //srcdata[2] = (srcdata[2] & mask_p[2]) | (bitmask[2] & mask_n[2]);
198 //srcdata[3] = (srcdata[3] & mask_p[3]) | (bitmask[3] & mask_n[3]);
199 for(i = 0; i < 4; i++) {
200 if(disable_flags[i]) continue;
201 //if((bank_disable_reg & (1 << i)) != 0) {
204 do_write(addr, i, srcdata[i]);
209 void MB61VH010::do_not(uint32_t addr)
212 uint8_t bitmask[4] = {0};
213 uint8_t srcdata[4] = {0};
214 const uint8_t mask_p[4] = {mask_reg, mask_reg, mask_reg, mask_reg};
215 const uint8_t mask_n[4] = {(uint8_t)~mask_reg, (uint8_t)~mask_reg, (uint8_t)~mask_reg, (uint8_t)~mask_reg};
216 uint32_t *pbm = (uint32_t *)bitmask;
217 uint32_t *pmp = (uint32_t *)mask_p;
218 uint32_t *pmn = (uint32_t *)mask_n;
219 uint32_t *psd = (uint32_t *)srcdata;
221 //if(planes >= 4) planes = 4;
222 for(i = 0; i < 4; i++) {
223 if(disable_flags[i]) continue;
224 //if((bank_disable_reg & (1 << i)) != 0) {
227 srcdata[i] = do_read(addr, i);
228 bitmask[i] = ~srcdata[i];
229 //bitmask = bitmask & ~mask_reg;
230 //srcdata = (srcdata & mask_reg) | bitmask;
231 //do_write(addr, i, srcdata);
233 *psd = (*psd & *pmp) | (*pbm & *pmn);
234 //srcdata[0] = (srcdata[0] & mask_p[0]) | (bitmask[0] & mask_n[0]);
235 //srcdata[1] = (srcdata[1] & mask_p[1]) | (bitmask[1] & mask_n[1]);
236 //srcdata[2] = (srcdata[2] & mask_p[2]) | (bitmask[2] & mask_n[2]);
237 //srcdata[3] = (srcdata[3] & mask_p[3]) | (bitmask[3] & mask_n[3]);
238 for(i = 0; i < 4; i++) {
239 if((bank_disable_reg & (1 << i)) != 0) {
242 do_write(addr, i, srcdata[i]);
248 void MB61VH010::do_tilepaint(uint32_t addr)
251 uint8_t bitmask[4] = {0};
252 uint8_t srcdata[4] = {0};
253 const uint8_t mask_p[4] = {mask_reg, mask_reg, mask_reg, mask_reg};
254 const uint8_t mask_n[4] = {(uint8_t)~mask_reg, (uint8_t)~mask_reg, (uint8_t)~mask_reg, (uint8_t)~mask_reg};
255 uint32_t *pbm = (uint32_t *)bitmask;
256 uint32_t *pmp = (uint32_t *)mask_p;
257 uint32_t *pmn = (uint32_t *)mask_n;
258 uint32_t *psd = (uint32_t *)srcdata;
260 //if(planes > 4) planes = 4;
261 for(i = 0; i < 4; i++) {
262 if(disable_flags[i]) continue;
263 //if((bank_disable_reg & (1 << i)) != 0) {
266 srcdata[i] = do_read(addr, i);
267 bitmask[i] = tile_reg[i];
268 //bitmask = tile_reg[i] & (~mask_reg);
269 //srcdata = (srcdata & mask_reg) | bitmask;
270 //do_write(addr, i, srcdata);
272 *psd = (*psd & *pmp) | (*pbm & *pmn);
273 //srcdata[0] = (srcdata[0] & mask_p[0]) | (bitmask[0] & mask_n[0]);
274 //srcdata[1] = (srcdata[1] & mask_p[1]) | (bitmask[1] & mask_n[1]);
275 //srcdata[2] = (srcdata[2] & mask_p[2]) | (bitmask[2] & mask_n[2]);
276 //srcdata[3] = (srcdata[3] & mask_p[3]) | (bitmask[3] & mask_n[3]);
277 for(i = 0; i < 4; i++) {
278 if(disable_flags[i]) continue;
279 //if((bank_disable_reg & (1 << i)) != 0) {
282 do_write(addr, i, srcdata[i]);
287 void MB61VH010::do_compare(uint32_t addr)
290 uint8_t disables = ~bank_disable_reg;
293 uint8_t tmp_stat = 0;
294 uint8_t cmp_reg_bak[8];
299 disables = disables & 0x07;
301 for(j = 0; j < 8; j++) {
302 if((cmp_color_data[j] & 0x80) == 0) {
303 cmp_reg_bak[k] = cmp_color_data[j] & disables;
307 cmp_status_reg = 0x00;
309 b = do_read(addr, 0);
310 r = do_read(addr, 1);
311 g = do_read(addr, 2);
312 for(i = 0; i < 8; i++) {
314 tmpcol = (b & 0x80) >> 7;
315 tmpcol = tmpcol | ((r & 0x80) >> 6);
316 tmpcol = tmpcol | ((g & 0x80) >> 5);
317 tmpcol = tmpcol & disables;
318 for(j = 0; j < k; j++) {
319 if(cmp_reg_bak[j] == tmpcol) {
320 tmp_stat = tmp_stat | 0x01;
329 cmp_status_reg = tmp_stat;
333 void MB61VH010::do_alucmds_dmyread(uint32_t addr)
336 addr = addr & 0x3fff;
342 addr = addr & 0x7fff;
344 if((command_reg & 0x80) == 0) {
348 //cmp_status_reg = 0x00;
349 if((command_reg & 0x40) != 0) do_compare(addr);
350 switch(command_reg & 0x07) {
376 //printf("ALU DMYREAD ADDR=%04x, CMD=%02x CMP STATUS=%02x DISABLE=%01x\n", addr, command_reg, cmp_status_reg, bank_disable_reg);
377 //if(eventid_busy >= 0) cancel_event(this, eventid_busy) ;
378 //register_event(this, EVENT_MB61VH010_BUSY_OFF, 1.0 / 16.0, false, &eventid_busy) ;
381 void MB61VH010::do_alucmds(uint32_t addr)
388 //cmp_status_reg = 0xff;
389 if((command_reg & 0x40) != 0) do_compare(addr);
390 switch(command_reg & 0x07) {
416 //printf("ALU CMDS ADDR=%04x, CMD=%02x CMP STATUS=%02x\n", addr, command_reg, cmp_status_reg);
420 void MB61VH010::do_line(void)
422 uint32_t x_begin = line_xbegin.w.l;
423 uint32_t x_end = line_xend.w.l;
424 uint32_t y_begin = line_ybegin.w.l;
425 uint32_t y_end = line_yend.w.l;
426 int cpx_t = (int)x_begin;
427 int cpy_t = (int)y_begin;
428 int ax = (int)x_end - (int)x_begin;
429 int ay = (int)y_end - (int)y_begin;
435 //bool updated = false;
436 static const uint8_t vmask[8] = {0x80, 0x40, 0x20, 0x10, 0x08, 0x04, 0x02, 0x01};
438 oldaddr = 0xffffffff;
439 alu_addr = 0xffffffff;
440 line_style = line_pattern;
445 if ((line_style.b.h & 0x80) != 0) {
446 mask_reg &= ~vmask[cpx_t & 7];
450 //this->out_debug_log(_T("LINE: (%d,%d)-(%d,%d) CMD=%02x STYLE=%04x, \n"), x_begin, y_begin, x_end , y_end, command_reg, line_style.w.l);
452 if((cpy_t < 0) || (cpy_t >= 512)) goto _finish;
454 put_dot(cpx_t, cpy_t);
458 int left = x_end - cpx_t;
459 if((cpx_t & 0x07) != 7) total_bytes = 1;
460 for(; cpx_t <= (int)x_end;) {
461 if((cpx_t & 7) == 0) {
463 put_dot8(cpx_t, cpy_t);
471 put_dot(cpx_t, cpy_t);
474 if((cpx_t & 0x07) == 7) total_bytes++;
478 int left = cpx_t - x_end;
479 if((cpx_t & 0x07) != 0) total_bytes = 1;
480 for(; cpx_t >= (int)x_end;) {
481 if(cpx_t < 0) break; // Comment out for Amnork.
482 if((cpx_t & 7) == 7) {
484 put_dot8(cpx_t, cpy_t);
492 if((cpx_t & 7) == 0) total_bytes++;
493 put_dot(cpx_t, cpy_t);
499 } else if(xcount == 0) {
500 //if((cpx_t < 0) || (cpx_t >= screen_width)) goto _finish; // Okay?
501 if(cpx_t < 0) goto _finish; // Okay?
503 for(; cpy_t <= (int)y_end; cpy_t++) {
504 if(cpy_t >= 512) break;
505 put_dot(cpx_t, cpy_t);
509 for(; cpy_t >= (int)y_end; cpy_t--) {
511 put_dot(cpx_t, cpy_t);
515 } else if(xcount > ycount) { // (abs(ax) > abs(ay)
516 diff = (ycount * 32768) / xcount;
519 if((cpx_t & 0x07) != 0) total_bytes = 1;
521 if((cpx_t & 0x07) == 0) total_bytes = 1;
523 for(; xcount >= 0; ) {
524 if((diff8 + count) <= 16384) {
526 if((cpx_t & 0x07) == 0) {
528 put_dot8(cpx_t, cpy_t);
537 if((cpx_t & 0x07) == 7) {
539 put_dot8(cpx_t, cpy_t);
550 put_dot(cpx_t, cpy_t);
558 if(cpy_t >= 512) break;
565 if((cpx_t & 0x07) == 0) total_bytes++;
567 if((cpx_t & 0x07) == 0) total_bytes++;
569 if(cpx_t < 0) break; // Comment out for Amnork.
573 } else if(xcount == ycount) { // (abs(ax) == abs(ay)
574 diff = (ycount * 32768) / xcount;
576 if((cpx_t & 0x07) != 0) total_bytes = 1;
578 if((cpx_t & 0x07) == 0) total_bytes = 1;
580 for(; xcount >= 0; xcount-- ) {
581 put_dot(cpx_t, cpy_t);
587 if(cpy_t >= 512) break;
594 if(cpx_t < 0) break; // Comment out for Amnork.
597 } else { // (abs(ax) < abs(ay)
598 diff = (xcount * 32768) / ycount;
599 for(; ycount >= 0; ycount--) {
600 put_dot(cpx_t, cpy_t);
606 if(cpx_t < 0) break; // Comment out for Amnork.
626 do_alucmds(alu_addr);
629 //if(total_bytes == 0) total_bytes = 1;
631 //if(total_bytes >= 8) { // Only greater than 8bytes.
632 usec = (double)total_bytes / 16.0;
634 busy_flag = false; // ToDo
636 if(eventid_busy >= 0) cancel_event(this, eventid_busy) ;
637 register_event(this, EVENT_MB61VH010_BUSY_OFF, usec, false, &eventid_busy);
642 void MB61VH010::write_data8(uint32_t id, uint32_t data)
644 //this->out_debug_log(_T("ALU: ADDR=%02x DATA=%02x\n"), id, data);
648 if(raddr >= 0x8000) return;
650 raddr = raddr & 0x3fff;
652 do_alucmds_dmyread(raddr);
658 case ALU_LOGICAL_COLOR:
661 case ALU_WRITE_MASKREG:
664 case ALU_BANK_DISABLE:
665 switch(planes) { // D41B (RW)
682 bank_disable_reg = data;
683 for(int i = 0; i < 4; i++) {
684 disable_flags[i] = ((bank_disable_reg & (1 << i)) != 0) ? true : false;
687 case ALU_TILEPAINT_B:
690 case ALU_TILEPAINT_R:
693 case ALU_TILEPAINT_G:
696 case ALU_TILEPAINT_L:
699 case ALU_OFFSET_REG_HIGH:
700 line_addr_offset.b.h &= 0x01;
701 line_addr_offset.b.h = line_addr_offset.b.h | ((data << 1) & 0x3e);
703 case ALU_OFFSET_REG_LO:
704 line_addr_offset.b.l = data << 1;
705 line_addr_offset.b.h &= 0xfe;
706 line_addr_offset.b.h = line_addr_offset.b.h | ((data >> 7) & 0x01);
708 case ALU_LINEPATTERN_REG_HIGH:
709 line_pattern.b.h = data;
711 case ALU_LINEPATTERN_REG_LO:
712 line_pattern.b.l = data;
714 case ALU_LINEPOS_START_X_HIGH:
715 line_xbegin.b.h = data & 0x03;
717 case ALU_LINEPOS_START_X_LOW:
718 line_xbegin.b.l = data;
720 case ALU_LINEPOS_START_Y_HIGH:
721 line_ybegin.b.h = data & 0x01;
723 case ALU_LINEPOS_START_Y_LOW:
724 line_ybegin.b.l = data;
726 case ALU_LINEPOS_END_X_HIGH:
727 line_xend.b.h = data & 0x03;
729 case ALU_LINEPOS_END_X_LOW:
730 line_xend.b.l = data;
732 case ALU_LINEPOS_END_Y_HIGH:
733 line_yend.b.h = data & 0x01;
735 case ALU_LINEPOS_END_Y_LOW:
736 line_yend.b.l = data;
739 case ALU_CMPDATA_REG + 0:
740 case ALU_CMPDATA_REG + 1:
741 case ALU_CMPDATA_REG + 2:
742 case ALU_CMPDATA_REG + 3:
743 case ALU_CMPDATA_REG + 4:
744 case ALU_CMPDATA_REG + 5:
745 case ALU_CMPDATA_REG + 6:
746 case ALU_CMPDATA_REG + 7:
747 cmp_color_data[id - ALU_CMPDATA_REG] = data;
754 uint32_t MB61VH010::read_data8(uint32_t id)
761 if(raddr >= 0x8000) return 0xffffffff;
763 raddr = raddr & 0x3fff;
765 do_alucmds_dmyread(raddr);
766 //raddr = id & 0xffff;
767 dmydata = target->read_data8(raddr + direct_access_offset);
772 return (uint32_t)command_reg;
774 case ALU_LOGICAL_COLOR:
775 return (uint32_t)color_reg;
777 case ALU_WRITE_MASKREG:
778 return (uint32_t)mask_reg;
780 case ALU_CMP_STATUS_REG:
781 return (uint32_t)cmp_status_reg;
783 case ALU_BANK_DISABLE:
784 return (uint32_t)bank_disable_reg;
787 // if((id >= ALU_WRITE_PROXY) && (id < (ALU_WRITE_PROXY + 0xc000))) {
793 uint32_t MB61VH010::read_signal(int id)
795 uint32_t val = 0x00000000;
797 case SIG_ALU_BUSYSTAT:
798 if(busy_flag) val = 0xffffffff;
800 case SIG_ALU_ENABLED:
801 if((command_reg & 0x80) != 0) val = 0xffffffff;
807 void MB61VH010::write_signal(int id, uint32_t data, uint32_t mask)
809 bool flag = ((data & mask) != 0);
811 case SIG_ALU_400LINE:
814 case SIG_ALU_MULTIPAGE:
815 multi_page = (data & mask) & 0x07;
816 for(int i = 0; i < 4; i++) {
817 multi_flags[i] = (((1 << i) & multi_page) != 0) ? true : false;
821 planes = (data & mask) & 0x07;
822 if(planes >= 4) planes = 4;
824 case SIG_ALU_X_WIDTH:
825 screen_width = (data << 3) & 0x3ff;
827 case SIG_ALU_Y_HEIGHT:
828 screen_height = data & 0x3ff;
833 void MB61VH010::event_callback(int event_id, int err)
836 case EVENT_MB61VH010_BUSY_ON:
838 if(eventid_busy >= 0) cancel_event(this, eventid_busy);
841 case EVENT_MB61VH010_BUSY_OFF:
848 void MB61VH010::initialize(void)
855 for(i = 0; i < 4; i++) {
856 multi_flags[i] = (((1 << i) & multi_page) != 0) ? true : false;
861 command_reg = 0; // D410 (RW)
862 color_reg = 0; // D411 (RW)
863 mask_reg = 0x00; // D412 (RW)
864 cmp_status_reg = 0; // D413 (RO)
865 for(i = 0; i < 8; i++) cmp_color_data[i] = 0x80; // D413-D41A (WO)
866 bank_disable_reg = 0xf8;// D41B (RW)
867 for(i = 0; i < 4; i++) {
868 disable_flags[i] = ((bank_disable_reg & (1 << i)) != 0) ? true : false;
870 for(i = 0; i < 4; i++) tile_reg[i] = 0; // D41C-D41F (WO)
872 line_addr_offset.d = 0; // D420-D421 (WO)
873 line_pattern.d = 0; // D422-D423 (WO)
874 line_xbegin.d = 0; // D424-D425 (WO)
875 line_ybegin.d = 0; // D426-D427 (WO)
876 line_xend.d = 0; // D428-D429 (WO)
877 line_yend.d = 0; // D42A-D42B (WO)
880 void MB61VH010::reset(void)
884 if(eventid_busy >= 0) cancel_event(this, eventid_busy);
886 command_reg = 0; // D410 (RW)
887 color_reg = 0; // D411 (RW)
888 mask_reg = 0; // D412 (RW)
889 cmp_status_reg = 0; // D413 (RO)
890 for(i = 0; i < 8; i++) cmp_color_data[i] = 0x80; // D413-D41A (WO)
891 for(i = 0; i < 4; i++) tile_reg[i] = 0; // D41C-D41F (WO)
893 line_addr_offset.d = 0; // D420-D421 (WO)
894 line_pattern.d = 0; // D422-D423 (WO)
895 line_xbegin.d = 0; // D424-D425 (WO)
896 line_ybegin.d = 0; // D426-D427 (WO)
897 line_xend.d = 0; // D428-D429 (WO)
898 line_yend.d = 0; // D42A-D42B (WO)
899 oldaddr = 0xffffffff;
901 if(planes >= 4) planes = 4;
902 switch(planes) { // D41B (RW)
904 bank_disable_reg = 0xfe;
907 bank_disable_reg = 0xfc;
910 bank_disable_reg = 0xf8;
913 bank_disable_reg = 0xf0;
916 bank_disable_reg = 0xff;
919 for(i = 0; i < 4; i++) {
920 disable_flags[i] = ((bank_disable_reg & (1 << i)) != 0) ? true : false;
922 for(i = 0; i < 4; i++) {
923 multi_flags[i] = (((1 << i) & multi_page) != 0) ? true : false;
927 #define STATE_VERSION 2
929 bool MB61VH010::decl_state(FILEIO *state_fio, bool loading)
931 if(!state_fio->StateCheckUint32(STATE_VERSION)) {
934 if(!state_fio->StateCheckInt32(this_device_id)) {
938 state_fio->StateUint8(command_reg);
939 state_fio->StateUint8(color_reg);
940 state_fio->StateUint8(mask_reg);
941 state_fio->StateUint8(cmp_status_reg);
942 state_fio->StateUint8(bank_disable_reg);
943 state_fio->StateUint8(multi_page);
944 state_fio->StateUint32(direct_access_offset);
946 state_fio->StateBuffer(cmp_color_data, sizeof(cmp_color_data), 1);
947 state_fio->StateBuffer(tile_reg, sizeof(tile_reg), 1);
949 state_fio->StateUint32(line_addr_offset.d);
950 state_fio->StateUint32(line_pattern.d);
951 state_fio->StateUint32(line_xbegin.d);
952 state_fio->StateUint32(line_ybegin.d);
953 state_fio->StateUint32(line_xend.d);
954 state_fio->StateUint32(line_yend.d);
956 state_fio->StateBool(busy_flag);
957 state_fio->StateUint32(line_style.d);
959 state_fio->StateUint32(total_bytes);
960 state_fio->StateUint32(oldaddr);
961 state_fio->StateUint32(alu_addr);
963 state_fio->StateUint32(planes);
964 state_fio->StateBool(is_400line);
965 state_fio->StateUint32(screen_width);
966 state_fio->StateUint32(screen_height);
968 state_fio->StateInt32(eventid_busy);
973 void MB61VH010::save_state(FILEIO *state_fio)
975 decl_state(state_fio, false);
976 out_debug_log(_T("Save State: MB61VH010 : id=%d ver=%d\n"), this_device_id, STATE_VERSION);
979 bool MB61VH010::load_state(FILEIO *state_fio)
981 bool mb = decl_state(state_fio, true);
982 out_debug_log(_T("Load State: MB61VH010 : id=%d stat=%s"), this_device_id, (mb) ? _T("OK") : _T("NG"));
983 if(!mb) return false;
987 for(int i = 0; i < 4; i++) {
988 disable_flags[i] = ((bank_disable_reg & (1 << i)) != 0) ? true : false;
990 for(int i = 0; i < 4; i++) {
991 multi_flags[i] = (((1 << i) & multi_page) != 0) ? true : false;