source/src/vm/fm7/mb61vh010.cpp

   1 /*
   2  * FM77AV/FM16β ALU [mb61vh010.cpp]
   3  *  of Fujitsu MB61VH010/011
   4  *
   5  * Author: K.Ohta <whatisthis.sowhat _at_ gmail.com>
   6  * License: GPLv2
   7  * History:
   8  *   Mar 28, 2015 : Initial
   9  *
  10  */
  11
  12 #include "mb61vh010.h"
  13
  14
  15 MB61VH010::MB61VH010(VM *parent_vm, EMU *parent_emu) : DEVICE(parent_vm, parent_emu)
  16 {
  17         p_emu = parent_emu;
  18         p_vm = parent_vm;
  19 }
  20
  21 MB61VH010::~MB61VH010()
  22 {
  23 }
  24
  25 uint8 MB61VH010::do_read(uint32 addr, uint32 bank)
  26 {
  27         uint32 raddr;
  28         uint32 offset;
  29
  30         if(((1 << bank) & read_signal(SIG_DISPLAY_MULTIPAGE)) != 0) return 0xff;
  31         //if(is_400line) offset = 0x8000;
  32
  33         if(is_400line) {
  34                 if((addr & 0xffff) < 0x8000) {
  35                         raddr = (addr & 0x7fff) | (0x8000 * bank);
  36                         return target->read_data8(raddr + DISPLAY_VRAM_DIRECT_ACCESS);
  37                 }
  38                 return 0xff;
  39         } else {
  40                 raddr = (addr & 0x3fff) | (0x4000 * bank);
  41                 return target->read_data8(raddr + DISPLAY_VRAM_DIRECT_ACCESS);
  42         }
  43         return 0xff;
  44 }
  45
  46 uint8 MB61VH010::do_write(uint32 addr, uint32 bank, uint8 data)
  47 {
  48         uint32 raddr;
  49         uint8 readdata;
  50
  51         if(((1 << bank) & read_signal(SIG_DISPLAY_MULTIPAGE)) != 0) return 0xff;
  52         if((command_reg & 0x40) != 0) { // Calculate before writing
  53                 readdata = do_read(addr, bank);
  54                 //readdata = data;
  55                 if((command_reg & 0x20) != 0) { // NAND
  56                         readdata = readdata & cmp_status_reg;
  57                         data = data & ~cmp_status_reg;
  58                         readdata = readdata | data;
  59                 } else { // AND
  60                         readdata = readdata & ~cmp_status_reg;
  61                         data = data & cmp_status_reg;
  62                         readdata = readdata | data;
  63                 }
  64         } else {
  65                 readdata = data;
  66         }
  67         if(is_400line) {
  68                 if((addr & 0xffff) < 0x8000) {
  69                         raddr = (addr & 0x7fff) | (0x8000 * bank);
  70                         target->write_data8(raddr + DISPLAY_VRAM_DIRECT_ACCESS, readdata);
  71                 }
  72         } else {
  73                 raddr = (addr & 0x3fff) | (0x4000 * bank);
  74                 target->write_data8(raddr + DISPLAY_VRAM_DIRECT_ACCESS, readdata);
  75         }
  76         return readdata;
  77 }
  78
  79
  80 uint8 MB61VH010::do_pset(uint32 addr)
  81 {
  82         uint32 i;
  83         uint32 raddr = addr;  // Use banked ram.
  84         uint8 bitmask;
  85         uint8 srcdata;
  86         int planes_b = planes;
  87
  88         if(planes_b >= 4) planes_b = 4;
  89         for(i = 0; i < planes_b; i++) {
  90                 if((bank_disable_reg & (1 << i)) != 0) {
  91                                 continue;
  92                 }
  93                 if((color_reg & (1 << i)) == 0) {
  94                         bitmask = 0x00;
  95                 } else {
  96                         bitmask = 0xff;
  97                 }
  98
  99                 srcdata = do_read(addr, i);
 100                 bitmask = bitmask & ~mask_reg;
 101                 srcdata = srcdata & mask_reg;
 102                 srcdata = srcdata | bitmask;
 103                 do_write(addr, i, srcdata);
 104         }
 105         return 0xff;
 106 }
 107
 108 uint8 MB61VH010::do_blank(uint32 addr)
 109 {
 110         uint32 i;
 111         uint8 srcdata;
 112
 113         if(planes >= 4) planes = 4;
 114         for(i = 0; i < planes; i++) {
 115                 if((bank_disable_reg & (1 << i)) != 0) {
 116                         continue;
 117                 }
 118                 srcdata = do_read(addr, i);
 119                 srcdata = srcdata & mask_reg;
 120                 do_write(addr, i, srcdata);
 121         }
 122         return 0xff;
 123 }
 124
 125 uint8 MB61VH010::do_or(uint32 addr)
 126 {
 127         uint32 i;
 128         uint8 bitmask;
 129         uint8 srcdata;
 130
 131         if(planes >= 4) planes = 4;
 132         for(i = 0; i < planes; i++) {
 133                 if((bank_disable_reg & (1 << i)) != 0) {
 134                         continue;
 135                 }
 136                 srcdata = do_read(addr, i);
 137                 if((color_reg & (1 << i)) == 0) {
 138                         bitmask = srcdata; // srcdata | 0x00
 139                 } else {
 140                         bitmask = 0xff; // srcdata | 0xff
 141                 }
 142                 bitmask = bitmask & ~mask_reg;
 143                 srcdata = (srcdata & mask_reg) | bitmask;
 144                 do_write(addr, i, srcdata);
 145         }
 146         return 0xff;
 147 }
 148
 149 uint8 MB61VH010::do_and(uint32 addr)
 150 {
 151         uint32 i;
 152         uint8 bitmask;
 153         uint8 srcdata;
 154
 155         if(planes >= 4) planes = 4;
 156         for(i = 0; i < planes; i++) {
 157                 if((bank_disable_reg & (1 << i)) != 0) {
 158                         continue;
 159                 }
 160                 srcdata = do_read(addr, i);
 161                 if((color_reg & (1 << i)) == 0) {
 162                         bitmask = 0x00; // srcdata & 0x00
 163                 } else {
 164                         bitmask = srcdata; // srcdata & 0xff;
 165                 }
 166                 bitmask = bitmask & ~mask_reg;
 167                 srcdata = (srcdata & mask_reg) | bitmask;
 168                 do_write(addr, i, srcdata);
 169         }
 170         return 0xff;
 171 }
 172
 173 uint8 MB61VH010::do_xor(uint32 addr)
 174 {
 175         uint32 i;
 176         uint8 bitmask;
 177         uint8 srcdata;
 178
 179         if(planes >= 4) planes = 4;
 180         for(i = 0; i < planes; i++) {
 181                 if((bank_disable_reg & (1 << i)) != 0) {
 182                         continue;
 183                 }
 184                 srcdata = do_read(addr, i);
 185                 if((color_reg & (1 << i)) == 0) {
 186                         bitmask = srcdata ^ 0x00;
 187                 } else {
 188                         bitmask = srcdata ^ 0xff;
 189                 }
 190                 bitmask = bitmask & ~mask_reg;
 191                 srcdata = (srcdata & mask_reg) | bitmask;
 192                 do_write(addr, i, srcdata);
 193         }
 194         return 0xff;
 195 }
 196
 197 uint8 MB61VH010::do_not(uint32 addr)
 198 {
 199         uint32 i;
 200         uint8 bitmask;
 201         uint8 srcdata;
 202
 203         if(planes >= 4) planes = 4;
 204         for(i = 0; i < planes; i++) {
 205                 if((bank_disable_reg & (1 << i)) != 0) {
 206                         continue;
 207                 }
 208                 srcdata = do_read(addr, i);
 209                 bitmask = ~srcdata;
 210
 211                 bitmask = bitmask & ~mask_reg;
 212                 srcdata = (srcdata & mask_reg) | bitmask;
 213                 do_write(addr, i, srcdata);
 214         }
 215         return 0xff;
 216 }
 217
 218
 219 uint8 MB61VH010::do_tilepaint(uint32 addr)
 220 {
 221         uint32 i;
 222         uint8 bitmask;
 223         uint8 srcdata;
 224         //printf("Tilepaint CMD=%02x, ADDR=%04x\n", command_reg, addr);
 225         if(planes >= 4) planes = 4;
 226         for(i = 0; i < planes; i++) {
 227                 if((bank_disable_reg & (1 << i)) != 0) {
 228                         continue;
 229                 }
 230                 srcdata = do_read(addr, i);
 231                 bitmask = tile_reg[i] & ~mask_reg;
 232                 srcdata = (srcdata & mask_reg) | bitmask;
 233                 do_write(addr, i, srcdata);
 234         }
 235         return 0xff;
 236 }
 237
 238 uint8 MB61VH010::do_compare(uint32 addr)
 239 {
 240         uint32 offset = 0x4000;
 241         uint8 r, g, b, t;
 242         uint8 disables = ~bank_disable_reg;
 243         uint8 tmpcol;
 244         int i;
 245         int j;
 246         //printf("Compare CMD=%02x, ADDR=%04x\n", command_reg, addr);
 247
 248         b = do_read(addr, 0);
 249         r = do_read(addr, 1);
 250         g = do_read(addr, 2);
 251         if(planes >= 4) {
 252                 t = do_read(addr, 3);
 253                 disables = disables & 0x0f;
 254         } else {
 255                 t = 0;
 256                 disables = disables & 0x07;
 257         }
 258         cmp_status_reg = 0x00;
 259         for(i = 7; i >= 0; i--) {
 260                 tmpcol  = ((b & 0x80) != 0) ? 1 : 0;
 261                 tmpcol |= ((r & 0x80) != 0) ? 2 : 0;
 262                 tmpcol |= ((g & 0x80) != 0) ? 4 : 0;
 263                 //tmpcol |= ((t & 0x80) != 0) ? 8 : 0;
 264                 tmpcol = tmpcol & disables;
 265                 for(j = 0; j < 8; j++) {
 266                         if((cmp_color_data[j] & 0x80) != 0) continue;
 267                         if((cmp_color_data[j] & disables) == tmpcol) {
 268                                 cmp_status_reg = cmp_status_reg | (1 << i);
 269                                 break;
 270                         }
 271                 }
 272                 b <<= 1;
 273                 r <<= 1;
 274                 g <<= 1;
 275                 t <<= 1;
 276         }
 277         return 0xff;
 278 }
 279
 280 void MB61VH010::do_alucmds_dmyread(uint32 addr)
 281 {
 282         if(!is_400line) {
 283                 addr = addr & 0x3fff;
 284         } else {
 285                 if(addr >= 0x8000) {
 286                         mask_reg = 0xff;
 287                         return;
 288                 }
 289                 addr = addr & 0x7fff;
 290         }
 291         //printf("ALU DMYREAD: CMD %02x ADDR=%08x\n", command_reg, addr);
 292         if((command_reg & 0x80) == 0) return;
 293         if(((command_reg & 0x40) != 0) && ((command_reg & 0x07) != 7)) do_compare(addr);
 294         switch(command_reg & 0x07) {
 295                 case 0:
 296                         do_pset(addr);
 297                         break;
 298                 case 1:
 299                         do_blank(addr);
 300                         break;
 301                 case 2:
 302                         do_or(addr);
 303                         break;
 304                 case 3:
 305                         do_and(addr);
 306                         break;
 307                 case 4:
 308                         do_xor(addr);
 309                         break;
 310                 case 5:
 311                         do_not(addr);
 312                         break;
 313                 case 6:
 314                         do_tilepaint(addr);
 315                         break;
 316                 case 7:
 317                         do_compare(addr);
 318                         break;
 319         }
 320 }
 321
 322 uint8 MB61VH010::do_alucmds(uint32 addr)
 323 {
 324         if(!is_400line) {
 325                 addr = addr & 0x3fff;
 326         } else {
 327                 if(addr >= 0x8000) {
 328                         mask_reg = 0xff;
 329                         return 0xff;
 330                 }
 331                 addr = addr & 0x7fff;
 332         }
 333         //if((command_reg & 0x07) != 0x00) printf("ALU: CMD %02x ADDR=%08x\n", command_reg, addr);
 334         if(((command_reg & 0x40) != 0) && ((command_reg & 0x07) != 7)) do_compare(addr);
 335         switch(command_reg & 0x07) {
 336                 case 0:
 337                         return do_pset(addr);
 338                         break;
 339                 case 1:
 340                         return do_blank(addr);
 341                         break;
 342                 case 2:
 343                         return do_or(addr);
 344                         break;
 345                 case 3:
 346                         return do_and(addr);
 347                         break;
 348                 case 4:
 349                         return do_xor(addr);
 350                         break;
 351                 case 5:
 352                         return do_not(addr);
 353                         break;
 354                 case 6:
 355                         return do_tilepaint(addr);
 356                         break;
 357                 case 7:
 358                         return do_compare(addr);
 359                         break;
 360         }
 361         return 0xff;
 362 }
 363
 364 void MB61VH010::do_line(void)
 365 {
 366         int x_begin = line_xbegin.w.l;
 367         int x_end = line_xend.w.l;
 368         int y_begin = line_ybegin.w.l;
 369         int y_end = line_yend.w.l;
 370         uint32 addr;
 371         uint8 lmask[8] = {0xff, 0x7f, 0x3f, 0x1f, 0x0f, 0x07, 0x03, 0x01};
 372         uint8 rmask[8] = {0x80, 0xc0, 0xe0, 0xf0, 0xf8, 0xfc, 0xfe, 0xff};
 373         uint8 vmask[8] = {0x80, 0x40, 0x20, 0x10, 0x08, 0x04, 0x02, 0x01};
 374         int cpx_t = x_begin;
 375         int cpy_t = y_begin;
 376         int ax = x_end - x_begin;
 377         int ay = y_end - y_begin;
 378         int diff;
 379         int count = 0;
 380         uint8 mask_bak = mask_reg;
 381         //printf("Line: (%d,%d) - (%d,%d) CMD=%02x\n", x_begin, y_begin, x_end, y_end, command_reg);
 382         double usec;
 383
 384         is_400line = (target->read_signal(SIG_DISPLAY_MODE_IS_400LINE) != 0) ? true : false;
 385         planes = target->read_signal(SIG_DISPLAY_PLANES) & 0x07;
 386         screen_width = target->read_signal(SIG_DISPLAY_X_WIDTH) * 8;
 387         screen_height = target->read_signal(SIG_DISPLAY_Y_HEIGHT);
 388
 389         //if((command_reg & 0x80) == 0) return;
 390         oldaddr = 0xffffffff;
 391         alu_addr = 0xffffffff;
 392
 393
 394         line_style = line_pattern;
 395         oldaddr = 0xffff;
 396         busy_flag = true;
 397         total_bytes = 1;
 398
 399         mask_reg = 0xff & vmask[x_begin & 7];
 400         // Got from HD63484.cpp .
 401         if(abs(ax) >= abs(ay)) {
 402                 if(ax != 0) {
 403                         diff = ((abs(ay) + 1) * 1024) / abs(ax);
 404                         for(; cpx_t != x_end; ) {
 405                                 put_dot(cpx_t, cpy_t);
 406                                 count += diff;
 407                                 if(count >= 1024) {
 408                                         if(ax > 0) {
 409                                                 put_dot(cpx_t + 1, cpy_t);
 410                                         } else {
 411                                                 put_dot(cpx_t - 1, cpy_t);
 412                                         }
 413                                         if(ay < 0) {
 414                                                 cpy_t--;
 415                                         } else {
 416                                                 cpy_t++;
 417                                         }
 418                                         count -= 1024;
 419                                 }
 420                                 if(ax > 0) {
 421                                         cpx_t++;
 422                                 } else {
 423                                         cpx_t--;
 424                                 }
 425                         }
 426                 }
 427         } else { // (abs(ax) < abs(ay)
 428                 diff = ((abs(ax) + 1)* 1024) / abs(ay);
 429                 for(; cpy_t != y_end; ) {
 430                         put_dot(cpx_t, cpy_t);
 431                         count += diff;
 432                         if(count >= 1024) {
 433                                 if(ay > 0) {
 434                                         put_dot(cpx_t, cpy_t + 1);
 435                                 } else {
 436                                         put_dot(cpx_t, cpy_t - 1);
 437                                 }
 438                                 if(ax < 0) {
 439                                         cpx_t--;
 440                                 } else {
 441                                         cpx_t++;
 442                                 }
 443                                 count -= 1024;
 444                         }
 445                         if(ay > 0) {
 446                                 cpy_t++;
 447                         } else {
 448                                 cpy_t--;
 449                         }
 450                 }
 451         }
 452         if(!put_dot(cpx_t, cpy_t)) total_bytes++;
 453         do_alucmds(alu_addr);
 454
 455         usec = (double)total_bytes / 16.0;
 456         if(usec >= 1.0) { // 1MHz
 457                 register_event(this, EVENT_MB61VH010_BUSY_OFF, usec, false, &eventid_busy) ;
 458         } else {
 459                 busy_flag = false;
 460         }
 461         mask_reg = mask_bak;
 462 }
 463
 464 bool MB61VH010::put_dot(int x, int y)
 465 {
 466         uint8 vmask[8] = {0x80, 0x40, 0x20, 0x10, 0x08, 0x04, 0x02, 0x01};
 467         uint16 tmp8a;
 468         uint8 mask;
 469         bool flag = false;
 470
 471         if((x < 0) || (y < 0)) return flag;
 472         if((x >= screen_width) || (y >= screen_height)) return flag;
 473         if((command_reg & 0x80) == 0) return flag;
 474
 475         alu_addr = ((y * screen_width) >> 3) + (x >> 3);
 476         alu_addr = alu_addr + (line_addr_offset.w.l << 1);
 477         alu_addr = alu_addr & 0x7fff;
 478         if(!is_400line) alu_addr = alu_addr & 0x3fff;
 479         if(oldaddr == 0xffffffff) oldaddr = alu_addr;
 480
 481         if(oldaddr != alu_addr) {
 482                 do_alucmds(oldaddr);
 483                 mask_reg = 0xff;
 484                 oldaddr = alu_addr;
 485                 flag = true;
 486                 total_bytes++;
 487         }
 488
 489         if((line_style.b.h & 0x80) != 0) {
 490                 mask_reg &= ~vmask[x & 7];
 491         }
 492         tmp8a = (line_style.w.l & 0x8000) >> 15;
 493         line_style.w.l = (line_pattern.w.l << 1) | tmp8a;
 494         return flag;
 495 }
 496
 497 void MB61VH010::write_data8(uint32 id, uint32 data)
 498 {
 499         //printf("ALU: ADDR=%02x DATA=%02x\n", id, data);
 500         if(id == ALU_CMDREG) {
 501                 command_reg = data;
 502                 return;
 503         }
 504         //if((command_reg & 0x80) == 0) return;
 505         switch(id) {
 506                 case ALU_LOGICAL_COLOR:
 507                         color_reg = data;
 508                         break;
 509                 case ALU_WRITE_MASKREG:
 510                         mask_reg = data;
 511                         break;
 512                 case ALU_BANK_DISABLE:
 513                         bank_disable_reg = data;
 514                         break;
 515                 case ALU_TILEPAINT_B:
 516                         tile_reg[0] = data;
 517                         break;
 518                 case ALU_TILEPAINT_R:
 519                         tile_reg[1] = data;
 520                         break;
 521                 case ALU_TILEPAINT_G:
 522                         tile_reg[2] = data;
 523                         break;
 524                 case ALU_TILEPAINT_L:
 525                         tile_reg[3] = data;
 526                         break;
 527                 case ALU_OFFSET_REG_HIGH:
 528                         line_addr_offset.b.h = data;
 529                         break;
 530                 case ALU_OFFSET_REG_LO:
 531                         line_addr_offset.b.l = data;
 532                         break;
 533                 case ALU_LINEPATTERN_REG_HIGH:
 534                         line_pattern.b.h = data;
 535                         break;
 536                 case ALU_LINEPATTERN_REG_LO:
 537                         line_pattern.b.l = data;
 538                         break;
 539                 case ALU_LINEPOS_START_X_HIGH:
 540                         line_xbegin.b.h = data;
 541                         break;
 542                 case ALU_LINEPOS_START_X_LOW:
 543                         line_xbegin.b.l = data;
 544                         break;
 545                 case ALU_LINEPOS_START_Y_HIGH:
 546                         line_ybegin.b.h = data;
 547                         break;
 548                 case ALU_LINEPOS_START_Y_LOW:
 549                         line_ybegin.b.l = data;
 550                         break;
 551                 case ALU_LINEPOS_END_X_HIGH:
 552                         line_xend.b.h = data;
 553                         break;
 554                 case ALU_LINEPOS_END_X_LOW:
 555                         line_xend.b.l = data;
 556                         break;
 557                 case ALU_LINEPOS_END_Y_HIGH:
 558                         line_yend.b.h = data;
 559                         break;
 560                 case ALU_LINEPOS_END_Y_LOW:
 561                         line_yend.b.l = data;
 562                         do_line();
 563                         break;
 564                 default:
 565                         if((id >= (ALU_CMPDATA_REG + 0)) && (id < (ALU_CMPDATA_REG + 8))) {
 566                                 cmp_color_data[id - ALU_CMPDATA_REG] = data;
 567                         } else  if((id >= ALU_WRITE_PROXY) && (id < (ALU_WRITE_PROXY + 0x18000))) {
 568                                 is_400line = (target->read_signal(SIG_DISPLAY_MODE_IS_400LINE) != 0) ? true : false;
 569                                 do_alucmds_dmyread(id - ALU_WRITE_PROXY);
 570                         }
 571                         break;
 572         }
 573 }
 574
 575 uint32 MB61VH010::read_data8(uint32 id)
 576 {
 577
 578         switch(id) {
 579                 case ALU_CMDREG:
 580                         return (uint32)command_reg;
 581                         break;
 582                 case ALU_LOGICAL_COLOR:
 583                         return (uint32)color_reg;
 584                         break;
 585                 case ALU_WRITE_MASKREG:
 586                         return (uint32)mask_reg;
 587                         break;
 588                 case ALU_CMP_STATUS_REG:
 589                         return (uint32)cmp_status_reg;
 590                         break;
 591                 case ALU_BANK_DISABLE:
 592                         return (uint32)bank_disable_reg;
 593                         break;
 594                 default:
 595                         if((id >= ALU_WRITE_PROXY) && (id < (ALU_WRITE_PROXY + 0x18000))) {
 596                                 is_400line = (target->read_signal(SIG_DISPLAY_MODE_IS_400LINE) != 0) ? true : false;
 597                                 do_alucmds_dmyread(id - ALU_WRITE_PROXY);
 598                         }
 599                         return 0xffffffff;
 600                         break;
 601         }
 602 }
 603
 604 uint32 MB61VH010::read_signal(int id)
 605 {
 606         uint32 val = 0x00000000;
 607         switch(id) {
 608                 case SIG_ALU_BUSYSTAT:
 609                         if(busy_flag) val = 0xffffffff;
 610                         break;
 611         }
 612         return val;
 613 }
 614
 615 void MB61VH010::event_callback(int event_id, int err)
 616 {
 617         switch(event_id) {
 618                 case EVENT_MB61VH010_BUSY_ON:
 619                         busy_flag = true;
 620                         if(eventid_busy >= 0) cancel_event(this, eventid_busy);
 621                         eventid_busy = -1;
 622                         break;
 623                 case EVENT_MB61VH010_BUSY_OFF:
 624                         busy_flag = false;
 625                         eventid_busy = -1;
 626                         break;
 627         }
 628 }
 629
 630 void MB61VH010::initialize(void)
 631 {
 632         busy_flag = false;
 633         eventid_busy = -1;
 634 }
 635
 636 void MB61VH010::reset(void)
 637 {
 638         int i;
 639         busy_flag = false;
 640         if(eventid_busy >= 0) cancel_event(this, eventid_busy);
 641         eventid_busy = -1;
 642
 643         command_reg = 0;        // D410 (RW)
 644         color_reg = 0;          // D411 (RW)
 645         mask_reg = 0;           // D412 (RW)
 646         cmp_status_reg = 0;     // D413 (RO)
 647         for(i = 0; i < 8; i++) cmp_color_data[i] = 0x80; // D413-D41A (WO)
 648         bank_disable_reg = 0;   // D41B (RW)
 649         for(i = 0; i < 4; i++) tile_reg[i] = 0;        // D41C-D41F (WO)
 650
 651         line_addr_offset.d = 0; // D420-D421 (WO)
 652         line_pattern.d = 0;     // D422-D423 (WO)
 653         line_xbegin.d = 0;      // D424-D425 (WO)
 654         line_ybegin.d = 0;      // D426-D427 (WO)
 655         line_xend.d = 0;        // D428-D429 (WO)
 656         line_yend.d = 0;        // D42A-D42B (WO)
 657
 658         oldaddr = 0xffffffff;
 659
 660         planes = target->read_signal(SIG_DISPLAY_PLANES) & 0x07;
 661         is_400line = (target->read_signal(SIG_DISPLAY_MODE_IS_400LINE) != 0) ? true : false;
 662
 663         screen_width = target->read_signal(SIG_DISPLAY_X_WIDTH) * 8;
 664         screen_height = target->read_signal(SIG_DISPLAY_Y_HEIGHT);
 665 }