source/src/vm/fmtowns/towns_memory.h

   1 /*
   2         FUJITSU FM Towns Emulator 'eFMTowns'
   3
   4         Author : Kyuma.Ohta <whatisthis.sowhat _at_ gmail.com>
   5         Date   : 2017.01.07 -
   6
   7         [ memory ]
   8 */
   9
  10 #ifndef _TOWNS_MEMORY_H_
  11 #define _TOWNS_MEMORY_H_
  12
  13 #include "../vm.h"
  14 #include "../../emu.h"
  15 #include "../device.h"
  16
  17 //#define SIG_MEMORY_DISP               0
  18 //#define SIG_MEMORY_VSYNC      1
  19
  20 class I386;
  21 // Bank size = 1GB / 1MB.
  22 // Page 0 (0000:00000 - 0000:fffff) is another routine.
  23 #define TOWNS_BANK_SIZE 1024
  24 // Page0 size is 1MB / 2KB.
  25 #define TOWNS_BANK000_BANK_SIZE 512
  26
  27 // C000:00000 - C1f0:fffff is 32MB / 32KB
  28 #define TOWNS_BANKC0x_BANK_SIZE 1024
  29 // C200:00000 - C230:fffff is 4MB / 2KB
  30 #define TOWNS_BANKC2x_BANK_SIZE 2048
  31
  32 // MAP:
  33 // 00000000 - 000fffff : SYSTEM RAM PAGE 0 (Similar to FMR-50).
  34 // 00010000 - 3fffffff : EXTRA RAM (for i386 native mode.Page size is 1MB.)
  35 // 40000000 - 7fffffff : External I/O BOX.Not accessible.
  36 // 80000000 - bfffffff : VRAM (Reserved 01020000H bytes with earlier Towns.)
  37 // c0000000 - c21fffff : ROM card and dictionaly/font/DOS ROMs.
  38 // c2200000 - c2200fff : PCM RAM (Banked).
  39 // c2201000 - fffbffff : Reserved.
  40 // FFFC0000 - FFFFFFFF : Towns System ROM.
  41
  42 enum {
  43         TOWNS_MEMORY_TYPE_FORBID = 0,
  44         TOWNS_MEMORY_TYPE_PAGE0  = 1, // - 0xfffff
  45         TOWNS_MEMORY_TYPE_INTRAM,     // 0x100000 -
  46         TOWNS_MEMORY_TYPE_EXT_MMIO,
  47         TOWNS_MEMORY_TYPE_VRAM,
  48         TOWNS_MEMORY_TYPE_SPRITE,
  49         TOWNS_MEMORY_TYPE_ROMCARD,
  50         TOWNS_MEMORY_TYPE_MSDOS,
  51         TOWNS_MEMORY_TYPE_DICTROM,
  52         TOWNS_MEMORY_TYPE_KANJIFONT,
  53         TOWNS_MEMORY_TYPE_DICTLEARN,
  54         TOWNS_MEMORY_TYPE_WAVERAM,
  55         TOWNS_MEMORY_TYPE_SYSTEM_ROM,
  56 };
  57
  58 // Please set from config
  59 #define TOWNS_EXTRAM_PAGES 6
  60
  61 class TOWNS_VRAM;
  62 class TOWNS_MEMORY : public DEVICE
  63 {
  64 private:
  65         I386 *d_cpu;
  66
  67         TOWNS_VRAM *d_vram;
  68         DEVICE *d_crtc;
  69         DEVICE *d_cmos;
  70         DEVICE *d_pcm;
  71         DEVICE *d_extio;
  72         DEVICE *d_beep;
  73
  74         uint8_t *read_bank_adrs_cx[0x400 * 16];   // C0000000 - C3FFFFFF : Per 4KB
  75         uint8_t *write_bank_adrs_cx[0x400 * 16];  // C0000000 - C3FFFFFF : Per 4KB
  76         uint8_t device_type_adrs_cx[0x400 * 16];  // C0000000 - C3FFFFFF : Per 4KB
  77
  78         uint8_t *read_bank_adrs_fx[0x1000]; // FF000000 - FFFFFFFF : Per 4KB
  79
  80         uint8_t *extram_base; // 0x100000 - : 2MB / 4MB / 6MB
  81         uint32_t extram_pages; //
  82         uint8_t *extram_adrs[0x400]; // 1 bank is 1MB
  83
  84         uint8_t msdos_rom[0x80000]; // MSDOS ROM. READ ONLY.
  85         uint8_t dict_rom[0x80000];  // Dictionary rom. READ ONLY.
  86         uint8_t font_rom[0x40000]; // Font ROM. READ ONLY.
  87 #if 0
  88         uint8_t font_20_rom[0x40000]; // Font ROM (20 pixels). READ ONLY.
  89 #endif
  90         uint8_t system_rom[0x20000]; // System ROM. READ ONLY.
  91
  92         bool bankf8_ram;
  93         bool bankd0_dict;
  94         int vram_wait_val;
  95         int mem_wait_val;
  96         int extio_wait_val;
  97
  98         uint8_t dict_bank;
  99         uint8_t page0[0xc0000];
 100         uint8_t ram_0d0[0x20000];
 101         uint8_t ram_0f0[0x8000];
 102         uint8_t ram_0f8[0x8000];
 103         //uint8_t machine_id[2];        // MACHINE ID
 104
 105         // memory
 106         uint8_t protect, rst;
 107         uint8_t mainmem, rplane, wplane;
 108         uint8_t dma_addr_reg, dma_wrap_reg;
 109         uint32_t dma_addr_mask;
 110
 111         void update_dma_addr_mask();
 112 public:
 113         TOWNS_MEMORY(VM* parent_vm, EMU* parent_emu) : DEVICE(parent_vm, parent_emu) {
 114                 set_device_name(_T("MEMORY"));
 115                 d_vram = NULL;
 116                 d_crtc = NULL;
 117                 d_cmos = NULL;
 118                 d_pcm = NULL;
 119                 d_extio = NULL;
 120                 d_beep = NULL;
 121         }
 122         ~TOWNS_MEMORY() {}
 123
 124         // common functions
 125         void initialize();
 126         void reset();
 127
 128         void write_data8(uint32_t addr, uint32_t data);
 129         uint32_t read_data8(uint32_t addr);
 130         // Using [read|write]_data[16|32] to be faster memory access.
 131         void write_data16(uint32_t addr, uint32_t data);
 132         uint32_t read_data16(uint32_t addr);
 133         void write_data32(uint32_t addr, uint32_t data);
 134         uint32_t read_data32(uint32_t addr);
 135
 136         void write_dma_data8(uint32_t addr, uint32_t data);
 137         uint32_t read_dma_data8(uint32_t addr);
 138         // Using [read|write]_dma_data16 for DMAC 16bit mode (SCSI/CDROM?).
 139         void write_dma_data16(uint32_t addr, uint32_t data);
 140         uint32_t read_dma_data16(uint32_t addr);
 141
 142         void write_io8(uint32_t addr, uint32_t data);
 143         uint32_t read_io8(uint32_t addr);
 144         void write_signal(int id, uint32_t data, uint32_t mask);
 145         void event_frame();
 146         void save_state(FILEIO* state_fio);
 147         bool load_state(FILEIO* state_fio);
 148
 149         // unique functions
 150         void set_context_cpu(I386* device)
 151         {
 152                 d_cpu = device;
 153         }
 154         void set_machine_id(uint8_t id)
 155         {
 156                 machine_id = id;
 157         }
 158         void set_context_vram(TOWNS_VRAM* device)
 159         {
 160                 d_vram = device;
 161         }
 162         void set_context_crtc(DEVICE* device)
 163         {
 164                 d_crtc = device;
 165         }
 166         void set_context_cmos(DEVICE* device)
 167         {
 168                 d_cmos = device;
 169         }
 170         void set_context_pcm(DEVICE* device)
 171         {
 172                 d_pcm = device;
 173         }
 174         void set_context_beep(DEVICE* device)
 175         {
 176                 d_beep = device;
 177         }
 178
 179         void set_chregs_ptr(uint8_t* ptr)
 180         {
 181                 chreg = ptr;
 182         }
 183 };
 184
 185 #endif
 186