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[VM][FMTOWNS][MEMORY] Fix setup around memory banks by I/O 0404h and 0480h.
[csp-qt/common_source_project-fm7.git] / source / src / vm / i8080.h
1 /*
2         Skelton for retropc emulator
3
4         Origin : MAME
5         Author : Takeda.Toshiya
6         Date   : 2008.11.04 -
7
8         [ i8080 / i8085 ]
9 */
10
11 #ifndef _I8080_H_
12 #define _I8080_H_
13
14 //#include "vm.h"
15 //#include "../emu.h"
16 #include "device.h"
17
18 #define SIG_I8080_INTR  0
19 //#ifdef HAS_I8085
20 #define SIG_I8085_RST5  1
21 #define SIG_I8085_RST6  2
22 #define SIG_I8085_RST7  3
23 #define SIG_I8085_SID   4
24 //#endif
25 #define SIG_I8080_INTE  5
26
27 //#ifdef USE_DEBUGGER
28 class DEBUGGER;
29 //#endif
30
31 class  DLL_PREFIX I8080 : public DEVICE
32 {
33 protected:
34         bool _HAS_I8085;
35         bool _HAS_I8080;
36         bool __FP200;
37         uint32_t __CPU_START_ADDR;
38         /* ---------------------------------------------------------------------------
39         contexts
40         --------------------------------------------------------------------------- */
41
42         DEVICE *d_mem, *d_io, *d_pic;
43 //#ifdef USE_DEBUGGER
44         DEBUGGER *d_debugger;
45         DEVICE *d_mem_stored, *d_io_stored;
46 //#endif
47
48         // output signals
49         outputs_t outputs_busack;
50         outputs_t outputs_sod;
51
52         /* ---------------------------------------------------------------------------
53         registers
54         --------------------------------------------------------------------------- */
55
56         int count;
57         pair32_t regs[4];
58         uint16_t SP, PC, prevPC;
59         uint16_t IM, RIM_IEN;
60         bool afterHALT, BUSREQ, SID, afterEI;
61
62         static const int cc_op_8080[0x100];
63         static const int cc_op_8085[0x100];
64         const int *cc_op;
65
66         static const uint8_t ZS[256];
67         static const uint8_t ZSP[256];
68         static const uint16_t DAA[2048];
69
70         void __FASTCALL RLDE_8085(void);
71         void __FASTCALL RIM_8085(void);
72         void __FASTCALL _DAA(void);
73         void __FASTCALL CMA_8080(void);
74         void __FASTCALL CMA_8085(void);
75         void __FASTCALL JMP(uint8_t c);
76         void __FASTCALL JMP_8085(uint8_t c);
77         void __FASTCALL JMP_8080(uint8_t c);
78         void __FASTCALL CALL(uint8_t c);
79         void __FASTCALL CALL_8085(uint8_t c);
80         void __FASTCALL CALL_8080(uint8_t c);
81         void __FASTCALL ANA(uint8_t n);
82         void __FASTCALL ANA_8085(uint8_t n);
83         void __FASTCALL ANA_8080(uint8_t n);
84
85         // memory
86         inline uint8_t __FASTCALL RM8(uint16_t addr)
87         {
88                 int wait = 0;
89                 uint8_t val = d_mem->read_data8w(addr, &wait);
90                 count -= wait;
91                 return val;
92         }
93         inline void __FASTCALL WM8(uint16_t addr, uint8_t val)
94         {
95                 int wait = 0;
96                 d_mem->write_data8w(addr, val, &wait);
97                 count -= wait;
98         }
99         inline uint16_t __FASTCALL RM16(uint16_t addr)
100         {
101                 pair16_t val;
102                 val.b.l = RM8(addr    );
103                 val.b.h = RM8(addr + 1);
104                 return val.w;
105         }
106         inline void __FASTCALL WM16(uint16_t addr, uint16_t val)
107         {
108                 WM8(addr    , (val     ) & 0xff);
109                 WM8(addr + 1, (val >> 8) & 0xff);
110         }
111         inline uint8_t __FASTCALL FETCHOP()
112         {
113                 int wait = 0;
114                 uint8_t val = d_mem->fetch_op(PC++, &wait);
115                 count -= wait;
116                 return val;
117         }
118         inline uint8_t __FASTCALL FETCH8()
119         {
120                 return RM8(PC++);
121         }
122
123         inline uint16_t __FASTCALL FETCH16()
124         {
125                 uint16_t val = RM16(PC);
126                 PC += 2;
127                 return val;
128         }
129         inline uint16_t __FASTCALL POP16()
130         {
131                 uint16_t val = RM16(SP);
132                 SP += 2;
133                 return val;
134         }
135         inline void __FASTCALL PUSH16(uint16_t val)
136         {
137                 SP -= 2;
138                 WM16(SP, val);
139         }
140
141         // i/o
142         inline uint8_t __FASTCALL IN8(uint8_t addr)
143         {
144                 int wait = 0;
145                 uint8_t val = d_io->read_io8w(addr, &wait);
146                 count -= wait;
147                 return val;
148         }
149         inline void __FASTCALL OUT8(uint8_t addr, uint8_t val)
150         {
151                 int wait = 0;
152                 d_io->write_io8w(addr, val, &wait);
153                 count -= wait;
154         }
155
156         // interrupt
157         inline uint32_t __FASTCALL ACK_INTR()
158         {
159                 return d_pic->get_intr_ack();
160         }
161
162         void __FASTCALL DSUB_8085();
163
164         inline void __FASTCALL __INT(uint16_t v)
165         {
166                 PUSH16(PC);
167                 PC = (v);
168         }
169
170         inline void __FASTCALL __RST(uint16_t n)
171         {
172                 PUSH16(PC);
173                 PC = 8 * n;
174         }
175
176         void __FASTCALL OP(uint8_t code);
177         void __FASTCALL run_one_opecode();
178         void check_interrupt();
179
180         uint64_t total_count;
181         uint64_t prev_total_count;
182 public:
183         I8080(VM_TEMPLATE* parent_vm, EMU_TEMPLATE* parent_emu) : DEVICE(parent_vm, parent_emu)
184         {
185                 BUSREQ = false;
186                 SID = true;
187                 initialize_output_signals(&outputs_busack);
188                 initialize_output_signals(&outputs_sod);
189                 d_mem = d_pic = d_io = NULL;
190                 d_mem_stored = d_io_stored = NULL;
191                 d_debugger = NULL;
192                 total_count = prev_total_count = 0;
193
194                 _HAS_I8085 = false;
195                 _HAS_I8080 = true;
196                 __FP200 = false;
197                 __CPU_START_ADDR = 0;
198                 cc_op = cc_op_8080;
199
200                 set_device_name(_T("i8080 CPU"));
201         }
202         ~I8080() {}
203
204         void initialize() override;
205         void reset() override;
206         int __FASTCALL run(int clock) override;
207
208         void __FASTCALL write_signal(int id, uint32_t data, uint32_t mask) override;
209         uint32_t __FASTCALL read_signal(int ch) override;
210         bool process_state(FILEIO* state_fio, bool loading) override;
211
212         void __FASTCALL set_intr_line(bool line, bool pending, uint32_t bit) override;
213         uint32_t get_pc() override
214         {
215                 return prevPC;
216         }
217         uint32_t get_next_pc() override
218         {
219                 return PC;
220         }
221 //#ifdef USE_DEBUGGER
222         bool is_cpu() override
223         {
224                 return true;
225         }
226         bool is_debugger_available() override
227         {
228                 return true;
229         }
230         void *get_debugger() override
231         {
232                 return d_debugger;
233         }
234         uint32_t get_debug_prog_addr_mask() override
235         {
236                 return 0xffff;
237         }
238         uint32_t get_debug_data_addr_mask() override
239         {
240                 return 0xffff;
241         }
242         void __FASTCALL write_debug_data8(uint32_t addr, uint32_t data) override;
243         uint32_t __FASTCALL read_debug_data8(uint32_t addr) override;
244         void __FASTCALL write_debug_io8(uint32_t addr, uint32_t data) override;
245         uint32_t __FASTCALL read_debug_io8(uint32_t addr) override;
246         bool write_debug_reg(const _TCHAR *reg, uint32_t data) override;
247         bool get_debug_regs_info(_TCHAR *buffer, size_t buffer_len) override;
248         int debug_dasm_with_userdata(uint32_t pc, _TCHAR *buffer, size_t buffer_len, uint32_t userdata = 0) override;
249 //#endif
250         // unique function
251         void set_context_mem(DEVICE* device)
252         {
253                 d_mem = device;
254         }
255         void set_context_io(DEVICE* device)
256         {
257                 d_io = device;
258         }
259         void set_context_intr(DEVICE* device, uint32_t bit = 0xffffffff) override
260         {
261                 d_pic = device;
262         }
263         void set_context_busack(DEVICE* device, int id, uint32_t mask)
264         {
265                 register_output_signal(&outputs_busack, device, id, mask);
266         }
267         void set_context_sod(DEVICE* device, int id, uint32_t mask)
268         {
269                 register_output_signal(&outputs_sod, device, id, mask);
270         }
271         void set_context_debugger(DEBUGGER* device)
272         {
273                 d_debugger = device;
274         }
275
276 };
277
278
279 #endif