source/src/vm/i8253.h

   1 /*
   2         Skelton for retropc emulator
   3
   4         Author : Takeda.Toshiya
   5         Date   : 2006.09.14 -
   6
   7         [ i8253/i8254 ]
   8 */
   9
  10 #ifndef _I8253_H_
  11 #define _I8253_H_
  12
  13 //#include "vm.h"
  14 //#include "../emu.h"
  15 #include "device.h"
  16
  17 #define SIG_I8253_CLOCK_0       0
  18 #define SIG_I8253_CLOCK_1       1
  19 #define SIG_I8253_CLOCK_2       2
  20 #define SIG_I8253_GATE_0        3
  21 #define SIG_I8253_GATE_1        4
  22 #define SIG_I8253_GATE_2        5
  23
  24 class I8253 : public DEVICE
  25 {
  26 private:
  27         struct {
  28                 bool prev_out;
  29                 bool prev_in;
  30                 bool gate;
  31                 int32_t count;
  32                 uint16_t latch;
  33                 uint16_t count_reg;
  34                 uint8_t ctrl_reg;
  35                 bool count_latched;
  36                 bool low_read, high_read;
  37                 bool low_write, high_write;
  38                 int mode;
  39                 bool delay;
  40                 bool start;
  41 //#ifdef HAS_I8254
  42                 bool null_count;
  43                 bool status_latched;
  44                 uint8_t status;
  45 //#endif
  46                 // constant clock
  47                 uint64_t freq;
  48                 int register_id;
  49                 uint32_t input_clk;
  50                 int period;
  51                 uint32_t prev_clk;
  52                 // output signals
  53                 outputs_t outputs;
  54         } counter[3];
  55         uint64_t cpu_clocks;
  56
  57         bool __HAS_I8254;
  58
  59         void input_clock(int ch, int clock);
  60         void input_gate(int ch, bool signal);
  61         void start_count(int ch);
  62         void stop_count(int ch);
  63         void latch_count(int ch);
  64         void set_signal(int ch, bool signal);
  65         int get_next_count(int ch);
  66
  67 public:
  68         I8253(VM_TEMPLATE* parent_vm, EMU* parent_emu) : DEVICE(parent_vm, parent_emu)
  69         {
  70                 for(int i = 0; i < 3; i++) {
  71                         initialize_output_signals(&counter[i].outputs);
  72                         counter[i].freq = 0;
  73                 }
  74                 __HAS_I8254 = false;
  75                 set_device_name(_T("8253 PIT"));
  76         }
  77         ~I8253() {}
  78
  79         // common functions
  80         void initialize();
  81         void reset();
  82         void write_io8(uint32_t addr, uint32_t data);
  83         uint32_t read_io8(uint32_t addr);
  84         void event_callback(int event_id, int err);
  85         void write_signal(int id, uint32_t data, uint32_t mask);
  86         void update_timing(int new_clocks, double new_frames_per_sec, int new_lines_per_frame)
  87         {
  88                 cpu_clocks = new_clocks;
  89         }
  90         bool process_state(FILEIO* state_fio, bool loading);
  91
  92         // unique functions
  93         void set_context_ch0(DEVICE* device, int id, uint32_t mask)
  94         {
  95                 register_output_signal(&counter[0].outputs, device, id, mask);
  96         }
  97         void set_context_ch1(DEVICE* device, int id, uint32_t mask)
  98         {
  99                 register_output_signal(&counter[1].outputs, device, id, mask);
 100         }
 101         void set_context_ch2(DEVICE* device, int id, uint32_t mask)
 102         {
 103                 register_output_signal(&counter[2].outputs, device, id, mask);
 104         }
 105         void set_constant_clock(int ch, uint32_t hz)
 106         {
 107                 counter[ch].freq = hz;
 108         }
 109 };
 110
 111 #endif
 112