2 Skelton for retropc emulator
4 Author : Takeda.Toshiya
10 #ifndef _LIBCPU_NEWDEV_DEVICE_H_
11 #define _LIBCPU_NEWDEV_DEVICE_H_
19 //#define USE_DEVICE_NAME
21 // max devices connected to the output port
25 #define SIG_CPU_IRQ 101
26 #define SIG_CPU_FIRQ 102
27 #define SIG_CPU_NMI 103
28 #define SIG_CPU_BUSREQ 104
29 #define SIG_CPU_DEBUG 105
31 #define SIG_PRINTER_DATA 201
32 #define SIG_PRINTER_STROBE 202
33 #define SIG_PRINTER_RESET 203
34 #define SIG_PRINTER_BUSY 204
35 #define SIG_PRINTER_ACK 205
36 #define SIG_PRINTER_SELECT 206
38 #define SIG_SCSI_DAT 301
39 #define SIG_SCSI_BSY 302
40 #define SIG_SCSI_CD 303
41 #define SIG_SCSI_IO 304
42 #define SIG_SCSI_MSG 305
43 #define SIG_SCSI_REQ 306
44 #define SIG_SCSI_SEL 307
45 #define SIG_SCSI_ATN 308
46 #define SIG_SCSI_ACK 309
47 #define SIG_SCSI_RST 310
49 #include "vm_template.h"
63 DEVICE(VM_TEMPLATE* parent_vm, EMU* parent_emu);
66 virtual void initialize() { }
67 virtual void release();
69 virtual void update_config() {}
70 virtual void save_state(FILEIO* state_fio) {}
71 virtual bool load_state(FILEIO* state_fio)
77 virtual void reset() {}
78 virtual void special_reset()
82 virtual bool process_state(FILEIO* state_fio, bool loading)
85 return load_state(state_fio);
87 save_state(state_fio);
92 // NOTE: the virtual bus interface functions for 16/32bit access invite the cpu is little endian.
93 // if the cpu is big endian, you need to implement them in the virtual machine memory/io classes.
96 virtual void write_data8(uint32_t addr, uint32_t data) {}
97 virtual uint32_t read_data8(uint32_t addr)
101 virtual void write_data16(uint32_t addr, uint32_t data)
103 write_data8(addr, data & 0xff);
104 write_data8(addr + 1, (data >> 8) & 0xff);
106 virtual uint32_t read_data16(uint32_t addr)
108 uint32_t val = read_data8(addr);
109 val |= read_data8(addr + 1) << 8;
112 virtual void write_data32(uint32_t addr, uint32_t data)
114 write_data16(addr, data & 0xffff);
115 write_data16(addr + 2, (data >> 16) & 0xffff);
117 virtual uint32_t read_data32(uint32_t addr)
119 uint32_t val = read_data16(addr);
120 val |= read_data16(addr + 2) << 16;
123 virtual void write_data8w(uint32_t addr, uint32_t data, int* wait)
126 write_data8(addr, data);
128 virtual uint32_t read_data8w(uint32_t addr, int* wait)
131 return read_data8(addr);
133 virtual void write_data16w(uint32_t addr, uint32_t data, int* wait)
136 write_data8w(addr, data & 0xff, &wait_l);
137 write_data8w(addr + 1, (data >> 8) & 0xff, &wait_h);
138 *wait = wait_l + wait_h;
140 virtual uint32_t read_data16w(uint32_t addr, int* wait)
143 uint32_t val = read_data8w(addr, &wait_l);
144 val |= read_data8w(addr + 1, &wait_h) << 8;
145 *wait = wait_l + wait_h;
148 virtual void write_data32w(uint32_t addr, uint32_t data, int* wait)
151 write_data16w(addr, data & 0xffff, &wait_l);
152 write_data16w(addr + 2, (data >> 16) & 0xffff, &wait_h);
153 *wait = wait_l + wait_h;
155 virtual uint32_t read_data32w(uint32_t addr, int* wait)
158 uint32_t val = read_data16w(addr, &wait_l);
159 val |= read_data16w(addr + 2, &wait_h) << 16;
160 *wait = wait_l + wait_h;
163 virtual uint32_t fetch_op(uint32_t addr, int *wait)
165 return read_data8w(addr, wait);
167 virtual void write_dma_data8(uint32_t addr, uint32_t data)
169 write_data8(addr, data);
171 virtual uint32_t read_dma_data8(uint32_t addr)
173 return read_data8(addr);
175 virtual void write_dma_data16(uint32_t addr, uint32_t data)
177 write_data16(addr, data);
179 virtual uint32_t read_dma_data16(uint32_t addr)
181 return read_data16(addr);
183 virtual void write_dma_data32(uint32_t addr, uint32_t data)
185 write_data32(addr, data);
187 virtual uint32_t read_dma_data32(uint32_t addr)
189 return read_data32(addr);
191 virtual void write_dma_data8w(uint32_t addr, uint32_t data, int* wait)
193 write_data8w(addr, data, wait);
195 virtual uint32_t read_dma_data8w(uint32_t addr, int* wait)
197 return read_data8w(addr, wait);
199 virtual void write_dma_data16w(uint32_t addr, uint32_t data, int* wait)
201 write_data16w(addr, data, wait);
203 virtual uint32_t read_dma_data16w(uint32_t addr, int* wait)
205 return read_data16w(addr, wait);
207 virtual void write_dma_data32w(uint32_t addr, uint32_t data, int* wait)
209 write_data32w(addr, data, wait);
211 virtual uint32_t read_dma_data32w(uint32_t addr, int* wait)
213 return read_data32w(addr, wait);
217 virtual void write_io8(uint32_t addr, uint32_t data) {}
218 virtual uint32_t read_io8(uint32_t addr);
219 virtual void write_io16(uint32_t addr, uint32_t data)
221 write_io8(addr, data & 0xff);
222 write_io8(addr + 1, (data >> 8) & 0xff);
224 virtual uint32_t read_io16(uint32_t addr)
226 uint32_t val = read_io8(addr);
227 val |= read_io8(addr + 1) << 8;
230 virtual void write_io32(uint32_t addr, uint32_t data)
232 write_io16(addr, data & 0xffff);
233 write_io16(addr + 2, (data >> 16) & 0xffff);
235 virtual uint32_t read_io32(uint32_t addr)
237 uint32_t val = read_io16(addr);
238 val |= read_io16(addr + 2) << 16;
241 virtual void write_io8w(uint32_t addr, uint32_t data, int* wait)
244 write_io8(addr, data);
246 virtual uint32_t read_io8w(uint32_t addr, int* wait)
249 return read_io8(addr);
251 virtual void write_io16w(uint32_t addr, uint32_t data, int* wait)
254 write_io8w(addr, data & 0xff, &wait_l);
255 write_io8w(addr + 1, (data >> 8) & 0xff, &wait_h);
256 *wait = wait_l + wait_h;
258 virtual uint32_t read_io16w(uint32_t addr, int* wait)
261 uint32_t val = read_io8w(addr, &wait_l);
262 val |= read_io8w(addr + 1, &wait_h) << 8;
263 *wait = wait_l + wait_h;
266 virtual void write_io32w(uint32_t addr, uint32_t data, int* wait)
269 write_io16w(addr, data & 0xffff, &wait_l);
270 write_io16w(addr + 2, (data >> 16) & 0xffff, &wait_h);
271 *wait = wait_l + wait_h;
273 virtual uint32_t read_io32w(uint32_t addr, int* wait)
276 uint32_t val = read_io16w(addr, &wait_l);
277 val |= read_io16w(addr + 2, &wait_h) << 16;
278 *wait = wait_l + wait_h;
281 virtual void write_dma_io8(uint32_t addr, uint32_t data)
283 write_io8(addr, data);
285 virtual uint32_t read_dma_io8(uint32_t addr)
287 return read_io8(addr);
289 virtual void write_dma_io16(uint32_t addr, uint32_t data)
291 write_io16(addr, data);
293 virtual uint32_t read_dma_io16(uint32_t addr)
295 return read_io16(addr);
297 virtual void write_dma_io32(uint32_t addr, uint32_t data)
299 write_io32(addr, data);
301 virtual uint32_t read_dma_io32(uint32_t addr)
303 return read_io32(addr);
305 virtual void write_dma_io8w(uint32_t addr, uint32_t data, int* wait)
307 write_io8w(addr, data, wait);
309 virtual uint32_t read_dma_io8w(uint32_t addr, int* wait)
311 return read_io8w(addr, wait);
313 virtual void write_dma_io16w(uint32_t addr, uint32_t data, int* wait)
315 write_io16w(addr, data, wait);
317 virtual uint32_t read_dma_io16w(uint32_t addr, int* wait)
319 return read_io16w(addr, wait);
321 virtual void write_dma_io32w(uint32_t addr, uint32_t data, int* wait)
323 write_io32w(addr, data, wait);
325 virtual uint32_t read_dma_io32w(uint32_t addr, int* wait)
327 return read_io32w(addr, wait);
331 virtual void write_memory_mapped_io8(uint32_t addr, uint32_t data)
333 write_io8(addr, data);
335 virtual uint32_t read_memory_mapped_io8(uint32_t addr)
337 return read_io8(addr);
339 virtual void write_memory_mapped_io16(uint32_t addr, uint32_t data)
341 write_memory_mapped_io8(addr, data & 0xff);
342 write_memory_mapped_io8(addr + 1, (data >> 8) & 0xff);
344 virtual uint32_t read_memory_mapped_io16(uint32_t addr)
346 uint32_t val = read_memory_mapped_io8(addr);
347 val |= read_memory_mapped_io8(addr + 1) << 8;
350 virtual void write_memory_mapped_io32(uint32_t addr, uint32_t data)
352 write_memory_mapped_io16(addr, data & 0xffff);
353 write_memory_mapped_io16(addr + 2, (data >> 16) & 0xffff);
355 virtual uint32_t read_memory_mapped_io32(uint32_t addr)
357 uint32_t val = read_memory_mapped_io16(addr);
358 val |= read_memory_mapped_io16(addr + 2) << 16;
361 virtual void write_memory_mapped_io8w(uint32_t addr, uint32_t data, int* wait)
364 write_memory_mapped_io8(addr, data);
366 virtual uint32_t read_memory_mapped_io8w(uint32_t addr, int* wait)
369 return read_memory_mapped_io8(addr);
371 virtual void write_memory_mapped_io16w(uint32_t addr, uint32_t data, int* wait)
374 write_memory_mapped_io8w(addr, data & 0xff, &wait_l);
375 write_memory_mapped_io8w(addr + 1, (data >> 8) & 0xff, &wait_h);
376 *wait = wait_l + wait_h;
378 virtual uint32_t read_memory_mapped_io16w(uint32_t addr, int* wait)
381 uint32_t val = read_memory_mapped_io8w(addr, &wait_l);
382 val |= read_memory_mapped_io8w(addr + 1, &wait_h) << 8;
383 *wait = wait_l + wait_h;
386 virtual void write_memory_mapped_io32w(uint32_t addr, uint32_t data, int* wait)
389 write_memory_mapped_io16w(addr, data & 0xffff, &wait_l);
390 write_memory_mapped_io16w(addr + 2, (data >> 16) & 0xffff, &wait_h);
391 *wait = wait_l + wait_h;
393 virtual uint32_t read_memory_mapped_io32w(uint32_t addr, int* wait)
396 uint32_t val = read_memory_mapped_io16w(addr, &wait_l);
397 val |= read_memory_mapped_io16w(addr + 2, &wait_h) << 16;
398 *wait = wait_l + wait_h;
412 output_t item[MAX_OUTPUT];
415 virtual void initialize_output_signals(outputs_t *items)
419 virtual void register_output_signal(outputs_t *items, DEVICE *device, int id, uint32_t mask, int shift)
421 int c = items->count++;
422 items->item[c].device = device;
423 items->item[c].id = id;
424 items->item[c].mask = mask;
425 items->item[c].shift = shift;
427 virtual void register_output_signal(outputs_t *items, DEVICE *device, int id, uint32_t mask)
429 int c = items->count++;
430 items->item[c].device = device;
431 items->item[c].id = id;
432 items->item[c].mask = mask;
433 items->item[c].shift = 0;
435 virtual void write_signals(outputs_t *items, uint32_t data)
437 for(int i = 0; i < items->count; i++) {
438 output_t *item = &items->item[i];
439 int shift = item->shift;
440 uint32_t val = (shift < 0) ? (data >> (-shift)) : (data << shift);
441 uint32_t mask = (shift < 0) ? (item->mask >> (-shift)) : (item->mask << shift);
442 item->device->write_signal(item->id, val, mask);
445 virtual void write_signal(int id, uint32_t data, uint32_t mask) {}
446 virtual uint32_t read_signal(int ch)
452 virtual void set_context_intr(DEVICE* device, uint32_t bit) {}
453 virtual void set_context_child(DEVICE* device) {}
455 // interrupt device to device
456 virtual void set_intr_iei(bool val) {}
458 // interrupt device to cpu
459 virtual void set_intr_line(bool line, bool pending, uint32_t bit) {}
461 // interrupt cpu to device
462 virtual uint32_t get_intr_ack()
466 virtual void notify_intr_reti() {}
467 virtual void notify_intr_ei() {}
470 virtual void do_dma() {}
473 virtual int run(int clock)
475 // when clock == -1, run one opecode
476 return (clock == -1 ? 1 : clock);
478 virtual void set_extra_clock(int clock) {}
479 virtual int get_extra_clock()
483 virtual uint32_t get_pc()
487 virtual uint32_t get_next_pc()
493 virtual bool bios_call_far_i86(uint32_t PC, uint16_t regs[], uint16_t sregs[], int32_t* ZeroFlag, int32_t* CarryFlag)
497 virtual bool bios_int_i86(int intnum, uint16_t regs[], uint16_t sregs[], int32_t* ZeroFlag, int32_t* CarryFlag)
501 virtual bool bios_ret_z80(uint16_t PC, pair_t* af, pair_t* bc, pair_t* de, pair_t* hl, pair_t* ix, pair_t* iy, uint8_t* iff1) {
505 const _TCHAR *get_device_name(void)
507 return (const _TCHAR *)this_device_name;
511 DEVICE* event_manager;
513 virtual void set_context_event_manager(DEVICE* device)
515 event_manager = device;
517 virtual int get_event_manager_id();
518 virtual void register_event(DEVICE* device, int event_id, double usec, bool loop, int* register_id);
519 virtual void register_event_by_clock(DEVICE* device, int event_id, uint64_t clock, bool loop, int* register_id);
520 virtual void cancel_event(DEVICE* device, int register_id);
521 virtual void register_frame_event(DEVICE* device);
522 virtual void register_vline_event(DEVICE* device);
523 virtual uint32_t get_event_remaining_clock(int register_id);
524 virtual double get_event_remaining_usec(int register_id);
525 virtual uint32_t get_current_clock();
526 virtual uint32_t get_passed_clock(uint32_t prev);
527 virtual double get_passed_usec(uint32_t prev);
528 virtual uint32_t get_passed_clock_since_vline();
529 virtual double get_passed_usec_since_vline();
530 virtual int get_cur_vline();
531 virtual int get_cur_vline_clocks();
532 virtual uint32_t get_cpu_pc(int index);
533 virtual void request_skip_frames();
534 virtual void set_frames_per_sec(double frames);
535 virtual void set_lines_per_frame(int lines);
536 virtual int get_lines_per_frame(void);
537 // Force render sound immediately when device's status has changed.
538 // You must call this after you changing registers (or enything).
539 // If has problems, try set_realtime_render.
540 // See mb8877.cpp and ym2203.cpp.
542 virtual void touch_sound(void);
543 // Force render per 1 sample automatically.
546 virtual void set_realtime_render(DEVICE *device, bool flag);
547 virtual void set_realtime_render(bool flag)
549 set_realtime_render(this, flag);
551 virtual void update_timing(int new_clocks, double new_frames_per_sec, int new_lines_per_frame) {}
554 virtual void event_callback(int event_id, int err) {}
555 virtual void event_pre_frame() {} // this event is to update timing settings
556 virtual void event_frame() {}
557 virtual void event_vline(int v, int clock) {}
558 virtual void event_hsync(int v, int h, int clock) {}
561 virtual void mix(int32_t* buffer, int cnt) {}
562 virtual void set_volume(int ch, int decibel_l, int decibel_r) {} // +1 equals +0.5dB (same as fmgen)
563 virtual void set_device_name(const _TCHAR *format, ...);
564 virtual void out_debug_log(const char *fmt, ...);
565 virtual void force_out_debug_log(const char *fmt, ...);
568 // DEBUGGER is enabled by default.
569 virtual void *get_debugger();
570 virtual uint32_t get_debug_prog_addr_mask();
571 virtual uint32_t get_debug_data_addr_mask();
572 virtual void write_debug_data8(uint32_t addr, uint32_t data);
573 virtual uint32_t read_debug_data8(uint32_t addr);
574 virtual void write_debug_data16(uint32_t addr, uint32_t data);
575 virtual uint32_t read_debug_data16(uint32_t addr);
576 virtual void write_debug_data32(uint32_t addr, uint32_t data);
577 virtual uint32_t read_debug_data32(uint32_t addr);
578 virtual void write_debug_io8(uint32_t addr, uint32_t data);
579 virtual uint32_t read_debug_io8(uint32_t addr);
580 virtual void write_debug_io16(uint32_t addr, uint32_t data);
581 virtual uint32_t read_debug_io16(uint32_t addr);
582 virtual void write_debug_io32(uint32_t addr, uint32_t data);
583 virtual uint32_t read_debug_io32(uint32_t addr);
584 virtual bool write_debug_reg(const _TCHAR *reg, uint32_t data);
585 virtual void get_debug_regs_info(_TCHAR *buffer, size_t buffer_len);
586 virtual int debug_dasm(uint32_t pc, _TCHAR *buffer, size_t buffer_len);
589 const _TCHAR *get_lib_common_vm_version(void);
591 _TCHAR this_device_name[128];
593 // device node using with iterator.