source/src/vm/mc6800.cpp

   1 /*
   2         Skelton for retropc emulator
   3
   4         Origin : MAME 0.142
   5         Author : Takeda.Toshiya
   6         Date  : 2011.04.23-
   7
   8         [ MC6800 ]
   9 */
  10
  11 #if defined(_MSC_VER) && (_MSC_VER >= 1400)
  12 #pragma warning( disable : 4996 )
  13 #endif
  14
  15 #include "mc6800.h"
  16 //#if defined(HAS_MC6801) || defined(HAS_HD6301)
  17 //#include "../fifo.h"
  18 //#endif
  19 //#ifdef USE_DEBUGGER
  20 #include "debugger.h"
  21 //#endif
  22 #include "mc6800_consts.h"
  23
  24
  25 /****************************************************************************/
  26 /* memory                                                                   */
  27 /****************************************************************************/
  28
  29 uint32_t MC6800::RM(uint32_t Addr)
  30 {
  31 //#if defined(HAS_MC6801) || defined(HAS_HD6301)
  32 //      if(Addr < 0x20) {
  33 //              return mc6801_io_r(Addr);
  34 //      } else if(Addr >= 0x80 && Addr < 0x100 && (ram_ctrl & 0x40)) {
  35 //              return ram[Addr & 0x7f];
  36 //      }
  37 //#endif
  38         return d_mem->read_data8(Addr);
  39 }
  40
  41 void MC6800::WM(uint32_t Addr, uint32_t Value)
  42 {
  43 //#if defined(HAS_MC6801) || defined(HAS_HD6301)
  44 //      if(Addr < 0x20) {
  45 //              mc6801_io_w(Addr, Value);
  46 //      } else if(Addr >= 0x80 && Addr < 0x100 && (ram_ctrl & 0x40)) {
  47 //              ram[Addr & 0x7f] = Value;
  48 //      } else
  49 //#endif
  50         d_mem->write_data8(Addr, Value);
  51 }
  52
  53 uint32_t MC6800::RM16(uint32_t Addr)
  54 {
  55         uint32_t result = RM(Addr) << 8;
  56         return result | RM((Addr + 1) & 0xffff);
  57 }
  58
  59 void MC6800::WM16(uint32_t Addr, pair32_t *p)
  60 {
  61         WM(Addr, p->b.h);
  62         WM((Addr + 1) & 0xffff, p->b.l);
  63 }
  64
  65 void MC6800::increment_counter(int amount)
  66 {
  67         total_icount += amount;
  68         icount -= amount;
  69 }
  70
  71
  72
  73 const uint8_t MC6800::flags8i[256] = {
  74         /* increment */
  75         0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
  76         0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
  77         0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
  78         0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
  79         0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
  80         0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
  81         0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
  82         0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
  83         0x0a,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
  84         0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
  85         0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
  86         0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
  87         0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
  88         0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
  89         0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
  90         0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08
  91 };
  92
  93 const uint8_t MC6800::flags8d[256] = {
  94         /* decrement */
  95         0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
  96         0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
  97         0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
  98         0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
  99         0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 100         0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 101         0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 102         0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02,
 103         0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
 104         0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
 105         0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
 106         0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
 107         0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
 108         0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
 109         0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
 110         0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08
 111 };
 112
 113
 114
 115 void MC6800::initialize()
 116 {
 117         DEVICE::initialize();
 118         __USE_DEBUGGER = osd->check_feature(_T("USE_DEBUGGER"));
 119         if(__USE_DEBUGGER) {
 120 //#ifdef USE_DEBUGGER
 121                 d_mem_stored = d_mem;
 122                 d_debugger->set_context_mem(d_mem);
 123 //#endif
 124         } else {
 125                 d_mem_stored = NULL;
 126         }
 127 }
 128
 129 //#if defined(HAS_MC6801) || defined(HAS_HD6301)
 130 //void MC6800::release()
 131 //{
 132 //      recv_buffer->release();
 133 //      delete recv_buffer;
 134 //}
 135 //#endif
 136
 137 void MC6800::reset()
 138 {
 139         CC = 0xc0;
 140         SEI; /* IRQ disabled */
 141         PCD = RM16(0xfffe);
 142         S = X = D = EA = 0;
 143
 144         wai_state = 0;
 145         int_state = 0;
 146
 147         icount = 0;
 148
 149 }
 150
 151 void MC6800::write_signal(int id, uint32_t data, uint32_t mask)
 152 {
 153         switch(id) {
 154         case SIG_CPU_IRQ:
 155                 if(data & mask) {
 156                         int_state |= INT_REQ_BIT;
 157                 } else {
 158                         int_state &= ~INT_REQ_BIT;
 159                 }
 160                 break;
 161         case SIG_CPU_NMI:
 162                 if(data & mask) {
 163                         int_state |= NMI_REQ_BIT;
 164                 } else {
 165                         int_state &= ~NMI_REQ_BIT;
 166                 }
 167                 break;
 168         }
 169 }
 170
 171 int MC6800::run(int clock)
 172 {
 173         // run cpu
 174         if(clock == -1) {
 175                 // run only one opcode
 176                 icount = 0;
 177                 run_one_opecode();
 178                 return -icount;
 179         } else {
 180                 /* run cpu while given clocks */
 181                 icount += clock;
 182                 int first_icount = icount;
 183
 184                 while(icount > 0) {
 185                         run_one_opecode();
 186                 }
 187                 return first_icount - icount;
 188         }
 189         return 1;
 190 }
 191
 192
 193 void MC6800::run_one_opecode()
 194 {
 195         if(wai_state & (MC6800_WAI | HD6301_SLP)) {
 196                 increment_counter(1);
 197         } else {
 198                 do {
 199                         one_more_insn = false;
 200                         if(__USE_DEBUGGER) {
 201                                 bool now_debugging = d_debugger->now_debugging;
 202                                 if(now_debugging) {
 203                                         d_debugger->check_break_points(PC);
 204                                         if(d_debugger->now_suspended) {
 205                                                 d_debugger->now_waiting = true;
 206                                                 emu->start_waiting_in_debugger();
 207                                                 while(d_debugger->now_debugging && d_debugger->now_suspended) {
 208                                                         emu->process_waiting_in_debugger();
 209                                                 }
 210                                                 emu->finish_waiting_in_debugger();
 211                                                 d_debugger->now_waiting = false;
 212                                         }
 213                                         if(d_debugger->now_debugging) {
 214                                                 d_mem = d_debugger;
 215                                         } else {
 216                                                 now_debugging = false;
 217                                         }
 218
 219                                         d_debugger->add_cpu_trace(PC);
 220                                         uint8_t ireg = M_RDOP(PCD);
 221                                         prevpc = PC;
 222                                         PC++;
 223                                         insn(ireg);
 224                                         increment_counter(cycles[ireg]);
 225
 226                                         if(now_debugging) {
 227                                                 if(!d_debugger->now_going) {
 228                                                         d_debugger->now_suspended = true;
 229                                                 }
 230                                                 d_mem = d_mem_stored;
 231                                         }
 232                                 } else {
 233                                         if(__USE_DEBUGGER) d_debugger->add_cpu_trace(PC);
 234                                         uint8_t ireg = M_RDOP(PCD);
 235                                         prevpc = PC;
 236                                         PC++;
 237                                         insn(ireg);
 238                                         increment_counter(cycles[ireg]);
 239                                 }
 240                         } else {
 241                                 uint8_t ireg = M_RDOP(PCD);
 242                                 prevpc = PC;
 243                                 PC++;
 244                                 insn(ireg);
 245                                 increment_counter(cycles[ireg]);
 246                         }
 247                 } while(one_more_insn);
 248         }
 249
 250         // check interrupt
 251         if(int_state & NMI_REQ_BIT) {
 252                 wai_state &= ~HD6301_SLP;
 253                 int_state &= ~NMI_REQ_BIT;
 254                 enter_interrupt(0xfffc);
 255         } else if(int_state & INT_REQ_BIT) {
 256                 wai_state &= ~HD6301_SLP;
 257                 if(!(CC & 0x10)) {
 258                         int_state &= ~INT_REQ_BIT;
 259                         enter_interrupt(0xfff8);
 260                 }
 261         }
 262 }
 263
 264 //#ifdef USE_DEBUGGER
 265 void MC6800::write_debug_data8(uint32_t addr, uint32_t data)
 266 {
 267         int wait;
 268         if(d_mem_stored == NULL) return;
 269         d_mem_stored->write_data8w(addr, data, &wait);
 270 }
 271
 272 uint32_t MC6800::read_debug_data8(uint32_t addr)
 273 {
 274         int wait;
 275         if(d_mem_stored == NULL) return 0xff;
 276         return d_mem_stored->read_data8w(addr, &wait);
 277 }
 278
 279 void MC6800::write_debug_data16(uint32_t addr, uint32_t data)
 280 {
 281         if(d_mem_stored == NULL) return;
 282         write_debug_data8(addr, (data >> 8) & 0xff);
 283         write_debug_data8(addr + 1, data & 0xff);
 284 }
 285
 286 uint32_t MC6800::read_debug_data16(uint32_t addr)
 287 {
 288         if(d_mem_stored == NULL) return 0xffff;
 289         uint32_t val = read_debug_data8(addr) << 8;
 290         val |= read_debug_data8(addr + 1);
 291         return val;
 292 }
 293
 294 void MC6800::write_debug_data32(uint32_t addr, uint32_t data)
 295 {
 296         if(d_mem_stored == NULL) return;
 297         write_debug_data16(addr, (data >> 16) & 0xffff);
 298         write_debug_data16(addr + 2, data & 0xffff);
 299 }
 300
 301 uint32_t MC6800::read_debug_data32(uint32_t addr)
 302 {
 303         if(d_mem_stored == NULL) return 0xffffffff;
 304         uint32_t val = read_debug_data16(addr) << 16;
 305         val |= read_debug_data16(addr + 2);
 306         return val;
 307 }
 308
 309 bool MC6800::write_debug_reg(const _TCHAR *reg, uint32_t data)
 310 {
 311         if(_tcsicmp(reg, _T("A")) == 0) {
 312                 A = data;
 313         } else if(_tcsicmp(reg, _T("B")) == 0) {
 314                 B = data;
 315         } else if(_tcsicmp(reg, _T("X")) == 0 || _tcsicmp(reg, _T("IX")) == 0) {
 316                 X = data;
 317         } else if(_tcsicmp(reg, _T("PC")) == 0) {
 318                 PC = data;
 319         } else if(_tcsicmp(reg, _T("SP")) == 0) {
 320                 S = data;
 321         } else {
 322                 return false;
 323         }
 324         return true;
 325 }
 326
 327 bool MC6800::get_debug_regs_info(_TCHAR *buffer, size_t buffer_len)
 328 {
 329         my_stprintf_s(buffer, buffer_len,
 330         _T("CCR = [%c%c%c%c%c%c]  A = %02X  B = %02X  IX = %04X  PC = %04X  SP = %04X\n")
 331         _T("Clocks = %llu (%llu) Since Scanline = %d/%d (%d/%d)"),
 332           (CC & 0x01) ? _T('C') : _T('-'), (CC & 0x02) ? _T('V') : _T('-'), (CC & 0x04) ? _T('Z') : _T('-'), (CC & 0x08) ? _T('N') : _T('-'),
 333   (CC & 0x10) ? _T('I') : _T('-'), (CC & 0x20) ? _T('X') : _T('-'), A, B, X, PC, S,
 334         total_icount, total_icount - prev_total_icount,
 335         get_passed_clock_since_vline(), get_cur_vline_clocks(), get_cur_vline(), get_lines_per_frame());
 336
 337         prev_total_icount = total_icount;
 338         return true;
 339 }
 340
 341 /*
 342  *   A quick-hack 6803/6808 disassembler
 343  *
 344  *   Note: this is not the good and proper way to disassemble anything, but it works
 345  *
 346  *   I'm afraid to put my name on it, but I feel obligated:
 347  *   This code written by Aaron Giles (agiles@sirius.com) for the MAME project
 348  *
 349  * History:
 350  * 990314 HJB
 351  * The disassembler knows about valid opcodes for M6800/1/2/3/8 and HD63701.
 352  * 990302 HJB
 353  * Changed the string array into a table of opcode names (or tokens) and
 354  * argument types. This second try should give somewhat better results.
 355  * Named the undocumented HD63701YO opcodes $12 and $13 'asx1' and 'asx2',
 356  * since 'add contents of stack to x register' is what they do.
 357  *
 358  */
 359
 360 enum addr_mode {
 361         inh,    /* inherent */
 362         rel,    /* relative */
 363         imb,    /* immediate (byte) */
 364         imw,    /* immediate (word) */
 365         dir,    /* direct address */
 366         imd,    /* HD63701YO: immediate, direct address */
 367         ext,    /* extended address */
 368         idx,    /* x + byte offset */
 369         imx,    /* HD63701YO: immediate, x + byte offset */
 370         sx1     /* HD63701YO: undocumented opcodes: byte from (s+1) */
 371 };
 372
 373 enum op_names {
 374         aba=0,  abx,    adca,   adcb,   adda,   addb,   addd,   aim,
 375         anda,   andb,   asl,    asla,   aslb,   asld,   asr,    asra,
 376         asrb,   bcc,    bcs,    beq,    bge,    bgt,    bhi,    bita,
 377         bitb,   ble,    bls,    blt,    bmi,    bne,    bpl,    bra,
 378         brn,    bsr,    bvc,    bvs,    cba,    clc,    cli,    clr,
 379         clra,   clrb,   clv,    cmpa,   cmpb,   cmpx,   com,    coma,
 380         comb,   daa,    dec,    deca,   decb,   des,    dex,    eim,
 381         eora,   eorb,   ill,    inc,    inca,   incb,   ins,    inx,
 382         jmp,    jsr,    lda,    ldb,    ldd,    lds,    ldx,    lsr,
 383         lsra,   lsrb,   lsrd,   mul,    neg,    nega,   negb,   nop,
 384         oim,    ora,    orb,    psha,   pshb,   pshx,   pula,   pulb,
 385         pulx,   rol,    rola,   rolb,   ror,    rora,   rorb,   rti,
 386         rts,    sba,    sbca,   sbcb,   sec,    sev,    sta,    stb,
 387         _std,   sei,    sts,    stx,    suba,   subb,   subd,   swi,
 388         wai,    tab,    tap,    tba,    tim,    tpa,    tst,    tsta,
 389         tstb,   tsx,    txs,    asx1,   asx2,   xgdx,   addx,   adcx
 390 };
 391
 392 static const char *const op_name_str[] = {
 393         "aba",   "abx",   "adca",  "adcb",  "adda",  "addb",  "addd",  "aim",
 394         "anda",  "andb",  "asl",   "asla",  "aslb",  "asld",  "asr",   "asra",
 395         "asrb",  "bcc",   "bcs",   "beq",   "bge",   "bgt",   "bhi",   "bita",
 396         "bitb",  "ble",   "bls",   "blt",   "bmi",   "bne",   "bpl",   "bra",
 397         "brn",   "bsr",   "bvc",   "bvs",   "cba",   "clc",   "cli",   "clr",
 398         "clra",  "clrb",  "clv",   "cmpa",  "cmpb",  "cmpx",  "com",   "coma",
 399         "comb",  "daa",   "dec",   "deca",  "decb",  "des",   "dex",   "eim",
 400         "eora",  "eorb",  "illegal","inc",   "inca",  "incb",  "ins",   "inx",
 401         "jmp",   "jsr",   "lda",   "ldb",   "ldd",   "lds",   "ldx",   "lsr",
 402         "lsra",  "lsrb",  "lsrd",  "mul",   "neg",   "nega",  "negb",  "nop",
 403         "oim",   "ora",   "orb",   "psha",  "pshb",  "pshx",  "pula",  "pulb",
 404         "pulx",  "rol",   "rola",  "rolb",  "ror",   "rora",  "rorb",  "rti",
 405         "rts",   "sba",   "sbca",  "sbcb",  "sec",   "sev",   "sta",   "stb",
 406         "std",   "sei",   "sts",   "stx",   "suba",  "subb",  "subd",  "swi",
 407         "wai",   "tab",   "tap",   "tba",   "tim",   "tpa",   "tst",   "tsta",
 408         "tstb",  "tsx",   "txs",   "asx1",  "asx2",  "xgdx",  "addx",  "adcx"
 409 };
 410
 411 /*
 412  * This table defines the opcodes:
 413  * byte meaning
 414  * 0    token (menmonic)
 415  * 1    addressing mode
 416  * 2    invalid opcode for 1:6800/6802/6808, 2:6801/6803, 4:HD63701
 417  */
 418
 419 static const UINT8 table[0x102][3] = {
 420         {ill, inh,7},{nop, inh,0},{ill, inh,7},{ill, inh,7},/* 00 */
 421         {lsrd,inh,1},{asld,inh,1},{tap, inh,0},{tpa, inh,0},
 422         {inx, inh,0},{dex, inh,0},{clv, inh,0},{sev, inh,0},
 423         {clc, inh,0},{sec, inh,0},{cli, inh,0},{sei, inh,0},
 424         {sba, inh,0},{cba, inh,0},{asx1,sx1,0},{asx2,sx1,0},/* 10 */
 425         {ill, inh,7},{ill, inh,7},{tab, inh,0},{tba, inh,0},
 426         {xgdx,inh,3},{daa, inh,0},{ill, inh,7},{aba, inh,0},
 427         {ill, inh,7},{ill, inh,7},{ill, inh,7},{ill, inh,7},
 428         {bra, rel,0},{brn, rel,0},{bhi, rel,0},{bls, rel,0},/* 20 */
 429         {bcc, rel,0},{bcs, rel,0},{bne, rel,0},{beq, rel,0},
 430         {bvc, rel,0},{bvs, rel,0},{bpl, rel,0},{bmi, rel,0},
 431         {bge, rel,0},{blt, rel,0},{bgt, rel,0},{ble, rel,0},
 432         {tsx, inh,0},{ins, inh,0},{pula,inh,0},{pulb,inh,0},/* 30 */
 433         {des, inh,0},{txs, inh,0},{psha,inh,0},{pshb,inh,0},
 434         {pulx,inh,1},{rts, inh,0},{abx, inh,1},{rti, inh,0},
 435         {pshx,inh,1},{mul, inh,1},{wai, inh,0},{swi, inh,0},
 436         {nega,inh,0},{ill, inh,7},{ill, inh,7},{coma,inh,0},/* 40 */
 437         {lsra,inh,0},{ill, inh,7},{rora,inh,0},{asra,inh,0},
 438         {asla,inh,0},{rola,inh,0},{deca,inh,0},{ill, inh,7},
 439         {inca,inh,0},{tsta,inh,0},{ill, inh,7},{clra,inh,0},
 440         {negb,inh,0},{ill, inh,7},{ill, inh,7},{comb,inh,0},/* 50 */
 441         {lsrb,inh,0},{ill, inh,7},{rorb,inh,0},{asrb,inh,0},
 442         {aslb,inh,0},{rolb,inh,0},{decb,inh,0},{ill, inh,7},
 443         {incb,inh,0},{tstb,inh,0},{ill, inh,7},{clrb,inh,0},
 444         {neg, idx,0},{aim, imx,3},{oim, imx,3},{com, idx,0},/* 60 */
 445         {lsr, idx,0},{eim, imx,3},{ror, idx,0},{asr, idx,0},
 446         {asl, idx,0},{rol, idx,0},{dec, idx,0},{tim, imx,3},
 447         {inc, idx,0},{tst, idx,0},{jmp, idx,0},{clr, idx,0},
 448         {neg, ext,0},{aim, imd,3},{oim, imd,3},{com, ext,0},/* 70 */
 449         {lsr, ext,0},{eim, imd,3},{ror, ext,0},{asr, ext,0},
 450         {asl, ext,0},{rol, ext,0},{dec, ext,0},{tim, imd,3},
 451         {inc, ext,0},{tst, ext,0},{jmp, ext,0},{clr, ext,0},
 452         {suba,imb,0},{cmpa,imb,0},{sbca,imb,0},{subd,imw,1},/* 80 */
 453         {anda,imb,0},{bita,imb,0},{lda, imb,0},{sta, imb,0},
 454         {eora,imb,0},{adca,imb,0},{ora, imb,0},{adda,imb,0},
 455         {cmpx,imw,0},{bsr, rel,0},{lds, imw,0},{sts, imw,0},
 456         {suba,dir,0},{cmpa,dir,0},{sbca,dir,0},{subd,dir,1},/* 90 */
 457         {anda,dir,0},{bita,dir,0},{lda, dir,0},{sta, dir,0},
 458         {eora,dir,0},{adca,dir,0},{ora, dir,0},{adda,dir,0},
 459         {cmpx,dir,0},{jsr, dir,0},{lds, dir,0},{sts, dir,0},
 460         {suba,idx,0},{cmpa,idx,0},{sbca,idx,0},{subd,idx,1},/* a0 */
 461         {anda,idx,0},{bita,idx,0},{lda, idx,0},{sta, idx,0},
 462         {eora,idx,0},{adca,idx,0},{ora, idx,0},{adda,idx,0},
 463         {cmpx,idx,0},{jsr, idx,0},{lds, idx,0},{sts, idx,0},
 464         {suba,ext,0},{cmpa,ext,0},{sbca,ext,0},{subd,ext,1},/* b0 */
 465         {anda,ext,0},{bita,ext,0},{lda, ext,0},{sta, ext,0},
 466         {eora,ext,0},{adca,ext,0},{ora, ext,0},{adda,ext,0},
 467         {cmpx,ext,0},{jsr, ext,0},{lds, ext,0},{sts, ext,0},
 468         {subb,imb,0},{cmpb,imb,0},{sbcb,imb,0},{addd,imw,1},/* c0 */
 469         {andb,imb,0},{bitb,imb,0},{ldb, imb,0},{stb, imb,0},
 470         {eorb,imb,0},{adcb,imb,0},{orb, imb,0},{addb,imb,0},
 471         {ldd, imw,1},{_std,imw,1},{ldx, imw,0},{stx, imw,0},
 472         {subb,dir,0},{cmpb,dir,0},{sbcb,dir,0},{addd,dir,1},/* d0 */
 473         {andb,dir,0},{bitb,dir,0},{ldb, dir,0},{stb, dir,0},
 474         {eorb,dir,0},{adcb,dir,0},{orb, dir,0},{addb,dir,0},
 475         {ldd, dir,1},{_std,dir,1},{ldx, dir,0},{stx, dir,0},
 476         {subb,idx,0},{cmpb,idx,0},{sbcb,idx,0},{addd,idx,1},/* e0 */
 477         {andb,idx,0},{bitb,idx,0},{ldb, idx,0},{stb, idx,0},
 478         {eorb,idx,0},{adcb,idx,0},{orb, idx,0},{addb,idx,0},
 479         {ldd, idx,1},{_std,idx,1},{ldx, idx,0},{stx, idx,0},
 480         {subb,ext,0},{cmpb,ext,0},{sbcb,ext,0},{addd,ext,1},/* f0 */
 481         {andb,ext,0},{bitb,ext,0},{ldb, ext,0},{stb, ext,0},
 482         {eorb,ext,0},{adcb,ext,0},{orb, ext,0},{addb,ext,0},
 483         {ldd, ext,1},{_std,ext,1},{ldx, ext,0},{stx, ext,0},
 484
 485         /* extra instruction $fc for NSC-8105 */
 486         {addx,ext,0},
 487         /* extra instruction $ec for NSC-8105 */
 488         {adcx,imb,0}
 489 };
 490
 491 /* some macros to keep things short */
 492 #define OP      oprom[0]
 493 #define ARG1    opram[1]
 494 #define ARG2    opram[2]
 495 #define ARGW    (opram[1]<<8) + opram[2]
 496
 497 unsigned MC6800::Dasm680x(int subtype, _TCHAR *buf, unsigned pc, const UINT8 *oprom, const UINT8 *opram, symbol_t *first_symbol)
 498 {
 499 //      UINT32 flags = 0;
 500         int invalid_mask;
 501         int code = OP;
 502         UINT8 opcode, args, invalid;
 503
 504         switch( subtype )
 505         {
 506                 case 6800: case 6802: case 6808: case 8105:
 507                         invalid_mask = 1;
 508                         break;
 509                 case 6801: case 6803:
 510                         invalid_mask = 2;
 511                         break;
 512                 default:
 513                         invalid_mask = 4;
 514         }
 515
 516         /* NSC-8105 is a special case */
 517         if (subtype == 8105)
 518         {
 519                 /* swap bits */
 520                 code = (code & 0x3c) | ((code & 0x41) << 1) | ((code & 0x82) >> 1);
 521
 522                 /* and check for extra instruction */
 523                 if (code == 0xfc)  code = 0x0100;
 524                 if (code == 0xec)  code = 0x0101;
 525         }
 526
 527         opcode = table[code][0];
 528         args = table[code][1];
 529         invalid = table[code][2];
 530
 531 //      if (opcode == bsr || opcode == jsr) {
 532 //              flags = DASMFLAG_STEP_OVER;
 533 //      } else if (opcode == rti || opcode == rts) {
 534 //              flags = DASMFLAG_STEP_OUT;
 535 //      }
 536
 537         if ( invalid & invalid_mask )   /* invalid for this cpu type ? */
 538         {
 539                 _tcscpy(buf, _T("illegal"));
 540                 return 1;// | flags | DASMFLAG_SUPPORTED;
 541         }
 542
 543         buf += _stprintf(buf, _T("%-5s"), op_name_str[opcode]);
 544
 545         switch( args )
 546         {
 547                 case rel:  /* relative */
 548                         _stprintf (buf, _T("%s"), get_value_or_symbol(first_symbol, _T("$%04X"), pc + (INT8)ARG1 + 2));
 549                         return 2;// | flags | DASMFLAG_SUPPORTED;
 550                 case imb:  /* immediate (byte) */
 551                         _stprintf (buf, _T("#$%02X"), ARG1);
 552                         return 2;// | flags | DASMFLAG_SUPPORTED;
 553                 case imw:  /* immediate (word) */
 554                         _stprintf (buf, _T("#%s"), get_value_or_symbol(first_symbol, _T("$%04X"), ARGW));
 555                         return 3;// | flags | DASMFLAG_SUPPORTED;
 556                 case idx:  /* indexed + byte offset */
 557                         _stprintf (buf, _T("(x+$%02X)"), ARG1 );
 558                         return 2;// | flags | DASMFLAG_SUPPORTED;
 559                 case imx:  /* immediate, indexed + byte offset */
 560                         _stprintf (buf, _T("#$%02X,(x+$%02x)"), ARG1, ARG2 );
 561                         return 3;// | flags | DASMFLAG_SUPPORTED;
 562                 case dir:  /* direct address */
 563                         _stprintf (buf, _T("$%02X"), ARG1 );
 564                         return 2;// | flags | DASMFLAG_SUPPORTED;
 565                 case imd:  /* immediate, direct address */
 566                         _stprintf (buf, _T("#$%02X,$%02X"), ARG1, ARG2);
 567                         return 3;// | flags | DASMFLAG_SUPPORTED;
 568                 case ext:  /* extended address */
 569                         _stprintf (buf, _T("%s"), get_value_or_symbol(first_symbol, _T("$%04X"), ARGW));
 570                         return 3;// | flags | DASMFLAG_SUPPORTED;
 571                 case sx1:  /* byte from address (s + 1) */
 572                         _stprintf (buf, _T("(s+1)"));
 573                         return 1;// | flags | DASMFLAG_SUPPORTED;
 574                 default:
 575                         return 1;// | flags | DASMFLAG_SUPPORTED;
 576         }
 577 }
 578
 579 int MC6800::debug_dasm(uint32_t pc, _TCHAR *buffer, size_t buffer_len)
 580 {
 581         uint8_t ops[4];
 582         if(d_mem_stored != NULL) {
 583                 for(int i = 0; i < 4; i++) {
 584                         int wait;
 585                         ops[i] = d_mem_stored->read_data8w(pc + i, &wait);
 586                 }
 587         }
 588 //#if defined(HAS_MC6800)
 589         return Dasm680x(6800, buffer, pc, ops, ops, d_debugger->first_symbol);
 590 //#elif defined(HAS_MC6801)
 591 //      return Dasm680x(6801, buffer, pc, ops, ops, d_debugger->first_symbol);
 592 //#elif defined(HAS_HD6301)
 593 //      return Dasm680x(6301, buffer, pc, ops, ops, d_debugger->first_symbol);
 594 //#elif defined(HAS_MB8861)
 595 //      return Dasm680x(6800, buffer, pc, ops, ops, d_debugger->first_symbol);  // FIXME
 596 //#endif
 597         return 0;
 598 }
 599 //#endif
 600
 601 void MC6800::enter_interrupt(uint16_t irq_vector)
 602 {
 603         if(wai_state & MC6800_WAI) {
 604                 total_icount += 4;
 605                 icount -= 4;
 606                 wai_state &= ~MC6800_WAI;
 607         } else {
 608                 PUSHWORD(pPC);
 609                 PUSHWORD(pX);
 610                 PUSHBYTE(A);
 611                 PUSHBYTE(B);
 612                 PUSHBYTE(CC);
 613                 total_icount += 12;
 614                 icount -= 12;
 615         }
 616         SEI;
 617         PCD = RM16(irq_vector);
 618 }
 619
 620 // opcodes
 621
 622 void MC6800::insn(uint8_t code)
 623 {
 624         switch(code) {
 625         case 0x00: illegal(); break;
 626         case 0x01: nop(); break;
 627         case 0x02: illegal(); break;
 628         case 0x03: illegal(); break;
 629 //#if defined(HAS_MC6801) || defined(HAS_HD6301)
 630 //      case 0x04: lsrd(); break;
 631 //      case 0x05: asld(); break;
 632 //#else
 633         case 0x04: illegal(); break;
 634         case 0x05: illegal(); break;
 635 //#endif
 636         case 0x06: tap(); break;
 637         case 0x07: tpa(); break;
 638         case 0x08: inx(); break;
 639         case 0x09: dex(); break;
 640         case 0x0a: clv(); break;
 641         case 0x0b: sev(); break;
 642         case 0x0c: clc(); break;
 643         case 0x0d: sec(); break;
 644         case 0x0e: cli(); break;
 645         case 0x0f: sei(); break;
 646         case 0x10: sba(); break;
 647         case 0x11: cba(); break;
 648 //#if defined(HAS_HD6301)
 649 //      case 0x12: undoc1(); break;
 650 //      case 0x13: undoc2(); break;
 651 //#else
 652         case 0x12: illegal(); break;
 653         case 0x13: illegal(); break;
 654 //#endif
 655         case 0x14: illegal(); break;
 656         case 0x15: illegal(); break;
 657         case 0x16: tab(); break;
 658         case 0x17: tba(); break;
 659 //#if defined(HAS_HD6301)
 660 //      case 0x18: xgdx(); break;
 661 //#else
 662         case 0x18: illegal(); break;
 663 //#endif
 664         case 0x19: daa(); break;
 665 //#if defined(HAS_HD6301)
 666 //      case 0x1a: slp(); break;
 667 //#else
 668         case 0x1a: illegal(); break;
 669 //#endif
 670         case 0x1b: aba(); break;
 671         case 0x1c: illegal(); break;
 672         case 0x1d: illegal(); break;
 673         case 0x1e: illegal(); break;
 674         case 0x1f: illegal(); break;
 675         case 0x20: bra(); break;
 676         case 0x21: brn(); break;
 677         case 0x22: bhi(); break;
 678         case 0x23: bls(); break;
 679         case 0x24: bcc(); break;
 680         case 0x25: bcs(); break;
 681         case 0x26: bne(); break;
 682         case 0x27: beq(); break;
 683         case 0x28: bvc(); break;
 684         case 0x29: bvs(); break;
 685         case 0x2a: bpl(); break;
 686         case 0x2b: bmi(); break;
 687         case 0x2c: bge(); break;
 688         case 0x2d: blt(); break;
 689         case 0x2e: bgt(); break;
 690         case 0x2f: ble(); break;
 691         case 0x30: tsx(); break;
 692         case 0x31: ins(); break;
 693         case 0x32: pula(); break;
 694         case 0x33: pulb(); break;
 695         case 0x34: des(); break;
 696         case 0x35: txs(); break;
 697         case 0x36: psha(); break;
 698         case 0x37: pshb(); break;
 699 //#if defined(HAS_MC6801) || defined(HAS_HD6301)
 700 //      case 0x38: pulx(); break;
 701 //#else
 702         case 0x38: illegal(); break;
 703 //#endif
 704         case 0x39: rts(); break;
 705 //#if defined(HAS_MC6801) || defined(HAS_HD6301)
 706 //      case 0x3a: abx(); break;
 707 //#else
 708         case 0x3a: illegal(); break;
 709 //#endif
 710         case 0x3b: rti(); break;
 711 //#if defined(HAS_MC6801) || defined(HAS_HD6301)
 712 //      case 0x3c: pshx(); break;
 713 //      case 0x3d: mul(); break;
 714 //#else
 715         case 0x3c: illegal(); break;
 716         case 0x3d: illegal(); break;
 717 //#endif
 718         case 0x3e: wai(); break;
 719         case 0x3f: swi(); break;
 720         case 0x40: nega(); break;
 721         case 0x41: illegal(); break;
 722         case 0x42: illegal(); break;
 723         case 0x43: coma(); break;
 724         case 0x44: lsra(); break;
 725         case 0x45: illegal(); break;
 726         case 0x46: rora(); break;
 727         case 0x47: asra(); break;
 728         case 0x48: asla(); break;
 729         case 0x49: rola(); break;
 730         case 0x4a: deca(); break;
 731         case 0x4b: illegal(); break;
 732         case 0x4c: inca(); break;
 733         case 0x4d: tsta(); break;
 734         case 0x4e: illegal(); break;
 735         case 0x4f: clra(); break;
 736         case 0x50: negb(); break;
 737         case 0x51: illegal(); break;
 738         case 0x52: illegal(); break;
 739         case 0x53: comb(); break;
 740         case 0x54: lsrb(); break;
 741         case 0x55: illegal(); break;
 742         case 0x56: rorb(); break;
 743         case 0x57: asrb(); break;
 744         case 0x58: aslb(); break;
 745         case 0x59: rolb(); break;
 746         case 0x5a: decb(); break;
 747         case 0x5b: illegal(); break;
 748         case 0x5c: incb(); break;
 749         case 0x5d: tstb(); break;
 750         case 0x5e: illegal(); break;
 751         case 0x5f: clrb(); break;
 752         case 0x60: neg_ix(); break;
 753 //#if defined(HAS_HD6301)
 754 //      case 0x61: aim_ix(); break;
 755 //      case 0x62: oim_ix(); break;
 756 //#else
 757         case 0x61: illegal(); break;
 758         case 0x62: illegal(); break;
 759 //#endif
 760         case 0x63: com_ix(); break;
 761         case 0x64: lsr_ix(); break;
 762 //#if defined(HAS_HD6301)
 763 //      case 0x65: eim_ix(); break;
 764 //#else
 765         case 0x65: illegal(); break;
 766 //#endif
 767         case 0x66: ror_ix(); break;
 768         case 0x67: asr_ix(); break;
 769         case 0x68: asl_ix(); break;
 770         case 0x69: rol_ix(); break;
 771         case 0x6a: dec_ix(); break;
 772 //#if defined(HAS_HD6301)
 773 //      case 0x6b: tim_ix(); break;
 774 //#else
 775         case 0x6b: illegal(); break;
 776 //#endif
 777         case 0x6c: inc_ix(); break;
 778         case 0x6d: tst_ix(); break;
 779         case 0x6e: jmp_ix(); break;
 780         case 0x6f: clr_ix(); break;
 781         case 0x70: neg_ex(); break;
 782 //#if defined(HAS_HD6301)
 783 //      case 0x71: aim_di(); break;
 784 //      case 0x72: oim_di(); break;
 785 //#elif defined(HAS_MB8861)
 786 //      case 0x71: nim_ix(); break;
 787 //      case 0x72: oim_ix_mb8861(); break;
 788 //#else
 789         case 0x71: illegal(); break;
 790         case 0x72: illegal(); break;
 791 //#endif
 792         case 0x73: com_ex(); break;
 793         case 0x74: lsr_ex(); break;
 794 //#if defined(HAS_HD6301)
 795 //      case 0x75: eim_di(); break;
 796 //#elif defined(HAS_MB8861)
 797 //      case 0x75: xim_ix(); break;
 798 //#else
 799         case 0x75: illegal(); break;
 800 //#endif
 801         case 0x76: ror_ex(); break;
 802         case 0x77: asr_ex(); break;
 803         case 0x78: asl_ex(); break;
 804         case 0x79: rol_ex(); break;
 805         case 0x7a: dec_ex(); break;
 806 //#if defined(HAS_HD6301)
 807 //      case 0x7b: tim_di(); break;
 808 //#elif defined(HAS_MB8861)
 809 //      case 0x7b: tmm_ix(); break;
 810 //#else
 811         case 0x7b: illegal(); break;
 812 //#endif
 813         case 0x7c: inc_ex(); break;
 814         case 0x7d: tst_ex(); break;
 815         case 0x7e: jmp_ex(); break;
 816         case 0x7f: clr_ex(); break;
 817         case 0x80: suba_im(); break;
 818         case 0x81: cmpa_im(); break;
 819         case 0x82: sbca_im(); break;
 820 //#if defined(HAS_MC6801) || defined(HAS_HD6301)
 821 //      case 0x83: subd_im(); break;
 822 //#else
 823         case 0x83: illegal(); break;
 824 //#endif
 825         case 0x84: anda_im(); break;
 826         case 0x85: bita_im(); break;
 827         case 0x86: lda_im(); break;
 828         case 0x87: sta_im(); break;
 829         case 0x88: eora_im(); break;
 830         case 0x89: adca_im(); break;
 831         case 0x8a: ora_im(); break;
 832         case 0x8b: adda_im(); break;
 833 //#if defined(HAS_MC6801) || defined(HAS_HD6301)
 834 //      case 0x8c: cpx_im (); break;
 835 //#else
 836         case 0x8c: cmpx_im(); break;
 837 //#endif
 838         case 0x8d: bsr(); break;
 839         case 0x8e: lds_im(); break;
 840         case 0x8f: sts_im(); break;
 841         case 0x90: suba_di(); break;
 842         case 0x91: cmpa_di(); break;
 843         case 0x92: sbca_di(); break;
 844 //#if defined(HAS_MC6801) || defined(HAS_HD6301)
 845 //      case 0x93: subd_di(); break;
 846 //#else
 847         case 0x93: illegal(); break;
 848 //#endif
 849         case 0x94: anda_di(); break;
 850         case 0x95: bita_di(); break;
 851         case 0x96: lda_di(); break;
 852         case 0x97: sta_di(); break;
 853         case 0x98: eora_di(); break;
 854         case 0x99: adca_di(); break;
 855         case 0x9a: ora_di(); break;
 856         case 0x9b: adda_di(); break;
 857 //#if defined(HAS_MC6801) || defined(HAS_HD6301)
 858 //      case 0x9c: cpx_di (); break;
 859 //#else
 860         case 0x9c: cmpx_di(); break;
 861 //#endif
 862         case 0x9d: jsr_di(); break;
 863         case 0x9e: lds_di(); break;
 864         case 0x9f: sts_di(); break;
 865         case 0xa0: suba_ix(); break;
 866         case 0xa1: cmpa_ix(); break;
 867         case 0xa2: sbca_ix(); break;
 868 //#if defined(HAS_MC6801) || defined(HAS_HD6301)
 869 //      case 0xa3: subd_ix(); break;
 870 //#else
 871         case 0xa3: illegal(); break;
 872 //#endif
 873         case 0xa4: anda_ix(); break;
 874         case 0xa5: bita_ix(); break;
 875         case 0xa6: lda_ix(); break;
 876         case 0xa7: sta_ix(); break;
 877         case 0xa8: eora_ix(); break;
 878         case 0xa9: adca_ix(); break;
 879         case 0xaa: ora_ix(); break;
 880         case 0xab: adda_ix(); break;
 881 //#if defined(HAS_MC6801) || defined(HAS_HD6301)
 882 //      case 0xac: cpx_ix (); break;
 883 //#else
 884         case 0xac: cmpx_ix(); break;
 885 //#endif
 886         case 0xad: jsr_ix(); break;
 887         case 0xae: lds_ix(); break;
 888         case 0xaf: sts_ix(); break;
 889         case 0xb0: suba_ex(); break;
 890         case 0xb1: cmpa_ex(); break;
 891         case 0xb2: sbca_ex(); break;
 892 //#if defined(HAS_MC6801) || defined(HAS_HD6301)
 893 //      case 0xb3: subd_ex(); break;
 894 //#else
 895         case 0xb3: illegal(); break;
 896 //#endif
 897         case 0xb4: anda_ex(); break;
 898         case 0xb5: bita_ex(); break;
 899         case 0xb6: lda_ex(); break;
 900         case 0xb7: sta_ex(); break;
 901         case 0xb8: eora_ex(); break;
 902         case 0xb9: adca_ex(); break;
 903         case 0xba: ora_ex(); break;
 904         case 0xbb: adda_ex(); break;
 905 //#if defined(HAS_MC6801) || defined(HAS_HD6301)
 906 //      case 0xbc: cpx_ex (); break;
 907 //#else
 908         case 0xbc: cmpx_ex(); break;
 909 //#endif
 910         case 0xbd: jsr_ex(); break;
 911         case 0xbe: lds_ex(); break;
 912         case 0xbf: sts_ex(); break;
 913         case 0xc0: subb_im(); break;
 914         case 0xc1: cmpb_im(); break;
 915         case 0xc2: sbcb_im(); break;
 916 //#if defined(HAS_MC6801) || defined(HAS_HD6301)
 917 //      case 0xc3: addd_im(); break;
 918 //#else
 919         case 0xc3: illegal(); break;
 920 //#endif
 921         case 0xc4: andb_im(); break;
 922         case 0xc5: bitb_im(); break;
 923         case 0xc6: ldb_im(); break;
 924         case 0xc7: stb_im(); break;
 925         case 0xc8: eorb_im(); break;
 926         case 0xc9: adcb_im(); break;
 927         case 0xca: orb_im(); break;
 928         case 0xcb: addb_im(); break;
 929 //#if defined(HAS_MC6801) || defined(HAS_HD6301)
 930 //      case 0xcc: ldd_im(); break;
 931 //      case 0xcd: std_im(); break;
 932 //#else
 933         case 0xcc: illegal(); break;
 934         case 0xcd: illegal(); break;
 935 //#endif
 936         case 0xce: ldx_im(); break;
 937         case 0xcf: stx_im(); break;
 938         case 0xd0: subb_di(); break;
 939         case 0xd1: cmpb_di(); break;
 940         case 0xd2: sbcb_di(); break;
 941 //#if defined(HAS_MC6801) || defined(HAS_HD6301)
 942 //      case 0xd3: addd_di(); break;
 943 //#else
 944         case 0xd3: illegal(); break;
 945 //#endif
 946         case 0xd4: andb_di(); break;
 947         case 0xd5: bitb_di(); break;
 948         case 0xd6: ldb_di(); break;
 949         case 0xd7: stb_di(); break;
 950         case 0xd8: eorb_di(); break;
 951         case 0xd9: adcb_di(); break;
 952         case 0xda: orb_di(); break;
 953         case 0xdb: addb_di(); break;
 954 //#if defined(HAS_MC6801) || defined(HAS_HD6301)
 955 //      case 0xdc: ldd_di(); break;
 956 //      case 0xdd: std_di(); break;
 957 //#else
 958         case 0xdc: illegal(); break;
 959         case 0xdd: illegal(); break;
 960 //#endif
 961         case 0xde: ldx_di(); break;
 962         case 0xdf: stx_di(); break;
 963         case 0xe0: subb_ix(); break;
 964         case 0xe1: cmpb_ix(); break;
 965         case 0xe2: sbcb_ix(); break;
 966 //#if defined(HAS_MC6801) || defined(HAS_HD6301)
 967 //      case 0xe3: addd_ix(); break;
 968 //#else
 969         case 0xe3: illegal(); break;
 970 //#endif
 971         case 0xe4: andb_ix(); break;
 972         case 0xe5: bitb_ix(); break;
 973         case 0xe6: ldb_ix(); break;
 974         case 0xe7: stb_ix(); break;
 975         case 0xe8: eorb_ix(); break;
 976         case 0xe9: adcb_ix(); break;
 977         case 0xea: orb_ix(); break;
 978         case 0xeb: addb_ix(); break;
 979 //#if defined(HAS_MC6801) || defined(HAS_HD6301)
 980 //      case 0xec: ldd_ix(); break;
 981 //      case 0xed: std_ix(); break;
 982 //#elif defined(HAS_MB8861)
 983 //      case 0xec: adx_im(); break;
 984 //      case 0xed: illegal(); break;
 985 //#else
 986         case 0xec: illegal(); break;
 987         case 0xed: illegal(); break;
 988 //#endif
 989         case 0xee: ldx_ix(); break;
 990         case 0xef: stx_ix(); break;
 991         case 0xf0: subb_ex(); break;
 992         case 0xf1: cmpb_ex(); break;
 993         case 0xf2: sbcb_ex(); break;
 994 //#if defined(HAS_MC6801) || defined(HAS_HD6301)
 995 //      case 0xf3: addd_ex(); break;
 996 //#else
 997         case 0xf3: illegal(); break;
 998 //#endif
 999         case 0xf4: andb_ex(); break;
1000         case 0xf5: bitb_ex(); break;
1001         case 0xf6: ldb_ex(); break;
1002         case 0xf7: stb_ex(); break;
1003         case 0xf8: eorb_ex(); break;
1004         case 0xf9: adcb_ex(); break;
1005         case 0xfa: orb_ex(); break;
1006         case 0xfb: addb_ex(); break;
1007 //#if defined(HAS_MC6801) || defined(HAS_HD6301)
1008 //      case 0xfc: ldd_ex(); break;
1009 //      case 0xfd: std_ex(); break;
1010 //#elif defined(HAS_MB8861)
1011 //      case 0xfc: adx_ex(); break;
1012 //      case 0xfd: illegal(); break;
1013 //#else
1014         case 0xfc: illegal(); break;
1015         case 0xfd: illegal(); break;
1016 //#endif
1017         case 0xfe: ldx_ex(); break;
1018         case 0xff: stx_ex(); break;
1019 #if defined(_MSC_VER) && (_MSC_VER >= 1200)
1020         default: __assume(0);
1021 #endif
1022         }
1023 }
1024
1025 /* operate one instruction for */
1026 #define ONE_MORE_INSN() { \
1027         uint8_t ireg = M_RDOP(PCD); \
1028         prevpc = PC; \
1029         PC++; \
1030         insn(ireg); \
1031         increment_counter(cycles[ireg]); \
1032 }
1033
1034 /* $00 ILLEGAL */
1035 void MC6800::illegal()
1036 {
1037 //#ifdef HAS_HD6301
1038 //      TAKE_TRAP;
1039 //#endif
1040 }
1041
1042 /* $01 NOP */
1043 void MC6800::nop()
1044 {
1045
1046 }
1047
1048 /* $02 ILLEGAL */
1049
1050 /* $03 ILLEGAL */
1051
1052
1053 /* $06 TAP inherent ##### */
1054 void MC6800::tap()
1055 {
1056         CC = A;
1057 //      ONE_MORE_INSN();
1058         one_more_insn = true;
1059 }
1060
1061 /* $07 TPA inherent ----- */
1062 void MC6800::tpa()
1063 {
1064         A = CC;
1065 }
1066
1067 /* $08 INX inherent --*-- */
1068 void MC6800::inx()
1069 {
1070         ++X;
1071         CLR_Z;
1072         SET_Z16(X);
1073 }
1074
1075 /* $09 DEX inherent --*-- */
1076 void MC6800::dex()
1077 {
1078         --X;
1079         CLR_Z;
1080         SET_Z16(X);
1081 }
1082
1083 /* $0a CLV */
1084 void MC6800::clv()
1085 {
1086         CLV;
1087 }
1088
1089 /* $0b SEV */
1090 void MC6800::sev()
1091 {
1092         SEV;
1093 }
1094
1095 /* $0c CLC */
1096 void MC6800::clc()
1097 {
1098         CLC;
1099 }
1100
1101 /* $0d SEC */
1102 void MC6800::sec()
1103 {
1104         SEC;
1105 }
1106
1107 /* $0e CLI */
1108 void MC6800::cli()
1109 {
1110         CLI;
1111 //      ONE_MORE_INSN();
1112         one_more_insn = true;
1113 }
1114
1115 /* $0f SEI */
1116 void MC6800::sei()
1117 {
1118         SEI;
1119 //      ONE_MORE_INSN();
1120         one_more_insn = true;
1121 }
1122
1123 /* $10 SBA inherent -**** */
1124 void MC6800::sba()
1125 {
1126         uint16_t t;
1127         t = A - B;
1128         CLR_NZVC;
1129         SET_FLAGS8(A, B, t);
1130         A = (uint8_t)t;
1131 }
1132
1133 /* $11 CBA inherent -**** */
1134 void MC6800::cba()
1135 {
1136         uint16_t t;
1137         t = A - B;
1138         CLR_NZVC;
1139         SET_FLAGS8(A, B, t);
1140 }
1141
1142 /* $14 ILLEGAL */
1143
1144 /* $15 ILLEGAL */
1145
1146 /* $16 TAB inherent -**0- */
1147 void MC6800::tab()
1148 {
1149         B=A;
1150         CLR_NZV;
1151         SET_NZ8(B);
1152 }
1153
1154 /* $17 TBA inherent -**0- */
1155 void MC6800::tba()
1156 {
1157         A = B;
1158         CLR_NZV;
1159         SET_NZ8(A);
1160 }
1161
1162
1163 /* $19 DAA inherent (A) -**0* */
1164 void MC6800::daa()
1165 {
1166         uint8_t msn, lsn;
1167         uint16_t t, cf = 0;
1168         msn = A & 0xf0;
1169         lsn = A & 0x0f;
1170         if(lsn > 0x09 || CC & 0x20) {
1171                 cf |= 0x06;
1172         }
1173         if(msn > 0x80 && lsn > 0x09) {
1174                 cf |= 0x60;
1175         }
1176         if(msn > 0x90 || (CC & 0x01)) {
1177                 cf |= 0x60;
1178         }
1179         t = cf + A;
1180         CLR_NZV; /* keep carry from previous operation */
1181         SET_NZ8((uint8_t)t);
1182         SET_C8(t);
1183         A = (uint8_t)t;
1184 }
1185
1186 /* $1a ILLEGAL */
1187
1188
1189 /* $1b ABA inherent ***** */
1190 void MC6800::aba()
1191 {
1192         uint16_t t;
1193         t = A + B;
1194         CLR_HNZVC;
1195         SET_FLAGS8(A, B, t);
1196         SET_H(A, B, t);
1197         A = (uint8_t)t;
1198 }
1199
1200 /* $1c ILLEGAL */
1201
1202 /* $1d ILLEGAL */
1203
1204 /* $1e ILLEGAL */
1205
1206 /* $1f ILLEGAL */
1207
1208 /* $20 BRA relative ----- */
1209 void MC6800::bra()
1210 {
1211         uint8_t t;
1212         IMMBYTE(t);
1213         PC += SIGNED(t);
1214 }
1215
1216 /* $21 BRN relative ----- */
1217 void MC6800::brn()
1218 {
1219         uint8_t t;
1220         IMMBYTE(t);
1221 }
1222
1223 /* $22 BHI relative ----- */
1224 void MC6800::bhi()
1225 {
1226         uint8_t t;
1227         BRANCH(!(CC & 0x05));
1228 }
1229
1230 /* $23 BLS relative ----- */
1231 void MC6800::bls()
1232 {
1233         uint8_t t;
1234         BRANCH(CC & 0x05);
1235 }
1236
1237 /* $24 BCC relative ----- */
1238 void MC6800::bcc()
1239 {
1240         uint8_t t;
1241         BRANCH(!(CC & 0x01));
1242 }
1243
1244 /* $25 BCS relative ----- */
1245 void MC6800::bcs()
1246 {
1247         uint8_t t;
1248         BRANCH(CC & 0x01);
1249 }
1250
1251 /* $26 BNE relative ----- */
1252 void MC6800::bne()
1253 {
1254         uint8_t t;
1255         BRANCH(!(CC & 0x04));
1256 }
1257
1258 /* $27 BEQ relative ----- */
1259 void MC6800::beq()
1260 {
1261         uint8_t t;
1262         BRANCH(CC & 0x04);
1263 }
1264
1265 /* $28 BVC relative ----- */
1266 void MC6800::bvc()
1267 {
1268         uint8_t t;
1269         BRANCH(!(CC & 0x02));
1270 }
1271
1272 /* $29 BVS relative ----- */
1273 void MC6800::bvs()
1274 {
1275         uint8_t t;
1276         BRANCH(CC & 0x02);
1277 }
1278
1279 /* $2a BPL relative ----- */
1280 void MC6800::bpl()
1281 {
1282         uint8_t t;
1283         BRANCH(!(CC & 0x08));
1284 }
1285
1286 /* $2b BMI relative ----- */
1287 void MC6800::bmi()
1288 {
1289         uint8_t t;
1290         BRANCH(CC & 0x08);
1291 }
1292
1293 /* $2c BGE relative ----- */
1294 void MC6800::bge()
1295 {
1296         uint8_t t;
1297         BRANCH(!NXORV);
1298 }
1299
1300 /* $2d BLT relative ----- */
1301 void MC6800::blt()
1302 {
1303         uint8_t t;
1304         BRANCH(NXORV);
1305 }
1306
1307 /* $2e BGT relative ----- */
1308 void MC6800::bgt()
1309 {
1310         uint8_t t;
1311         BRANCH(!(NXORV||CC & 0x04));
1312 }
1313
1314 /* $2f BLE relative ----- */
1315 void MC6800::ble()
1316 {
1317         uint8_t t;
1318         BRANCH(NXORV||CC & 0x04);
1319 }
1320
1321 /* $30 TSX inherent ----- */
1322 void MC6800::tsx()
1323 {
1324         X = (S + 1);
1325 }
1326
1327 /* $31 INS inherent ----- */
1328 void MC6800::ins()
1329 {
1330         ++S;
1331 }
1332
1333 /* $32 PULA inherent ----- */
1334 void MC6800::pula()
1335 {
1336         PULLBYTE(A);
1337 }
1338
1339 /* $33 PULB inherent ----- */
1340 void MC6800::pulb()
1341 {
1342         PULLBYTE(B);
1343 }
1344
1345 /* $34 DES inherent ----- */
1346 void MC6800::des()
1347 {
1348         --S;
1349 }
1350
1351 /* $35 TXS inherent ----- */
1352 void MC6800::txs()
1353 {
1354         S = (X - 1);
1355 }
1356
1357 /* $36 PSHA inherent ----- */
1358 void MC6800::psha()
1359 {
1360         PUSHBYTE(A);
1361 }
1362
1363 /* $37 PSHB inherent ----- */
1364 void MC6800::pshb()
1365 {
1366         PUSHBYTE(B);
1367 }
1368
1369
1370 /* $39 RTS inherent ----- */
1371 void MC6800::rts()
1372 {
1373         PULLWORD(pPC);
1374 }
1375
1376
1377 /* $3b RTI inherent ##### */
1378 void MC6800::rti()
1379 {
1380         PULLBYTE(CC);
1381         PULLBYTE(B);
1382         PULLBYTE(A);
1383         PULLWORD(pX);
1384         PULLWORD(pPC);
1385 }
1386
1387
1388 /* $3e WAI inherent ----- */
1389 void MC6800::wai()
1390 {
1391         /*
1392          * WAI stacks the entire machine state on the
1393          * hardware stack, then waits for an interrupt.
1394          */
1395         wai_state |= MC6800_WAI;
1396         PUSHWORD(pPC);
1397         PUSHWORD(pX);
1398         PUSHBYTE(A);
1399         PUSHBYTE(B);
1400         PUSHBYTE(CC);
1401 }
1402
1403 /* $3f SWI absolute indirect ----- */
1404 void MC6800::swi()
1405 {
1406         PUSHWORD(pPC);
1407         PUSHWORD(pX);
1408         PUSHBYTE(A);
1409         PUSHBYTE(B);
1410         PUSHBYTE(CC);
1411         SEI;
1412         PCD = RM16(0xfffa);
1413 }
1414
1415 /* $40 NEGA inherent ?**** */
1416 void MC6800::nega()
1417 {
1418         uint16_t r;
1419         r = -A;
1420         CLR_NZVC;
1421         SET_FLAGS8(0, A, r);
1422         A = (uint8_t)r;
1423 }
1424
1425 /* $41 ILLEGAL */
1426
1427 /* $42 ILLEGAL */
1428
1429 /* $43 COMA inherent -**01 */
1430 void MC6800::coma()
1431 {
1432         A = ~A;
1433         CLR_NZV;
1434         SET_NZ8(A);
1435         SEC;
1436 }
1437
1438 /* $44 LSRA inherent -0*-* */
1439 void MC6800::lsra()
1440 {
1441         CLR_NZC;
1442         CC |= (A & 0x01);
1443         A >>= 1;
1444         SET_Z8(A);
1445 }
1446
1447 /* $45 ILLEGAL */
1448
1449 /* $46 RORA inherent -**-* */
1450 void MC6800::rora()
1451 {
1452         uint8_t r;
1453         r = (CC & 0x01) << 7;
1454         CLR_NZC;
1455         CC |= (A & 0x01);
1456         r |= A >> 1;
1457         SET_NZ8(r);
1458         A = r;
1459 }
1460
1461 /* $47 ASRA inherent ?**-* */
1462 void MC6800::asra()
1463 {
1464         CLR_NZC;
1465         CC |= (A & 0x01);
1466         A >>= 1;
1467         A |= ((A & 0x40) << 1);
1468         SET_NZ8(A);
1469 }
1470
1471 /* $48 ASLA inherent ?**** */
1472 void MC6800::asla()
1473 {
1474         uint16_t r;
1475         r = A << 1;
1476         CLR_NZVC;
1477         SET_FLAGS8(A, A, r);
1478         A = (uint8_t)r;
1479 }
1480
1481 /* $49 ROLA inherent -**** */
1482 void MC6800::rola()
1483 {
1484         uint16_t t, r;
1485         t = A;
1486         r = CC & 0x01;
1487         r |= t << 1;
1488         CLR_NZVC;
1489         SET_FLAGS8(t, t, r);
1490         A = (uint8_t)r;
1491 }
1492
1493 /* $4a DECA inherent -***- */
1494 void MC6800::deca()
1495 {
1496         --A;
1497         CLR_NZV;
1498         SET_FLAGS8D(A);
1499 }
1500
1501 /* $4b ILLEGAL */
1502
1503 /* $4c INCA inherent -***- */
1504 void MC6800::inca()
1505 {
1506         ++A;
1507         CLR_NZV;
1508         SET_FLAGS8I(A);
1509 }
1510
1511 /* $4d TSTA inherent -**0- */
1512 void MC6800::tsta()
1513 {
1514         CLR_NZVC;
1515         SET_NZ8(A);
1516 }
1517
1518 /* $4e ILLEGAL */
1519
1520 /* $4f CLRA inherent -0100 */
1521 void MC6800::clra()
1522 {
1523         A = 0;
1524         CLR_NZVC;
1525         SEZ;
1526 }
1527
1528 /* $50 NEGB inherent ?**** */
1529 void MC6800::negb()
1530 {
1531         uint16_t r;
1532         r = -B;
1533         CLR_NZVC;
1534         SET_FLAGS8(0, B, r);
1535         B = (uint8_t)r;
1536 }
1537
1538 /* $51 ILLEGAL */
1539
1540 /* $52 ILLEGAL */
1541
1542 /* $53 COMB inherent -**01 */
1543 void MC6800::comb()
1544 {
1545         B = ~B;
1546         CLR_NZV;
1547         SET_NZ8(B);
1548         SEC;
1549 }
1550
1551 /* $54 LSRB inherent -0*-* */
1552 void MC6800::lsrb()
1553 {
1554         CLR_NZC;
1555         CC |= (B & 0x01);
1556         B >>= 1;
1557         SET_Z8(B);
1558 }
1559
1560 /* $55 ILLEGAL */
1561
1562 /* $56 RORB inherent -**-* */
1563 void MC6800::rorb()
1564 {
1565         uint8_t r;
1566         r = (CC & 0x01) << 7;
1567         CLR_NZC;
1568         CC |= (B & 0x01);
1569         r |= B >> 1;
1570         SET_NZ8(r);
1571         B = r;
1572 }
1573
1574 /* $57 ASRB inherent ?**-* */
1575 void MC6800::asrb()
1576 {
1577         CLR_NZC;
1578         CC |= (B & 0x01);
1579         B >>= 1;
1580         B |= ((B & 0x40) << 1);
1581         SET_NZ8(B);
1582 }
1583
1584 /* $58 ASLB inherent ?**** */
1585 void MC6800::aslb()
1586 {
1587         uint16_t r;
1588         r = B << 1;
1589         CLR_NZVC;
1590         SET_FLAGS8(B, B, r);
1591         B = (uint8_t)r;
1592 }
1593
1594 /* $59 ROLB inherent -**** */
1595 void MC6800::rolb()
1596 {
1597         uint16_t t, r;
1598         t = B;
1599         r = CC & 0x01;
1600         r |= t << 1;
1601         CLR_NZVC;
1602         SET_FLAGS8(t, t, r);
1603         B = (uint8_t)r;
1604 }
1605
1606 /* $5a DECB inherent -***- */
1607 void MC6800::decb()
1608 {
1609         --B;
1610         CLR_NZV;
1611         SET_FLAGS8D(B);
1612 }
1613
1614 /* $5b ILLEGAL */
1615
1616 /* $5c INCB inherent -***- */
1617 void MC6800::incb()
1618 {
1619         ++B;
1620         CLR_NZV;
1621         SET_FLAGS8I(B);
1622 }
1623
1624 /* $5d TSTB inherent -**0- */
1625 void MC6800::tstb()
1626 {
1627         CLR_NZVC;
1628         SET_NZ8(B);
1629 }
1630
1631 /* $5e ILLEGAL */
1632
1633 /* $5f CLRB inherent -0100 */
1634 void MC6800::clrb()
1635 {
1636         B=0;
1637         CLR_NZVC;
1638         SEZ;
1639 }
1640
1641 /* $60 NEG indexed ?**** */
1642 void MC6800::neg_ix()
1643 {
1644         uint16_t r, t;
1645         IDXBYTE(t);
1646         r = -t;
1647         CLR_NZVC;
1648         SET_FLAGS8(0, t, r);
1649         WM(EAD, r);
1650 }
1651
1652
1653 /* $63 COM indexed -**01 */
1654 void MC6800::com_ix()
1655 {
1656         uint8_t t;
1657         IDXBYTE(t);
1658         t = ~t;
1659         CLR_NZV;
1660         SET_NZ8(t);
1661         SEC;
1662         WM(EAD, t);
1663 }
1664
1665 /* $64 LSR indexed -0*-* */
1666 void MC6800::lsr_ix()
1667 {
1668         uint8_t t;
1669         IDXBYTE(t);
1670         CLR_NZC;
1671         CC |= (t & 0x01);
1672         t >>= 1;
1673         SET_Z8(t);
1674         WM(EAD, t);
1675 }
1676
1677
1678 /* $66 ROR indexed -**-* */
1679 void MC6800::ror_ix()
1680 {
1681         uint8_t t, r;
1682         IDXBYTE(t);
1683         r = (CC & 0x01) << 7;
1684         CLR_NZC;
1685         CC |= (t & 0x01);
1686         r |= t >> 1;
1687         SET_NZ8(r);
1688         WM(EAD, r);
1689 }
1690
1691 /* $67 ASR indexed ?**-* */
1692 void MC6800::asr_ix()
1693 {
1694         uint8_t t;
1695         IDXBYTE(t);
1696         CLR_NZC;
1697         CC |= (t & 0x01);
1698         t >>= 1;
1699         t |= ((t & 0x40) << 1);
1700         SET_NZ8(t);
1701         WM(EAD, t);
1702 }
1703
1704 /* $68 ASL indexed ?**** */
1705 void MC6800::asl_ix()
1706 {
1707         uint16_t t, r;
1708         IDXBYTE(t);
1709         r = t << 1;
1710         CLR_NZVC;
1711         SET_FLAGS8(t, t, r);
1712         WM(EAD, r);
1713 }
1714
1715 /* $69 ROL indexed -**** */
1716 void MC6800::rol_ix()
1717 {
1718         uint16_t t, r;
1719         IDXBYTE(t);
1720         r = CC & 0x01;
1721         r |= t << 1;
1722         CLR_NZVC;
1723         SET_FLAGS8(t, t, r);
1724         WM(EAD, r);
1725 }
1726
1727 /* $6a DEC indexed -***- */
1728 void MC6800::dec_ix()
1729 {
1730         uint8_t t;
1731         IDXBYTE(t);
1732         --t;
1733         CLR_NZV;
1734         SET_FLAGS8D(t);
1735         WM(EAD, t);
1736 }
1737
1738
1739 /* $6c INC indexed -***- */
1740 void MC6800::inc_ix()
1741 {
1742         uint8_t t;
1743         IDXBYTE(t);
1744         ++t;
1745         CLR_NZV;
1746         SET_FLAGS8I(t);
1747         WM(EAD, t);
1748 }
1749
1750 /* $6d TST indexed -**0- */
1751 void MC6800::tst_ix()
1752 {
1753         uint8_t t;
1754         IDXBYTE(t);
1755         CLR_NZVC;
1756         SET_NZ8(t);
1757 }
1758
1759 /* $6e JMP indexed ----- */
1760 void MC6800::jmp_ix()
1761 {
1762         INDEXED;
1763         PC = EA;
1764 }
1765
1766 /* $6f CLR indexed -0100 */
1767 void MC6800::clr_ix()
1768 {
1769         INDEXED;
1770         WM(EAD, 0);
1771         CLR_NZVC;
1772         SEZ;
1773 }
1774
1775 /* $70 NEG extended ?**** */
1776 void MC6800::neg_ex()
1777 {
1778         uint16_t r, t;
1779         EXTBYTE(t);
1780         r = -t;
1781         CLR_NZVC;
1782         SET_FLAGS8(0, t, r);
1783         WM(EAD, r);
1784 }
1785
1786
1787
1788 /* $73 COM extended -**01 */
1789 void MC6800::com_ex()
1790 {
1791         uint8_t t;
1792         EXTBYTE(t);
1793         t = ~t;
1794         CLR_NZV;
1795         SET_NZ8(t);
1796         SEC;
1797         WM(EAD, t);
1798 }
1799
1800 /* $74 LSR extended -0*-* */
1801 void MC6800::lsr_ex()
1802 {
1803         uint8_t t;
1804         EXTBYTE(t);
1805         CLR_NZC;
1806         CC |= (t & 0x01);
1807         t >>= 1;
1808         SET_Z8(t);
1809         WM(EAD, t);
1810 }
1811
1812
1813
1814 /* $76 ROR extended -**-* */
1815 void MC6800::ror_ex()
1816 {
1817         uint8_t t, r;
1818         EXTBYTE(t);
1819         r = (CC & 0x01) << 7;
1820         CLR_NZC;
1821         CC |= (t & 0x01);
1822         r |= t >> 1;
1823         SET_NZ8(r);
1824         WM(EAD, r);
1825 }
1826
1827 /* $77 ASR extended ?**-* */
1828 void MC6800::asr_ex()
1829 {
1830         uint8_t t;
1831         EXTBYTE(t);
1832         CLR_NZC;
1833         CC |= (t & 0x01);
1834         t >>= 1;
1835         t |= ((t & 0x40) << 1);
1836         SET_NZ8(t);
1837         WM(EAD, t);
1838 }
1839
1840 /* $78 ASL extended ?**** */
1841 void MC6800::asl_ex()
1842 {
1843         uint16_t t, r;
1844         EXTBYTE(t);
1845         r = t << 1;
1846         CLR_NZVC;
1847         SET_FLAGS8(t, t, r);
1848         WM(EAD, r);
1849 }
1850
1851 /* $79 ROL extended -**** */
1852 void MC6800::rol_ex()
1853 {
1854         uint16_t t, r;
1855         EXTBYTE(t);
1856         r = CC & 0x01;
1857         r |= t << 1;
1858         CLR_NZVC;
1859         SET_FLAGS8(t, t, r);
1860         WM(EAD, r);
1861 }
1862
1863 /* $7a DEC extended -***- */
1864 void MC6800::dec_ex()
1865 {
1866         uint8_t t;
1867         EXTBYTE(t);
1868         --t;
1869         CLR_NZV;
1870         SET_FLAGS8D(t);
1871         WM(EAD, t);
1872 }
1873
1874
1875
1876 /* $7c INC extended -***- */
1877 void MC6800::inc_ex()
1878 {
1879         uint8_t t;
1880         EXTBYTE(t);
1881         ++t;
1882         CLR_NZV;
1883         SET_FLAGS8I(t);
1884         WM(EAD, t);
1885 }
1886
1887 /* $7d TST extended -**0- */
1888 void MC6800::tst_ex()
1889 {
1890         uint8_t t;
1891         EXTBYTE(t);
1892         CLR_NZVC;
1893         SET_NZ8(t);
1894 }
1895
1896 /* $7e JMP extended ----- */
1897 void MC6800::jmp_ex()
1898 {
1899         EXTENDED;
1900         PC = EA;
1901 }
1902
1903 /* $7f CLR extended -0100 */
1904 void MC6800::clr_ex()
1905 {
1906         EXTENDED;
1907         WM(EAD, 0);
1908         CLR_NZVC;
1909         SEZ;
1910 }
1911
1912 /* $80 SUBA immediate ?**** */
1913 void MC6800::suba_im()
1914 {
1915         uint16_t t, r;
1916         IMMBYTE(t);
1917         r = A - t;
1918         CLR_NZVC;
1919         SET_FLAGS8(A, t, r);
1920         A = (uint8_t)r;
1921 }
1922
1923 /* $81 CMPA immediate ?**** */
1924 void MC6800::cmpa_im()
1925 {
1926         uint16_t t, r;
1927         IMMBYTE(t);
1928         r = A - t;
1929         CLR_NZVC;
1930         SET_FLAGS8(A, t, r);
1931 }
1932
1933 /* $82 SBCA immediate ?**** */
1934 void MC6800::sbca_im()
1935 {
1936         uint16_t t, r;
1937         IMMBYTE(t);
1938         r = A - t - (CC & 0x01);
1939         CLR_NZVC;
1940         SET_FLAGS8(A, t, r);
1941         A = (uint8_t)r;
1942 }
1943
1944 /* $84 ANDA immediate -**0- */
1945 void MC6800::anda_im()
1946 {
1947         uint8_t t;
1948         IMMBYTE(t);
1949         A &= t;
1950         CLR_NZV;
1951         SET_NZ8(A);
1952 }
1953
1954 /* $85 BITA immediate -**0- */
1955 void MC6800::bita_im()
1956 {
1957         uint8_t t, r;
1958         IMMBYTE(t);
1959         r = A & t;
1960         CLR_NZV;
1961         SET_NZ8(r);
1962 }
1963
1964 /* $86 LDA immediate -**0- */
1965 void MC6800::lda_im()
1966 {
1967         IMMBYTE(A);
1968         CLR_NZV;
1969         SET_NZ8(A);
1970 }
1971
1972 /* is this a legal instruction? */
1973 /* $87 STA immediate -**0- */
1974 void MC6800::sta_im()
1975 {
1976         CLR_NZV;
1977         SET_NZ8(A);
1978         IMM8;
1979         WM(EAD, A);
1980 }
1981
1982 /* $88 EORA immediate -**0- */
1983 void MC6800::eora_im()
1984 {
1985         uint8_t t;
1986         IMMBYTE(t);
1987         A ^= t;
1988         CLR_NZV;
1989         SET_NZ8(A);
1990 }
1991
1992 /* $89 ADCA immediate ***** */
1993 void MC6800::adca_im()
1994 {
1995         uint16_t t, r;
1996         IMMBYTE(t);
1997         r = A + t + (CC & 0x01);
1998         CLR_HNZVC;
1999         SET_FLAGS8(A, t, r);
2000         SET_H(A, t, r);
2001         A = (uint8_t)r;
2002 }
2003
2004 /* $8a ORA immediate -**0- */
2005 void MC6800::ora_im()
2006 {
2007         uint8_t t;
2008         IMMBYTE(t);
2009         A |= t;
2010         CLR_NZV;
2011         SET_NZ8(A);
2012 }
2013
2014 /* $8b ADDA immediate ***** */
2015 void MC6800::adda_im()
2016 {
2017         uint16_t t, r;
2018         IMMBYTE(t);
2019         r = A + t;
2020         CLR_HNZVC;
2021         SET_FLAGS8(A, t, r);
2022         SET_H(A, t, r);
2023         A = (uint8_t)r;
2024 }
2025
2026 /* $8c CMPX immediate -***- */
2027 void MC6800::cmpx_im()
2028 {
2029         uint32_t r, d;
2030         pair32_t b;
2031         IMMWORD(b);
2032         d = X;
2033         r = d - b.d;
2034         CLR_NZV;
2035         SET_NZ16(r);
2036         SET_V16(d, b.d, r);
2037 }
2038
2039
2040 /* $8d BSR ----- */
2041 void MC6800::bsr()
2042 {
2043         uint8_t t;
2044         IMMBYTE(t);
2045         PUSHWORD(pPC);
2046         PC += SIGNED(t);
2047 }
2048
2049 /* $8e LDS immediate -**0- */
2050 void MC6800::lds_im()
2051 {
2052         IMMWORD(pS);
2053         CLR_NZV;
2054         SET_NZ16(S);
2055 }
2056
2057 /* $8f STS immediate -**0- */
2058 void MC6800::sts_im()
2059 {
2060         CLR_NZV;
2061         SET_NZ16(S);
2062         IMM16;
2063         WM16(EAD, &pS);
2064 }
2065
2066 /* $90 SUBA direct ?**** */
2067 void MC6800::suba_di()
2068 {
2069         uint16_t t, r;
2070         DIRBYTE(t);
2071         r = A - t;
2072         CLR_NZVC;
2073         SET_FLAGS8(A, t, r);
2074         A = (uint8_t)r;
2075 }
2076
2077 /* $91 CMPA direct ?**** */
2078 void MC6800::cmpa_di()
2079 {
2080         uint16_t t, r;
2081         DIRBYTE(t);
2082         r = A - t;
2083         CLR_NZVC;
2084         SET_FLAGS8(A, t, r);
2085 }
2086
2087 /* $92 SBCA direct ?**** */
2088 void MC6800::sbca_di()
2089 {
2090         uint16_t t, r;
2091         DIRBYTE(t);
2092         r = A - t - (CC & 0x01);
2093         CLR_NZVC;
2094         SET_FLAGS8(A, t, r);
2095         A = (uint8_t)r;
2096 }
2097
2098 /* $94 ANDA direct -**0- */
2099 void MC6800::anda_di()
2100 {
2101         uint8_t t;
2102         DIRBYTE(t);
2103         A &= t;
2104         CLR_NZV;
2105         SET_NZ8(A);
2106 }
2107
2108 /* $95 BITA direct -**0- */
2109 void MC6800::bita_di()
2110 {
2111         uint8_t t, r;
2112         DIRBYTE(t);
2113         r = A & t;
2114         CLR_NZV;
2115         SET_NZ8(r);
2116 }
2117
2118 /* $96 LDA direct -**0- */
2119 void MC6800::lda_di()
2120 {
2121         DIRBYTE(A);
2122         CLR_NZV;
2123         SET_NZ8(A);
2124 }
2125
2126 /* $97 STA direct -**0- */
2127 void MC6800::sta_di()
2128 {
2129         CLR_NZV;
2130         SET_NZ8(A);
2131         DIRECT;
2132         WM(EAD, A);
2133 }
2134
2135 /* $98 EORA direct -**0- */
2136 void MC6800::eora_di()
2137 {
2138         uint8_t t;
2139         DIRBYTE(t);
2140         A ^= t;
2141         CLR_NZV;
2142         SET_NZ8(A);
2143 }
2144
2145 /* $99 ADCA direct ***** */
2146 void MC6800::adca_di()
2147 {
2148         uint16_t t, r;
2149         DIRBYTE(t);
2150         r = A + t + (CC & 0x01);
2151         CLR_HNZVC;
2152         SET_FLAGS8(A, t, r);
2153         SET_H(A, t, r);
2154         A = (uint8_t)r;
2155 }
2156
2157 /* $9a ORA direct -**0- */
2158 void MC6800::ora_di()
2159 {
2160         uint8_t t;
2161         DIRBYTE(t);
2162         A |= t;
2163         CLR_NZV;
2164         SET_NZ8(A);
2165 }
2166
2167 /* $9b ADDA direct ***** */
2168 void MC6800::adda_di()
2169 {
2170         uint16_t t, r;
2171         DIRBYTE(t);
2172         r = A + t;
2173         CLR_HNZVC;
2174         SET_FLAGS8(A, t, r);
2175         SET_H(A, t, r);
2176         A = (uint8_t)r;
2177 }
2178
2179 /* $9c CMPX direct -***- */
2180 void MC6800::cmpx_di()
2181 {
2182         uint32_t r, d;
2183         pair32_t b;
2184         DIRWORD(b);
2185         d = X;
2186         r = d - b.d;
2187         CLR_NZV;
2188         SET_NZ16(r);
2189         SET_V16(d, b.d, r);
2190 }
2191
2192
2193 /* $9d JSR direct ----- */
2194 void MC6800::jsr_di()
2195 {
2196         DIRECT;
2197         PUSHWORD(pPC);
2198         PC = EA;
2199 }
2200
2201 /* $9e LDS direct -**0- */
2202 void MC6800::lds_di()
2203 {
2204         DIRWORD(pS);
2205         CLR_NZV;
2206         SET_NZ16(S);
2207 }
2208
2209 /* $9f STS direct -**0- */
2210 void MC6800::sts_di()
2211 {
2212         CLR_NZV;
2213         SET_NZ16(S);
2214         DIRECT;
2215         WM16(EAD, &pS);
2216 }
2217
2218 /* $a0 SUBA indexed ?**** */
2219 void MC6800::suba_ix()
2220 {
2221         uint16_t t, r;
2222         IDXBYTE(t);
2223         r = A - t;
2224         CLR_NZVC;
2225         SET_FLAGS8(A, t, r);
2226         A = (uint8_t)r;
2227 }
2228
2229 /* $a1 CMPA indexed ?**** */
2230 void MC6800::cmpa_ix()
2231 {
2232         uint16_t t, r;
2233         IDXBYTE(t);
2234         r = A - t;
2235         CLR_NZVC;
2236         SET_FLAGS8(A, t, r);
2237 }
2238
2239 /* $a2 SBCA indexed ?**** */
2240 void MC6800::sbca_ix()
2241 {
2242         uint16_t t, r;
2243         IDXBYTE(t);
2244         r = A - t - (CC & 0x01);
2245         CLR_NZVC;
2246         SET_FLAGS8(A, t, r);
2247         A = (uint8_t)r;
2248 }
2249
2250
2251 /* $a4 ANDA indexed -**0- */
2252 void MC6800::anda_ix()
2253 {
2254         uint8_t t;
2255         IDXBYTE(t);
2256         A &= t;
2257         CLR_NZV;
2258         SET_NZ8(A);
2259 }
2260
2261 /* $a5 BITA indexed -**0- */
2262 void MC6800::bita_ix()
2263 {
2264         uint8_t t, r;
2265         IDXBYTE(t);
2266         r = A & t;
2267         CLR_NZV;
2268         SET_NZ8(r);
2269 }
2270
2271 /* $a6 LDA indexed -**0- */
2272 void MC6800::lda_ix()
2273 {
2274         IDXBYTE(A);
2275         CLR_NZV;
2276         SET_NZ8(A);
2277 }
2278
2279 /* $a7 STA indexed -**0- */
2280 void MC6800::sta_ix()
2281 {
2282         CLR_NZV;
2283         SET_NZ8(A);
2284         INDEXED;
2285         WM(EAD, A);
2286 }
2287
2288 /* $a8 EORA indexed -**0- */
2289 void MC6800::eora_ix()
2290 {
2291         uint8_t t;
2292         IDXBYTE(t);
2293         A ^= t;
2294         CLR_NZV;
2295         SET_NZ8(A);
2296 }
2297
2298 /* $a9 ADCA indexed ***** */
2299 void MC6800::adca_ix()
2300 {
2301         uint16_t t, r;
2302         IDXBYTE(t);
2303         r = A + t + (CC & 0x01);
2304         CLR_HNZVC;
2305         SET_FLAGS8(A, t, r);
2306         SET_H(A, t, r);
2307         A = (uint8_t)r;
2308 }
2309
2310 /* $aa ORA indexed -**0- */
2311 void MC6800::ora_ix()
2312 {
2313         uint8_t t;
2314         IDXBYTE(t);
2315         A |= t;
2316         CLR_NZV;
2317         SET_NZ8(A);
2318 }
2319
2320 /* $ab ADDA indexed ***** */
2321 void MC6800::adda_ix()
2322 {
2323         uint16_t t, r;
2324         IDXBYTE(t);
2325         r = A + t;
2326         CLR_HNZVC;
2327         SET_FLAGS8(A, t, r);
2328         SET_H(A, t, r);
2329         A = (uint8_t)r;
2330 }
2331
2332 /* $ac CMPX indexed -***- */
2333 void MC6800::cmpx_ix()
2334 {
2335         uint32_t r, d;
2336         pair32_t b;
2337         IDXWORD(b);
2338         d = X;
2339         r = d - b.d;
2340         CLR_NZV;
2341         SET_NZ16(r);
2342         SET_V16(d, b.d, r);
2343 }
2344
2345
2346 /* $ad JSR indexed ----- */
2347 void MC6800::jsr_ix()
2348 {
2349         INDEXED;
2350         PUSHWORD(pPC);
2351         PC = EA;
2352 }
2353
2354 /* $ae LDS indexed -**0- */
2355 void MC6800::lds_ix()
2356 {
2357         IDXWORD(pS);
2358         CLR_NZV;
2359         SET_NZ16(S);
2360 }
2361
2362 /* $af STS indexed -**0- */
2363 void MC6800::sts_ix()
2364 {
2365         CLR_NZV;
2366         SET_NZ16(S);
2367         INDEXED;
2368         WM16(EAD, &pS);
2369 }
2370
2371 /* $b0 SUBA extended ?**** */
2372 void MC6800::suba_ex()
2373 {
2374         uint16_t t, r;
2375         EXTBYTE(t);
2376         r = A - t;
2377         CLR_NZVC;
2378         SET_FLAGS8(A, t, r);
2379         A = (uint8_t)r;
2380 }
2381
2382 /* $b1 CMPA extended ?**** */
2383 void MC6800::cmpa_ex()
2384 {
2385         uint16_t t, r;
2386         EXTBYTE(t);
2387         r = A - t;
2388         CLR_NZVC;
2389         SET_FLAGS8(A, t, r);
2390 }
2391
2392 /* $b2 SBCA extended ?**** */
2393 void MC6800::sbca_ex()
2394 {
2395         uint16_t t, r;
2396         EXTBYTE(t);
2397         r = A - t - (CC & 0x01);
2398         CLR_NZVC;
2399         SET_FLAGS8(A, t, r);
2400         A = (uint8_t)r;
2401 }
2402
2403
2404 /* $b4 ANDA extended -**0- */
2405 void MC6800::anda_ex()
2406 {
2407         uint8_t t;
2408         EXTBYTE(t);
2409         A &= t;
2410         CLR_NZV;
2411         SET_NZ8(A);
2412 }
2413
2414 /* $b5 BITA extended -**0- */
2415 void MC6800::bita_ex()
2416 {
2417         uint8_t t, r;
2418         EXTBYTE(t);
2419         r = A & t;
2420         CLR_NZV;
2421         SET_NZ8(r);
2422 }
2423
2424 /* $b6 LDA extended -**0- */
2425 void MC6800::lda_ex()
2426 {
2427         EXTBYTE(A);
2428         CLR_NZV;
2429         SET_NZ8(A);
2430 }
2431
2432 /* $b7 STA extended -**0- */
2433 void MC6800::sta_ex()
2434 {
2435         CLR_NZV;
2436         SET_NZ8(A);
2437         EXTENDED;
2438         WM(EAD, A);
2439 }
2440
2441 /* $b8 EORA extended -**0- */
2442 void MC6800::eora_ex()
2443 {
2444         uint8_t t;
2445         EXTBYTE(t);
2446         A ^= t;
2447         CLR_NZV;
2448         SET_NZ8(A);
2449 }
2450
2451 /* $b9 ADCA extended ***** */
2452 void MC6800::adca_ex()
2453 {
2454         uint16_t t, r;
2455         EXTBYTE(t);
2456         r = A + t + (CC & 0x01);
2457         CLR_HNZVC;
2458         SET_FLAGS8(A, t, r);
2459         SET_H(A, t, r);
2460         A = (uint8_t)r;
2461 }
2462
2463 /* $ba ORA extended -**0- */
2464 void MC6800::ora_ex()
2465 {
2466         uint8_t t;
2467         EXTBYTE(t);
2468         A |= t;
2469         CLR_NZV;
2470         SET_NZ8(A);
2471 }
2472
2473 /* $bb ADDA extended ***** */
2474 void MC6800::adda_ex()
2475 {
2476         uint16_t t, r;
2477         EXTBYTE(t);
2478         r = A + t;
2479         CLR_HNZVC;
2480         SET_FLAGS8(A, t, r);
2481         SET_H(A, t, r);
2482         A = (uint8_t)r;
2483 }
2484
2485 /* $bc CMPX extended -***- */
2486 void MC6800::cmpx_ex()
2487 {
2488         uint32_t r, d;
2489         pair32_t b;
2490         EXTWORD(b);
2491         d = X;
2492         r = d - b.d;
2493         CLR_NZV;
2494         SET_NZ16(r);
2495         SET_V16(d, b.d, r);
2496 }
2497
2498 /* $bd JSR extended ----- */
2499 void MC6800::jsr_ex()
2500 {
2501         EXTENDED;
2502         PUSHWORD(pPC);
2503         PC = EA;
2504 }
2505
2506 /* $be LDS extended -**0- */
2507 void MC6800::lds_ex()
2508 {
2509         EXTWORD(pS);
2510         CLR_NZV;
2511         SET_NZ16(S);
2512 }
2513
2514 /* $bf STS extended -**0- */
2515 void MC6800::sts_ex()
2516 {
2517         CLR_NZV;
2518         SET_NZ16(S);
2519         EXTENDED;
2520         WM16(EAD, &pS);
2521 }
2522
2523 /* $c0 SUBB immediate ?**** */
2524 void MC6800::subb_im()
2525 {
2526         uint16_t t, r;
2527         IMMBYTE(t);
2528         r = B - t;
2529         CLR_NZVC;
2530         SET_FLAGS8(B, t, r);
2531         B = (uint8_t)r;
2532 }
2533
2534 /* $c1 CMPB immediate ?**** */
2535 void MC6800::cmpb_im()
2536 {
2537         uint16_t t, r;
2538         IMMBYTE(t);
2539         r = B - t;
2540         CLR_NZVC;
2541         SET_FLAGS8(B, t, r);
2542 }
2543
2544 /* $c2 SBCB immediate ?**** */
2545 void MC6800::sbcb_im()
2546 {
2547         uint16_t t, r;
2548         IMMBYTE(t);
2549         r = B - t - (CC & 0x01);
2550         CLR_NZVC;
2551         SET_FLAGS8(B, t, r);
2552         B = (uint8_t)r;
2553 }
2554
2555
2556 /* $c4 ANDB immediate -**0- */
2557 void MC6800::andb_im()
2558 {
2559         uint8_t t;
2560         IMMBYTE(t);
2561         B &= t;
2562         CLR_NZV;
2563         SET_NZ8(B);
2564 }
2565
2566 /* $c5 BITB immediate -**0- */
2567 void MC6800::bitb_im()
2568 {
2569         uint8_t t, r;
2570         IMMBYTE(t);
2571         r = B & t;
2572         CLR_NZV;
2573         SET_NZ8(r);
2574 }
2575
2576 /* $c6 LDB immediate -**0- */
2577 void MC6800::ldb_im()
2578 {
2579         IMMBYTE(B);
2580         CLR_NZV;
2581         SET_NZ8(B);
2582 }
2583
2584 /* is this a legal instruction? */
2585 /* $c7 STB immediate -**0- */
2586 void MC6800::stb_im()
2587 {
2588         CLR_NZV;
2589         SET_NZ8(B);
2590         IMM8;
2591         WM(EAD, B);
2592 }
2593
2594 /* $c8 EORB immediate -**0- */
2595 void MC6800::eorb_im()
2596 {
2597         uint8_t t;
2598         IMMBYTE(t);
2599         B ^= t;
2600         CLR_NZV;
2601         SET_NZ8(B);
2602 }
2603
2604 /* $c9 ADCB immediate ***** */
2605 void MC6800::adcb_im()
2606 {
2607         uint16_t t, r;
2608         IMMBYTE(t);
2609         r = B + t + (CC & 0x01);
2610         CLR_HNZVC;
2611         SET_FLAGS8(B, t, r);
2612         SET_H(B, t, r);
2613         B = (uint8_t)r;
2614 }
2615
2616 /* $ca ORB immediate -**0- */
2617 void MC6800::orb_im()
2618 {
2619         uint8_t t;
2620         IMMBYTE(t);
2621         B |= t;
2622         CLR_NZV;
2623         SET_NZ8(B);
2624 }
2625
2626 /* $cb ADDB immediate ***** */
2627 void MC6800::addb_im()
2628 {
2629         uint16_t t, r;
2630         IMMBYTE(t);
2631         r = B + t;
2632         CLR_HNZVC;
2633         SET_FLAGS8(B, t, r);
2634         SET_H(B, t, r);
2635         B = (uint8_t)r;
2636 }
2637
2638 /* $ce LDX immediate -**0- */
2639 void MC6800::ldx_im()
2640 {
2641         IMMWORD(pX);
2642         CLR_NZV;
2643         SET_NZ16(X);
2644 }
2645
2646 /* $cf STX immediate -**0- */
2647 void MC6800::stx_im()
2648 {
2649         CLR_NZV;
2650         SET_NZ16(X);
2651         IMM16;
2652         WM16(EAD, &pX);
2653 }
2654
2655 /* $d0 SUBB direct ?**** */
2656 void MC6800::subb_di()
2657 {
2658         uint16_t t, r;
2659         DIRBYTE(t);
2660         r = B - t;
2661         CLR_NZVC;
2662         SET_FLAGS8(B, t, r);
2663         B = (uint8_t)r;
2664 }
2665
2666 /* $d1 CMPB direct ?**** */
2667 void MC6800::cmpb_di()
2668 {
2669         uint16_t t, r;
2670         DIRBYTE(t);
2671         r = B - t;
2672         CLR_NZVC;
2673         SET_FLAGS8(B, t, r);
2674 }
2675
2676 /* $d2 SBCB direct ?**** */
2677 void MC6800::sbcb_di()
2678 {
2679         uint16_t t, r;
2680         DIRBYTE(t);
2681         r = B - t - (CC & 0x01);
2682         CLR_NZVC;
2683         SET_FLAGS8(B, t, r);
2684         B = (uint8_t)r;
2685 }
2686
2687
2688 /* $d4 ANDB direct -**0- */
2689 void MC6800::andb_di()
2690 {
2691         uint8_t t;
2692         DIRBYTE(t);
2693         B &= t;
2694         CLR_NZV;
2695         SET_NZ8(B);
2696 }
2697
2698 /* $d5 BITB direct -**0- */
2699 void MC6800::bitb_di()
2700 {
2701         uint8_t t, r;
2702         DIRBYTE(t);
2703         r = B & t;
2704         CLR_NZV;
2705         SET_NZ8(r);
2706 }
2707
2708 /* $d6 LDB direct -**0- */
2709 void MC6800::ldb_di()
2710 {
2711         DIRBYTE(B);
2712         CLR_NZV;
2713         SET_NZ8(B);
2714 }
2715
2716 /* $d7 STB direct -**0- */
2717 void MC6800::stb_di()
2718 {
2719         CLR_NZV;
2720         SET_NZ8(B);
2721         DIRECT;
2722         WM(EAD, B);
2723 }
2724
2725 /* $d8 EORB direct -**0- */
2726 void MC6800::eorb_di()
2727 {
2728         uint8_t t;
2729         DIRBYTE(t);
2730         B ^= t;
2731         CLR_NZV;
2732         SET_NZ8(B);
2733 }
2734
2735 /* $d9 ADCB direct ***** */
2736 void MC6800::adcb_di()
2737 {
2738         uint16_t t, r;
2739         DIRBYTE(t);
2740         r = B + t + (CC & 0x01);
2741         CLR_HNZVC;
2742         SET_FLAGS8(B, t, r);
2743         SET_H(B, t, r);
2744         B = (uint8_t)r;
2745 }
2746
2747 /* $da ORB direct -**0- */
2748 void MC6800::orb_di()
2749 {
2750         uint8_t t;
2751         DIRBYTE(t);
2752         B |= t;
2753         CLR_NZV;
2754         SET_NZ8(B);
2755 }
2756
2757 /* $db ADDB direct ***** */
2758 void MC6800::addb_di()
2759 {
2760         uint16_t t, r;
2761         DIRBYTE(t);
2762         r = B + t;
2763         CLR_HNZVC;
2764         SET_FLAGS8(B, t, r);
2765         SET_H(B, t, r);
2766         B = (uint8_t)r;
2767 }
2768
2769 /* $de LDX direct -**0- */
2770 void MC6800::ldx_di()
2771 {
2772         DIRWORD(pX);
2773         CLR_NZV;
2774         SET_NZ16(X);
2775 }
2776
2777 /* $dF STX direct -**0- */
2778 void MC6800::stx_di()
2779 {
2780         CLR_NZV;
2781         SET_NZ16(X);
2782         DIRECT;
2783         WM16(EAD, &pX);
2784 }
2785
2786 /* $e0 SUBB indexed ?**** */
2787 void MC6800::subb_ix()
2788 {
2789         uint16_t t, r;
2790         IDXBYTE(t);
2791         r = B - t;
2792         CLR_NZVC;
2793         SET_FLAGS8(B, t, r);
2794         B = (uint8_t)r;
2795 }
2796
2797 /* $e1 CMPB indexed ?**** */
2798 void MC6800::cmpb_ix()
2799 {
2800         uint16_t t, r;
2801         IDXBYTE(t);
2802         r = B - t;
2803         CLR_NZVC;
2804         SET_FLAGS8(B, t, r);
2805 }
2806
2807 /* $e2 SBCB indexed ?**** */
2808 void MC6800::sbcb_ix()
2809 {
2810         uint16_t t, r;
2811         IDXBYTE(t);
2812         r = B - t - (CC & 0x01);
2813         CLR_NZVC;
2814         SET_FLAGS8(B, t, r);
2815         B = (uint8_t)r;
2816 }
2817
2818
2819 /* $e4 ANDB indexed -**0- */
2820 void MC6800::andb_ix()
2821 {
2822         uint8_t t;
2823         IDXBYTE(t);
2824         B &= t;
2825         CLR_NZV;
2826         SET_NZ8(B);
2827 }
2828
2829 /* $e5 BITB indexed -**0- */
2830 void MC6800::bitb_ix()
2831 {
2832         uint8_t t, r;
2833         IDXBYTE(t);
2834         r = B & t;
2835         CLR_NZV;
2836         SET_NZ8(r);
2837 }
2838
2839 /* $e6 LDB indexed -**0- */
2840 void MC6800::ldb_ix()
2841 {
2842         IDXBYTE(B);
2843         CLR_NZV;
2844         SET_NZ8(B);
2845 }
2846
2847 /* $e7 STB indexed -**0- */
2848 void MC6800::stb_ix()
2849 {
2850         CLR_NZV;
2851         SET_NZ8(B);
2852         INDEXED;
2853         WM(EAD, B);
2854 }
2855
2856 /* $e8 EORB indexed -**0- */
2857 void MC6800::eorb_ix()
2858 {
2859         uint8_t t;
2860         IDXBYTE(t);
2861         B ^= t;
2862         CLR_NZV;
2863         SET_NZ8(B);
2864 }
2865
2866 /* $e9 ADCB indexed ***** */
2867 void MC6800::adcb_ix()
2868 {
2869         uint16_t t, r;
2870         IDXBYTE(t);
2871         r = B + t + (CC & 0x01);
2872         CLR_HNZVC;
2873         SET_FLAGS8(B, t, r);
2874         SET_H(B, t, r);
2875         B = (uint8_t)r;
2876 }
2877
2878 /* $ea ORB indexed -**0- */
2879 void MC6800::orb_ix()
2880 {
2881         uint8_t t;
2882         IDXBYTE(t);
2883         B |= t;
2884         CLR_NZV;
2885         SET_NZ8(B);
2886 }
2887
2888 /* $eb ADDB indexed ***** */
2889 void MC6800::addb_ix()
2890 {
2891         uint16_t t, r;
2892         IDXBYTE(t);
2893         r = B + t;
2894         CLR_HNZVC;
2895         SET_FLAGS8(B, t, r);
2896         SET_H(B, t, r);
2897         B = (uint8_t)r;
2898 }
2899
2900
2901
2902
2903 /* $ee LDX indexed -**0- */
2904 void MC6800::ldx_ix()
2905 {
2906         IDXWORD(pX);
2907         CLR_NZV;
2908         SET_NZ16(X);
2909 }
2910
2911 /* $ef STX indexed -**0- */
2912 void MC6800::stx_ix()
2913 {
2914         CLR_NZV;
2915         SET_NZ16(X);
2916         INDEXED;
2917         WM16(EAD, &pX);
2918 }
2919
2920 /* $f0 SUBB extended ?**** */
2921 void MC6800::subb_ex()
2922 {
2923         uint16_t t, r;
2924         EXTBYTE(t);
2925         r = B - t;
2926         CLR_NZVC;
2927         SET_FLAGS8(B, t, r);
2928         B = (uint8_t)r;
2929 }
2930
2931 /* $f1 CMPB extended ?**** */
2932 void MC6800::cmpb_ex()
2933 {
2934         uint16_t t, r;
2935         EXTBYTE(t);
2936         r = B - t;
2937         CLR_NZVC;
2938         SET_FLAGS8(B, t, r);
2939 }
2940
2941 /* $f2 SBCB extended ?**** */
2942 void MC6800::sbcb_ex()
2943 {
2944         uint16_t t, r;
2945         EXTBYTE(t);
2946         r = B - t - (CC & 0x01);
2947         CLR_NZVC;
2948         SET_FLAGS8(B, t, r);
2949         B = (uint8_t)r;
2950 }
2951
2952
2953 /* $f4 ANDB extended -**0- */
2954 void MC6800::andb_ex()
2955 {
2956         uint8_t t;
2957         EXTBYTE(t);
2958         B &= t;
2959         CLR_NZV;
2960         SET_NZ8(B);
2961 }
2962
2963 /* $f5 BITB extended -**0- */
2964 void MC6800::bitb_ex()
2965 {
2966         uint8_t t, r;
2967         EXTBYTE(t);
2968         r = B & t;
2969         CLR_NZV;
2970         SET_NZ8(r);
2971 }
2972
2973 /* $f6 LDB extended -**0- */
2974 void MC6800::ldb_ex()
2975 {
2976         EXTBYTE(B);
2977         CLR_NZV;
2978         SET_NZ8(B);
2979 }
2980
2981 /* $f7 STB extended -**0- */
2982 void MC6800::stb_ex()
2983 {
2984         CLR_NZV;
2985         SET_NZ8(B);
2986         EXTENDED;
2987         WM(EAD, B);
2988 }
2989
2990 /* $f8 EORB extended -**0- */
2991 void MC6800::eorb_ex()
2992 {
2993         uint8_t t;
2994         EXTBYTE(t);
2995         B ^= t;
2996         CLR_NZV;
2997         SET_NZ8(B);
2998 }
2999
3000 /* $f9 ADCB extended ***** */
3001 void MC6800::adcb_ex()
3002 {
3003         uint16_t t, r;
3004         EXTBYTE(t);
3005         r = B + t + (CC & 0x01);
3006         CLR_HNZVC;
3007         SET_FLAGS8(B, t, r);
3008         SET_H(B, t, r);
3009         B = (uint8_t)r;
3010 }
3011
3012 /* $fa ORB extended -**0- */
3013 void MC6800::orb_ex()
3014 {
3015         uint8_t t;
3016         EXTBYTE(t);
3017         B |= t;
3018         CLR_NZV;
3019         SET_NZ8(B);
3020 }
3021
3022 /* $fb ADDB extended ***** */
3023 void MC6800::addb_ex()
3024 {
3025         uint16_t t, r;
3026         EXTBYTE(t);
3027         r = B + t;
3028         CLR_HNZVC;
3029         SET_FLAGS8(B, t, r);
3030         SET_H(B, t, r);
3031         B = (uint8_t)r;
3032 }
3033
3034
3035
3036 /* $fe LDX extended -**0- */
3037 void MC6800::ldx_ex()
3038 {
3039         EXTWORD(pX);
3040         CLR_NZV;
3041         SET_NZ16(X);
3042 }
3043
3044 /* $ff STX extended -**0- */
3045 void MC6800::stx_ex()
3046 {
3047         CLR_NZV;
3048         SET_NZ16(X);
3049         EXTENDED;
3050         WM16(EAD, &pX);
3051 }
3052
3053 #define STATE_VERSION   2
3054
3055 bool MC6800::process_state(FILEIO* state_fio, bool loading)
3056 {
3057         if(!state_fio->StateCheckUint32(STATE_VERSION)) {
3058                 return false;
3059         }
3060         if(!state_fio->StateCheckInt32(this_device_id)) {
3061                 return false;
3062         }
3063         state_fio->StateValue(pc.d);
3064         state_fio->StateValue(prevpc);
3065         state_fio->StateValue(sp.d);
3066         state_fio->StateValue(ix.d);
3067         state_fio->StateValue(acc_d.d);
3068         state_fio->StateValue(ea.d);
3069         state_fio->StateValue(cc);
3070         state_fio->StateValue(wai_state);
3071         state_fio->StateValue(int_state);
3072         if(__USE_DEBUGGER) {
3073                 state_fio->StateValue(total_icount);
3074         }
3075         state_fio->StateValue(icount);
3076
3077         // post process
3078         if(__USE_DEBUGGER) {
3079                 if(loading) {
3080                         prev_total_icount = total_icount;
3081                 }
3082         }
3083         return true;
3084 }