source/src/vm/mc6809.cpp

   1 /*
   2         Skelton for retropc emulator
   3
   4         Origin : MAME 0.142
   5         Author : Takeda.Toshiya
   6         Date   : 2011.05.06-
   7
   8         [ MC6809 ]
   9         Notes from K.Ohta <whatisthis.sowhat _at_ gmail.com> at Jan 16, 2015:
  10               All of undocumented instructions (i.e. ngc, flag16) of MC6809(not HD6309) are written by me.
  11               These behaviors of undocumented insns are refered from "vm/cpu_x86.asm" (ia32 assembly codefor nasm) within XM7
  12               written by Ryu Takegami , and older article wrote in magazine, "I/O" at 1985.
  13               But, these C implements are written from scratch by me , and I tested many years at XM7/SDL.
  14               Perhaps, these insns. are not implement MAME/MESS yet.
  15 */
  16
  17 // Fixed IRQ/FIRQ by Mr.Sasaji at 2011.06.17
  18
  19 #include "mc6809.h"
  20 #include "mc6809_consts.h"
  21
  22 #define pPPC    ppc
  23 #define pPC     pc
  24 #define pU      u
  25 #define pS      s
  26 #define pX      x
  27 #define pY      y
  28 #define pD      acc
  29
  30 #define PPC     ppc.w.l
  31 #define PC      pc.w.l
  32 #define PCD     pc.d
  33 #define U       u.w.l
  34 #define UD      u.d
  35 #define S       s.w.l
  36 #define SD      s.d
  37 #define X       x.w.l
  38 #define XD      x.d
  39 #define Y       y.w.l
  40 #define YD      y.d
  41 #define D       acc.w.l
  42 #define A       acc.b.h
  43 #define B       acc.b.l
  44 #define DP      dp.b.h
  45 #define DPD     dp.d
  46 #define CC      cc
  47
  48 #define EA      ea.w.l
  49 #define EAD     ea.d
  50 #define EAP     ea
  51
  52 /****************************************************************************/
  53 /* memory                                                                   */
  54 /****************************************************************************/
  55
  56
  57 #define RM(Addr)        d_mem->read_data8(Addr)
  58 #define WM(Addr,Value)  d_mem->write_data8(Addr, Value)
  59
  60 #define ROP(Addr)       d_mem->read_data8(Addr)
  61 #define ROP_ARG(Addr)   d_mem->read_data8(Addr)
  62
  63 /* macros to access memory */
  64 #define IMMBYTE(b)      b = ROP_ARG(PCD); PC++
  65 #define IMMWORD(w)      w.d = (ROP_ARG(PCD) << 8) | ROP_ARG((PCD + 1) & 0xffff); PC += 2
  66
  67 #define PUSHBYTE(b)     --S; WM(SD,b)
  68 #define PUSHWORD(w)     --S; WM(SD, w.b.l); --S; WM(SD, w.b.h)
  69 #define PULLBYTE(b)     b = RM(SD); S++
  70 #define PULLWORD(w)     w = RM(SD) << 8; S++; w |= RM(SD); S++
  71
  72 #define PSHUBYTE(b)     --U; WM(UD, b);
  73 #define PSHUWORD(w)     --U; WM(UD, w.b.l); --U; WM(UD, w.b.h)
  74 #define PULUBYTE(b)     b = RM(UD); U++
  75 #define PULUWORD(w)     w = RM(UD) << 8; U++; w |= RM(UD); U++
  76
  77 #define CLR_HNZVC       CC &= ~(CC_H | CC_N | CC_Z | CC_V | CC_C)
  78 #define CLR_NZV         CC &= ~(CC_N | CC_Z | CC_V)
  79 #define CLR_NZ          CC &= ~(CC_N | CC_Z)
  80 #define CLR_HNZC        CC &= ~(CC_H | CC_N | CC_Z | CC_C)
  81 #define CLR_NZVC        CC &= ~(CC_N | CC_Z | CC_V | CC_C)
  82 #define CLR_Z           CC &= ~(CC_Z)
  83 #define CLR_NZC         CC &= ~(CC_N | CC_Z | CC_C)
  84 #define CLR_ZC          CC &= ~(CC_Z | CC_C)
  85
  86 /* macros for CC -- CC bits affected should be reset before calling */
  87 #define SET_Z(a)                if(a == 0) SEZ
  88 #define SET_Z8(a)               SET_Z((uint8)a)
  89 #define SET_Z16(a)              SET_Z((uint16)a)
  90 //#define SET_N8(a)             CC |= ((a & 0x80) >> 4)
  91 //#define SET_N16(a)            CC |= ((a & 0x8000) >> 12)
  92 //#define SET_H(a,b,r)          CC |= (((a ^ b ^ r) & 0x10) << 1)
  93 #define SET_N8(a)       if(a & 0x80)CC|=CC_N
  94 #define SET_N16(a)       if(a & 0x8000)CC|=CC_N
  95 #define SET_H(a,b,r)    if((a^b^r)&0x10)CC|=CC_H
  96
  97 #define SET_C8(a)               if(a&0x0100)CC|=CC_C
  98 #define SET_C16(a)              if(a&0x010000)CC|=CC_C
  99 #define SET_V8(a,b,r)   if((a^b^r^(r>>1))&0x80)CC|=CC_V
 100 #define SET_V16(a,b,r)  if((a^b^r^(r>>1))&0x8000)CC|=CC_V
 101
 102 #define SET_FLAGS8I(a)          {CC |= flags8i[a & 0xff];}
 103 #define SET_FLAGS8D(a)          {CC |= flags8d[a & 0xff];}
 104
 105 /* combos */
 106 #define SET_NZ8(a)              {SET_N8(a); SET_Z(a);}
 107 #define SET_NZ16(a)             {SET_N16(a); SET_Z(a);}
 108 #define SET_FLAGS8(a,b,r)       {SET_N8(r); SET_Z8(r); SET_V8(a, b, r); SET_C8(r);}
 109 #define SET_FLAGS16(a,b,r)      {SET_N16(r); SET_Z16(r); SET_V16(a, b, r); SET_C16(r);}
 110 #define SET_HNZVC8(a,b,r)       {SET_H(a,b,r);SET_N8(r);SET_Z8(r);SET_V8(a,b,r);SET_C8(r);}
 111 #define SET_HNZVC16(a,b,r)      {SET_H(a,b,r);SET_N16(r);SET_Z16(r);SET_V16(a,b,r);SET_C16(r);}
 112
 113 //#define NXORV         ((CC & CC_N) ^ ((CC & CC_V) << 2))
 114 #define NXORV                   (((CC&CC_N)^((CC&CC_V)<<2)) !=0)
 115
 116 /* for treating an unsigned byte as a signed word */
 117 #define SIGNED(b)       ((uint16)((b & 0x80) ? (b | 0xff00) : b))
 118
 119 /* macros for addressing modes (postbytes have their own code) */
 120 //#define DIRECT                EAD = DPD; IMMBYTE(ea.b.l)
 121 #define DIRECT          {uint8 tmpt; EAD = DP << 8; IMMBYTE(tmpt); EAD = EAD + tmpt; }
 122 #define IMM8            EAD = PCD; PC++
 123 #define IMM16           EAD = PCD; PC += 2
 124 #define EXTENDED        IMMWORD(EAP)
 125
 126 /* macros to set status flags */
 127 #define SEC             CC |= CC_C
 128 #define CLC             CC &= ~CC_C
 129 #define SEZ             CC |= CC_Z
 130 #define CLZ             CC &= ~CC_Z
 131 #define SEN             CC |= CC_N
 132 #define CLN             CC &= ~CC_N
 133 #define SEV             CC |= CC_V
 134 #define CLV             CC &= ~CC_V
 135 #define SEH             CC |= CC_H
 136 #define CLH             CC &= ~CC_H
 137
 138 /* macros for convenience */
 139 #define DIRBYTE(b)      {DIRECT;   b   = RM(EAD);  }
 140 #define DIRWORD(w)      {DIRECT;   w.d = RM16(EAD);}
 141 #define EXTBYTE(b)      {EXTENDED; b   = RM(EAD);  }
 142 #define EXTWORD(w)      {EXTENDED; w.d = RM16(EAD);}
 143
 144 #define OP_HANDLER(_name) inline void MC6809::_name (void)
 145
 146
 147 /* macros for branch instructions */
 148 #define BRANCH(f) { \
 149         uint8 t; \
 150         IMMBYTE(t); \
 151         if(f) { \
 152                 if (t >= 0x80) { \
 153                         PC = PC - (0x0100 - t); \
 154                 } else { \
 155                         PC = PC + t; \
 156                 } \
 157         } \
 158 }
 159
 160 #define LBRANCH(f) { \
 161         pair t; \
 162         IMMWORD(t); \
 163         if(f) { \
 164                 icount -= 1; \
 165                 PC += t.w.l; \
 166                 PC = PC & 0xffff; \
 167         } \
 168 }
 169
 170 /* macros for setting/getting registers in TFR/EXG instructions */
 171
 172 inline uint32 MC6809::RM16(uint32 Addr)
 173 {
 174         uint32 result = RM(Addr) << 8;
 175         return result | RM((Addr + 1) & 0xffff);
 176 }
 177
 178 inline void MC6809::WM16(uint32 Addr, pair *p)
 179 {
 180         WM(Addr, p->b.h);
 181         WM((Addr + 1) & 0xffff, p->b.l);
 182 }
 183
 184 /* increment */
 185 static const uint8 flags8i[256] = {
 186         CC_Z,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 187         0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 188         0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 189         0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 190         0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 191         0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 192         0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 193         0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 194         CC_N|CC_V,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
 195         CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
 196         CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
 197         CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
 198         CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
 199         CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
 200         CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
 201         CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N
 202 };
 203
 204 /* decrement */
 205 static const uint8 flags8d[256] = {
 206         CC_Z,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 207         0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 208         0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 209         0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 210         0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 211         0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 212         0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 213         0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,CC_V,
 214         CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
 215         CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
 216         CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
 217         CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
 218         CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
 219         CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
 220         CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
 221         CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N
 222 };
 223
 224 /* FIXME: Cycles differ slighly from hd6309 emulation */
 225 static const int index_cycle_em[256] = {        /* Index Loopup cycle counts */
 226 /*           0xX0, 0xX1, 0xX2, 0xX3, 0xX4, 0xX5, 0xX6, 0xX7, 0xX8, 0xX9, 0xXA, 0xXB, 0xXC, 0xXD, 0xXE, 0xXF */
 227
 228 /* 0x0X */ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
 229 /* 0x1X */ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
 230 /* 0x2X */ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
 231 /* 0x3X */ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
 232 /* 0x4X */ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
 233 /* 0x5X */ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
 234 /* 0x6X */ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
 235 /* 0x7X */ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
 236 /* 0x8X */ 2, 3, 2, 3, 0, 1, 1, 1, 1, 4, 0, 4, 1, 5, 0, 5,
 237 /* 0x9X */ 5, 6, 5, 6, 3, 4, 4, 4, 4, 7, 3, 7, 4, 8, 3, 8,
 238 /* 0xAX */ 2, 3, 2, 3, 0, 1, 1, 1, 1, 4, 0, 4, 1, 5, 0, 5,
 239 /* 0xBX */ 5, 6, 5, 6, 3, 4, 4, 4, 4, 7, 3, 7, 4, 8, 3, 8,
 240 /* 0xCX */ 2, 3, 2, 3, 0, 1, 1, 1, 1, 4, 0, 4, 1, 5, 0, 3,
 241 /* 0xDX */ 5, 6, 5, 6, 3, 4, 4, 4, 4, 7, 3, 7, 4, 8, 3, 8,
 242 /* 0xEX */ 2, 3, 2, 3, 0, 1, 1, 1, 1, 4, 0, 4, 1, 5, 0, 5,
 243 /* 0xFX */ 4, 6, 5, 6, 3, 4, 4, 4, 4, 7, 3, 7, 4, 8, 3, 8
 244         };
 245
 246 /* timings for 1-byte opcodes */
 247 /* 20100731 Fix to XM7 */
 248 static const int cycles1[] = {
 249 /*   0  1  2  3  4  5  6  7  8  9  A  B  C  D  E  F */
 250 /*0 */ 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 3, 6,
 251 /*1 */ 0, 0, 2, 2, 0, 0, 5, 9, 3, 2, 3, 2, 3, 2, 8, 6,
 252 /*2 */ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
 253 /*3 */ 4, 4, 4, 4, 5, 5, 5, 5, 4, 5, 3, 6, 20, 11, 1, 19,
 254 /*4 */ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
 255 /*5 */ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
 256 /*6 */ 6, 6, 6, 6, 6, 2, 6, 6, 6, 6, 6, 6, 6, 6, 3, 6,
 257 /*7 */ 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 4, 7,
 258 /*8 */ 2, 2, 2, 4, 2, 2, 2, 2, 2, 2, 2, 2, 4, 7, 3, 3,
 259 /*9 */ 4, 4, 4, 6, 4, 4, 4, 4, 4, 4, 4, 4, 6, 7, 5, 5,
 260  /*A*/ 4, 4, 4, 6, 4, 4, 4, 4, 4, 4, 4, 4, 6, 7, 5, 5,
 261  /*B*/ 5, 5, 5, 7, 5, 5, 5, 5, 5, 5, 5, 5, 7, 8, 6, 6,
 262  /*C*/ 2, 2, 2, 4, 2, 2, 2, 2, 2, 2, 2, 2, 3, 0, 3, 3,
 263  /*D*/ 4, 4, 4, 6, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 5, 5,
 264  /*E*/ 4, 4, 4, 6, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 5, 5,
 265  /*F*/ 5, 5, 5, 7, 5, 5, 5, 5, 5, 5, 5, 5, 6, 6, 6, 6
 266 };
 267
 268
 269 static void (MC6809::*m6809_main[0x100]) (void) = {
 270 /*          0xX0,   0xX1,     0xX2,    0xX3,    0xX4,    0xX5,    0xX6,    0xX7,
 271             0xX8,   0xX9,     0xXA,    0xXB,    0xXC,    0xXD,    0xXE,    0xXF   */
 272
 273 /* 0x0X */
 274         &MC6809::neg_di, &MC6809::neg_di, &MC6809::ngc_di, &MC6809::com_di,
 275         &MC6809::lsr_di, &MC6809::lsr_di, &MC6809::ror_di, &MC6809::asr_di,
 276         &MC6809::asl_di, &MC6809::rol_di, &MC6809::dec_di, &MC6809::dcc_di,
 277         &MC6809::inc_di, &MC6809::tst_di, &MC6809::jmp_di, &MC6809::clr_di,
 278 /* 0x1X */
 279         &MC6809::pref10, &MC6809::pref11, &MC6809::nop, &MC6809::sync_09,
 280         &MC6809::trap, &MC6809::trap, &MC6809::lbra, &MC6809::lbsr,
 281         &MC6809::aslcc_in, &MC6809::daa, &MC6809::orcc, &MC6809::nop,
 282         &MC6809::andcc, &MC6809::sex, &MC6809::exg, &MC6809::tfr,
 283 /* 0x2X */
 284         &MC6809::bra, &MC6809::brn, &MC6809::bhi, &MC6809::bls,
 285         &MC6809::bcc, &MC6809::bcs, &MC6809::bne, &MC6809::beq,
 286         &MC6809::bvc, &MC6809::bvs, &MC6809::bpl, &MC6809::bmi,
 287         &MC6809::bge, &MC6809::blt, &MC6809::bgt, &MC6809::ble,
 288 /* 0x3X */
 289         &MC6809::leax, &MC6809::leay, &MC6809::leas, &MC6809::leau,
 290         &MC6809::pshs, &MC6809::puls, &MC6809::pshu, &MC6809::pulu,
 291         &MC6809::andcc, &MC6809::rts, &MC6809::abx, &MC6809::rti,
 292         &MC6809::cwai, &MC6809::mul, &MC6809::rst, &MC6809::swi,
 293 /* 0x4X */
 294         &MC6809::nega, &MC6809::nega, &MC6809::ngca, &MC6809::coma,
 295         &MC6809::lsra, &MC6809::lsra, &MC6809::rora, &MC6809::asra,
 296         &MC6809::asla, &MC6809::rola, &MC6809::deca, &MC6809::dcca,
 297         &MC6809::inca, &MC6809::tsta, &MC6809::clca, &MC6809::clra,
 298 /* 0x5X */
 299         &MC6809::negb, &MC6809::negb, &MC6809::ngcb, &MC6809::comb,
 300         &MC6809::lsrb, &MC6809::lsrb, &MC6809::rorb, &MC6809::asrb,
 301         &MC6809::aslb, &MC6809::rolb, &MC6809::decb, &MC6809::dccb,
 302         &MC6809::incb, &MC6809::tstb, &MC6809::clcb, &MC6809::clrb,
 303 /* 0x6X */
 304         &MC6809::neg_ix, &MC6809::neg_ix, &MC6809::ngc_ix, &MC6809::com_ix,
 305         &MC6809::lsr_ix, &MC6809::lsr_ix, &MC6809::ror_ix, &MC6809::asr_ix,
 306         &MC6809::asl_ix, &MC6809::rol_ix, &MC6809::dec_ix, &MC6809::dcc_ix,
 307         &MC6809::inc_ix, &MC6809::tst_ix, &MC6809::jmp_ix, &MC6809::clr_ix,
 308 /* 0x7X */
 309         &MC6809::neg_ex, &MC6809::neg_ex, &MC6809::ngc_ex, &MC6809::com_ex,
 310         &MC6809::lsr_ex, &MC6809::lsr_ex, &MC6809::ror_ex, &MC6809::asr_ex,
 311         &MC6809::asl_ex, &MC6809::rol_ex, &MC6809::dec_ex, &MC6809::dcc_ex,
 312         &MC6809::inc_ex, &MC6809::tst_ex, &MC6809::jmp_ex, &MC6809::clr_ex,
 313 /* 0x8X */
 314         &MC6809::suba_im, &MC6809::cmpa_im, &MC6809::sbca_im, &MC6809::subd_im,
 315         &MC6809::anda_im, &MC6809::bita_im, &MC6809::lda_im, &MC6809::flag8_im,
 316         &MC6809::eora_im, &MC6809::adca_im, &MC6809::ora_im, &MC6809::adda_im,
 317         &MC6809::cmpx_im, &MC6809::bsr, &MC6809::ldx_im, &MC6809::flag16_im,
 318 /* 0x9X */
 319         &MC6809::suba_di, &MC6809::cmpa_di, &MC6809::sbca_di, &MC6809::subd_di,
 320         &MC6809::anda_di, &MC6809::bita_di, &MC6809::lda_di, &MC6809::sta_di,
 321         &MC6809::eora_di, &MC6809::adca_di, &MC6809::ora_di, &MC6809::adda_di,
 322         &MC6809::cmpx_di, &MC6809::jsr_di, &MC6809::ldx_di, &MC6809::stx_di,
 323 /* 0xAX */
 324         &MC6809::suba_ix, &MC6809::cmpa_ix, &MC6809::sbca_ix, &MC6809::subd_ix,
 325         &MC6809::anda_ix, &MC6809::bita_ix, &MC6809::lda_ix, &MC6809::sta_ix,
 326         &MC6809::eora_ix, &MC6809::adca_ix, &MC6809::ora_ix, &MC6809::adda_ix,
 327         &MC6809::cmpx_ix, &MC6809::jsr_ix, &MC6809::ldx_ix, &MC6809::stx_ix,
 328 /* 0xBX */
 329         &MC6809::suba_ex, &MC6809::cmpa_ex, &MC6809::sbca_ex, &MC6809::subd_ex,
 330         &MC6809::anda_ex, &MC6809::bita_ex, &MC6809::lda_ex, &MC6809::sta_ex,
 331         &MC6809::eora_ex, &MC6809::adca_ex, &MC6809::ora_ex, &MC6809::adda_ex,
 332         &MC6809::cmpx_ex, &MC6809::jsr_ex, &MC6809::ldx_ex, &MC6809::stx_ex,
 333 /* 0xCX */
 334         &MC6809::subb_im, &MC6809::cmpb_im, &MC6809::sbcb_im, &MC6809::addd_im,
 335         &MC6809::andb_im, &MC6809::bitb_im, &MC6809::ldb_im, &MC6809::flag8_im,
 336         &MC6809::eorb_im, &MC6809::adcb_im, &MC6809::orb_im, &MC6809::addb_im,
 337         &MC6809::ldd_im, &MC6809::trap, &MC6809::ldu_im, &MC6809::flag16_im,
 338 /* 0xDX */
 339         &MC6809::subb_di, &MC6809::cmpb_di, &MC6809::sbcb_di, &MC6809::addd_di,
 340         &MC6809::andb_di, &MC6809::bitb_di, &MC6809::ldb_di, &MC6809::stb_di,
 341         &MC6809::eorb_di, &MC6809::adcb_di, &MC6809::orb_di, &MC6809::addb_di,
 342         &MC6809::ldd_di, &MC6809::std_di, &MC6809::ldu_di, &MC6809::stu_di,
 343 /* 0xEX */
 344         &MC6809::subb_ix, &MC6809::cmpb_ix, &MC6809::sbcb_ix, &MC6809::addd_ix,
 345         &MC6809::andb_ix, &MC6809::bitb_ix, &MC6809::ldb_ix, &MC6809::stb_ix,
 346         &MC6809::eorb_ix, &MC6809::adcb_ix, &MC6809::orb_ix, &MC6809::addb_ix,
 347         &MC6809::ldd_ix, &MC6809::std_ix, &MC6809::ldu_ix, &MC6809::stu_ix,
 348 /* 0xFX */
 349         &MC6809::subb_ex, &MC6809::cmpb_ex, &MC6809::sbcb_ex, &MC6809::addd_ex,
 350         &MC6809::andb_ex, &MC6809::bitb_ex, &MC6809::ldb_ex, &MC6809::stb_ex,
 351         &MC6809::eorb_ex, &MC6809::adcb_ex, &MC6809::orb_ex, &MC6809::addb_ex,
 352         &MC6809::ldd_ex, &MC6809::std_ex, &MC6809::ldu_ex, &MC6809::stu_ex
 353 };
 354
 355 void MC6809::reset()
 356 {
 357         icount = 0;
 358         int_state = 0;
 359         extra_icount = 0;
 360         busreq = false;
 361
 362         DPD = 0;        /* Reset direct page register */
 363         CC = 0;
 364         D = 0;
 365         X = 0;
 366         Y = 0;
 367         U = 0;
 368         S = 0;
 369         EA = 0;
 370 #if defined(_FM7) || defined(_FM8) || defined(_FM77) || defined(_FM77L2) || defined(_FM77L4) || defined(_FM77_VARIANTS)
 371         clr_used = false;
 372         write_signals(&outputs_bus_clr, 0x00000000);
 373 #endif
 374         write_signals(&outputs_bus_halt, 0x00000000);
 375
 376         CC |= CC_II;    /* IRQ disabled */
 377         CC |= CC_IF;    /* FIRQ disabled */
 378
 379         PCD = RM16(0xfffe);
 380 }
 381
 382 void MC6809::write_signal(int id, uint32 data, uint32 mask)
 383 {
 384         if(id == SIG_CPU_IRQ) {
 385                 if(data & mask) {
 386                         int_state |= MC6809_IRQ_BIT;
 387                 } else {
 388                         int_state &= ~MC6809_IRQ_BIT;
 389                 }
 390         } else if(id == SIG_CPU_FIRQ) {
 391                 if(data & mask) {
 392                         int_state |= MC6809_FIRQ_BIT;
 393                 } else {
 394                         int_state &= ~MC6809_FIRQ_BIT;
 395                 }
 396         } else if(id == SIG_CPU_NMI) {
 397                 if(data & mask) {
 398                         int_state |= MC6809_NMI_BIT;
 399                 } else {
 400                         int_state &= ~MC6809_NMI_BIT;
 401                 }
 402         } else if(id == SIG_CPU_BUSREQ) {
 403                 if(data & mask) {
 404                         int_state |= MC6809_HALT_BIT;
 405                 } else {
 406                         int_state &= ~MC6809_HALT_BIT;
 407                 }
 408         }
 409 }
 410
 411 void MC6809::cpu_nmi(void)
 412 {
 413         pair rpc = pPC;
 414         if ((int_state & MC6809_CWAI_IN) == 0) {
 415                 CC |= CC_E;
 416                 PUSHWORD(pPC);
 417                 PUSHWORD(pU);
 418                 PUSHWORD(pY);
 419                 PUSHWORD(pX);
 420                 PUSHBYTE(DP);
 421                 PUSHBYTE(B);
 422                 PUSHBYTE(A);
 423                 PUSHBYTE(CC);
 424         }
 425         CC = CC | CC_II | CC_IF;        // 0x50
 426         PCD = RM16(0xfffc);
 427 //      printf("NMI occured PC=0x%04x VECTOR=%04x SP=%04x \n",rpc.w.l,pPC.w.l,S);
 428         int_state &= ~(MC6809_SYNC_IN | MC6809_SYNC_OUT | MC6809_CWAI_IN | MC6809_CWAI_OUT | MC6809_NMI_BIT);   // $FE1E
 429 }
 430
 431
 432 // Refine from cpu_x86.asm of V3.52a.
 433 void MC6809::cpu_firq(void)
 434 {
 435         pair rpc = pPC;
 436         if ((int_state & MC6809_CWAI_IN) == 0) {
 437                 /* NORMAL */
 438                 CC &= ~CC_E;
 439                 PUSHWORD(pPC);
 440                 PUSHBYTE(CC);
 441         }
 442         CC = CC | CC_II | CC_IF;
 443         PCD = RM16(0xfff6);
 444 //      printf("Firq occured PC=0x%04x VECTOR=%04x SP=%04x \n",rpc.w.l,pPC.w.l,S);
 445         int_state &= ~(MC6809_SYNC_IN | MC6809_SYNC_OUT | MC6809_CWAI_IN | MC6809_CWAI_OUT);    // $FE1F
 446 }
 447
 448 // Refine from cpu_x86.asm of V3.52a.
 449 void MC6809::cpu_irq(void)
 450 {
 451         pair rpc = pPC;
 452         if ((int_state & MC6809_CWAI_IN) == 0) {
 453                 CC |= CC_E;
 454                 PUSHWORD(pPC);
 455                 PUSHWORD(pU);
 456                 PUSHWORD(pY);
 457                 PUSHWORD(pX);
 458                 PUSHBYTE(DP);
 459                 PUSHBYTE(B);
 460                 PUSHBYTE(A);
 461                 PUSHBYTE(CC);
 462         }
 463
 464         CC |= CC_II;
 465         PCD = RM16(0xfff8);
 466 //      printf("IRQ occured PC=0x%04x VECTOR=%04x SP=%04x \n",rpc.w.l,pPC.w.l,S);
 467         int_state &= ~(MC6809_SYNC_IN | MC6809_SYNC_OUT | MC6809_CWAI_IN | MC6809_CWAI_OUT);    // $FE1F
 468 }
 469
 470 int MC6809::run(int clock)
 471 {
 472         int cycle = 0;
 473         if ((int_state & MC6809_HALT_BIT) != 0) {       // 0x80
 474                 if(icount > 0) icount = 0;  // OK?
 475                 if(!busreq) write_signals(&outputs_bus_halt, 0xffffffff);
 476                 busreq = true;
 477                 return icount;
 478         }
 479         if(busreq) write_signals(&outputs_bus_halt, 0x00000000);
 480         busreq = false;
 481         if((int_state & MC6809_INSN_HALT) != 0) {       // 0x80
 482                 uint8 dmy = RM(PCD);
 483                 icount -= 2;
 484                 icount -= extra_icount;
 485                 extra_icount = 0;
 486                 PC++;
 487                 return icount;
 488         }
 489         /*
 490          * Check Interrupt
 491          */
 492 check_nmi:
 493         if ((int_state & (MC6809_NMI_BIT | MC6809_FIRQ_BIT | MC6809_IRQ_BIT)) != 0) {   // 0x0007
 494                 if ((int_state & MC6809_NMI_BIT) == 0)
 495                         goto check_firq;
 496                 int_state |= MC6809_SYNC_OUT;
 497                 //if ((int_state & MC6809_LDS) == 0)
 498                 //      goto check_firq;
 499                 if ((int_state & MC6809_SYNC_IN) != 0) {
 500                         if ((int_state & MC6809_NMI_LC) != 0)
 501                                 goto check_firq;
 502                         PC++;
 503                 }
 504                 cpu_nmi();
 505                 run_one_opecode();
 506                 cycle = 19;
 507                 goto int_cycle;
 508         }
 509         else {
 510                 goto check_ok;
 511         }
 512
 513 check_firq:
 514         if ((int_state & MC6809_FIRQ_BIT) != 0) {
 515                 int_state |= MC6809_SYNC_OUT;
 516                 if ((cc & CC_IF) != 0)
 517                         goto check_irq;
 518                 if ((int_state & MC6809_SYNC_IN) != 0) {
 519                         if ((int_state & MC6809_FIRQ_LC) != 0)
 520                                 goto check_irq;
 521                         PC++;
 522                 }
 523                 cpu_firq();
 524                 run_one_opecode();
 525                 cycle = 10;
 526                 goto int_cycle;
 527         }
 528
 529 check_irq:
 530         if ((int_state & MC6809_IRQ_BIT) != 0) {
 531                 int_state |= MC6809_SYNC_OUT;
 532                 if ((cc & CC_II) != 0)
 533                         goto check_ok;
 534                 if ((int_state & MC6809_SYNC_IN) != 0) {
 535                         if ((int_state & MC6809_IRQ_LC) != 0)
 536                                 goto check_ok;
 537                         PC++;
 538                 }
 539                 cpu_irq();
 540                 run_one_opecode();
 541                 cycle = 19;
 542                 cc |= CC_II;
 543                 goto int_cycle;
 544         }
 545         /*
 546          * NO INTERRUPT
 547          */
 548         goto check_ok;
 549         /*
 550          * INTERRUPT
 551          */
 552 int_cycle:
 553         if ((int_state & MC6809_CWAI_IN) == 0) {
 554                 icount -= cycle;
 555         }
 556         return icount;
 557
 558         // run cpu
 559 check_ok:
 560         if(clock == -1) {
 561                 // run only one opcode
 562                 icount = 0;
 563                 run_one_opecode();
 564                 return -icount;
 565         } else {
 566                 // run cpu while given clocks
 567                 icount += clock;
 568                 int first_icount = icount;
 569
 570                 while(icount > 0) {
 571                         run_one_opecode();
 572                 }
 573                 return first_icount - icount;
 574         }
 575
 576 }
 577
 578 void MC6809::run_one_opecode()
 579 {
 580
 581
 582         pPPC = pPC;
 583         uint8 ireg = ROP(PCD);
 584         PC++;
 585         icount -= cycles1[ireg];
 586         icount -= extra_icount;
 587         extra_icount = 0;
 588         op(ireg);
 589 }
 590
 591 void MC6809::op(uint8 ireg)
 592 {
 593 #if defined(_FM7) || defined(_FM8) || defined(_FM77) || defined(_FM77L2) || defined(_FM77L4) || defined(_FM77_VARIANTS)
 594         if(ireg == 0x0f) { // clr_di()
 595                 write_signals(&outputs_bus_clr, 0x00000001);
 596                 clr_used = true;
 597         } else if((ireg == 0x6f) || (ireg == 0x7f)){ //clr_ex() clr_ix()
 598                 write_signals(&outputs_bus_clr, 0x00000002);
 599                 clr_used = true;
 600         } else {
 601                 if(clr_used) write_signals(&outputs_bus_clr, 0x00000000);
 602                 clr_used = false;
 603         }
 604
 605 #endif
 606         (this->*m6809_main[ireg])();
 607 };
 608
 609 inline void MC6809::fetch_effective_address()
 610 {
 611         uint8 postbyte;
 612         uint8 upper, lower;
 613
 614         IMMBYTE(postbyte);
 615
 616         upper = (postbyte >> 4) & 0x0f;
 617         lower = postbyte & 0x0f;
 618
 619         switch (upper) {
 620                 case 0x00:
 621                         EA = X + lower;
 622                         break;
 623                 case 0x01:
 624                         EA = X - 16 + lower;
 625                         break;
 626                 case 0x02:
 627                         EA = Y + lower;
 628                         break;
 629                 case 0x03:
 630                         EA = Y - 16 + lower;
 631                         break;
 632                 case 0x04:
 633                         EA = U + lower;
 634                         break;
 635                 case 0x05:
 636                         EA = U - 16 + lower;
 637                         break;
 638                 case 0x06:
 639                         EA = S + lower;
 640                         break;
 641                 case 0x07:
 642                         EA = S - 16 + lower;
 643                         break;
 644                 default:
 645                         fetch_effective_address_IDX(upper, lower);
 646                         break;
 647         }
 648         EAD &= 0xffff;
 649         icount -= index_cycle_em[postbyte];
 650 }
 651
 652 inline void MC6809::fetch_effective_address_IDX(uint8 upper, uint8 lower)
 653 {
 654         bool indirect = false;
 655         uint16 *reg;
 656         uint8 bx;
 657         if ((upper & 0x08) != 0)
 658           indirect = ((upper & 0x01) != 0);
 659
 660         switch ((upper >> 1) & 0x03) {  // $8-$f >> 1 = $4 - $7 : delete bit2
 661                 case 0: // $8x,$9x
 662                         reg = &(X);
 663                         break;
 664                 case 1: // $ax,$bx
 665                         reg = &(Y);
 666                         break;
 667                 case 2: // $cx,$dx
 668                         reg = &(U);
 669                         break;
 670                 case 3: // $ex,$fx
 671                         reg = &(S);
 672                         break;
 673         }
 674
 675         switch (lower) {
 676                 case 0: // ,r+
 677                         EA = *reg;
 678                         *reg = *reg + 1;
 679                         *reg = *reg & 0xffff;
 680                         break;
 681                 case 1: // ,r++
 682                         EA = *reg;
 683                         *reg = *reg + 2;
 684                         *reg = *reg & 0xffff;
 685                         break;
 686                 case 2: // ,-r
 687                         *reg = *reg - 1;
 688                         *reg = *reg & 0xffff;
 689                         EA = *reg;
 690                         break;
 691                 case 3: // ,--r
 692                         *reg = *reg - 2;
 693                         *reg = *reg & 0xffff;
 694                         EA = *reg;
 695                         break;
 696                 case 4: // ,r
 697                         EA = *reg;
 698                         break;
 699                 case 5: // b,r
 700                         EA = *reg + SIGNED(B);
 701                         break;
 702                 case 6: // a,r
 703                 case 7:
 704                         EA = *reg + SIGNED(A);
 705                         break;
 706                 case 8: // $xx,r
 707                         IMMBYTE(bx);
 708                         EA = *reg + SIGNED(bx);
 709                         break;
 710                 case 9: // $xxxx, r
 711                         IMMWORD(EAP);
 712                         EA = EA + *reg;
 713                         break;
 714                 case 0x0a:      // Undocumented
 715                         EA = PC;
 716                         EA++;
 717                         EA |= 0x00ff;
 718                         break;
 719                 case 0x0b:      // D,r
 720                         EA = *reg + D;
 721                         break;
 722                 case 0x0c:      // xx,pc
 723                         IMMBYTE(bx);
 724                         EA = PC + SIGNED(bx);
 725                         break;
 726                 case 0x0d:      // xxxx,pc
 727                         IMMWORD(EAP);
 728                         EA = EA + PC;
 729                         break;
 730                 case 0x0e:      // Undocumented
 731                         EA = 0xffff;
 732                         break;
 733                 case 0x0f:
 734                         IMMWORD(EAP);
 735                         break;
 736                 default:
 737                         EA = 0;
 738                         break;
 739         }
 740         // $9x,$bx,$dx,$fx = INDIRECT
 741         if (indirect) {
 742                 EAD = RM16(EAD);
 743         }
 744 }
 745
 746 #define IIError() illegal()
 747
 748 OP_HANDLER(illegal)
 749 {
 750         //logerror("M6809: illegal opcode at %04x\n",PC);
 751         printf("M6809: illegal opcode at %04x %02x %02x %02x %02x %02x \n",
 752                  PC - 2, RM(PC - 2), RM(PC - 1), RM(PC), RM(PC + 1), RM(PC + 2));
 753 //        PC-=1;
 754 }
 755 /* $00 NEG direct ?**** */
 756 OP_HANDLER(neg_di) {
 757         uint16 r, t;
 758         DIRBYTE(t);
 759         r = -t;
 760         CLR_NZVC;
 761         SET_FLAGS8(0, t, r);
 762         WM(EAD, r);
 763 }
 764
 765 /* $01 Undefined Neg */
 766 /* $03 COM direct -**01 */
 767 OP_HANDLER(com_di) {
 768         uint8 t;
 769         DIRBYTE(t);
 770         t = ~t;
 771         CLR_NZV;
 772         SET_NZ8(t);
 773         SEC;
 774         WM(EAD, t);
 775 }
 776
 777 /* $02 NGC Direct (Undefined) */
 778 OP_HANDLER(ngc_di) {
 779         if ((CC & CC_C) == 0) {
 780                 neg_di();
 781         }
 782         else {
 783                 com_di();
 784         }
 785 }
 786
 787
 788 /* $04 LSR direct -0*-* */
 789 OP_HANDLER(lsr_di) {
 790         uint8 t;
 791         DIRBYTE(t);
 792         CLR_NZC;
 793         CC |= (t & CC_C);
 794         t >>= 1;
 795         SET_Z8(t);
 796         WM(EAD, t);
 797 }
 798
 799 /* $05 ILLEGAL */
 800
 801 /* $06 ROR direct -**-* */
 802 OP_HANDLER(ror_di) {
 803         uint8 t, r;
 804         DIRBYTE(t);
 805         r = (CC & CC_C) << 7;
 806         CLR_NZC;
 807         CC |= (t & CC_C);
 808 //  r |= t>>1;
 809         t >>= 1;
 810         r |= t;
 811         SET_NZ8(r);
 812         WM(EAD, r);
 813 }
 814
 815 /* $07 ASR direct ?**-* */
 816 OP_HANDLER(asr_di) {
 817         uint8 t, f;
 818         DIRBYTE(t);
 819         CLR_NZC;
 820         CC |= (t & CC_C);
 821         t = (t & 0x80) | (t >> 1);
 822         SET_NZ8(t);
 823         WM(EAD, t);
 824 }
 825
 826 /* $08 ASL direct ?**** */
 827 OP_HANDLER(asl_di) {
 828         uint16 t, r;
 829         DIRBYTE(t);
 830         r = t << 1;
 831         CLR_NZVC;
 832         SET_FLAGS8(t, t, r);
 833         WM(EAD, (r & 0xfe));
 834 }
 835
 836 /* $09 ROL direct -**** */
 837 OP_HANDLER(rol_di) {
 838         uint16 t, r;
 839         DIRBYTE(t);
 840         r = (CC & CC_C) | (t << 1);
 841         CLR_NZVC;
 842         SET_FLAGS8(t, t, r);
 843         WM(EAD, (BYTE) r);
 844 }
 845
 846 /* $0A DEC direct -***- */
 847 OP_HANDLER(dec_di) {
 848         uint8 t;
 849         DIRBYTE(t);
 850         --t;
 851         CLR_NZV;
 852         SET_FLAGS8D(t);
 853         WM(EAD, t);
 854 }
 855
 856 /* $0B DCC direct */
 857 OP_HANDLER(dcc_di) {
 858         uint8 t, s;
 859         DIRBYTE(t);
 860         --t;
 861         CLR_NZVC;
 862         SET_FLAGS8D(t);
 863         s = CC;
 864         s >>= 2;
 865         s = ~s;
 866         s = s & CC_C;
 867         CC = s | CC;
 868         WM(EAD, t);
 869 }
 870
 871
 872 /* $OC INC direct -***- */
 873 OP_HANDLER(inc_di) {
 874         uint8 t;
 875         DIRBYTE(t);
 876         ++t;
 877         CLR_NZV;
 878         SET_FLAGS8I(t);
 879         WM(EAD, t);
 880 }
 881
 882 /* $OD TST direct -**0- */
 883 OP_HANDLER(tst_di) {
 884         uint8 t;
 885         DIRBYTE(t);
 886         CLR_NZV;
 887         SET_NZ8(t);
 888 }
 889
 890 /* $0E JMP direct ----- */
 891 OP_HANDLER(jmp_di) {
 892         DIRECT;
 893         PC = EA;
 894 }
 895
 896 /* $0F CLR direct -0100 */
 897 OP_HANDLER(clr_di) {
 898         uint8 dummy;
 899         DIRECT;
 900         dummy = RM(EAD);        // Dummy Read(Alpha etc...)
 901         WM(EAD, 0);
 902         CLR_NZVC;
 903         SEZ;
 904 }
 905
 906 /* $10 FLAG */
 907
 908 /* $11 FLAG */
 909
 910 /* $12 NOP inherent ----- */
 911 OP_HANDLER(nop) {
 912         ;
 913 }
 914
 915 /* $13 SYNC inherent ----- */
 916 OP_HANDLER(sync_09)     // Rename 20101110
 917 {
 918         //cpu6809_t *t = ;
 919         if ((int_state & MC6809_SYNC_IN) == 0) {
 920                 // SYNC命令初めて
 921                 int_state |= MC6809_SYNC_IN;
 922                 //  int_state &= 0xffbf;
 923                 int_state &= ~MC6809_SYNC_OUT;
 924                 PC -= 1;        // 次のサイクルも同じ命令
 925                 return;
 926         } else {
 927         // SYNC実行中
 928                 if ((int_state & MC6809_SYNC_OUT) != 0) {
 929                         // 割込が来たのでSYNC抜ける
 930                         int_state &= ~(MC6809_SYNC_OUT | MC6809_SYNC_IN);
 931                         return;
 932                 }
 933                 PC -= 1;        // 割込こないと次のサイクルも同じ命令
 934         }
 935 }
 936
 937
 938
 939 /* $14 trap(HALT) */
 940 OP_HANDLER(trap) {
 941         int_state |= MC6809_INSN_HALT;  // HALTフラグ
 942         // Debug: トラップ要因
 943         printf("INSN: TRAP @%04x %02x %02x\n", PC - 1, RM(PC - 1), RM(PC));
 944 }
 945
 946 /* $15 trap */
 947
 948 /* $16 LBRA relative ----- */
 949 OP_HANDLER(lbra) {
 950         LBRANCH(TRUE);
 951 }
 952
 953 /* $17 LBSR relative ----- */
 954 OP_HANDLER(lbsr) {
 955         IMMWORD(EAP);
 956         PUSHWORD(pPC);
 957         PC += EAD;
 958 }
 959
 960 /* $18 ASLCC */
 961
 962 OP_HANDLER(aslcc_in) {
 963         uint8 cc = CC;
 964         if ((cc & CC_Z) != 0x00)        //20100824 Fix
 965         {
 966                 cc |= CC_C;
 967         }
 968         cc <<= 1;
 969         cc &= 0x3e;
 970         CC = cc;
 971 }
 972
 973 /* $19 DAA inherent (A) -**0* */
 974 OP_HANDLER(daa) {
 975         uint8 msn, lsn;
 976         uint16 t, cf = 0;
 977         msn = A & 0xf0;
 978         lsn = A & 0x0f;
 979         if (lsn > 0x09 || CC & CC_H)
 980                 cf |= 0x06;
 981         if (msn > 0x80 && lsn > 0x09)
 982                 cf |= 0x60;
 983         if (msn > 0x90 || CC & CC_C)
 984                 cf |= 0x60;
 985         t = cf + A;
 986         CLR_NZV;        /* keep carry from previous operation */
 987         SET_NZ8((BYTE) t);
 988         SET_C8(t);
 989         A = t;
 990 }
 991
 992
 993 /* $1A ORCC immediate ##### */
 994 OP_HANDLER(orcc) {
 995         uint8 t;
 996         IMMBYTE(t);
 997         CC |= t;
 998 }
 999
1000 /* $1B ILLEGAL */
1001
1002
1003 /* $1C ANDCC immediate ##### */
1004 OP_HANDLER(andcc) {
1005         uint8 t;
1006         IMMBYTE(t);
1007         CC &= t;
1008 //  check_irq_lines(); /* HJB 990116 */
1009 }
1010
1011 /* $1D SEX inherent -**-- */
1012 OP_HANDLER(sex) {
1013         uint16 t;
1014         t = SIGNED(B);
1015         D = t;
1016         //  CLR_NZV;    Tim Lindner 20020905: verified that V flag is not affected
1017         CLR_NZ;
1018         SET_NZ16(t);
1019 }
1020
1021         /* $1E EXG inherent ----- */// 20100825
1022 OP_HANDLER(exg) {
1023         uint16 t1, t2;
1024         uint8 tb;
1025         IMMBYTE(tb);
1026         /*
1027          * 20111011: 16bit vs 16Bitの演算にする(XM7/ cpu_x86.asmより
1028          */
1029         {
1030                 switch ((tb >> 4) & 15) {
1031                         case 0:
1032                                 t1 = D;
1033                                 break;
1034                         case 1:
1035                                 t1 = X;
1036                                 break;
1037                         case 2:
1038                                 t1 = Y;
1039                                 break;
1040                         case 3:
1041                                 t1 = U;
1042                                 break;
1043                         case 4:
1044                                 t1 = S;
1045                                 break;
1046                         case 5:
1047                                 t1 = PC;
1048                                 break;
1049                         case 8:
1050                                 t1 = A | 0xff00;
1051                                 break;
1052                         case 9:
1053                                 t1 = B | 0xff00;
1054                                 break;
1055                         case 10:
1056                                 t1 = CC | 0xff00;
1057                                 break;
1058                         case 11:
1059                                 t1 = DP | 0xff00;
1060                                 break;
1061                         default:
1062                                 t1 = 0xffff;
1063                                 break;
1064                 }
1065                 switch (tb & 15) {
1066                         case 0:
1067                                 t2 = D;
1068                                 break;
1069                         case 1:
1070                                 t2 = X;
1071                                 break;
1072                         case 2:
1073                                 t2 = Y;
1074                                 break;
1075                         case 3:
1076                                 t2 = U;
1077                                 break;
1078                         case 4:
1079                                 t2 = S;
1080                                 break;
1081                         case 5:
1082                                 t2 = PC;
1083                                 break;
1084                         case 8:
1085                                 t2 = A | 0xff00;
1086                                 break;
1087                         case 9:
1088                                 t2 = B | 0xff00;
1089                                 break;
1090                         case 10:
1091                                 t2 = CC | 0xff00;
1092                                 break;
1093                         case 11:
1094                                 t2 = DP | 0xff00;
1095                                 break;
1096                         default:
1097                                 t2 = 0xffff;
1098                                 break;
1099                 }
1100         }
1101         switch ((tb >> 4) & 15) {
1102                 case 0:
1103                         D = t2;
1104                         break;
1105                 case 1:
1106                         X = t2;
1107                         break;
1108                 case 2:
1109                         Y = t2;
1110                         break;
1111                 case 3:
1112                         U = t2;
1113                         break;
1114                 case 4:
1115                         S = t2;
1116                         int_state |= MC6809_LDS;
1117                         break;
1118                 case 5:
1119                         PC = t2;
1120                         break;
1121                 case 8:
1122                         A = t2 & 0x00ff;
1123                         break;
1124                 case 9:
1125                         B = t2 & 0x00ff;
1126                         break;
1127                 case 10:
1128                         CC = t2 & 0x00ff;
1129                         break;
1130                 case 11:
1131                         DP = t2 & 0x00ff;
1132                         break;
1133         }
1134         switch (tb & 15) {
1135                 case 0:
1136                         D = t1;
1137                         break;
1138                 case 1:
1139                         X = t1;
1140                         break;
1141                 case 2:
1142                         Y = t1;
1143                         break;
1144                 case 3:
1145                         U = t1;
1146                         break;
1147                 case 4:
1148                         S = t1;
1149                         int_state |= MC6809_LDS;
1150                         break;
1151                 case 5:
1152                         PC = t1;
1153                         break;
1154                 case 8:
1155                         A = t1 & 0x00ff;
1156                         break;
1157                 case 9:
1158                         B = t1 & 0x00ff;
1159                         break;
1160                 case 10:
1161                         CC = t1 & 0x00ff;
1162                         break;
1163                 case 11:
1164                         DP = t1 & 0x00ff;
1165                         break;
1166         }
1167 }
1168
1169 /* $1F TFR inherent ----- */
1170 OP_HANDLER(tfr) {
1171         uint8 tb;
1172         uint16 t;
1173         IMMBYTE(tb);
1174         /*
1175          * 20111011: 16bit vs 16Bitの演算にする(XM7/ cpu_x86.asmより)
1176          */
1177         {
1178                 switch ((tb >> 4) & 15) {
1179                         case 0:
1180                                 t = D;
1181                                 break;
1182                         case 1:
1183                                 t = X;
1184                                 break;
1185                         case 2:
1186                                 t = Y;
1187                                 break;
1188                         case 3:
1189                                 t = U;
1190                                 break;
1191                         case 4:
1192                                 t = S;
1193                                 break;
1194                         case 5:
1195                                 t = PC;
1196                                 break;
1197                         case 8:
1198                                 t = A | 0xff00;
1199                                 break;
1200                         case 9:
1201                                 t = B | 0xff00;
1202                                 break;
1203                         case 10:
1204                                 t = CC | 0xff00;
1205                                 break;
1206                         case 11:
1207                                 t = DP | 0xff00;
1208                                 break;
1209                         default:
1210                                 t = 0xffff;
1211                                 break;
1212                 }
1213         }
1214         switch (tb & 15) {
1215                 case 0:
1216                         D = t;
1217                         break;
1218                 case 1:
1219                         X = t;
1220                         break;
1221                 case 2:
1222                         Y = t;
1223                         break;
1224                 case 3:
1225                         U = t;
1226                         break;
1227                 case 4:
1228                         S = t;
1229                         int_state |= MC6809_LDS;
1230                         break;
1231                 case 5:
1232                         PC = t;
1233                         break;
1234                 case 8:
1235                         A = t & 0x00ff;
1236                         break;
1237                 case 9:
1238                         B = t & 0x00ff;
1239                         break;
1240                 case 10:
1241                         CC = t & 0x00ff;
1242                         break;
1243                 case 11:
1244                         DP = t & 0x00ff;
1245                         break;
1246         }
1247 }
1248
1249 /* $20 BRA relative ----- */
1250 OP_HANDLER(bra) {
1251         BRANCH(TRUE);
1252 }
1253
1254 /* $21 BRN relative ----- */
1255 OP_HANDLER(brn) {
1256         BRANCH(FALSE);
1257 }
1258
1259 /* $1021 LBRN relative ----- */
1260 OP_HANDLER(lbrn) {
1261         LBRANCH(FALSE);
1262 }
1263
1264 /* $22 BHI relative ----- */
1265 OP_HANDLER(bhi) {
1266         BRANCH(!(CC & (CC_Z | CC_C)));
1267 }
1268
1269 /* $1022 LBHI relative ----- */
1270 OP_HANDLER(lbhi) {
1271         LBRANCH(!(CC & (CC_Z | CC_C)));
1272 }
1273
1274 /* $23 BLS relative ----- */
1275 OP_HANDLER(bls) {
1276         BRANCH((CC & (CC_Z | CC_C)));
1277 }
1278
1279 /* $1023 LBLS relative ----- */
1280 OP_HANDLER(lbls) {
1281         LBRANCH((CC & (CC_Z | CC_C)));
1282 }
1283
1284 /* $24 BCC relative ----- */
1285 OP_HANDLER(bcc) {
1286         BRANCH(!(CC & CC_C));
1287 }
1288
1289 /* $1024 LBCC relative ----- */
1290 OP_HANDLER(lbcc) {
1291         LBRANCH(!(CC & CC_C));
1292 }
1293
1294 /* $25 BCS relative ----- */
1295 OP_HANDLER(bcs) {
1296         BRANCH((CC & CC_C));
1297 }
1298
1299 /* $1025 LBCS relative ----- */
1300 OP_HANDLER(lbcs) {
1301         LBRANCH((CC & CC_C));
1302 }
1303
1304 /* $26 BNE relative ----- */
1305 OP_HANDLER(bne) {
1306         BRANCH(!(CC & CC_Z));
1307 }
1308
1309 /* $1026 LBNE relative ----- */
1310 OP_HANDLER(lbne) {
1311         LBRANCH(!(CC & CC_Z));
1312 }
1313
1314 /* $27 BEQ relative ----- */
1315 OP_HANDLER(beq) {
1316         BRANCH((CC & CC_Z));
1317 }
1318
1319 /* $1027 LBEQ relative ----- */
1320 OP_HANDLER(lbeq) {
1321         LBRANCH((CC & CC_Z));
1322 }
1323
1324 /* $28 BVC relative ----- */
1325 OP_HANDLER(bvc) {
1326         BRANCH(!(CC & CC_V));
1327 }
1328
1329 /* $1028 LBVC relative ----- */
1330 OP_HANDLER(lbvc) {
1331         LBRANCH(!(CC & CC_V));
1332 }
1333
1334 /* $29 BVS relative ----- */
1335 OP_HANDLER(bvs) {
1336         BRANCH((CC & CC_V));
1337 }
1338
1339 /* $1029 LBVS relative ----- */
1340 OP_HANDLER(lbvs) {
1341         LBRANCH((CC & CC_V));
1342 }
1343
1344 /* $2A BPL relative ----- */
1345 OP_HANDLER(bpl) {
1346         BRANCH(!(CC & CC_N));
1347 }
1348
1349 /* $102A LBPL relative ----- */
1350 OP_HANDLER(lbpl) {
1351         LBRANCH(!(CC & CC_N));
1352 }
1353
1354 /* $2B BMI relative ----- */
1355 OP_HANDLER(bmi) {
1356         BRANCH((CC & CC_N));
1357 }
1358
1359 /* $102B LBMI relative ----- */
1360 OP_HANDLER(lbmi) {
1361         LBRANCH((CC & CC_N));
1362 }
1363
1364 /* $2C BGE relative ----- */
1365 OP_HANDLER(bge) {
1366         BRANCH(!NXORV);
1367 }
1368
1369 /* $102C LBGE relative ----- */
1370 OP_HANDLER(lbge) {
1371         LBRANCH(!NXORV);
1372 }
1373
1374 /* $2D BLT relative ----- */
1375 OP_HANDLER(blt) {
1376         BRANCH(NXORV);
1377 }
1378
1379 /* $102D LBLT relative ----- */
1380 OP_HANDLER(lblt) {
1381         LBRANCH(NXORV);
1382 }
1383
1384 /* $2E BGT relative ----- */
1385 OP_HANDLER(bgt) {
1386         BRANCH(!(NXORV || (CC & CC_Z)));
1387 }
1388
1389 /* $102E LBGT relative ----- */
1390 OP_HANDLER(lbgt) {
1391         LBRANCH(!(NXORV || (CC & CC_Z)));
1392 }
1393
1394 /* $2F BLE relative ----- */
1395 OP_HANDLER(ble) {
1396         BRANCH((NXORV || (CC & CC_Z)));
1397 }
1398
1399 /* $102F LBLE relative ----- */
1400 OP_HANDLER(lble) {
1401         LBRANCH((NXORV || (CC & CC_Z)));
1402 }
1403
1404 /* $30 LEAX indexed --*-- */
1405 OP_HANDLER(leax) {
1406                 fetch_effective_address();
1407                 X = EA;
1408                 CLR_Z;
1409                 SET_Z(X);
1410         }
1411
1412 /* $31 LEAY indexed --*-- */
1413 OP_HANDLER(leay) {
1414                 fetch_effective_address();
1415                 Y = EA;
1416                 CLR_Z;
1417                 SET_Z(Y);
1418
1419         }
1420
1421 /* $32 LEAS indexed ----- */
1422 OP_HANDLER(leas) {
1423                 fetch_effective_address();
1424                 S = EA;
1425 //    int_state |= MC6809_LDS; // 20130513 removed.
1426         }
1427
1428 /* $33 LEAU indexed ----- */
1429 OP_HANDLER(leau) {
1430                 fetch_effective_address();
1431                 U = EA;
1432         }
1433
1434 /* $34 PSHS inherent ----- */
1435 OP_HANDLER(pshs) {
1436                 uint8 t, dmy;
1437                 IMMBYTE(t);
1438                 dmy = RM(S);    // Add 20100825
1439                 if (t & 0x80) {
1440                         PUSHWORD(pPC);
1441                         icount -= 2;
1442                 }
1443                 if (t & 0x40) {
1444                         PUSHWORD(pU);
1445                         icount -= 2;
1446                 }
1447                 if (t & 0x20) {
1448                         PUSHWORD(pY);
1449                         icount -= 2;
1450                 }
1451                 if (t & 0x10) {
1452                         PUSHWORD(pX);
1453                         icount -= 2;
1454                 }
1455                 if (t & 0x08) {
1456                         PUSHBYTE(DP);
1457                         icount -= 1;
1458                 }
1459                 if (t & 0x04) {
1460                         PUSHBYTE(B);
1461                         icount -= 1;
1462                 }
1463                 if (t & 0x02) {
1464                         PUSHBYTE(A);
1465                         icount -= 1;
1466                 }
1467                 if (t & 0x01) {
1468                         PUSHBYTE(CC);
1469                         icount -= 1;
1470                 }
1471         }
1472
1473 /* 35 PULS inherent ----- */
1474 OP_HANDLER(puls) {
1475                 uint8 t, dmy;
1476                 IMMBYTE(t);
1477                 if (t & 0x01) {
1478                         PULLBYTE(CC);
1479                         icount -= 1;
1480                 }
1481                 if (t & 0x02) {
1482                         PULLBYTE(A);
1483                         icount -= 1;
1484                 }
1485                 if (t & 0x04) {
1486                         PULLBYTE(B);
1487                         icount -= 1;
1488                 }
1489                 if (t & 0x08) {
1490                         PULLBYTE(DP);
1491                         icount -= 1;
1492                 }
1493                 if (t & 0x10) {
1494                         PULLWORD(XD);
1495                         icount -= 2;
1496                 }
1497                 if (t & 0x20) {
1498                         PULLWORD(YD);
1499                         icount -= 2;
1500                 }
1501                 if (t & 0x40) {
1502                         PULLWORD(UD);
1503                         icount -= 2;
1504                 }
1505                 if (t & 0x80) {
1506                         PULLWORD(PCD);
1507                         icount -= 2;
1508                 }
1509                 dmy = RM(S);    // Add 20100825
1510
1511                 /* HJB 990225: moved check after all PULLs */
1512 //  if( t&0x01 ) { check_irq_lines(); }
1513         }
1514
1515 /* $36 PSHU inherent ----- */
1516 OP_HANDLER(pshu) {
1517                 uint8 t, dmy;
1518                 IMMBYTE(t);
1519                 dmy = RM(U);    // Add 20100825
1520                 if (t & 0x80) {
1521                         PSHUWORD(pPC);
1522                         icount -= 2;
1523                 }
1524                 if (t & 0x40) {
1525                         PSHUWORD(pS);
1526                         icount -= 2;
1527                 }
1528                 if (t & 0x20) {
1529                         PSHUWORD(pY);
1530                         icount -= 2;
1531                 }
1532                 if (t & 0x10) {
1533                         PSHUWORD(pX);
1534                         icount -= 2;
1535                 }
1536                 if (t & 0x08) {
1537                         PSHUBYTE(DP);
1538                         icount -= 1;
1539                 }
1540                 if (t & 0x04) {
1541                         PSHUBYTE(B);
1542                         icount -= 1;
1543                 }
1544                 if (t & 0x02) {
1545                         PSHUBYTE(A);
1546                         icount -= 1;
1547                 }
1548                 if (t & 0x01) {
1549                         PSHUBYTE(CC);
1550                         icount -= 1;
1551                 }
1552         }
1553
1554 /* 37 PULU inherent ----- */
1555 OP_HANDLER(pulu) {
1556                 uint8 t, dmy;
1557                 IMMBYTE(t);
1558                 if (t & 0x01) {
1559                         PULUBYTE(CC);
1560                         icount -= 1;
1561                 }
1562                 if (t & 0x02) {
1563                         PULUBYTE(A);
1564                         icount -= 1;
1565                 }
1566                 if (t & 0x04) {
1567                         PULUBYTE(B);
1568                         icount -= 1;
1569                 }
1570                 if (t & 0x08) {
1571                         PULUBYTE(DP);
1572                         icount -= 1;
1573                 }
1574                 if (t & 0x10) {
1575                         PULUWORD(XD);
1576                         icount -= 2;
1577                 }
1578                 if (t & 0x20) {
1579                         PULUWORD(YD);
1580                         icount -= 2;
1581                 }
1582                 if (t & 0x40) {
1583                         PULUWORD(SD);
1584                         icount -= 2;
1585                 }
1586                 if (t & 0x80) {
1587                         PULUWORD(PCD);
1588                         icount -= 2;
1589                 }
1590                 dmy = RM(U);    // Add 20100825
1591
1592                 /* HJB 990225: moved check after all PULLs */
1593                 //if( t&0x01 ) { check_irq_lines(); }
1594         }
1595
1596 /* $38 ILLEGAL */
1597
1598 /* $39 RTS inherent ----- */
1599 OP_HANDLER(rts) {
1600                 PULLWORD(PCD);
1601         }
1602
1603 /* $3A ABX inherent ----- */
1604 OP_HANDLER(abx) {
1605                 uint16 b = B & 0x00ff;
1606                 X = X + b;
1607         }
1608
1609 /* $3B RTI inherent ##### */
1610 OP_HANDLER(rti) {
1611 //  uint8 t;
1612                 PULLBYTE(CC);
1613 //  t = CC & CC_E;    /* HJB 990225: entire state saved? */
1614                 if ((CC & CC_E) != 0) { // NMIIRQ
1615                         icount -= 9;
1616                         PULLBYTE(A);
1617                         PULLBYTE(B);
1618                         PULLBYTE(DP);
1619                         PULLWORD(XD);
1620                         PULLWORD(YD);
1621                         PULLWORD(UD);
1622                 }
1623                 PULLWORD(PCD);
1624 //  check_irq_lines(); /* HJB 990116 */
1625         }
1626
1627 /* $3C CWAI inherent ----1 */
1628 OP_HANDLER(cwai) {
1629                 uint8 t;
1630
1631                 if ((int_state & MC6809_CWAI_IN) != 0) {        // FIX 20130417
1632                         /* CWAI実行中 */
1633                         PC -= 1;        // 次回もCWAI命令実行
1634                         return;
1635                 }
1636                 /* 今回初めてCWAI実行 */
1637         first:
1638                 IMMBYTE(t);
1639                 CC = CC & t;
1640                 CC |= CC_E;     /* HJB 990225: save entire state */
1641                 PUSHWORD(pPC);
1642                 PUSHWORD(pU);
1643                 PUSHWORD(pY);
1644                 PUSHWORD(pX);
1645                 PUSHBYTE(DP);
1646                 PUSHBYTE(B);
1647                 PUSHBYTE(A);
1648                 PUSHBYTE(CC);
1649
1650                 int_state = int_state | MC6809_CWAI_IN;
1651                 int_state &= ~MC6809_CWAI_OUT;  // 0xfeff
1652                 PC -= 2;        // レジスタ退避して再度実行
1653                 return;
1654         }
1655
1656 /* $3D MUL inherent --*-@ */
1657 OP_HANDLER(mul) {
1658                 uint16 t;
1659                 t = A * B;
1660                 CLR_ZC;
1661                 SET_Z16(t);
1662                 if (t & 0x80)
1663                         SEC;
1664                 //D = t;
1665                 A = (t & 0xff00) >> 8;
1666                 B = (t & 0x00ff);
1667         }
1668
1669 /* $3E RST */
1670 OP_HANDLER(rst) {
1671                 this->reset();
1672         }
1673
1674
1675 /* $3F SWI (SWI2 SWI3) absolute indirect ----- */
1676 OP_HANDLER(swi) {
1677                 CC |= CC_E;     /* HJB 980225: save entire state */
1678                 PUSHWORD(pPC);
1679                 PUSHWORD(pU);
1680                 PUSHWORD(pY);
1681                 PUSHWORD(pX);
1682                 PUSHBYTE(DP);
1683                 PUSHBYTE(B);
1684                 PUSHBYTE(A);
1685                 PUSHBYTE(CC);
1686                 CC |= CC_IF | CC_II;    /* inhibit FIRQ and IRQ */
1687                 PCD = RM16(0xfffa);
1688         }
1689
1690 /* $103F SWI2 absolute indirect ----- */
1691 OP_HANDLER(swi2) {
1692                 CC |= CC_E;     /* HJB 980225: save entire state */
1693                 PUSHWORD(pPC);
1694                 PUSHWORD(pU);
1695                 PUSHWORD(pY);
1696                 PUSHWORD(pX);
1697                 PUSHBYTE(DP);
1698                 PUSHBYTE(B);
1699                 PUSHBYTE(A);
1700                 PUSHBYTE(CC);
1701                 PCD = RM16(0xfff4);
1702         }
1703
1704 /* $113F SWI3 absolute indirect ----- */
1705 OP_HANDLER(swi3) {
1706                 CC |= CC_E;     /* HJB 980225: save entire state */
1707                 PUSHWORD(pPC);
1708                 PUSHWORD(pU);
1709                 PUSHWORD(pY);
1710                 PUSHWORD(pX);
1711                 PUSHBYTE(DP);
1712                 PUSHBYTE(B);
1713                 PUSHBYTE(A);
1714                 PUSHBYTE(CC);
1715                 PCD = RM16(0xfff2);
1716         }
1717
1718 /* $40 NEGA inherent ?**** */
1719 OP_HANDLER(nega) {
1720                 uint16 r;
1721                 r = -A;
1722                 CLR_NZVC;
1723                 SET_FLAGS8(0, A, r);
1724                 A = r;
1725         }
1726
1727 /* $41 NEGA */
1728
1729
1730 /* $43 COMA inherent -**01 */
1731 OP_HANDLER(coma) {
1732                 A = ~A;
1733                 CLR_NZV;
1734                 SET_NZ8(A);
1735                 SEC;
1736         }
1737
1738 /* $42 NGCA */
1739 OP_HANDLER(ngca) {
1740                 if ((CC & CC_C) == 0) {
1741                         nega();
1742                 }
1743                 else {
1744                         coma();
1745                 }
1746         }
1747
1748 /* $44 LSRA inherent -0*-* */
1749 OP_HANDLER(lsra) {
1750                 CLR_NZC;
1751                 CC |= (A & CC_C);
1752                 A >>= 1;
1753                 SET_Z8(A);
1754         }
1755
1756 /* $45 LSRA */
1757
1758 /* $46 RORA inherent -**-* */
1759 OP_HANDLER(rora) {
1760                 uint8 r;
1761                 uint8 t;
1762
1763                 r = (CC & CC_C) << 7;
1764                 CLR_NZC;
1765                 CC |= (A & CC_C);
1766                 t = A >> 1;
1767                 r |= t;
1768                 SET_NZ8(r);
1769                 A = r;
1770         }
1771
1772 /* $47 ASRA inherent ?**-* */
1773 OP_HANDLER(asra) {
1774                 CLR_NZC;
1775                 CC |= (A & CC_C);
1776                 A = (A & 0x80) | (A >> 1);
1777                 SET_NZ8(A);
1778         }
1779
1780 /* $48 ASLA inherent ?**** */
1781 OP_HANDLER(asla) {
1782                 uint16 r;
1783                 r = A << 1;
1784                 CLR_NZVC;
1785                 SET_FLAGS8(A, A, r);
1786                 A = r;
1787         }
1788
1789 /* $49 ROLA inherent -**** */
1790 OP_HANDLER(rola) {
1791                 uint16 t, r;
1792                 t = A & 0x00ff;
1793                 r = (CC & CC_C) | (t << 1);
1794                 CLR_NZVC;
1795                 SET_FLAGS8(t, t, r);
1796                 A = (BYTE) (r & 0x00ff);
1797         }
1798
1799 /* $4A DECA inherent -***- */
1800 OP_HANDLER(deca) {
1801                 --A;
1802                 CLR_NZV;
1803                 SET_FLAGS8D(A);
1804         }
1805
1806
1807 /* $4B DCCA */
1808 OP_HANDLER(dcca) {
1809                 uint8 s;
1810 //  uint8 t = A;
1811                 --A;
1812                 CLR_NZVC;
1813                 SET_FLAGS8D(A);
1814                 s = CC;
1815                 s >>= 2;
1816                 s = ~s; // 20111011
1817                 s = s & CC_C;
1818                 CC = s | CC;
1819         }
1820
1821 /* $4C INCA inherent -***- */
1822 OP_HANDLER(inca) {
1823                 ++A;
1824                 CLR_NZV;
1825                 SET_FLAGS8I(A);
1826         }
1827
1828 /* $4D TSTA inherent -**0- */
1829 OP_HANDLER(tsta) {
1830                 CLR_NZV;
1831                 SET_NZ8(A);
1832         }
1833
1834 /* $4E ILLEGAL */
1835 OP_HANDLER(clca) {
1836                 A = 0;
1837                 CLR_NZV;
1838                 //SET_Z8(A);
1839                 SEZ;    // 20111117
1840         }
1841
1842 /* $4F CLRA inherent -0100 */
1843 OP_HANDLER(clra) {
1844                 A = 0;
1845                 CLR_NZVC;
1846                 SEZ;
1847         }
1848
1849 /* $50 NEGB inherent ?**** */
1850 OP_HANDLER(negb) {
1851                 uint16 r;
1852                 r = -B;
1853                 CLR_NZVC;
1854                 SET_FLAGS8(0, B, r);
1855                 B = r;
1856         }
1857
1858 /* $51 NEGB */
1859
1860 /* $52 NGCB */
1861
1862 /* $53 COMB inherent -**01 */
1863 OP_HANDLER(comb) {
1864                 B = ~B;
1865                 CLR_NZV;
1866                 SET_NZ8(B);
1867                 SEC;
1868         }
1869
1870 /* $52 NGCB */
1871 OP_HANDLER(ngcb) {
1872                 if ((CC & CC_C) == 0) {
1873                         negb();
1874                 }
1875                 else {
1876                         comb();
1877                 }
1878         }
1879
1880 /* $54 LSRB inherent -0*-* */
1881 OP_HANDLER(lsrb) {
1882                 CLR_NZC;
1883                 CC |= (B & CC_C);
1884                 B >>= 1;
1885                 SET_Z8(B);
1886         }
1887
1888 /* $55 LSRB */
1889
1890 /* $56 RORB inherent -**-* */
1891 OP_HANDLER(rorb) {
1892                 uint8 r;
1893                 uint8 t;
1894
1895                 r = (CC & CC_C) << 7;
1896                 CLR_NZC;
1897                 CC |= (B & CC_C);
1898                 t = B >> 1;
1899                 r |= t;
1900                 SET_NZ8(r);
1901                 B = r;
1902         }
1903
1904 /* $57 ASRB inherent ?**-* */
1905 OP_HANDLER(asrb) {
1906                 CLR_NZC;
1907                 CC |= (B & CC_C);
1908                 B = (B & 0x80) | (B >> 1);
1909                 SET_NZ8(B);
1910         }
1911
1912 /* $58 ASLB inherent ?**** */
1913 OP_HANDLER(aslb) {
1914                 uint16 r;
1915                 r = B << 1;
1916                 CLR_NZVC;
1917                 SET_FLAGS8(B, B, r);
1918                 B = r;
1919         }
1920
1921 /* $59 ROLB inherent -**** */
1922 OP_HANDLER(rolb) {
1923                 uint16 t, r;
1924                 t = B;
1925                 r = CC & CC_C;
1926                 r |= t << 1;
1927                 CLR_NZVC;
1928                 SET_FLAGS8(t, t, r);
1929                 B = r;
1930         }
1931
1932 /* $5A DECB inherent -***- */
1933 OP_HANDLER(decb) {
1934                 uint8 t;
1935                 t = B;
1936                 CLR_NZV;
1937                 B -= 1;
1938                 SET_FLAGS8D(B);
1939         }
1940
1941 /* $5B ILLEGAL */
1942 /* $5B DCCB */
1943 OP_HANDLER(dccb) {
1944                 uint8 s;
1945                 --B;
1946                 CLR_NZVC;
1947                 SET_FLAGS8D(B);
1948                 s = CC;
1949                 s >>= 2;
1950                 s = ~s; // 20111011
1951                 s = s & CC_C;
1952                 CC = s | CC;
1953         }
1954
1955 /* $5C INCB inherent -***- */
1956 OP_HANDLER(incb) {
1957                 ++B;
1958                 CLR_NZV;
1959                 SET_FLAGS8I(B);
1960         }
1961
1962 /* $5D TSTB inherent -**0- */
1963 OP_HANDLER(tstb) {
1964                 CLR_NZV;
1965                 SET_NZ8(B);
1966         }
1967
1968 /* $5E ILLEGAL */
1969 OP_HANDLER(clcb) {
1970                 B = 0;
1971                 CLR_NZV;
1972 //   SET_Z8(B);
1973                 SEZ;    //  20111117
1974         }
1975
1976 /* $5F CLRB inherent -0100 */
1977 OP_HANDLER(clrb) {
1978                 B = 0;
1979                 CLR_NZVC;
1980                 SEZ;
1981         }
1982
1983 /* $60 NEG indexed ?**** */
1984 OP_HANDLER(neg_ix) {
1985                 uint16 r, t;
1986                 fetch_effective_address();
1987                 t = RM(EAD);
1988                 r = -t;
1989                 CLR_NZVC;
1990                 SET_FLAGS8(0, t, r);
1991                 WM(EAD, r);
1992         }
1993
1994 /* $61 ILLEGAL */
1995
1996
1997 /* $63 COM indexed -**01 */
1998 OP_HANDLER(com_ix) {
1999                 uint8 t;
2000                 fetch_effective_address();
2001                 t = ~RM(EAD);
2002                 CLR_NZV;
2003                 SET_NZ8(t);
2004                 SEC;
2005                 WM(EAD, t);
2006         }
2007 /* $62 ILLEGAL */
2008 OP_HANDLER(ngc_ix) {
2009                 if ((CC & CC_C) == 0) {
2010                         neg_ix();
2011                 }
2012                 else {
2013                         com_ix();
2014                 }
2015         }
2016
2017 /* $64 LSR indexed -0*-* */
2018 OP_HANDLER(lsr_ix) {
2019                 uint8 t;
2020                 fetch_effective_address();
2021                 t = RM(EAD);
2022                 CLR_NZC;
2023                 CC |= (t & CC_C);
2024                 t >>= 1;
2025                 SET_Z8(t);
2026                 WM(EAD, t);
2027         }
2028
2029 /* $65 ILLEGAL */
2030
2031 /* $66 ROR indexed -**-* */
2032 OP_HANDLER(ror_ix) {
2033                 uint8 t, r;
2034                 fetch_effective_address();
2035                 t = RM(EAD);
2036                 r = (CC & CC_C) << 7;
2037                 CLR_NZC;
2038                 CC |= (t & CC_C);
2039                 r |= t >> 1;
2040                 SET_NZ8(r);
2041                 WM(EAD, r);
2042         }
2043
2044 /* $67 ASR indexed ?**-* */
2045 OP_HANDLER(asr_ix) {
2046                 uint8 t;
2047                 fetch_effective_address();
2048                 t = RM(EAD);
2049                 CLR_NZC;
2050                 CC |= (t & CC_C);
2051                 t = (t & 0x80) | (t >> 1);
2052                 SET_NZ8(t);
2053                 WM(EAD, t);
2054         }
2055
2056 /* $68 ASL indexed ?**** */
2057 OP_HANDLER(asl_ix) {
2058                 uint16 t, r;
2059                 fetch_effective_address();
2060                 t = RM(EAD);
2061                 r = t << 1;
2062                 CLR_NZVC;
2063                 SET_FLAGS8(t, t, r);
2064                 WM(EAD, r);
2065         }
2066
2067 /* $69 ROL indexed -**** */
2068 OP_HANDLER(rol_ix) {
2069                 uint16 t, r;
2070                 fetch_effective_address();
2071                 t = RM(EAD);
2072                 r = CC & CC_C;
2073                 r |= t << 1;
2074                 CLR_NZVC;
2075                 SET_FLAGS8(t, t, r);
2076                 WM(EAD, r);
2077         }
2078
2079 /* $6A DEC indexed -***- */
2080 OP_HANDLER(dec_ix) {
2081                 uint8 t;
2082                 fetch_effective_address();
2083                 t = RM(EAD) - 1;
2084                 CLR_NZV;
2085                 SET_FLAGS8D(t);
2086                 WM(EAD, t);
2087         }
2088
2089 /* $6B DCC index */
2090 OP_HANDLER(dcc_ix) {
2091                 uint8 t, s;
2092                 fetch_effective_address();
2093                 t = RM(EAD) - 1;
2094                 CLR_NZVC;
2095                 SET_FLAGS8D(t);
2096                 s = CC;
2097                 s >>= 2;
2098                 s = ~s; // 20111011
2099                 s = s & CC_C;
2100                 CC = s | CC;
2101                 WM(EAD, t);
2102         }
2103
2104 /* $6C INC indexed -***- */
2105 OP_HANDLER(inc_ix) {
2106                 uint8 t;
2107                 fetch_effective_address();
2108                 t = RM(EAD) + 1;
2109                 CLR_NZV;
2110                 SET_FLAGS8I(t);
2111                 WM(EAD, t);
2112         }
2113
2114 /* $6D TST indexed -**0- */
2115 OP_HANDLER(tst_ix) {
2116                 uint8 t;
2117                 fetch_effective_address();
2118                 t = RM(EAD);
2119                 CLR_NZV;
2120                 SET_NZ8(t);
2121         }
2122
2123 /* $6E JMP indexed ----- */
2124 OP_HANDLER(jmp_ix) {
2125                 fetch_effective_address();
2126                 PCD = EAD;
2127         }
2128
2129 /* $6F CLR indexed -0100 */
2130 OP_HANDLER(clr_ix) {
2131                 uint8 dummy;
2132                 fetch_effective_address();
2133                 dummy = RM(EAD);
2134                 WM(EAD, 0);
2135                 CLR_NZVC;
2136                 SEZ;
2137         }
2138
2139 /* $70 NEG extended ?**** */
2140 OP_HANDLER(neg_ex) {
2141                 uint16 r, t;
2142
2143                 EXTBYTE(t);
2144                 r = -t;
2145                 CLR_NZVC;
2146                 SET_FLAGS8(0, t, r);
2147                 WM(EAD, r);
2148         }
2149
2150
2151 /* $73 COM extended -**01 */
2152 OP_HANDLER(com_ex) {
2153                 uint8 t;
2154                 EXTBYTE(t);
2155                 t = ~t;
2156                 CLR_NZV;
2157                 SET_NZ8(t);
2158                 SEC;
2159                 WM(EAD, t);
2160         }
2161
2162 /* $72 NGC extended */
2163 OP_HANDLER(ngc_ex) {
2164                 if ((CC & CC_C) == 0) {
2165                         neg_ex();
2166                 }
2167                 else {
2168                         com_ex();
2169                 }
2170         }
2171
2172 /* $74 LSR extended -0*-* */
2173 OP_HANDLER(lsr_ex) {
2174                 uint8 t;
2175                 EXTBYTE(t);
2176                 CLR_NZC;
2177                 CC |= (t & CC_C);
2178                 t >>= 1;
2179                 SET_Z8(t);
2180                 WM(EAD, t);
2181         }
2182
2183 /* $75 ILLEGAL */
2184
2185 /* $76 ROR extended -**-* */
2186 OP_HANDLER(ror_ex) {
2187                 uint8 t, r;
2188                 EXTBYTE(t);
2189                 r = (CC & CC_C) << 7;
2190                 CLR_NZC;
2191                 CC |= (t & CC_C);
2192                 r |= t >> 1;
2193                 SET_NZ8(r);
2194                 WM(EAD, r);
2195         }
2196
2197 /* $77 ASR extended ?**-* */
2198 OP_HANDLER(asr_ex) {
2199                 uint8 t;
2200                 EXTBYTE(t);
2201                 CLR_NZC;
2202                 CC |= (t & CC_C);
2203                 t = (t & 0x80) | (t >> 1);
2204                 SET_NZ8(t);
2205                 WM(EAD, t);
2206         }
2207
2208 /* $78 ASL extended ?**** */
2209 OP_HANDLER(asl_ex) {
2210                 uint16 t, r;
2211                 EXTBYTE(t);
2212                 r = t << 1;
2213                 CLR_NZVC;
2214                 SET_FLAGS8(t, t, r);
2215                 WM(EAD, r);
2216         }
2217
2218 /* $79 ROL extended -**** */
2219 OP_HANDLER(rol_ex) {
2220                 uint16 t, r;
2221                 EXTBYTE(t);
2222                 r = (CC & CC_C) | (t << 1);
2223                 CLR_NZVC;
2224                 SET_FLAGS8(t, t, r);
2225                 WM(EAD, r);
2226         }
2227
2228 /* $7A DEC extended -***- */
2229 OP_HANDLER(dec_ex) {
2230                 uint8 t;
2231                 EXTBYTE(t);
2232                 --t;
2233                 CLR_NZV;
2234                 SET_FLAGS8D(t);
2235                 WM(EAD, t);
2236         }
2237
2238 /* $7B ILLEGAL */
2239 /* $6B DCC index */
2240 OP_HANDLER(dcc_ex) {
2241                 uint8 t, s;
2242                 EXTBYTE(t);
2243                 --t;
2244                 CLR_NZVC;
2245                 SET_FLAGS8D(t);
2246                 s = CC;
2247                 s >>= 2;
2248                 s = ~s; // 20111011
2249                 s = s & CC_C;
2250                 CC = s | CC;
2251                 WM(EAD, t);
2252         }
2253
2254 /* $7C INC extended -***- */
2255 OP_HANDLER(inc_ex) {
2256                 uint8 t;
2257                 EXTBYTE(t);
2258                 ++t;
2259                 CLR_NZV;
2260                 SET_FLAGS8I(t);
2261                 WM(EAD, t);
2262         }
2263
2264 /* $7D TST extended -**0- */
2265 OP_HANDLER(tst_ex) {
2266                 uint8 t;
2267                 EXTBYTE(t);
2268                 CLR_NZV;
2269                 SET_NZ8(t);
2270         }
2271
2272 /* $7E JMP extended ----- */
2273 OP_HANDLER(jmp_ex) {
2274                 EXTENDED;
2275                 PCD = EAD;
2276         }
2277
2278 /* $7F CLR extended -0100 */
2279 OP_HANDLER(clr_ex) {
2280                 EXTENDED;
2281                 (void) RM(EAD);
2282                 WM(EAD, 0);
2283                 CLR_NZVC;
2284                 SEZ;
2285         }
2286
2287 /* $80 SUBA immediate ?**** */
2288 OP_HANDLER(suba_im) {
2289                 uint16 r;
2290                 uint8 t;
2291                 IMMBYTE(t);
2292                 r = A - t;
2293                 CLR_HNZVC;
2294                 SET_FLAGS8(A, t, r);
2295                 A = r;
2296         }
2297
2298 /* $81 CMPA immediate ?**** */
2299 OP_HANDLER(cmpa_im) {
2300                 uint16 r;
2301                 uint8 t;
2302                 IMMBYTE(t);
2303                 r = A - t;
2304                 CLR_NZVC;
2305                 SET_FLAGS8(A, t, r);
2306         }
2307
2308 /* $82 SBCA immediate ?**** */
2309 OP_HANDLER(sbca_im) {
2310                 uint16 r;
2311                 uint8 t;
2312                 IMMBYTE(t);
2313                 r = A - t - (CC & CC_C);
2314                 CLR_HNZVC;
2315                 SET_FLAGS8(A, t, r);
2316                 A = r;
2317         }
2318
2319 /* $83 SUBD (CMPD CMPU) immediate -**** */
2320 OP_HANDLER(subd_im) {
2321                 uint32 r, d;
2322                 pair b;
2323                 IMMWORD(b);
2324                 d = D;
2325                 r = d - b.d;
2326                 CLR_NZVC;
2327                 SET_FLAGS16(d, b.d, r);
2328                 D = r;
2329         }
2330
2331 /* $1083 CMPD immediate -**** */
2332 OP_HANDLER(cmpd_im) {
2333                 uint32 r, d;
2334                 pair b;
2335                 IMMWORD(b);
2336                 d = D;
2337                 r = d - b.d;
2338                 CLR_NZVC;
2339                 SET_FLAGS16(d, b.d, r);
2340         }
2341
2342 /* $1183 CMPU immediate -**** */
2343 OP_HANDLER(cmpu_im) {
2344                 uint32 r, d;
2345                 pair b;
2346                 IMMWORD(b);
2347                 d = U;
2348                 r = d - b.d;
2349                 CLR_NZVC;
2350                 SET_FLAGS16(d, b.d, r);
2351         }
2352
2353 /* $84 ANDA immediate -**0- */
2354 OP_HANDLER(anda_im) {
2355                 uint8 t;
2356                 IMMBYTE(t);
2357                 A &= t;
2358                 CLR_NZV;
2359                 SET_NZ8(A);
2360         }
2361
2362 /* $85 BITA immediate -**0- */
2363 OP_HANDLER(bita_im) {
2364                 uint8 t, r;
2365                 IMMBYTE(t);
2366                 r = A & t;
2367                 CLR_NZV;
2368                 SET_NZ8(r);
2369         }
2370
2371 /* $86 LDA immediate -**0- */
2372 OP_HANDLER(lda_im) {
2373                 IMMBYTE(A);
2374                 CLR_NZV;
2375                 SET_NZ8(A);
2376         }
2377
2378 /* is this a legal instruction? */
2379 /* $87 STA immediate -**0- */
2380 OP_HANDLER(sta_im) {
2381                 CLR_NZV;
2382                 SET_NZ8(A);
2383                 IMM8;
2384                 WM(EAD, A);
2385         }
2386
2387 /*
2388  * $87 , $C7: FLAG8
2389  */
2390 OP_HANDLER(flag8_im) {
2391                 // 20111117
2392                 uint8 t;
2393                 IMMBYTE(t);
2394                 CLR_NZV;
2395                 CC |= CC_N;
2396         }
2397
2398
2399 /* $88 EORA immediate -**0- */
2400 OP_HANDLER(eora_im) {
2401                 uint8 t;
2402                 IMMBYTE(t);
2403                 A ^= t;
2404                 CLR_NZV;
2405                 SET_NZ8(A);
2406         }
2407
2408 /* $89 ADCA immediate ***** */
2409 OP_HANDLER(adca_im) {
2410                 uint16 t, r;
2411                 IMMBYTE(t);
2412                 r = A + t + (CC & CC_C);
2413                 CLR_HNZVC;
2414                 SET_HNZVC8(A, t, r);
2415                 A = r;
2416         }
2417
2418 /* $8A ORA immediate -**0- */
2419 OP_HANDLER(ora_im) {
2420                 uint8 t;
2421                 IMMBYTE(t);
2422                 A |= t;
2423                 CLR_NZV;
2424                 SET_NZ8(A);
2425         }
2426
2427 /* $8B ADDA immediate ***** */
2428 OP_HANDLER(adda_im) {
2429                 uint16 t, r;
2430                 IMMBYTE(t);
2431                 r = A + t;
2432                 CLR_HNZVC;
2433                 SET_HNZVC8(A, t, r);
2434                 A = r;
2435         }
2436
2437 /* $8C CMPX (CMPY CMPS) immediate -**** */
2438 OP_HANDLER(cmpx_im) {
2439                 uint32 r, d;
2440                 pair b;
2441                 IMMWORD(b);
2442                 d = X;
2443                 r = d - b.d;
2444                 CLR_NZVC;
2445                 SET_FLAGS16(d, b.d, r);
2446         }
2447
2448 /* $108C CMPY immediate -**** */
2449 OP_HANDLER(cmpy_im) {
2450                 uint32 r, d;
2451                 pair b;
2452                 IMMWORD(b);
2453                 d = Y;
2454                 r = d - b.d;
2455                 CLR_NZVC;
2456                 SET_FLAGS16(d, b.d, r);
2457         }
2458
2459 /* $118C CMPS immediate -**** */
2460 OP_HANDLER(cmps_im) {
2461                 uint32 r, d;
2462                 pair b;
2463                 IMMWORD(b);
2464                 d = S;
2465                 r = d - b.d;
2466                 CLR_NZVC;
2467                 SET_FLAGS16(d, b.d, r);
2468         }
2469
2470 /* $8D BSR ----- */
2471 OP_HANDLER(bsr) {
2472                 uint8 t;
2473                 IMMBYTE(t);
2474                 PUSHWORD(pPC);
2475                 PC += SIGNED(t);
2476         }
2477
2478 /* $8E LDX (LDY) immediate -**0- */
2479 OP_HANDLER(ldx_im) {
2480                 IMMWORD(pX);
2481                 CLR_NZV;
2482                 SET_NZ16(X);
2483         }
2484
2485 /* $108E LDY immediate -**0- */
2486 OP_HANDLER(ldy_im) {
2487                 IMMWORD(pY);
2488                 CLR_NZV;
2489                 SET_NZ16(Y);
2490         }
2491
2492 /* is this a legal instruction? */
2493 /* $8F STX (STY) immediate -**0- */
2494 OP_HANDLER(stx_im) {
2495                 CLR_NZV;
2496                 SET_NZ16(X);
2497                 IMM16;
2498                 WM16(EAD, &pX);
2499         }
2500
2501 /*
2502  * $8F , $CF: FLAG16
2503  */
2504 OP_HANDLER(flag16_im) {
2505                 pair t;
2506 #if 1
2507                 IMMWORD(t);
2508                 CLR_NZV;
2509                 CC |= CC_N;
2510 #else
2511                 CLR_NZV;
2512                 SET_NZ16(X);
2513                 IMM16;
2514                 WM16(EAD, &pX);
2515 #endif
2516         }
2517
2518
2519 /* is this a legal instruction? */
2520 /* $108F STY immediate -**0- */
2521 OP_HANDLER(sty_im) {
2522                 CLR_NZV;
2523                 SET_NZ16(Y);
2524                 IMM16;
2525                 WM16(EAD, &pY);
2526         }
2527
2528 /* $90 SUBA direct ?**** */
2529 OP_HANDLER(suba_di) {
2530                 uint16 t, r;
2531                 DIRBYTE(t);
2532                 r = A - t;
2533                 CLR_HNZVC;
2534                 SET_FLAGS8(A, t, r);
2535                 A = r;
2536         }
2537
2538 /* $91 CMPA direct ?**** */
2539 OP_HANDLER(cmpa_di) {
2540                 uint16 t, r;
2541                 DIRBYTE(t);
2542                 r = A - t;
2543                 CLR_NZVC;
2544                 SET_FLAGS8(A, t, r);
2545         }
2546
2547 /* $92 SBCA direct ?**** */
2548 OP_HANDLER(sbca_di) {
2549                 uint16 t, r;
2550                 DIRBYTE(t);
2551                 r = A - t - (CC & CC_C);
2552                 CLR_HNZVC;
2553                 SET_FLAGS8(A, t, r);
2554                 A = r;
2555         }
2556
2557 /* $93 SUBD (CMPD CMPU) direct -**** */
2558 OP_HANDLER(subd_di) {
2559                 uint32 r, d;
2560                 pair b;
2561                 DIRWORD(b);
2562                 d = D;
2563                 r = d - b.d;
2564                 CLR_NZVC;
2565                 SET_FLAGS16(d, b.d, r);
2566                 D = r;
2567         }
2568
2569 /* $1093 CMPD direct -**** */
2570 OP_HANDLER(cmpd_di) {
2571                 uint32 r, d;
2572                 pair b;
2573                 DIRWORD(b);
2574                 d = D;
2575                 r = d - b.d;
2576                 CLR_NZVC;
2577                 SET_FLAGS16(d, b.d, r);
2578         }
2579
2580 /* $1193 CMPU direct -**** */
2581 OP_HANDLER(cmpu_di) {
2582                 uint32 r, d;
2583                 pair b;
2584                 DIRWORD(b);
2585                 d = U;
2586                 r = d - b.d;
2587                 CLR_NZVC;
2588                 SET_FLAGS16(U, b.d, r);
2589         }
2590
2591 /* $94 ANDA direct -**0- */
2592 OP_HANDLER(anda_di) {
2593                 uint8 t;
2594                 DIRBYTE(t);
2595                 A &= t;
2596                 CLR_NZV;
2597                 SET_NZ8(A);
2598         }
2599
2600 /* $95 BITA direct -**0- */
2601 OP_HANDLER(bita_di) {
2602                 uint8 t, r;
2603                 DIRBYTE(t);
2604                 r = A & t;
2605                 CLR_NZV;
2606                 SET_NZ8(r);
2607         }
2608
2609 /* $96 LDA direct -**0- */
2610 OP_HANDLER(lda_di) {
2611                 DIRBYTE(A);
2612                 CLR_NZV;
2613                 SET_NZ8(A);
2614         }
2615
2616 /* $97 STA direct -**0- */
2617 OP_HANDLER(sta_di) {
2618                 CLR_NZV;
2619                 SET_NZ8(A);
2620                 DIRECT;
2621                 WM(EAD, A);
2622         }
2623
2624 /* $98 EORA direct -**0- */
2625 OP_HANDLER(eora_di) {
2626                 uint8 t;
2627                 DIRBYTE(t);
2628                 A ^= t;
2629                 CLR_NZV;
2630                 SET_NZ8(A);
2631         }
2632
2633 /* $99 ADCA direct ***** */
2634 OP_HANDLER(adca_di) {
2635                 uint16 t, r;
2636                 DIRBYTE(t);
2637                 r = A + t + (CC & CC_C);
2638                 CLR_HNZVC;
2639                 SET_HNZVC8(A, t, r);
2640                 A = r;
2641         }
2642
2643 /* $9A ORA direct -**0- */
2644 OP_HANDLER(ora_di) {
2645                 uint8 t;
2646                 DIRBYTE(t);
2647                 A |= t;
2648                 CLR_NZV;
2649                 SET_NZ8(A);
2650         }
2651
2652 /* $9B ADDA direct ***** */
2653 OP_HANDLER(adda_di) {
2654                 uint16 t, r;
2655                 DIRBYTE(t);
2656                 r = A + t;
2657                 CLR_HNZVC;
2658                 SET_HNZVC8(A, t, r);
2659                 A = r;
2660         }
2661
2662 /* $9C CMPX (CMPY CMPS) direct -**** */
2663 OP_HANDLER(cmpx_di) {
2664                 uint32 r, d;
2665                 pair b;
2666                 DIRWORD(b);
2667                 d = X;
2668                 r = d - b.d;
2669                 CLR_NZVC;
2670                 SET_FLAGS16(d, b.d, r);
2671         }
2672
2673 /* $109C CMPY direct -**** */
2674 OP_HANDLER(cmpy_di) {
2675                 uint32 r, d;
2676                 pair b;
2677                 DIRWORD(b);
2678                 d = Y;
2679                 r = d - b.d;
2680                 CLR_NZVC;
2681                 SET_FLAGS16(d, b.d, r);
2682         }
2683
2684 /* $119C CMPS direct -**** */
2685 OP_HANDLER(cmps_di) {
2686                 uint32 r, d;
2687                 pair b;
2688                 DIRWORD(b);
2689                 d = S;
2690                 r = d - b.d;
2691                 CLR_NZVC;
2692                 SET_FLAGS16(d, b.d, r);
2693         }
2694
2695 /* $9D JSR direct ----- */
2696 OP_HANDLER(jsr_di) {
2697                 DIRECT;
2698                 PUSHWORD(pPC);
2699                 PCD = EAD;
2700         }
2701
2702 /* $9E LDX (LDY) direct -**0- */
2703 OP_HANDLER(ldx_di) {
2704                 DIRWORD(pX);
2705                 CLR_NZV;
2706                 SET_NZ16(X);
2707         }
2708
2709 /* $109E LDY direct -**0- */
2710 OP_HANDLER(ldy_di) {
2711                 DIRWORD(pY);
2712                 CLR_NZV;
2713                 SET_NZ16(Y);
2714         }
2715
2716 /* $9F STX (STY) direct -**0- */
2717 OP_HANDLER(stx_di) {
2718                 CLR_NZV;
2719                 SET_NZ16(X);
2720                 DIRECT;
2721                 WM16(EAD, &pX);
2722         }
2723
2724 /* $109F STY direct -**0- */
2725 OP_HANDLER(sty_di) {
2726                 CLR_NZV;
2727                 SET_NZ16(Y);
2728                 DIRECT;
2729                 WM16(EAD, &pY);
2730         }
2731
2732 /* $a0 SUBA indexed ?**** */
2733 OP_HANDLER(suba_ix) {
2734                 uint16 t, r;
2735                 fetch_effective_address();
2736                 t = RM(EAD);
2737                 r = A - t;
2738                 CLR_HNZVC;
2739                 SET_FLAGS8(A, t, r);
2740                 A = r;
2741         }
2742
2743 /* $a1 CMPA indexed ?**** */
2744 OP_HANDLER(cmpa_ix) {
2745                 uint16 t, r;
2746                 fetch_effective_address();
2747                 t = RM(EAD);
2748                 r = A - t;
2749                 CLR_NZVC;
2750                 SET_FLAGS8(A, t, r);
2751         }
2752
2753 /* $a2 SBCA indexed ?**** */
2754 OP_HANDLER(sbca_ix) {
2755                 uint16 t, r;
2756                 fetch_effective_address();
2757                 t = RM(EAD);
2758                 r = A - t - (CC & CC_C);
2759                 CLR_HNZVC;
2760                 SET_FLAGS8(A, t, r);
2761                 A = r;
2762         }
2763
2764 /* $a3 SUBD (CMPD CMPU) indexed -**** */
2765 OP_HANDLER(subd_ix) {
2766                 uint32 r, d;
2767                 uint16 b;
2768                 fetch_effective_address();
2769                 b = RM16(EAD);
2770                 d = D;
2771                 r = d - b;
2772                 CLR_NZVC;
2773                 SET_FLAGS16(d, b, r);
2774                 D = r;
2775         }
2776
2777 /* $10a3 CMPD indexed -**** */
2778 OP_HANDLER(cmpd_ix) {
2779                 uint32 r, d;
2780                 uint16 b;
2781                 fetch_effective_address();
2782                 b = RM16(EAD);
2783                 d = D;
2784                 r = d - b;
2785                 CLR_NZVC;
2786                 SET_FLAGS16(d, b, r);
2787         }
2788
2789 /* $11a3 CMPU indexed -**** */
2790 OP_HANDLER(cmpu_ix) {
2791                 uint32 r;
2792                 uint16 b;
2793                 fetch_effective_address();
2794                 b = RM16(EAD);
2795                 r = U - b;
2796                 CLR_NZVC;
2797                 SET_FLAGS16(U, b, r);
2798         }
2799
2800 /* $a4 ANDA indexed -**0- */
2801 OP_HANDLER(anda_ix) {
2802                 fetch_effective_address();
2803                 A &= RM(EAD);
2804                 CLR_NZV;
2805                 SET_NZ8(A);
2806         }
2807
2808 /* $a5 BITA indexed -**0- */
2809 OP_HANDLER(bita_ix) {
2810                 uint8 r;
2811                 fetch_effective_address();
2812                 r = A & RM(EAD);
2813                 CLR_NZV;
2814                 SET_NZ8(r);
2815         }
2816
2817 /* $a6 LDA indexed -**0- */
2818 OP_HANDLER(lda_ix) {
2819                 fetch_effective_address();
2820                 A = RM(EAD);
2821                 CLR_NZV;
2822                 SET_NZ8(A);
2823         }
2824
2825 /* $a7 STA indexed -**0- */
2826 OP_HANDLER(sta_ix) {
2827                 fetch_effective_address();
2828                 CLR_NZV;
2829                 SET_NZ8(A);
2830                 WM(EAD, A);
2831         }
2832
2833 /* $a8 EORA indexed -**0- */
2834 OP_HANDLER(eora_ix) {
2835                 fetch_effective_address();
2836                 A ^= RM(EAD);
2837                 CLR_NZV;
2838                 SET_NZ8(A);
2839         }
2840
2841 /* $a9 ADCA indexed ***** */
2842 OP_HANDLER(adca_ix) {
2843                 uint16 t, r;
2844                 fetch_effective_address();
2845                 t = RM(EAD);
2846                 r = A + t + (CC & CC_C);
2847                 CLR_HNZVC;
2848                 SET_FLAGS8(A, t, r);
2849                 SET_H(A, t, r);
2850                 A = r;
2851         }
2852
2853 /* $aA ORA indexed -**0- */
2854 OP_HANDLER(ora_ix) {
2855                 fetch_effective_address();
2856                 A |= RM(EAD);
2857                 CLR_NZV;
2858                 SET_NZ8(A);
2859         }
2860
2861 /* $aB ADDA indexed ***** */
2862 OP_HANDLER(adda_ix) {
2863                 uint16 t, r;
2864                 fetch_effective_address();
2865                 t = RM(EAD);
2866                 r = A + t;
2867                 CLR_HNZVC;
2868                 SET_FLAGS8(A, t, r);
2869                 SET_H(A, t, r);
2870                 A = r;
2871         }
2872
2873 /* $aC CMPX (CMPY CMPS) indexed -**** */
2874 OP_HANDLER(cmpx_ix) {
2875                 uint32 r, d;
2876                 uint16 b;
2877                 fetch_effective_address();
2878                 b = RM16(EAD);
2879                 d = X;
2880                 r = d - b;
2881                 CLR_NZVC;
2882                 SET_FLAGS16(d, b, r);
2883         }
2884
2885 /* $10aC CMPY indexed -**** */
2886 OP_HANDLER(cmpy_ix) {
2887                 uint32 r, d;
2888                 uint16 b;
2889                 fetch_effective_address();
2890                 b = RM16(EAD);
2891                 d = Y;
2892                 r = d - b;
2893                 CLR_NZVC;
2894                 SET_FLAGS16(d, b, r);
2895         }
2896
2897 /* $11aC CMPS indexed -**** */
2898 OP_HANDLER(cmps_ix) {
2899                 uint32 r, d;
2900                 uint16 b;
2901                 fetch_effective_address();
2902                 b = RM16(EAD);
2903                 d = S;
2904                 r = d - b;
2905                 CLR_NZVC;
2906                 SET_FLAGS16(d, b, r);
2907         }
2908
2909 /* $aD JSR indexed ----- */
2910 OP_HANDLER(jsr_ix) {
2911                 fetch_effective_address();
2912                 PUSHWORD(pPC);
2913                 PCD = EAD;
2914         }
2915
2916 /* $aE LDX (LDY) indexed -**0- */
2917 OP_HANDLER(ldx_ix) {
2918                 fetch_effective_address();
2919                 X = RM16(EAD);
2920                 CLR_NZV;
2921                 SET_NZ16(X);
2922         }
2923
2924 /* $10aE LDY indexed -**0- */
2925 OP_HANDLER(ldy_ix) {
2926                 fetch_effective_address();
2927                 Y = RM16(EAD);
2928                 CLR_NZV;
2929                 SET_NZ16(Y);
2930         }
2931
2932 /* $aF STX (STY) indexed -**0- */
2933 OP_HANDLER(stx_ix) {
2934                 fetch_effective_address();
2935                 CLR_NZV;
2936                 SET_NZ16(X);
2937                 WM16(EAD, &pX);
2938         }
2939
2940 /* $10aF STY indexed -**0- */
2941 OP_HANDLER(sty_ix) {
2942                 fetch_effective_address();
2943                 CLR_NZV;
2944                 SET_NZ16(Y);
2945                 WM16(EAD, &pY);
2946         }
2947
2948 /* $b0 SUBA extended ?**** */
2949 OP_HANDLER(suba_ex) {
2950                 uint16 t, r;
2951                 EXTBYTE(t);
2952                 r = A - t;
2953                 CLR_HNZVC;
2954                 SET_FLAGS8(A, t, r);
2955                 A = r;
2956         }
2957
2958 /* $b1 CMPA extended ?**** */
2959 OP_HANDLER(cmpa_ex) {
2960                 uint16 t, r;
2961                 EXTBYTE(t);
2962                 r = A - t;
2963                 CLR_NZVC;
2964                 SET_FLAGS8(A, t, r);
2965         }
2966
2967 /* $b2 SBCA extended ?**** */
2968 OP_HANDLER(sbca_ex) {
2969                 uint16 t, r;
2970                 EXTBYTE(t);
2971                 r = A - t - (CC & CC_C);
2972                 CLR_HNZVC;
2973                 SET_FLAGS8(A, t, r);
2974                 A = r;
2975         }
2976
2977 /* $b3 SUBD (CMPD CMPU) extended -**** */
2978 OP_HANDLER(subd_ex) {
2979                 uint32 r, d;
2980                 pair b;
2981                 EXTWORD(b);
2982                 d = D;
2983                 r = d - b.d;
2984                 CLR_NZVC;
2985                 SET_FLAGS16(d, b.d, r);
2986                 D = r;
2987         }
2988
2989 /* $10b3 CMPD extended -**** */
2990 OP_HANDLER(cmpd_ex) {
2991                 uint32 r, d;
2992                 pair b;
2993                 EXTWORD(b);
2994                 d = D;
2995                 r = d - b.d;
2996                 CLR_NZVC;
2997                 SET_FLAGS16(d, b.d, r);
2998         }
2999
3000 /* $11b3 CMPU extended -**** */
3001 OP_HANDLER(cmpu_ex) {
3002                 uint32 r, d;
3003                 pair b;
3004                 EXTWORD(b);
3005                 d = U;
3006                 r = d - b.d;
3007                 CLR_NZVC;
3008                 SET_FLAGS16(d, b.d, r);
3009         }
3010
3011 /* $b4 ANDA extended -**0- */
3012 OP_HANDLER(anda_ex) {
3013                 uint8 t;
3014                 EXTBYTE(t);
3015                 A &= t;
3016                 CLR_NZV;
3017                 SET_NZ8(A);
3018         }
3019
3020 /* $b5 BITA extended -**0- */
3021 OP_HANDLER(bita_ex) {
3022                 uint8 t, r;
3023                 EXTBYTE(t);
3024                 r = A & t;
3025                 CLR_NZV;
3026                 SET_NZ8(r);
3027         }
3028
3029 /* $b6 LDA extended -**0- */
3030 OP_HANDLER(lda_ex) {
3031                 EXTBYTE(A);
3032                 CLR_NZV;
3033                 SET_NZ8(A);
3034         }
3035
3036 /* $b7 STA extended -**0- */
3037 OP_HANDLER(sta_ex) {
3038                 CLR_NZV;
3039                 SET_NZ8(A);
3040                 EXTENDED;
3041                 WM(EAD, A);
3042         }
3043
3044 /* $b8 EORA extended -**0- */
3045 OP_HANDLER(eora_ex) {
3046                 uint8 t;
3047                 EXTBYTE(t);
3048                 A ^= t;
3049                 CLR_NZV;
3050                 SET_NZ8(A);
3051         }
3052
3053 /* $b9 ADCA extended ***** */
3054 OP_HANDLER(adca_ex) {
3055                 uint16 t, r;
3056                 EXTBYTE(t);
3057                 r = A + t + (CC & CC_C);
3058                 CLR_HNZVC;
3059                 SET_HNZVC8(A, t, r);
3060                 A = r;
3061         }
3062
3063 /* $bA ORA extended -**0- */
3064 OP_HANDLER(ora_ex) {
3065                 uint8 t;
3066                 EXTBYTE(t);
3067                 A |= t;
3068                 CLR_NZV;
3069                 SET_NZ8(A);
3070         }
3071
3072 /* $bB ADDA extended ***** */
3073 OP_HANDLER(adda_ex) {
3074                 uint16 t, r;
3075                 EXTBYTE(t);
3076                 r = A + t;
3077                 CLR_HNZVC;
3078                 SET_HNZVC8(A, t, r);
3079                 A = r;
3080         }
3081
3082 /* $bC CMPX (CMPY CMPS) extended -**** */
3083 OP_HANDLER(cmpx_ex) {
3084                 uint32 r, d;
3085                 pair b;
3086                 EXTWORD(b);
3087                 d = X;
3088                 r = d - b.d;
3089                 CLR_NZVC;
3090                 SET_FLAGS16(d, b.d, r);
3091         }
3092
3093 /* $10bC CMPY extended -**** */
3094 OP_HANDLER(cmpy_ex) {
3095                 uint32 r, d;
3096                 pair b;
3097                 EXTWORD(b);
3098                 d = Y;
3099                 r = d - b.d;
3100                 CLR_NZVC;
3101                 SET_FLAGS16(d, b.d, r);
3102         }
3103
3104 /* $11bC CMPS extended -**** */
3105 OP_HANDLER(cmps_ex) {
3106                 uint32 r, d;
3107                 pair b;
3108                 EXTWORD(b);
3109                 d = S;
3110                 r = d - b.d;
3111                 CLR_NZVC;
3112                 SET_FLAGS16(d, b.d, r);
3113         }
3114
3115 /* $bD JSR extended ----- */
3116 OP_HANDLER(jsr_ex) {
3117                 EXTENDED;
3118                 PUSHWORD(pPC);
3119                 PCD = EAD;
3120         }
3121
3122 /* $bE LDX (LDY) extended -**0- */
3123 OP_HANDLER(ldx_ex) {
3124                 EXTWORD(pX);
3125                 CLR_NZV;
3126                 SET_NZ16(X);
3127         }
3128
3129 /* $10bE LDY extended -**0- */
3130 OP_HANDLER(ldy_ex) {
3131                 EXTWORD(pY);
3132                 CLR_NZV;
3133                 SET_NZ16(Y);
3134         }
3135
3136 /* $bF STX (STY) extended -**0- */
3137 OP_HANDLER(stx_ex) {
3138                 CLR_NZV;
3139                 SET_NZ16(X);
3140                 EXTENDED;
3141                 WM16(EAD, &pX);
3142         }
3143
3144 /* $10bF STY extended -**0- */
3145 OP_HANDLER(sty_ex) {
3146                 CLR_NZV;
3147                 SET_NZ16(Y);
3148                 EXTENDED;
3149                 WM16(EAD, &pY);
3150         }
3151
3152 /* $c0 SUBB immediate ?**** */
3153 OP_HANDLER(subb_im) {
3154                 uint16 t, r;
3155                 IMMBYTE(t);
3156                 r = B - t;
3157                 CLR_HNZVC;
3158                 SET_FLAGS8(B, t, r);
3159                 B = r;
3160         }
3161
3162 /* $c1 CMPB immediate ?**** */
3163 OP_HANDLER(cmpb_im) {
3164                 uint16 t, r;
3165                 IMMBYTE(t);
3166                 r = B - t;
3167                 CLR_NZVC;
3168                 SET_FLAGS8(B, t, r);
3169         }
3170
3171 /* $c2 SBCB immediate ?**** */
3172 OP_HANDLER(sbcb_im) {
3173                 uint16 t, r;
3174                 IMMBYTE(t);
3175                 r = B - t - (CC & CC_C);
3176                 CLR_HNZVC;
3177                 SET_FLAGS8(B, t, r);
3178                 B = r;
3179         }
3180
3181 /* $c3 ADDD immediate -**** */
3182 OP_HANDLER(addd_im) {
3183                 uint32 r, d;
3184                 pair b;
3185                 IMMWORD(b);
3186                 d = D;
3187                 r = d + b.d;
3188                 CLR_NZVC;
3189                 SET_FLAGS16(d, b.d, r);
3190                 D = r;
3191         }
3192
3193 /* $c4 ANDB immediate -**0- */
3194 OP_HANDLER(andb_im) {
3195                 uint8 t;
3196                 IMMBYTE(t);
3197                 B &= t;
3198                 CLR_NZV;
3199                 SET_NZ8(B);
3200         }
3201
3202 /* $c5 BITB immediate -**0- */
3203 OP_HANDLER(bitb_im) {
3204                 uint8 t, r;
3205                 IMMBYTE(t);
3206                 r = B & t;
3207                 CLR_NZV;
3208                 SET_NZ8(r);
3209         }
3210
3211 /* $c6 LDB immediate -**0- */
3212 OP_HANDLER(ldb_im) {
3213                 IMMBYTE(B);
3214                 CLR_NZV;
3215                 SET_NZ8(B);
3216         }
3217
3218 /* is this a legal instruction? */
3219 /* $c7 STB immediate -**0- */
3220 OP_HANDLER(stb_im) {
3221                 CLR_NZV;
3222                 SET_NZ8(B);
3223                 IMM8;
3224                 WM(EAD, B);
3225         }
3226
3227 /* $c8 EORB immediate -**0- */
3228 OP_HANDLER(eorb_im) {
3229                 uint8 t;
3230                 IMMBYTE(t);
3231                 B ^= t;
3232                 CLR_NZV;
3233                 SET_NZ8(B);
3234         }
3235
3236 /* $c9 ADCB immediate ***** */
3237 OP_HANDLER(adcb_im) {
3238                 uint16 t, r;
3239                 IMMBYTE(t);
3240                 r = B + t + (CC & CC_C);
3241                 CLR_HNZVC;
3242                 SET_HNZVC8(B, t, r);
3243                 B = r;
3244         }
3245
3246 /* $cA ORB immediate -**0- */
3247 OP_HANDLER(orb_im) {
3248                 uint8 t;
3249                 IMMBYTE(t);
3250                 B |= t;
3251                 CLR_NZV;
3252                 SET_NZ8(B);
3253         }
3254
3255 /* $cB ADDB immediate ***** */
3256 OP_HANDLER(addb_im) {
3257                 uint16 t, r;
3258                 IMMBYTE(t);
3259                 r = B + t;
3260                 CLR_HNZVC;
3261                 SET_HNZVC8(B, t, r);
3262                 B = r;
3263         }
3264
3265 /* $cC LDD immediate -**0- */
3266 OP_HANDLER(ldd_im) {
3267                 IMMWORD(pD);
3268                 CLR_NZV;
3269                 SET_NZ16(D);
3270         }
3271
3272 /* is this a legal instruction? */
3273 /* $cD STD immediate -**0- */
3274 OP_HANDLER(std_im) {
3275                 CLR_NZV;
3276                 SET_NZ16(D);
3277                 IMM16;
3278                 WM(EAD, D);
3279         }
3280
3281 /* $cE LDU (LDS) immediate -**0- */
3282 OP_HANDLER(ldu_im) {
3283                 IMMWORD(pU);
3284                 CLR_NZV;
3285                 SET_NZ16(U);
3286         }
3287
3288 /* $10cE LDS immediate -**0- */
3289 OP_HANDLER(lds_im) {
3290                 IMMWORD(pS);
3291                 CLR_NZV;
3292                 SET_NZ16(S);
3293                 int_state |= MC6809_LDS;
3294         }
3295
3296 /* is this a legal instruction? */
3297 /* $cF STU (STS) immediate -**0- */
3298 OP_HANDLER(stu_im) {
3299                 CLR_NZV;
3300                 SET_NZ16(U);
3301                 IMM16;
3302                 WM16(EAD, &pU);
3303         }
3304
3305 /* is this a legal instruction? */
3306 /* $10cF STS immediate -**0- */
3307 OP_HANDLER(sts_im) {
3308                 CLR_NZV;
3309                 SET_NZ16(S);
3310                 IMM16;
3311                 WM16(EAD, &pS);
3312         }
3313
3314 /* $d0 SUBB direct ?**** */
3315 OP_HANDLER(subb_di) {
3316                 uint16 t, r;
3317                 DIRBYTE(t);
3318                 r = B - t;
3319                 CLR_HNZVC;
3320                 SET_FLAGS8(B, t, r);
3321                 B = r;
3322         }
3323
3324 /* $d1 CMPB direct ?**** */
3325 OP_HANDLER(cmpb_di) {
3326                 uint16 t, r;
3327                 DIRBYTE(t);
3328                 r = B - t;
3329                 CLR_NZVC;
3330                 SET_FLAGS8(B, t, r);
3331         }
3332
3333 /* $d2 SBCB direct ?**** */
3334 OP_HANDLER(sbcb_di) {
3335                 uint16 t, r;
3336                 DIRBYTE(t);
3337                 r = B - t - (CC & CC_C);
3338                 CLR_HNZVC;
3339                 SET_FLAGS8(B, t, r);
3340                 B = r;
3341         }
3342
3343 /* $d3 ADDD direct -**** */
3344 OP_HANDLER(addd_di) {
3345                 uint32 r, d;
3346                 pair b;
3347                 DIRWORD(b);
3348                 d = D;
3349                 r = d + b.d;
3350                 CLR_NZVC;
3351                 SET_FLAGS16(d, b.d, r);
3352                 D = r;
3353         }
3354
3355 /* $d4 ANDB direct -**0- */
3356 OP_HANDLER(andb_di) {
3357                 uint8 t;
3358                 DIRBYTE(t);
3359                 B &= t;
3360                 CLR_NZV;
3361                 SET_NZ8(B);
3362         }
3363
3364 /* $d5 BITB direct -**0- */
3365 OP_HANDLER(bitb_di) {
3366                 uint8 t, r;
3367                 DIRBYTE(t);
3368                 r = B & t;
3369                 CLR_NZV;
3370                 SET_NZ8(r);
3371         }
3372
3373 /* $d6 LDB direct -**0- */
3374 OP_HANDLER(ldb_di) {
3375                 DIRBYTE(B);
3376                 CLR_NZV;
3377                 SET_NZ8(B);
3378         }
3379
3380 /* $d7 STB direct -**0- */
3381 OP_HANDLER(stb_di) {
3382                 CLR_NZV;
3383                 SET_NZ8(B);
3384                 DIRECT;
3385                 WM(EAD, B);
3386         }
3387
3388 /* $d8 EORB direct -**0- */
3389 OP_HANDLER(eorb_di) {
3390                 uint8 t;
3391                 DIRBYTE(t);
3392                 B ^= t;
3393                 CLR_NZV;
3394                 SET_NZ8(B);
3395         }
3396
3397 /* $d9 ADCB direct ***** */
3398 OP_HANDLER(adcb_di) {
3399                 uint16 t, r;
3400                 DIRBYTE(t);
3401                 r = B + t + (CC & CC_C);
3402                 CLR_HNZVC;
3403                 SET_HNZVC8(B, t, r);
3404                 B = r;
3405         }
3406
3407 /* $dA ORB direct -**0- */
3408 OP_HANDLER(orb_di) {
3409                 uint8 t;
3410                 DIRBYTE(t);
3411                 B |= t;
3412                 CLR_NZV;
3413                 SET_NZ8(B);
3414         }
3415
3416 /* $dB ADDB direct ***** */
3417 OP_HANDLER(addb_di) {
3418                 uint16 t, r;
3419                 DIRBYTE(t);
3420                 r = B + t;
3421                 CLR_HNZVC;
3422                 SET_HNZVC8(B, t, r);
3423                 B = r;
3424         }
3425
3426 /* $dC LDD direct -**0- */
3427 OP_HANDLER(ldd_di) {
3428                 DIRWORD(pD);
3429                 CLR_NZV;
3430                 SET_NZ16(D);
3431         }
3432
3433 /* $dD STD direct -**0- */
3434 OP_HANDLER(std_di) {
3435                 CLR_NZV;
3436                 SET_NZ16(D);
3437                 DIRECT;
3438                 WM16(EAD, &pD);
3439         }
3440
3441 /* $dE LDU (LDS) direct -**0- */
3442 OP_HANDLER(ldu_di) {
3443                 DIRWORD(pU);
3444                 CLR_NZV;
3445                 SET_NZ16(U);
3446         }
3447
3448 /* $10dE LDS direct -**0- */
3449 OP_HANDLER(lds_di) {
3450                 DIRWORD(pS);
3451                 CLR_NZV;
3452                 SET_NZ16(S);
3453                 int_state |= MC6809_LDS;
3454 //  ->int_state |= M6809_LDS;
3455         }
3456
3457 /* $dF STU (STS) direct -**0- */
3458 OP_HANDLER(stu_di) {
3459                 CLR_NZV;
3460                 SET_NZ16(U);
3461                 DIRECT;
3462                 WM16(EAD, &pU);
3463         }
3464
3465 /* $10dF STS direct -**0- */
3466 OP_HANDLER(sts_di) {
3467                 CLR_NZV;
3468                 SET_NZ16(S);
3469                 DIRECT;
3470                 WM16(EAD, &pS);
3471         }
3472
3473 /* $e0 SUBB indexed ?**** */
3474 OP_HANDLER(subb_ix) {
3475                 uint16 t, r;
3476                 fetch_effective_address();
3477                 t = RM(EAD);
3478                 r = B - t;
3479                 CLR_HNZVC;
3480                 SET_FLAGS8(B, t, r);
3481                 B = r;
3482         }
3483
3484 /* $e1 CMPB indexed ?**** */
3485 OP_HANDLER(cmpb_ix) {
3486                 uint16 t, r;
3487                 fetch_effective_address();
3488                 t = RM(EAD);
3489                 r = B - t;
3490                 CLR_NZVC;
3491                 SET_FLAGS8(B, t, r);
3492         }
3493
3494 /* $e2 SBCB indexed ?**** */
3495 OP_HANDLER(sbcb_ix) {
3496                 uint16 t, r;
3497                 fetch_effective_address();
3498                 t = RM(EAD);
3499                 r = B - t - (CC & CC_C);
3500                 CLR_HNZVC;
3501                 SET_FLAGS8(B, t, r);
3502                 B = r;
3503         }
3504
3505 /* $e3 ADDD indexed -**** */
3506 OP_HANDLER(addd_ix) {
3507                 uint32 r, d;
3508                 uint16 b;
3509                 fetch_effective_address();
3510                 b = RM16(EAD);
3511                 d = D;
3512                 r = d + b;
3513                 CLR_NZVC;
3514                 SET_FLAGS16(d, b, r);
3515                 D = r;
3516         }
3517
3518 /* $e4 ANDB indexed -**0- */
3519 OP_HANDLER(andb_ix) {
3520                 fetch_effective_address();
3521                 B &= RM(EAD);
3522                 CLR_NZV;
3523                 SET_NZ8(B);
3524         }
3525
3526 /* $e5 BITB indexed -**0- */
3527 OP_HANDLER(bitb_ix) {
3528                 uint8 r;
3529                 fetch_effective_address();
3530                 r = B & RM(EAD);
3531                 CLR_NZV;
3532                 SET_NZ8(r);
3533         }
3534
3535 /* $e6 LDB indexed -**0- */
3536 OP_HANDLER(ldb_ix) {
3537                 fetch_effective_address();
3538                 B = RM(EAD);
3539                 CLR_NZV;
3540                 SET_NZ8(B);
3541         }
3542
3543 /* $e7 STB indexed -**0- */
3544 OP_HANDLER(stb_ix) {
3545                 fetch_effective_address();
3546                 CLR_NZV;
3547                 SET_NZ8(B);
3548                 WM(EAD, B);
3549         }
3550
3551 /* $e8 EORB indexed -**0- */
3552 OP_HANDLER(eorb_ix) {
3553                 fetch_effective_address();
3554                 B ^= RM(EAD);
3555                 CLR_NZV;
3556                 SET_NZ8(B);
3557         }
3558
3559 /* $e9 ADCB indexed ***** */
3560 OP_HANDLER(adcb_ix) {
3561                 uint16 t, r;
3562                 fetch_effective_address();
3563                 t = RM(EAD);
3564                 r = B + t + (CC & CC_C);
3565                 CLR_HNZVC;
3566                 SET_HNZVC8(B, t, r);
3567                 B = r;
3568         }
3569
3570 /* $eA ORB indexed -**0- */
3571 OP_HANDLER(orb_ix) {
3572                 fetch_effective_address();
3573                 B |= RM(EAD);
3574                 CLR_NZV;
3575                 SET_NZ8(B);
3576         }
3577
3578 /* $eB ADDB indexed ***** */
3579 OP_HANDLER(addb_ix) {
3580                 uint16 t, r;
3581                 fetch_effective_address();
3582                 t = RM(EAD);
3583                 r = B + t;
3584                 CLR_HNZVC;
3585                 SET_HNZVC8(B, t, r);
3586                 B = r;
3587         }
3588
3589 /* $eC LDD indexed -**0- */
3590 OP_HANDLER(ldd_ix) {
3591                 fetch_effective_address();
3592                 D = RM16(EAD);
3593                 CLR_NZV;
3594                 SET_NZ16(D);
3595         }
3596
3597 /* $eD STD indexed -**0- */
3598 OP_HANDLER(std_ix) {
3599                 fetch_effective_address();
3600                 CLR_NZV;
3601                 SET_NZ16(D);
3602                 WM16(EAD, &pD);
3603         }
3604
3605 /* $eE LDU (LDS) indexed -**0- */
3606 OP_HANDLER(ldu_ix) {
3607                 fetch_effective_address();
3608                 U = RM16(EAD);
3609                 CLR_NZV;
3610                 SET_NZ16(U);
3611         }
3612
3613 /* $10eE LDS indexed -**0- */
3614 OP_HANDLER(lds_ix) {
3615                 fetch_effective_address();
3616                 S = RM16(EAD);
3617                 CLR_NZV;
3618                 SET_NZ16(S);
3619                 int_state |= MC6809_LDS;
3620 //  ->int_state |= M6809_LDS;
3621         }
3622
3623 /* $eF STU (STS) indexed -**0- */
3624 OP_HANDLER(stu_ix) {
3625                 fetch_effective_address();
3626                 CLR_NZV;
3627                 SET_NZ16(U);
3628                 WM16(EAD, &pU);
3629         }
3630
3631 /* $10eF STS indexed -**0- */
3632 OP_HANDLER(sts_ix) {
3633                 fetch_effective_address();
3634                 CLR_NZV;
3635                 SET_NZ16(S);
3636                 WM16(EAD, &pS);
3637         }
3638
3639 /* $f0 SUBB extended ?**** */
3640 OP_HANDLER(subb_ex) {
3641                 uint16 t, r;
3642                 EXTBYTE(t);
3643                 r = B - t;
3644                 CLR_HNZVC;
3645                 SET_FLAGS8(B, t, r);
3646                 B = r;
3647         }
3648
3649 /* $f1 CMPB extended ?**** */
3650 OP_HANDLER(cmpb_ex) {
3651                 uint16 t, r;
3652                 EXTBYTE(t);
3653                 r = B - t;
3654                 CLR_NZVC;
3655                 SET_FLAGS8(B, t, r);
3656         }
3657
3658 /* $f2 SBCB extended ?**** */
3659 OP_HANDLER(sbcb_ex) {
3660                 uint16 t, r;
3661                 EXTBYTE(t);
3662                 r = B - t - (CC & CC_C);
3663                 CLR_HNZVC;
3664                 SET_FLAGS8(B, t, r);
3665                 B = r;
3666         }
3667
3668 /* $f3 ADDD extended -**** */
3669 OP_HANDLER(addd_ex) {
3670                 uint32 r, d;
3671                 pair b;
3672                 EXTWORD(b);
3673                 d = D;
3674                 r = d + b.d;
3675                 CLR_NZVC;
3676                 SET_FLAGS16(d, b.d, r);
3677                 D = r;
3678         }
3679
3680 /* $f4 ANDB extended -**0- */
3681 OP_HANDLER(andb_ex) {
3682                 uint8 t;
3683                 EXTBYTE(t);
3684                 B &= t;
3685                 CLR_NZV;
3686                 SET_NZ8(B);
3687         }
3688
3689 /* $f5 BITB extended -**0- */
3690 OP_HANDLER(bitb_ex) {
3691                 uint8 t, r;
3692                 EXTBYTE(t);
3693                 r = B & t;
3694                 CLR_NZV;
3695                 SET_NZ8(r);
3696         }
3697
3698 /* $f6 LDB extended -**0- */
3699 OP_HANDLER(ldb_ex) {
3700                 EXTBYTE(B);
3701                 CLR_NZV;
3702                 SET_NZ8(B);
3703         }
3704
3705 /* $f7 STB extended -**0- */
3706 OP_HANDLER(stb_ex) {
3707                 CLR_NZV;
3708                 SET_NZ8(B);
3709                 EXTENDED;
3710                 WM(EAD, B);
3711         }
3712
3713 /* $f8 EORB extended -**0- */
3714 OP_HANDLER(eorb_ex) {
3715                 uint8 t;
3716                 EXTBYTE(t);
3717                 B ^= t;
3718                 CLR_NZV;
3719                 SET_NZ8(B);
3720         }
3721
3722 /* $f9 ADCB extended ***** */
3723 OP_HANDLER(adcb_ex) {
3724                 uint16 t, r;
3725                 EXTBYTE(t);
3726                 r = B + t + (CC & CC_C);
3727                 CLR_HNZVC;
3728                 SET_HNZVC8(B, t, r);
3729                 B = r;
3730         }
3731
3732 /* $fA ORB extended -**0- */
3733 OP_HANDLER(orb_ex) {
3734                 uint8 t;
3735                 EXTBYTE(t);
3736                 B |= t;
3737                 CLR_NZV;
3738                 SET_NZ8(B);
3739         }
3740
3741 /* $fB ADDB extended ***** */
3742 OP_HANDLER(addb_ex) {
3743                 uint16 t, r;
3744                 EXTBYTE(t);
3745                 r = B + t;
3746                 CLR_HNZVC;
3747                 SET_HNZVC8(B, t, r);
3748                 B = r;
3749         }
3750
3751 /* $fC LDD extended -**0- */
3752 OP_HANDLER(ldd_ex) {
3753                 EXTWORD(pD);
3754                 CLR_NZV;
3755                 SET_NZ16(D);
3756         }
3757
3758 /* $fD STD extended -**0- */
3759 OP_HANDLER(std_ex) {
3760                 CLR_NZV;
3761                 SET_NZ16(D);
3762                 EXTENDED;
3763                 WM16(EAD, &pD);
3764         }
3765
3766 /* $fE LDU (LDS) extended -**0- */
3767 OP_HANDLER(ldu_ex) {
3768                 EXTWORD(pU);
3769                 CLR_NZV;
3770                 SET_NZ16(U);
3771         }
3772
3773 /* $10fE LDS extended -**0- */
3774 OP_HANDLER(lds_ex) {
3775                 EXTWORD(pS);
3776                 CLR_NZV;
3777                 SET_NZ16(S);
3778                 int_state |= MC6809_LDS;
3779 //  ->int_state |= M6809_LDS;
3780         }
3781
3782 /* $fF STU (STS) extended -**0- */
3783 OP_HANDLER(stu_ex) {
3784                 CLR_NZV;
3785                 SET_NZ16(U);
3786                 EXTENDED;
3787                 WM16(EAD, &pU);
3788         }
3789
3790 /* $10fF STS extended -**0- */
3791 OP_HANDLER(sts_ex) {
3792                 CLR_NZV;
3793                 SET_NZ16(S);
3794                 EXTENDED;
3795                 WM16(EAD, &pS);
3796         }
3797
3798
3799 /* $10xx opcodes */
3800 OP_HANDLER(pref10) {
3801         uint8 ireg2 = ROP_ARG(PCD);
3802         PC++;
3803         switch (ireg2) {
3804                 case 0x20:
3805                         lbra();
3806                         icount -= 5;
3807                         break;  // 20111217
3808                 case 0x21:
3809                         lbrn();
3810                         icount -= 5;
3811                         break;
3812                 case 0x22:
3813                         lbhi();
3814                         icount -= 5;
3815                         break;
3816                 case 0x23:
3817                         lbls();
3818                         icount -= 5;
3819                         break;
3820                 case 0x24:
3821                         lbcc();
3822                         icount -= 5;
3823                         break;
3824                 case 0x25:
3825                         lbcs();
3826                         icount -= 5;
3827                         break;
3828                 case 0x26:
3829                         lbne();
3830                         icount -= 5;
3831                         break;
3832                 case 0x27:
3833                         lbeq();
3834                         icount -= 5;
3835                         break;
3836                 case 0x28:
3837                         lbvc();
3838                         icount -= 5;
3839                         break;
3840                 case 0x29:
3841                         lbvs();
3842                         icount -= 5;
3843                         break;
3844                 case 0x2a:
3845                         lbpl();
3846                         icount -= 5;
3847                         break;
3848                 case 0x2b:
3849                         lbmi();
3850                         icount -= 5;
3851                         break;
3852                 case 0x2c:
3853                         lbge();
3854                         icount -= 5;
3855                         break;
3856                 case 0x2d:
3857                         lblt();
3858                         icount -= 5;
3859                         break;
3860                 case 0x2e:
3861                         lbgt();
3862                         icount -= 5;
3863                         break;
3864                 case 0x2f:
3865                         lble();
3866                         icount -= 5;
3867                         break;
3868                 case 0x3f:
3869                         swi2();
3870                         icount -= 20;
3871                         break;
3872                 case 0x83:
3873                         cmpd_im();
3874                         icount -= 5;
3875                         break;
3876                 case 0x8c:
3877                         cmpy_im();
3878                         icount -= 5;
3879                         break;
3880                 case 0x8d:
3881                         lbsr();
3882                         icount -= 9;
3883                         break;
3884                 case 0x8e:
3885                         ldy_im();
3886                         icount -= 4;
3887                         break;
3888 //    case 0x8f: flag16_im();->cycle=4; break; // 20130417
3889                 case 0x93:
3890                         cmpd_di();
3891                         icount -= 7;
3892                         break;
3893                 case 0x9c:
3894                         cmpy_di();
3895                         icount -= 7;
3896                         break;
3897                 case 0x9e:
3898                         ldy_di();
3899                         icount -= 6;
3900                         break;
3901                 case 0x9f:
3902                         sty_di();
3903                         icount -= 6;
3904                         break;
3905                 case 0xa3:
3906                         cmpd_ix();
3907                         icount -= 7;
3908                         break;
3909                 case 0xac:
3910                         cmpy_ix();
3911                         icount -= 7;
3912                         break;
3913                 case 0xae:
3914                         ldy_ix();
3915                         icount -= 6;
3916                         break;
3917                 case 0xaf:
3918                         sty_ix();
3919                         icount -= 6;
3920                         break;
3921                 case 0xb3:
3922                         cmpd_ex();
3923                         icount -= 8;
3924                         break;
3925                 case 0xbc:
3926                         cmpy_ex();
3927                         icount -= 8;
3928                         break;
3929                 case 0xbe:
3930                         ldy_ex();
3931                         icount -= 7;
3932                         break;
3933                 case 0xbf:
3934                         sty_ex();
3935                         icount -= 7;
3936                         break;
3937                 case 0xce:
3938                         lds_im();
3939                         icount -= 4;
3940                         break;
3941 //    case 0xcf: flag16_im();->cycle=4; break;
3942                 case 0xde:
3943                         lds_di();
3944                         icount -= 6;
3945                         break;
3946                 case 0xdf:
3947                         sts_di();
3948                         icount -= 6;
3949                         break;
3950                 case 0xee:
3951                         lds_ix();
3952                         icount -= 6;
3953                         break;
3954                 case 0xef:
3955                         sts_ix();
3956                         icount -= 6;
3957                         break;
3958                 case 0xfe:
3959                         lds_ex();
3960                         icount -= 7;
3961                         break;
3962                 case 0xff:
3963                         sts_ex();
3964                         icount -= 7;
3965                         break;
3966                 default:
3967                         IIError();
3968                         break;
3969 //    default:   PC--; cpu_execline(); icount -= 2;  break; /* 121228 Change Handring Exception by K.Ohta */
3970         }
3971 }
3972
3973 /* $11xx opcodes */
3974 OP_HANDLER(pref11) {
3975                 uint8 ireg2 = ROP_ARG(PCD);
3976                 PC++;
3977                 switch (ireg2) {
3978                         case 0x3f:
3979                                 swi3();
3980                                 icount -= 20;
3981                                 break;
3982
3983                         case 0x83:
3984                                 cmpu_im();
3985                                 icount -= 5;
3986                                 break;
3987                         case 0x8c:
3988                                 cmps_im();
3989                                 icount -= 5;
3990                                 break;
3991
3992                         case 0x93:
3993                                 cmpu_di();
3994                                 icount -= 7;
3995                                 break;
3996                         case 0x9c:
3997                                 cmps_di();
3998                                 icount -= 7;
3999                                 break;
4000
4001                         case 0xa3:
4002                                 cmpu_ix();
4003                                 icount -= 7;
4004                                 break;
4005                         case 0xac:
4006                                 cmps_ix();
4007                                 icount -= 7;
4008                                 break;
4009
4010                         case 0xb3:
4011                                 cmpu_ex();
4012                                 icount -= 8;
4013                                 break;
4014                         case 0xbc:
4015                                 cmps_ex();
4016                                 icount -= 8;
4017                                 break;
4018
4019                         default:
4020                                 IIError();
4021                                 break;
4022 //    default:   PC--; cpu_execline(); icount -= 2 ; break; /* 121228 Change Handring Exception by K.Ohta */
4023                 }
4024         }
4025
4026 #define STATE_VERSION   1
4027
4028 void MC6809::save_state(FILEIO* state_fio)
4029 {
4030         state_fio->FputUint32(STATE_VERSION);
4031         state_fio->FputInt32(this_device_id);
4032
4033         state_fio->FputInt32(icount);
4034         state_fio->FputInt32(extra_icount);
4035         state_fio->FputUint32(int_state);
4036
4037         state_fio->FputUint32(pc.d);
4038         state_fio->FputUint32(ppc.d);
4039         state_fio->FputUint32(acc.d);
4040         state_fio->FputUint32(dp.d);
4041         state_fio->FputUint32(u.d);
4042         state_fio->FputUint32(s.d);
4043         state_fio->FputUint32(x.d);
4044         state_fio->FputUint32(y.d);
4045         state_fio->FputUint8(cc);
4046         state_fio->FputUint32(ea.d);
4047
4048 }
4049
4050 bool MC6809::load_state(FILEIO* state_fio)
4051 {
4052         if(state_fio->FgetUint32() != STATE_VERSION) {
4053                 return false;
4054         }
4055         if(state_fio->FgetInt32() != this_device_id) {
4056                 return false;
4057         }
4058
4059         icount = state_fio->FgetInt32();
4060         extra_icount = state_fio->FgetInt32();
4061         int_state = state_fio->FgetUint32();
4062
4063         pc.d = state_fio->FgetUint32();
4064         ppc.d = state_fio->FgetUint32();
4065         acc.d = state_fio->FgetUint32();
4066         dp.d = state_fio->FgetUint32();
4067         u.d = state_fio->FgetUint32();
4068         s.d = state_fio->FgetUint32();
4069         x.d = state_fio->FgetUint32();
4070         y.d = state_fio->FgetUint32();
4071         cc = state_fio->FgetUint8();
4072         ea.d = state_fio->FgetUint32();
4073
4074         return true;
4075 }
4076
4077