2 Skelton for retropc emulator
5 Author : Takeda.Toshiya
22 class MC6809 : public DEVICE
32 outputs_t outputs_bus_halt; // For sync
34 outputs_t outputs_bus_clr; // If clr() insn used, write "1" or "2".
38 pair_t pc; /* Program counter */
39 pair_t ppc; /* Previous program counter */
40 pair_t acc; /* Accumulator a and b */
41 pair_t dp; /* Direct Page register (page in MSB) */
42 pair_t u, s; /* Stack pointers */
43 pair_t x, y; /* Index registers */
45 pair_t ea; /* effective address */
51 void WM16(uint32_t Addr, pair_t *p);
57 void run_one_opecode();
58 void op(uint8_t ireg);
59 void fetch_effective_address();
60 void fetch_effective_address_IDX(uint8_t upper, uint8_t lower);
62 inline void BRANCH(bool cond);
63 inline void LBRANCH(bool cond);
65 inline pair_t RM16_PAIR(uint32_t addr);
66 inline uint8_t GET_INDEXED_DATA(void);
67 inline pair_t GET_INDEXED_DATA16(void);
69 inline void NEG_MEM(uint8_t a_neg);
70 inline uint8_t NEG_REG(uint8_t r_neg);
71 inline void COM_MEM(uint8_t a_neg);
72 inline uint8_t COM_REG(uint8_t r_neg);
73 inline void LSR_MEM(uint8_t a_neg);
74 inline uint8_t LSR_REG(uint8_t r_neg);
75 inline void ROR_MEM(uint8_t a_neg);
76 inline uint8_t ROR_REG(uint8_t r_neg);
77 inline void ASR_MEM(uint8_t a_neg);
78 inline uint8_t ASR_REG(uint8_t r_neg);
79 inline void ASL_MEM(uint8_t a_neg);
80 inline uint8_t ASL_REG(uint8_t r_neg);
81 inline void ROL_MEM(uint8_t a_neg);
82 inline uint8_t ROL_REG(uint8_t r_neg);
83 inline void DEC_MEM(uint8_t a_neg);
84 inline uint8_t DEC_REG(uint8_t r_neg);
85 inline void DCC_MEM(uint8_t a_neg);
86 inline uint8_t DCC_REG(uint8_t r_neg);
87 inline void INC_MEM(uint8_t a_neg);
88 inline uint8_t INC_REG(uint8_t r_neg);
89 inline void TST_MEM(uint8_t a_neg);
90 inline uint8_t TST_REG(uint8_t r_neg);
91 inline uint8_t CLC_REG(uint8_t r_neg);
92 inline void CLR_MEM(uint8_t a_neg);
93 inline uint8_t CLR_REG(uint8_t r_neg);
95 inline uint8_t SUB8_REG(uint8_t reg, uint8_t data);
96 inline uint8_t CMP8_REG(uint8_t reg, uint8_t data);
97 inline uint8_t SBC8_REG(uint8_t reg, uint8_t data);
98 inline uint8_t AND8_REG(uint8_t reg, uint8_t data);
99 inline uint8_t BIT8_REG(uint8_t reg, uint8_t data);
100 inline uint8_t OR8_REG(uint8_t reg, uint8_t data);
101 inline uint8_t EOR8_REG(uint8_t reg, uint8_t data);
102 inline uint8_t ADD8_REG(uint8_t reg, uint8_t data);
103 inline uint8_t ADC8_REG(uint8_t reg, uint8_t data);
104 inline void STORE8_REG(uint8_t reg);
105 inline uint8_t LOAD8_REG(uint8_t reg);
107 inline uint16_t SUB16_REG(uint16_t reg, uint16_t data);
108 inline uint16_t ADD16_REG(uint16_t reg, uint16_t data);
109 inline uint16_t CMP16_REG(uint16_t reg, uint16_t data);
110 inline uint16_t LOAD16_REG(uint16_t reg);
111 inline void STORE16_REG(pair_t *p);
117 inline void adca_im();
412 MC6809(VM* parent_vm, EMU* parent_emu) : DEVICE(parent_vm, parent_emu)
414 initialize_output_signals(&outputs_bus_clr);
415 initialize_output_signals(&outputs_bus_halt);
416 set_device_name(_T("MC6809 MPU"));
425 uint32_t get_debug_prog_addr_mask()
429 uint32_t get_debug_data_addr_mask()
433 void write_debug_data8(uint32_t addr, uint32_t data);
434 uint32_t read_debug_data8(uint32_t addr);
435 void write_debug_data16(uint32_t addr, uint32_t data)
437 write_debug_data8(addr, (data >> 8) & 0xff);
438 write_debug_data8(addr + 1, data & 0xff);
440 uint32_t read_debug_data16(uint32_t addr)
442 uint32_t val = read_debug_data8(addr) << 8;
443 val |= read_debug_data8(addr + 1);
446 void write_debug_data32(uint32_t addr, uint32_t data)
448 write_debug_data16(addr, (data >> 16) & 0xffff);
449 write_debug_data16(addr + 2, data & 0xffff);
451 uint32_t read_debug_data32(uint32_t addr)
453 uint32_t val = read_debug_data16(addr) << 16;
454 val |= read_debug_data16(addr + 2);
457 void write_debug_io8(uint32_t addr, uint32_t data);
458 uint32_t read_debug_io8(uint32_t addr);
459 void write_debug_io16(uint32_t addr, uint32_t data)
461 write_debug_io8(addr, (data >> 8) & 0xff);
462 write_debug_io8(addr + 1, data & 0xff);
464 uint32_t read_debug_io16(uint32_t addr)
466 uint32_t val = read_debug_io8(addr) << 8;
467 val |= read_debug_io8(addr + 1);
470 void write_debug_io32(uint32_t addr, uint32_t data)
472 write_debug_io16(addr, (data >> 16) & 0xffff);
473 write_debug_io16(addr + 2, data & 0xffff);
475 uint32_t read_debug_io32(uint32_t addr)
477 uint32_t val = read_debug_io16(addr) << 16;
478 val |= read_debug_io16(addr + 2);
481 bool write_debug_reg(const _TCHAR *reg, uint32_t data);
482 void get_debug_regs_info(_TCHAR *buffer, size_t buffer_len);
483 int debug_dasm(uint32_t pc, _TCHAR *buffer, size_t buffer_len);
484 uint32_t cpu_disassemble_m6809(_TCHAR *buffer, uint32_t pc, const uint8_t *oprom, const uint8_t *opram);
490 void write_signal(int id, uint32_t data, uint32_t mask);
491 void save_state(FILEIO* state_fio);
492 bool load_state(FILEIO* state_fio);
493 void set_extra_clock(int clock)
495 extra_icount += clock;
497 int get_extra_clock()
505 uint32_t get_next_pc()
518 uint32_t get_ustack()
522 uint32_t get_sstack()
544 void set_context_mem(DEVICE* device)
548 void set_context_bus_halt(DEVICE* device, int id, uint32_t mask)
550 register_output_signal(&outputs_bus_halt, device, id, mask);
552 void set_context_bus_clr(DEVICE* device, int id, uint32_t mask)
554 register_output_signal(&outputs_bus_clr, device, id, mask);
557 void set_context_debugger(DEBUGGER* device)