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[VM][General][WIP] Start to merge upstream 2018-10-14.Open branch upstream_20181014 .
[csp-qt/common_source_project-fm7.git] / source / src / vm / mz2500 / mz1r12.cpp
1 /*
2         SHARP MZ-80B Emulator 'EmuZ-80B'
3         SHARP MZ-2200 Emulator 'EmuZ-2200'
4
5         Author : Takeda.Toshiya
6         Date   : 2013.03.17-
7
8         [ MZ-1R12 (32KB SRAM) ]
9 */
10
11 #include "mz1r12.h"
12
13 namespace MZ2500 {
14
15 void MZ1R12::initialize()
16 {
17         memset(sram, 0, sizeof(sram));
18         read_only = false;
19         
20         FILEIO* fio = new FILEIO();
21 #ifndef _MZ80B
22         if(fio->Fopen(create_local_path(_T("MZ-1E18.ROM")), FILEIO_READ_BINARY)) {
23                 fio->Fread(sram, sizeof(sram), 1);
24                 fio->Fclose();
25                 read_only = true;
26         } else
27 #endif
28         if(fio->Fopen(create_local_path(_T("MZ-1R12.BIN")), FILEIO_READ_BINARY)) {
29                 fio->Fread(sram, sizeof(sram), 1);
30                 fio->Fclose();
31         }
32         delete fio;
33         
34         address = 0;
35         crc32 = get_crc32(sram, sizeof(sram));
36 }
37
38 void MZ1R12::release()
39 {
40         if(!read_only && crc32 != get_crc32(sram, sizeof(sram))) {
41                 FILEIO* fio = new FILEIO();
42                 if(fio->Fopen(create_local_path(_T("MZ-1R12.BIN")), FILEIO_WRITE_BINARY)) {
43                         fio->Fwrite(sram, sizeof(sram), 1);
44                         fio->Fclose();
45                 }
46                 delete fio;
47         }
48 }
49
50 void MZ1R12::write_io8(uint32_t addr, uint32_t data)
51 {
52         switch(addr & 0xff) {
53         case 0xf8:
54                 address = (address & 0x00ff) | (data << 8);
55                 break;
56         case 0xf9:
57                 address = (address & 0xff00) | (data << 0);
58                 break;
59         case 0xfa:
60                 if(!read_only) {
61                         sram[address & 0x7fff] = data;
62                 }
63                 address++;
64                 break;
65         }
66 }
67
68 uint32_t MZ1R12::read_io8(uint32_t addr)
69 {
70         switch(addr & 0xff) {
71         case 0xf8:
72                 address = 0;
73                 break;
74         case 0xf9:
75                 return sram[(address++) & 0x7fff];
76         }
77         return 0xff;
78 }
79
80 #define STATE_VERSION   1
81
82 bool MZ1R12::process_state(FILEIO* state_fio, bool loading)
83 {
84         if(!state_fio->StateCheckUint32(STATE_VERSION)) {
85                 return false;
86         }
87         if(!state_fio->StateCheckInt32(this_device_id)) {
88                 return false;
89         }
90         state_fio->StateArray(sram, sizeof(sram), 1);
91         state_fio->StateValue(read_only);
92         state_fio->StateValue(address);
93         state_fio->StateValue(crc32);
94         return true;
95 }
96
97 }