source/src/vm/pc9801/membus.cpp

   1 /*
   2         NEC PC-9801 Emulator 'ePC-9801'
   3         NEC PC-9801E/F/M Emulator 'ePC-9801E'
   4         NEC PC-9801U Emulator 'ePC-9801U'
   5         NEC PC-9801VF Emulator 'ePC-9801VF'
   6         NEC PC-9801VM Emulator 'ePC-9801VM'
   7         NEC PC-9801VX Emulator 'ePC-9801VX'
   8         NEC PC-9801RA Emulator 'ePC-9801RA'
   9         NEC PC-98XA Emulator 'ePC-98XA'
  10         NEC PC-98XL Emulator 'ePC-98XL'
  11         NEC PC-98RL Emulator 'ePC-98RL'
  12         NEC PC-98DO Emulator 'ePC-98DO'
  13
  14         Author : Takeda.Toshiya
  15         Date   : 2017.06.22-
  16
  17         [ memory bus ]
  18 */
  19
  20 #include "membus.h"
  21 #include "display.h"
  22
  23 #ifdef _MSC_VER
  24         // Microsoft Visual C++
  25         #pragma warning( disable : 4065 )
  26 #endif
  27
  28 /*
  29         NORMAL PC-9801
  30                 00000h - 9FFFFh: RAM
  31                 A0000h - A1FFFh: TEXT VRAM
  32                 A2000h - A3FFFh: ATTRIBUTE
  33                 A4000h - A4FFFh: CG WINDOW
  34                 A8000h - BFFFFh: VRAM (BRG)
  35                 C0000h - DFFFFh: EXT BIOS
  36                         CC000h - CFFFFh: SOUND BIOS
  37                         D6000h - D6FFFh: 2DD FDD BIOS
  38                         D7000h - D7FFFh: 2HD FDD BIOS
  39                         D7000h - D7FFFh: SASI BIOS
  40                         D8000h - DBFFFh: IDE BIOS
  41                         DC000h - DCFFFh: SCSI BIOS
  42                 E0000h - E7FFFh: VRAM (I)
  43                 E8000h - FFFFFh: BIOS
  44
  45         HIRESO PC-98XA/XL/XL^2/RL
  46                 00000h - 7FFFFh: RAM
  47                 80000h - BFFFFh: MEMORY WINDOW
  48                 C0000h - DFFFFh: VRAM
  49                 E0000h - E1FFFh: TEXT VRAM
  50                 E2000h - E3FFFh: ATTRIBUTE
  51                 E4000h - E4FFFh: CG WINDOW
  52                 F0000h - FFFFFh: BIOS
  53 */
  54
  55 void MEMBUS::initialize()
  56 {
  57         MEMORY::initialize();
  58
  59         // RAM
  60         memset(ram, 0x00, sizeof(ram));
  61 #if !defined(SUPPORT_HIRESO)
  62         set_memory_rw(0x00000, 0x9ffff, ram);
  63 #else
  64         set_memory_rw(0x00000, 0xbffff, ram);
  65 #endif
  66 #if defined(SUPPORT_24BIT_ADDRESS) || defined(SUPPORT_32BIT_ADDRESS)
  67         if(sizeof(ram) > 0x100000) {
  68                 set_memory_rw(0x100000, sizeof(ram) - 1, ram + 0x100000);
  69         }
  70 #endif
  71
  72         // VRAM
  73 #if !defined(SUPPORT_HIRESO)
  74         set_memory_mapped_io_rw(0xa0000, 0xa4fff, d_display);
  75         set_memory_mapped_io_rw(0xa8000, 0xbffff, d_display);
  76 #if defined(SUPPORT_16_COLORS)
  77         set_memory_mapped_io_rw(0xe0000, 0xe7fff, d_display);
  78 #endif
  79 #else
  80         set_memory_mapped_io_rw(0xc0000, 0xe4fff, d_display);
  81 #endif
  82
  83         // BIOS
  84         memset(bios, 0xff, sizeof(bios));
  85         if(!read_bios(_T("IPL.ROM"), bios, sizeof(bios))) {
  86                 read_bios(_T("BIOS.ROM"), bios, sizeof(bios));
  87         }
  88 #if defined(SUPPORT_BIOS_RAM)
  89         memset(bios_ram, 0x00, sizeof(bios_ram));
  90 #endif
  91 #if defined(SUPPORT_ITF_ROM)
  92         memset(itf, 0xff, sizeof(itf));
  93         read_bios(_T("ITF.ROM"), itf, sizeof(itf));
  94 #endif
  95
  96 #if !defined(SUPPORT_HIRESO)
  97         // EXT BIOS
  98 #if defined(_PC9801) || defined(_PC9801E)
  99         memset(fd_bios_2hd, 0xff, sizeof(fd_bios_2hd));
 100         read_bios(_T("2HDIF.ROM"), fd_bios_2hd, sizeof(fd_bios_2hd));
 101         set_memory_r(0xd6000, 0xd6fff, fd_bios_2dd);
 102
 103         memset(fd_bios_2dd, 0xff, sizeof(fd_bios_2dd));
 104         read_bios(_T("2DDIF.ROM"), fd_bios_2dd, sizeof(fd_bios_2dd));
 105         set_memory_r(0xd7000, 0xd7fff, fd_bios_2hd);
 106 #endif
 107         memset(sound_bios, 0xff, sizeof(sound_bios));
 108 //      memset(sound_bios_ram, 0x00, sizeof(sound_bios_ram));
 109         sound_bios_selected = false;
 110 //      sound_bios_ram_selected = false;
 111         if(config.sound_type == 0) {
 112                 sound_bios_selected = (read_bios(_T("SOUND.ROM"), sound_bios, sizeof(sound_bios)) != 0);
 113         } else if(config.sound_type == 2) {
 114                 sound_bios_selected = (read_bios(_T("MUSIC.ROM"), sound_bios, sizeof(sound_bios)) != 0);
 115         }
 116         if(sound_bios_selected) {
 117                 d_display->sound_bios_ok();
 118         }
 119         update_sound_bios();
 120 #if defined(SUPPORT_SASI_IF)
 121         memset(sasi_bios, 0xff, sizeof(sasi_bios));
 122         memset(sasi_bios_ram, 0x00, sizeof(sasi_bios_ram));
 123         sasi_bios_selected = (read_bios(_T("SASI.ROM"), sasi_bios, sizeof(sasi_bios)) != 0);
 124         sasi_bios_ram_selected = false;
 125         update_sasi_bios();
 126 #endif
 127 #if defined(SUPPORT_SCSI_IF)
 128         memset(scsi_bios, 0xff, sizeof(scsi_bios));
 129         memset(scsi_bios_ram, 0x00, sizeof(scsi_bios_ram));
 130         scsi_bios_selected = (read_bios(_T("SCSI.ROM"), scsi_bios, sizeof(scsi_bios)) != 0);
 131         scsi_bios_ram_selected = false;
 132         update_scsi_bios();
 133 #endif
 134 #if defined(SUPPORT_IDE_IF)
 135         memset(ide_bios, 0xff, sizeof(ide_bios));
 136 //      memset(ide_bios_ram, 0x00, sizeof(ide_bios_ram));
 137         ide_bios_selected = (read_bios(_T("IDE.ROM"), ide_bios, sizeof(ide_bios)) != 0);
 138 //      ide_bios_ram_selected = false;
 139         update_ide_bios();
 140 #endif
 141
 142         // EMS
 143 #if defined(SUPPORT_NEC_EMS)
 144         memset(nec_ems, 0, sizeof(nec_ems));
 145 #endif
 146 #endif
 147 }
 148
 149 void MEMBUS::reset()
 150 {
 151         MEMORY::reset();
 152
 153         // BIOS/ITF
 154 #if defined(SUPPORT_BIOS_RAM)
 155         bios_ram_selected = false;
 156 #endif
 157 #if defined(SUPPORT_ITF_ROM)
 158         itf_selected = true;
 159 #endif
 160         update_bios();
 161
 162 #if !defined(SUPPORT_HIRESO)
 163         // EMS
 164 #if defined(SUPPORT_NEC_EMS)
 165         nec_ems_selected = false;
 166         update_nec_ems();
 167 #endif
 168 #endif
 169
 170 #if defined(SUPPORT_24BIT_ADDRESS) || defined(SUPPORT_32BIT_ADDRESS)
 171 #if !defined(SUPPORT_HIRESO)
 172         dma_access_ctrl = 0xfe; // bit2 = 1, bit0 = 0
 173         window_80000h = 0x80000;
 174         window_a0000h = 0xa0000;
 175 #else
 176         dma_access_ctrl = 0xfb; // bit2 = 0, bit0 = 1
 177         window_80000h = 0x100000;
 178         window_a0000h = 0x120000;
 179 #endif
 180 #endif
 181 }
 182
 183 void MEMBUS::write_io8(uint32_t addr, uint32_t data)
 184 {
 185         switch(addr) {
 186 #if defined(SUPPORT_ITF_ROM)
 187         case 0x043d:
 188                 switch(data & 0xff) {
 189                 case 0x00:
 190                 case 0x10:
 191                 case 0x18:
 192                         if(!itf_selected) {
 193                                 itf_selected = true;
 194                                 update_bios();
 195                         }
 196                         break;
 197                 case 0x02:
 198                 case 0x12:
 199                         if(itf_selected) {
 200                                 itf_selected = false;
 201                                 update_bios();
 202                         }
 203                         break;
 204                 }
 205                 break;
 206 #endif
 207 #if !defined(SUPPORT_HIRESO)
 208         case 0x043f:
 209                 switch(data & 0xff) {
 210                 case 0x20:
 211 #if defined(SUPPORT_NEC_EMS)
 212                         if(nec_ems_selected) {
 213                                 nec_ems_selected = false;
 214                                 update_nec_ems();
 215                         }
 216 #endif
 217                         break;
 218                 case 0x22:
 219 #if defined(SUPPORT_NEC_EMS)
 220                         if(!nec_ems_selected) {
 221                                 nec_ems_selected = true;
 222                                 update_nec_ems();
 223                         }
 224 #endif
 225                         break;
 226                 case 0xc0:
 227 #if defined(SUPPORT_SASI_IF)
 228                         if(sasi_bios_ram_selected) {
 229                                 sasi_bios_ram_selected = false;
 230                                 if(sasi_bios_selected) {
 231                                         update_sasi_bios();
 232                                 }
 233                         }
 234 #endif
 235 #if defined(SUPPORT_SCSI_IF)
 236                         if(scsi_bios_ram_selected) {
 237                                 scsi_bios_ram_selected = false;
 238                                 if(scsi_bios_selected) {
 239                                         update_scsi_bios();
 240                                 }
 241                         }
 242 #endif
 243                         break;
 244                 case 0xc2:
 245 #if defined(SUPPORT_SASI_IF)
 246                         if(!sasi_bios_ram_selected) {
 247                                 sasi_bios_ram_selected = true;
 248                                 if(sasi_bios_selected) {
 249                                         update_sasi_bios();
 250                                 }
 251                         }
 252 #endif
 253                         break;
 254                 case 0xc4:
 255 #if defined(SUPPORT_SCSI_IF)
 256                         if(!scsi_bios_ram_selected) {
 257                                 scsi_bios_ram_selected = true;
 258                                 if(scsi_bios_selected) {
 259                                         update_scsi_bios();
 260                                 }
 261                         }
 262 #endif
 263                         break;
 264                 }
 265                 break;
 266 #endif
 267 #if defined(SUPPORT_24BIT_ADDRESS) || defined(SUPPORT_32BIT_ADDRESS)
 268 #if !defined(_PC98XA)
 269         case 0x0439:
 270                 dma_access_ctrl = data;
 271                 break;
 272 #endif
 273 #if !defined(SUPPORT_HIRESO)
 274         case 0x0461:
 275 #else
 276         case 0x0091:
 277 #if defined(_PC98XA)
 278                 if(data < 0x10) {
 279                         break;
 280                 }
 281 #endif
 282 #endif
 283                 window_80000h = (data & 0xfe) << 16;
 284                 break;
 285 #if !defined(SUPPORT_HIRESO)
 286         case 0x0463:
 287 #else
 288         case 0x0093:
 289 #if defined(_PC98XA)
 290                 if(data < 0x10) {
 291                         break;
 292                 }
 293 #endif
 294 #endif
 295                 window_a0000h = (data & 0xfe) << 16;
 296                 break;
 297 #endif
 298 #if defined(SUPPORT_32BIT_ADDRESS)
 299         case 0x053d:
 300 #if !defined(SUPPORT_HIRESO)
 301                 if(sound_bios_selected != ((data & 0x80) != 0)) {
 302                         sound_bios_selected = ((data & 0x80) != 0);
 303                         update_sound_bios();
 304                 }
 305 #if defined(SUPPORT_SASI_IF)
 306                 if(sasi_bios_selected != ((data & 0x40) != 0)) {
 307                         sasi_bios_selected = ((data & 0x40) != 0);
 308                         update_sasi_bios();
 309                 }
 310 #endif
 311 #if defined(SUPPORT_SCSI_IF)
 312                 if(scsi_bios_selected != ((data & 0x20) != 0)) {
 313                         scsi_bios_selected = ((data & 0x20) != 0);
 314                         update_scsi_bios();
 315                 }
 316 #endif
 317 #if defined(SUPPORT_IDE_IF)
 318                 if(ide_bios_selected != ((data & 0x10) != 0)) {
 319                         ide_bios_selected = ((data & 0x10) != 0);
 320                         update_ide_bios();
 321                 }
 322 #endif
 323 #endif
 324 #if defined(SUPPORT_BIOS_RAM)
 325                 if(bios_ram_selected != ((data & 0x02) != 0)) {
 326                         bios_ram_selected = ((data & 0x02) != 0);
 327                         update_bios();
 328                 }
 329 #endif
 330                 break;
 331 #endif
 332         // dummy for no cases
 333         default:
 334                 break;
 335         }
 336 }
 337
 338 uint32_t MEMBUS::read_io8(uint32_t addr)
 339 {
 340         switch(addr) {
 341 #if defined(SUPPORT_24BIT_ADDRESS) || defined(SUPPORT_32BIT_ADDRESS)
 342 #if !defined(_PC98XA)
 343         case 0x0439:
 344                 return dma_access_ctrl;
 345 #endif
 346 #if !defined(SUPPORT_HIRESO)
 347         case 0x0461:
 348 #else
 349         case 0x0091:
 350 #endif
 351                 return window_80000h >> 16;
 352 #if !defined(SUPPORT_HIRESO)
 353         case 0x0463:
 354 #else
 355         case 0x0093:
 356 #endif
 357                 return window_a0000h >> 16;
 358         case 0x0567:
 359                 return (uint8_t)(sizeof(ram) >> 17);
 360 #endif
 361         // dummy for no cases
 362         default:
 363                 break;
 364         }
 365         return 0xff;
 366 }
 367
 368 #if defined(SUPPORT_24BIT_ADDRESS) || defined(SUPPORT_32BIT_ADDRESS)
 369 #if !defined(SUPPORT_HIRESO)
 370         #define UPPER_MEMORY_24BIT      0x00fa0000
 371         #define UPPER_MEMORY_32BIT      0xfffa0000
 372 #else
 373         #define UPPER_MEMORY_24BIT      0x00fc0000
 374         #define UPPER_MEMORY_32BIT      0xfffc0000
 375 #endif
 376
 377 uint32_t MEMBUS::read_data8(uint32_t addr)
 378 {
 379         if(addr < 0x80000) {
 380                 return MEMORY::read_data8(addr);
 381         } else if(addr < 0xa0000) {
 382                 addr = (addr & 0x1ffff) | window_80000h;
 383         } else if(addr < 0xc0000) {
 384                 addr = (addr & 0x1ffff) | window_a0000h;
 385         }
 386         if(addr < UPPER_MEMORY_24BIT) {
 387                 return MEMORY::read_data8(addr);
 388 #if defined(SUPPORT_24BIT_ADDRESS)
 389         } else {
 390 #else
 391         } else if(addr < 0x1000000 || addr >= UPPER_MEMORY_32BIT) {
 392 #endif
 393                 return MEMORY::read_data8(addr & 0xfffff);
 394         }
 395         return 0xff;
 396 }
 397
 398 void MEMBUS::write_data8(uint32_t addr, uint32_t data)
 399 {
 400         if(addr < 0x80000) {
 401                 MEMORY::write_data8(addr, data);
 402                 return;
 403         } else if(addr < 0xa0000) {
 404                 addr = (addr & 0x1ffff) | window_80000h;
 405         } else if(addr < 0xc0000) {
 406                 addr = (addr & 0x1ffff) | window_a0000h;
 407         }
 408         if(addr < UPPER_MEMORY_24BIT) {
 409                 MEMORY::write_data8(addr, data);
 410 #if defined(SUPPORT_24BIT_ADDRESS)
 411         } else {
 412 #else
 413         } else if(addr < 0x1000000 || addr >= UPPER_MEMORY_32BIT) {
 414 #endif
 415                 MEMORY::write_data8(addr & 0xfffff, data);
 416         }
 417 }
 418
 419 uint32_t MEMBUS::read_dma_data8(uint32_t addr)
 420 {
 421         if(dma_access_ctrl & 4) {
 422                 addr &= 0x000fffff;
 423         }
 424         return MEMBUS::read_data8(addr);
 425 }
 426
 427 void MEMBUS::write_dma_data8(uint32_t addr, uint32_t data)
 428 {
 429         if(dma_access_ctrl & 4) {
 430                 addr &= 0x000fffff;
 431         }
 432         MEMBUS::write_data8(addr, data);
 433 }
 434 #endif
 435
 436 void MEMBUS::update_bios()
 437 {
 438         unset_memory_rw(0x100000 - sizeof(bios), 0xfffff);
 439 #if defined(SUPPORT_ITF_ROM)
 440         if(itf_selected) {
 441                 set_memory_r(0x100000 - sizeof(itf), 0xfffff, itf);
 442         } else {
 443 #endif
 444 #if defined(SUPPORT_BIOS_RAM)
 445                 if(bios_ram_selected) {
 446                         set_memory_rw(0x100000 - sizeof(bios_ram), 0xfffff, bios_ram);
 447                 } else {
 448 #endif
 449                         set_memory_r(0x100000 - sizeof(bios), 0xfffff, bios);
 450 #if defined(SUPPORT_BIOS_RAM)
 451 //                      set_memory_w(0x100000 - sizeof(bios_ram), 0xfffff, bios_ram);
 452                 }
 453 #endif
 454 #if defined(SUPPORT_ITF_ROM)
 455         }
 456 #endif
 457 }
 458
 459 #if !defined(SUPPORT_HIRESO)
 460 void MEMBUS::update_sound_bios()
 461 {
 462         if(sound_bios_selected) {
 463 //              if(sound_bios_selected) {
 464 //                      set_memory_r(0xcc000, 0xcffff, sound_bios_ram);
 465 //              } else {
 466                         set_memory_r(0xcc000, 0xcffff, sound_bios);
 467                         unset_memory_w(0xcc000, 0xcffff);
 468 //              }
 469         } else {
 470                 unset_memory_rw(0xcc000, 0xcffff);
 471         }
 472 }
 473
 474 #if defined(SUPPORT_SASI_IF)
 475 void MEMBUS::update_sasi_bios()
 476 {
 477         if(sasi_bios_selected) {
 478                 if(sasi_bios_ram_selected) {
 479                         set_memory_rw(0xd7000, 0xd7fff, sasi_bios_ram);
 480                 } else {
 481                         set_memory_r(0xd7000, 0xd7fff, sasi_bios);
 482                         unset_memory_w(0xd7000, 0xd7fff);
 483                 }
 484         } else {
 485                 unset_memory_rw(0xd7000, 0xd7fff);
 486         }
 487 }
 488 #endif
 489
 490 #if defined(SUPPORT_SCSI_IF)
 491 void MEMBUS::update_scsi_bios()
 492 {
 493         if(scsi_bios_selected) {
 494                 if(scsi_bios_ram_selected) {
 495                         set_memory_rw(0xdc000, 0xdcfff, scsi_bios_ram);
 496                 } else {
 497                         set_memory_r(0xdc000, 0xdcfff, scsi_bios);
 498                         unset_memory_w(0xdc000, 0xdcfff);
 499                 }
 500         } else {
 501                 unset_memory_rw(0xdc000, 0xdcfff);
 502         }
 503 }
 504 #endif
 505
 506 #if defined(SUPPORT_IDE_IF)
 507 void MEMBUS::update_ide_bios()
 508 {
 509         if(ide_bios_selected) {
 510 //              if(ide_bios_selected) {
 511 //                      set_memory_r(0xd8000, 0xdbfff, ide_bios_ram);
 512 //              } else {
 513                         set_memory_r(0xd8000, 0xdbfff, ide_bios);
 514                         unset_memory_w(0xd8000, 0xdbfff);
 515 //              }
 516         } else {
 517                 unset_memory_rw(0xd8000, 0xdbfff);
 518         }
 519 }
 520 #endif
 521
 522 #if defined(SUPPORT_NEC_EMS)
 523 void MEMBUS::update_nec_ems()
 524 {
 525         if (nec_ems_selected) {
 526                 unset_memory_rw(0xb0000, 0xbffff);
 527                 set_memory_rw(0xb0000, 0xbffff, nec_ems);
 528         } else {
 529                 unset_memory_rw(0xb0000, 0xbffff);
 530                 set_memory_mapped_io_rw(0xb0000, 0xbffff, d_display);
 531         }
 532 }
 533 #endif
 534 #endif
 535
 536 #define STATE_VERSION   3
 537
 538 #include "../statesub.h"
 539
 540 void MEMBUS::decl_state()
 541 {
 542         enter_decl_state(STATE_VERSION);
 543
 544         DECL_STATE_ENTRY_1D_ARRAY(ram, sizeof(ram));
 545 #if defined(SUPPORT_BIOS_RAM)
 546         DECL_STATE_ENTRY_1D_ARRAY(bios_ram, sizeof(bios_ram));
 547         DECL_STATE_ENTRY_BOOL(bios_ram_selected);
 548 #endif
 549 #if defined(SUPPORT_ITF_ROM)
 550         DECL_STATE_ENTRY_BOOL(itf_selected);
 551 #endif
 552 #if !defined(SUPPORT_HIRESO)
 553 //      DECL_STATE_ENTRY_1D_ARRAY(sound_bios_ram, sizeof(sound_bios_ram), 1);
 554         DECL_STATE_ENTRY_BOOL(sound_bios_selected);
 555 //      DECL_STATE_ENTRY_BOOL(sound_bios_ram_selected);
 556 #if defined(SUPPORT_SASI_IF)
 557         DECL_STATE_ENTRY_1D_ARRAY(sasi_bios_ram, sizeof(sasi_bios_ram));
 558         DECL_STATE_ENTRY_BOOL(sasi_bios_selected);
 559         DECL_STATE_ENTRY_BOOL(sasi_bios_ram_selected);
 560 #endif
 561 #if defined(SUPPORT_SCSI_IF)
 562         DECL_STATE_ENTRY_1D_ARRAY(scsi_bios_ram, sizeof(scsi_bios_ram));
 563         DECL_STATE_ENTRY_BOOL(scsi_bios_selected);
 564         DECL_STATE_ENTRY_BOOL(scsi_bios_ram_selected);
 565 #endif
 566 #if defined(SUPPORT_IDE_IF)
 567 //      DECL_STATE_ENTRY_1D_ARRAY(ide_bios_ram, sizeof(ide_bios_ram), 1);
 568         DECL_STATE_ENTRY_BOOL(ide_bios_selected);
 569 //      DECL_STATE_ENTRY_BOOL(ide_bios_ram_selected);
 570 #endif
 571 #if defined(SUPPORT_NEC_EMS)
 572         DECL_STATE_ENTRY_1D_ARRAY(nec_ems, sizeof(nec_ems));
 573         DECL_STATE_ENTRY_BOOL(nec_ems_selected);
 574 #endif
 575 #endif
 576 #if defined(SUPPORT_24BIT_ADDRESS) || defined(SUPPORT_32BIT_ADDRESS)
 577         DECL_STATE_ENTRY_UINT8(dma_access_ctrl);
 578         DECL_STATE_ENTRY_INT32(window_80000h);
 579         DECL_STATE_ENTRY_INT32(window_a0000h);
 580 #endif
 581         leave_decl_state();
 582
 583         // ToDo: Helper.
 584 //      MEMORY::decl_state();
 585 }
 586
 587 void MEMBUS::save_state(FILEIO* state_fio)
 588 {
 589         if(state_entry != NULL) {
 590                 state_entry->save_state(state_fio);
 591         }
 592 //      state_fio->FputUint32(STATE_VERSION);
 593 //      state_fio->FputInt32(this_device_id);
 594
 595 //      state_fio->Fwrite(ram, sizeof(ram), 1);
 596 //#if defined(SUPPORT_BIOS_RAM)
 597 //      state_fio->Fwrite(bios_ram, sizeof(bios_ram), 1);
 598 //      state_fio->FputBool(bios_ram_selected);
 599 //#endif
 600 //#if defined(SUPPORT_ITF_ROM)
 601 //      state_fio->FputBool(itf_selected);
 602 //#endif
 603 //#if !defined(SUPPORT_HIRESO)
 604 ////    state_fio->Fwrite(sound_bios_ram, sizeof(sound_bios_ram), 1);
 605 //      state_fio->FputBool(sound_bios_selected);
 606 ////    state_fio->FputBool(sound_bios_ram_selected);
 607 //#if defined(SUPPORT_SASI_IF)
 608 //      state_fio->Fwrite(sasi_bios_ram, sizeof(sasi_bios_ram), 1);
 609 //      state_fio->FputBool(sasi_bios_selected);
 610 //      state_fio->FputBool(sasi_bios_ram_selected);
 611 //#endif
 612 //#if defined(SUPPORT_SCSI_IF)
 613 //      state_fio->Fwrite(scsi_bios_ram, sizeof(scsi_bios_ram), 1);
 614 //      state_fio->FputBool(scsi_bios_selected);
 615 //      state_fio->FputBool(scsi_bios_ram_selected);
 616 //#endif
 617 //#if defined(SUPPORT_IDE_IF)
 618 //      state_fio->Fwrite(ide_bios_ram, sizeof(ide_bios_ram), 1);
 619 //      state_fio->FputBool(ide_bios_selected);
 620 //      state_fio->FputBool(ide_bios_ram_selected);
 621 //#endif
 622 //#if defined(SUPPORT_NEC_EMS)
 623 //      state_fio->Fwrite(nec_ems, sizeof(nec_ems), 1);
 624 //      state_fio->FputBool(nec_ems_selected);
 625 //#endif
 626 //#endif
 627 //#if defined(SUPPORT_24BIT_ADDRESS) || defined(SUPPORT_32BIT_ADDRESS)
 628 //      state_fio->FputUint8(dma_access_ctrl);
 629 //      state_fio->FputInt32(window_80000h);
 630 //      state_fio->FputInt32(window_a0000h);
 631 //#endif
 632
 633 //      MEMORY::save_state(state_fio);
 634 }
 635
 636 bool MEMBUS::load_state(FILEIO* state_fio)
 637 {
 638         bool mb = false;
 639         if(state_entry != NULL) {
 640                 mb = state_entry->load_state(state_fio);
 641         }
 642         if(!mb) return false;
 643 //      if(state_fio->FgetUint32() != STATE_VERSION) {
 644 //              return false;
 645 //      }
 646 //      if(state_fio->FgetInt32() != this_device_id) {
 647 //              return false;
 648 //      }
 649 //      state_fio->Fread(ram, sizeof(ram), 1);
 650 //#if defined(SUPPORT_BIOS_RAM)
 651 //      state_fio->Fwrite(bios_ram, sizeof(bios_ram), 1);
 652 //      bios_ram_selected = state_fio->FgetBool();
 653 //#endif
 654 //#if defined(SUPPORT_ITF_ROM)
 655 //      itf_selected = state_fio->FgetBool();
 656 //#endif
 657 //#if !defined(SUPPORT_HIRESO)
 658 ////    state_fio->Fread(sound_bios_ram, sizeof(sound_bios_ram), 1);
 659 //      sound_bios_selected = state_fio->FgetBool();
 660 ////    sound_bios_ram_selected = state_fio->FgetBool();
 661 //#if defined(SUPPORT_SASI_IF)
 662 //      state_fio->Fread(sasi_bios_ram, sizeof(sasi_bios_ram), 1);
 663 //      sasi_bios_selected = state_fio->FgetBool();
 664 //      sasi_bios_ram_selected = state_fio->FgetBool();
 665 //#endif
 666 //#if defined(SUPPORT_SCSI_IF)
 667 //      state_fio->Fread(scsi_bios_ram, sizeof(scsi_bios_ram), 1);
 668 //      scsi_bios_selected = state_fio->FgetBool();
 669 //      scsi_bios_ram_selected = state_fio->FgetBool();
 670 //#endif
 671 //#if defined(SUPPORT_IDE_IF)
 672 ////    state_fio->Fread(ide_bios_ram, sizeof(ide_bios_ram), 1);
 673 //      ide_bios_selected = state_fio->FgetBool();
 674 ////    ide_bios_ram_selected = state_fio->FgetBool();
 675 //#endif
 676 //#if defined(SUPPORT_NEC_EMS)
 677 //      state_fio->Fread(nec_ems, sizeof(nec_ems), 1);
 678 //      nec_ems_selected = state_fio->FgetBool();
 679 //#endif
 680 //#endif
 681 //#if defined(SUPPORT_24BIT_ADDRESS) || defined(SUPPORT_32BIT_ADDRESS)
 682 //      dma_access_ctrl = state_fio->FgetUint8();
 683 //      window_80000h = state_fio->FgetUint32();
 684 //      window_a0000h = state_fio->FgetUint32();
 685 //#endif
 686
 687         // post process
 688         update_bios();
 689 #if !defined(SUPPORT_HIRESO)
 690         update_sound_bios();
 691 #if defined(SUPPORT_SASI_IF)
 692         update_sasi_bios();
 693 #endif
 694 #if defined(SUPPORT_SCSI_IF)
 695         update_scsi_bios();
 696 #endif
 697 #if defined(SUPPORT_IDE_IF)
 698         update_ide_bios();
 699 #endif
 700 #if defined(SUPPORT_EMS)
 701         update_nec_ems();
 702 #endif
 703 #endif
 704 //      return MEMORY::load_state(state_fio);
 705         return true;
 706 }