source/src/vm/tf20.cpp

   1 /*
   2         Skelton for retropc emulator
   3
   4         Author : Takeda.Toshiya
   5         Date   : 2015.01.30-
   6
   7         [ EPSON TF-20 ]
   8 */
   9
  10 #include "tf20.h"
  11 #include "upd765a.h"
  12
  13 #define SET_BANK(s, e, w, r) { \
  14         int sb = (s) >> 11, eb = (e) >> 11; \
  15         for(int i = sb; i <= eb; i++) { \
  16                 if((w) == wdmy) { \
  17                         wbank[i] = wdmy; \
  18                 } else { \
  19                         wbank[i] = (w) + 0x800 * (i - sb); \
  20                 } \
  21                 if((r) == rdmy) { \
  22                         rbank[i] = rdmy; \
  23                 } else { \
  24                         rbank[i] = (r) + 0x800 * (i - sb); \
  25                 } \
  26         } \
  27 }
  28
  29 void TF20::initialize()
  30 {
  31         DEVICE::initialize();
  32         // init memory
  33         memset(rom, 0xff, sizeof(rom));
  34         memset(ram, 0, sizeof(ram));
  35         memset(rdmy, 0xff, sizeof(rdmy));
  36
  37         // load rom image
  38         FILEIO* fio = new FILEIO();
  39         if(fio->Fopen(create_local_path(_T("TF20.ROM")), FILEIO_READ_BINARY)) {
  40                 fio->Fread(rom, sizeof(rom), 1);
  41                 fio->Fclose();
  42         } else if(fio->Fopen(create_local_path(_T("DISK.ROM")), FILEIO_READ_BINARY)) {
  43                 fio->Fread(rom, sizeof(rom), 1);
  44                 fio->Fclose();
  45         } else {
  46                 // stop cpu
  47                 d_cpu->write_signal(SIG_CPU_BUSREQ, 1, 1);
  48         }
  49         delete fio;
  50
  51         // init memory map
  52         SET_BANK(0x0000, 0xffff, ram, ram);
  53 }
  54
  55 void TF20::reset()
  56 {
  57         SET_BANK(0x0000, 0x07ff, ram, rom);
  58         rom_selected = true;
  59 }
  60
  61 uint32_t TF20::read_data8(uint32_t addr)
  62 {
  63         addr &= 0xffff;
  64         return rbank[addr >> 11][addr & 0x7ff];
  65 }
  66
  67 void TF20::write_data8(uint32_t addr, uint32_t data)
  68 {
  69         addr &= 0xffff;
  70         wbank[addr >> 11][addr & 0x7ff] = data;
  71 }
  72
  73 /*
  74 xxF0H-F3H       R/W     uPD7201 (A=A0 B=A1)
  75 xxF6H           R       Shadow ROM Separation
  76 xxF7H           R       Dip Switch (D0-D3)
  77 xxF8H           R/W     uPD765A TC
  78 xxF8H           W       FDDMotor ON/OFF (DO1=ON)
  79 xxFAH           R       uPD765A Status Register
  80 xxFBH           R/W     uPD765A Data Register
  81
  82 Dip Switch
  83 6-1     DriveA: OFF.ON.OFF.OFF.OFF.ON
  84         DriveB: OFF,ON,OFF,OFF,ON,OFF
  85 */
  86
  87 uint32_t TF20::read_io8(uint32_t addr)
  88 {
  89         switch(addr & 0xff) {
  90         case 0xf0:
  91         case 0xf1:
  92         case 0xf2:
  93         case 0xf3:
  94                 return d_sio->read_io8(addr);
  95         case 0xf6:
  96                 SET_BANK(0x0000, 0x07ff, ram, ram);
  97                 rom_selected = false;
  98                 break;
  99         case 0xf7:
 100                 return 0xf0 | (drive_no & 0x0f);
 101         case 0xf8:
 102                 d_fdc->write_signal(SIG_UPD765A_TC, 1, 1);
 103                 break;
 104         case 0xfa:
 105         case 0xfb:
 106                 return d_fdc->read_io8(addr);
 107         case 0xfc:
 108         case 0xfd:
 109         case 0xfe:
 110                 return d_pio->read_io8(addr);
 111         }
 112         return 0xff;
 113 }
 114
 115 void TF20::write_io8(uint32_t addr, uint32_t data)
 116 {
 117         switch(addr & 0xff) {
 118         case 0xf0:
 119         case 0xf1:
 120         case 0xf2:
 121         case 0xf3:
 122                 d_sio->write_io8(addr, data);
 123                 break;
 124         case 0xf8:
 125                 d_fdc->write_signal(SIG_UPD765A_TC, 1, 1);
 126                 break;
 127         case 0xfb:
 128                 d_fdc->write_io8(addr, data);
 129                 break;
 130         case 0xfc:
 131         case 0xfd:
 132         case 0xfe:
 133         case 0xff:
 134                 d_pio->write_io8(addr, data);
 135                 break;
 136         }
 137 }
 138
 139 uint32_t TF20::get_intr_ack()
 140 {
 141         return 0;       // NOP
 142 }
 143
 144 #define STATE_VERSION   1
 145
 146 bool TF20::process_state(FILEIO* state_fio, bool loading)
 147 {
 148         if(!state_fio->StateCheckUint32(STATE_VERSION)) {
 149                 return false;
 150         }
 151         if(!state_fio->StateCheckInt32(this_device_id)) {
 152                 return false;
 153         }
 154         state_fio->StateBuffer(ram, sizeof(ram), 1);
 155         state_fio->StateBool(rom_selected);
 156
 157         // post process
 158         if(loading) {
 159                 if(rom_selected) {
 160                         SET_BANK(0x0000, 0x07ff, ram, rom);
 161                 } else {
 162                         SET_BANK(0x0000, 0x07ff, ram, ram);
 163                 }
 164         }
 165         return true;
 166 }