2 Skelton for retropc emulator
4 Origin : MAME TMS99xx Core
5 Author : Takeda.Toshiya
18 #define SIG_TMS9995_NMI 0
19 #define SIG_TMS9995_INT1 1
20 #define SIG_TMS9995_INT4 2
26 class TMS9995 : public DEVICE
33 DEVICE *d_mem_tmp, *d_io_tmp;
39 uint16_t WP, PC, prevPC, ST;
42 uint8_t irq_level, int_state, int_latch;
43 bool int_pending, int_enabled;
45 uint16_t dec_count, dec_interval;
54 uint16_t RM16(uint16_t addr);
55 void WM16(uint16_t addr, uint16_t val);
56 uint8_t RM8(uint16_t addr);
57 void WM8(uint32_t addr, uint8_t val);
58 inline uint16_t FETCH16();
61 uint16_t IN8(int addr);
62 void OUT8(uint16_t addr, uint16_t val);
63 inline void EXTOUT8(uint16_t addr);
64 uint16_t RCRU(uint16_t addr, int bits);
65 void WCRU(uint16_t addr, int bits, uint16_t val);
67 // cpu internal control
68 void set_irq_line(int irqline, bool state);
71 void contextswitch(uint16_t addr);
74 void run_one_opecode();
76 void run_one_opecode_tmp();
78 void execute(uint16_t op);
79 void h0040(uint16_t op);
80 void h0100(uint16_t op);
81 void h0200(uint16_t op);
82 void h0400(uint16_t op);
83 void h0800(uint16_t op);
84 void h1000(uint16_t op);
85 void h2000(uint16_t op);
86 void xop(uint16_t op);
87 void ldcr_stcr(uint16_t op);
88 void h4000w(uint16_t op);
89 void h4000b(uint16_t op);
90 void illegal(uint16_t op);
91 uint16_t decipheraddr(uint16_t op);
92 uint16_t decipheraddrbyte(uint16_t op);
95 inline void setstat();
96 inline void getstat();
97 inline uint16_t logical_right_shift(uint16_t val, int c);
98 inline int16_t arithmetic_right_shift(int16_t val, int c);
99 inline void setst_lae(int16_t val);
100 inline void setst_byte_laep(int8_t val);
101 inline void setst_e(uint16_t val, uint16_t to);
102 inline void setst_c_lae(uint16_t to, uint16_t val);
103 inline int16_t setst_add_laeco(int a, int b);
104 inline int16_t setst_sub_laeco(int a, int b);
105 inline int8_t setst_addbyte_laecop(int a, int b);
106 inline int8_t setst_subbyte_laecop(int a, int b);
107 inline void setst_laeo(int16_t val);
108 inline uint16_t setst_sra_laec(int16_t a, uint16_t c);
109 inline uint16_t setst_srl_laec(uint16_t a,uint16_t c);
110 inline uint16_t setst_src_laec(uint16_t a,uint16_t c);
111 inline uint16_t setst_sla_laeco(uint16_t a, uint16_t c);
114 TMS9995(VM* parent_vm, EMU* parent_emu) : DEVICE(parent_vm, parent_emu)
118 memset(RAM, 0, sizeof(RAM));
119 irq_level = int_state = int_latch = 0;
122 dec_count = dec_interval = 0;
127 nmi = mid = idle = false;
135 void write_signal(int id, uint32_t data, uint32_t mask);
140 uint32_t get_next_pc()
149 uint32_t get_debug_prog_addr_mask()
153 uint32_t get_debug_data_addr_mask()
157 void write_data8(uint32_t addr, uint32_t data);
158 uint32_t read_data8(uint32_t addr);
159 void write_data16(uint32_t addr, uint32_t data);
160 uint32_t read_data16(uint32_t addr);
161 void write_io8(uint32_t addr, uint32_t data);
162 uint32_t read_io8(uint32_t addr);
163 void write_debug_data8(uint32_t addr, uint32_t data);
164 uint32_t read_debug_data8(uint32_t addr);
165 void write_debug_data16(uint32_t addr, uint32_t data);
166 uint32_t read_debug_data16(uint32_t addr);
167 void write_debug_io8(uint32_t addr, uint32_t data);
168 uint32_t read_debug_io8(uint32_t addr);
169 bool write_debug_reg(const _TCHAR *reg, uint32_t data);
170 void get_debug_regs_info(_TCHAR *buffer, size_t buffer_len);
171 int debug_dasm(uint32_t pc, _TCHAR *buffer, size_t buffer_len);
173 void save_state(FILEIO* state_fio);
174 bool load_state(FILEIO* state_fio);
175 const _TCHAR *get_device_name()
177 return _T("TMS9995");
181 void set_context_mem(DEVICE* device)
185 void set_context_io(DEVICE* device)
190 void set_context_debugger(DEBUGGER* device)