source/src/vm/upd765a.h

   1 /*
   2         Skelton for retropc emulator
   3
   4         Origin : M88
   5         Author : Takeda.Toshiya
   6         Date   : 2006.09.17-
   7
   8         [ uPD765A ]
   9 */
  10
  11 #ifndef _UPD765A_H_
  12 #define _UPD765A_H_
  13
  14 #include "vm.h"
  15 #include "../emu.h"
  16 #include "device.h"
  17
  18 #define SIG_UPD765A_RESET       0
  19 #define SIG_UPD765A_TC          1
  20 #define SIG_UPD765A_MOTOR       2
  21 #define SIG_UPD765A_MOTOR_NEG   3
  22 #define SIG_UPD765A_DRVSEL      4
  23 #define SIG_UPD765A_IRQ_MASK    5
  24 #define SIG_UPD765A_DRQ_MASK    6
  25 #define SIG_UPD765A_FREADY      7
  26
  27 class DISK;
  28 class NOISE;
  29
  30 class UPD765A : public DEVICE
  31 {
  32 private:
  33         // output signals
  34         outputs_t outputs_irq;
  35         outputs_t outputs_drq;
  36         outputs_t outputs_hdu;
  37         outputs_t outputs_index;
  38
  39         // drive noise
  40         NOISE* d_noise_seek;
  41         NOISE* d_noise_head_down;
  42         NOISE* d_noise_head_up;
  43
  44         // fdc
  45         struct {
  46                 uint8_t track;
  47                 uint8_t cur_track;
  48                 uint8_t result;
  49                 bool access;
  50                 bool head_load;
  51                 // timing
  52                 int cur_position;
  53                 int next_trans_position;
  54                 uint32_t prev_clock;
  55         } fdc[4];
  56         DISK* disk[4];
  57
  58         uint8_t hdu, hdue, id[4], eot, gpl, dtl;
  59
  60         int phase, prevphase;
  61         uint8_t status, seekstat, command;
  62         uint32_t result;
  63         int step_rate_time;
  64         int head_unload_time;
  65         bool no_dma_mode, motor_on;
  66 #ifdef UPD765A_DMA_MODE
  67         bool dma_data_lost;
  68 #endif
  69         bool irq_masked, drq_masked;
  70
  71         uint8_t* bufptr;
  72         uint8_t buffer[0x8000];
  73         int count;
  74         int event_phase;
  75         int phase_id, drq_id, lost_id, result7_id, seek_step_id[4], seek_end_id[4], head_unload_id[4];
  76         bool force_ready;
  77         bool reset_signal;
  78         bool prev_index;
  79
  80         // timing
  81         uint32_t prev_drq_clock;
  82
  83         int get_cur_position(int drv);
  84         double get_usec_to_exec_phase();
  85
  86         // update status
  87         void set_irq(bool val);
  88         void set_drq(bool val);
  89         void set_hdu(uint8_t val);
  90
  91         // phase shift
  92         void shift_to_idle();
  93         void shift_to_cmd(int length);
  94         void shift_to_exec();
  95         void shift_to_read(int length);
  96         void shift_to_write(int length);
  97         void shift_to_scan(int length);
  98         void shift_to_result(int length);
  99         void shift_to_result7();
 100         void shift_to_result7_event();
 101         void start_transfer();
 102         void finish_transfer();
 103
 104         // command
 105         void process_cmd(int cmd);
 106         void cmd_sence_devstat();
 107         void cmd_sence_intstat();
 108         uint8_t get_devstat(int drv);
 109         void cmd_seek();
 110         void cmd_recalib();
 111         void seek(int drv, int trk);
 112         void seek_event(int drv);
 113         void cmd_read_data();
 114         void cmd_write_data();
 115         void cmd_scan();
 116         void cmd_read_diagnostic();
 117         void read_data(bool deleted, bool scan);
 118         void write_data(bool deleted);
 119         void read_diagnostic();
 120         uint32_t read_sector();
 121         uint32_t write_sector(bool deleted);
 122         uint32_t find_id();
 123         uint32_t check_cond(bool write);
 124         void get_sector_params();
 125         bool id_incr();
 126         void cmd_read_id();
 127         void cmd_write_id();
 128         uint32_t read_id();
 129         uint32_t write_id();
 130         void cmd_specify();
 131         void cmd_invalid();
 132         void update_head_flag(int drv, bool head_load);
 133
 134 public:
 135         UPD765A(VM* parent_vm, EMU* parent_emu) : DEVICE(parent_vm, parent_emu)
 136         {
 137                 initialize_output_signals(&outputs_irq);
 138                 initialize_output_signals(&outputs_drq);
 139                 initialize_output_signals(&outputs_hdu);
 140                 initialize_output_signals(&outputs_index);
 141                 d_noise_seek = NULL;
 142                 d_noise_head_down = NULL;
 143                 d_noise_head_up = NULL;
 144                 force_ready = false;
 145                 raise_irq_when_media_changed = false;
 146                 set_device_name(_T("uPD765A FDC"));
 147         }
 148         ~UPD765A() {}
 149
 150         // common functions
 151         void initialize();
 152         void release();
 153         void reset();
 154         void write_io8(uint32_t addr, uint32_t data);
 155         uint32_t read_io8(uint32_t addr);
 156         void write_dma_io8(uint32_t addr, uint32_t data);
 157         uint32_t read_dma_io8(uint32_t addr);
 158         void write_signal(int id, uint32_t data, uint32_t mask);
 159         uint32_t read_signal(int ch);
 160         void event_callback(int event_id, int err);
 161         void update_config();
 162         void save_state(FILEIO* state_fio);
 163         bool load_state(FILEIO* state_fio);
 164
 165         // unique function
 166         void set_context_irq(DEVICE* device, int id, uint32_t mask)
 167         {
 168                 register_output_signal(&outputs_irq, device, id, mask);
 169         }
 170         void set_context_drq(DEVICE* device, int id, uint32_t mask)
 171         {
 172                 register_output_signal(&outputs_drq, device, id, mask);
 173         }
 174         void set_context_hdu(DEVICE* device, int id, uint32_t mask)
 175         {
 176                 register_output_signal(&outputs_hdu, device, id, mask);
 177         }
 178         void set_context_index(DEVICE* device, int id, uint32_t mask)
 179         {
 180                 register_output_signal(&outputs_index, device, id, mask);
 181         }
 182         void set_context_noise_seek(NOISE* device)
 183         {
 184                 d_noise_seek = device;
 185         }
 186         NOISE* get_context_noise_seek()
 187         {
 188                 return d_noise_seek;
 189         }
 190         void set_context_noise_head_down(NOISE* device)
 191         {
 192                 d_noise_head_down = device;
 193         }
 194         NOISE* get_context_noise_head_down()
 195         {
 196                 return d_noise_head_down;
 197         }
 198         void set_context_noise_head_up(NOISE* device)
 199         {
 200                 d_noise_head_up = device;
 201         }
 202         NOISE* get_context_noise_head_up()
 203         {
 204                 return d_noise_head_up;
 205         }
 206         DISK* get_disk_handler(int drv)
 207         {
 208                 return disk[drv];
 209         }
 210         void open_disk(int drv, const _TCHAR* file_path, int bank);
 211         void close_disk(int drv);
 212         bool is_disk_inserted(int drv);
 213         bool is_disk_inserted();        // current hdu
 214         bool disk_ejected(int drv);
 215         bool disk_ejected();    // current hdu
 216         void is_disk_protected(int drv, bool value);
 217         bool is_disk_protected(int drv);
 218         uint8_t media_type(int drv);
 219         void set_drive_type(int drv, uint8_t type);
 220         uint8_t get_drive_type(int drv);
 221         void set_drive_rpm(int drv, int rpm);
 222         void set_drive_mfm(int drv, bool mfm);
 223         bool raise_irq_when_media_changed;
 224 };
 225
 226 #endif
 227